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-rw-r--r--arch/arm/mach-exynos/Kconfig34
-rw-r--r--arch/arm/mach-exynos/Makefile5
-rw-r--r--arch/arm/mach-exynos/include/mach/cpu.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-exynos/soc.c2
5 files changed, 40 insertions, 5 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index a6a7597..28a6a60 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -1,9 +1,32 @@
if ARCH_EXYNOS
choice
- prompt "EXYNOS board select"
+ prompt "EXYNOS architecture type select"
optional
+config ARCH_EXYNOS4
+ bool "Exynos4 SoC family"
+ select CPU_V7
+ help
+ Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
+ are multiple SoCs in this family including Exynos4210, Exynos4412,
+ and Exynos4212.
+
+config ARCH_EXYNOS5
+ bool "Exynos5 SoC family"
+ select CPU_V7
+ help
+ Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
+ Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
+ in this family including Exynos5250, Exynos5420 and Exynos5800.
+
+endchoice
+
+if ARCH_EXYNOS4
+
+choice
+ prompt "EXYNOS4 board select"
+
config TARGET_SMDKV310
select SUPPORT_SPL
bool "Exynos4210 SMDKV310 board"
@@ -25,6 +48,14 @@ config TARGET_TRATS2
config TARGET_ODROID
bool "Exynos4412 Odroid board"
+endchoice
+endif
+
+if ARCH_EXYNOS5
+
+choice
+ prompt "EXYNOS5 board select"
+
config TARGET_ODROID_XU3
bool "Exynos5422 Odroid board"
select OF_CONTROL
@@ -68,6 +99,7 @@ config TARGET_PEACH_PIT
select OF_CONTROL
endchoice
+endif
config SYS_SOC
default "exynos"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8542f89..f3c07b7 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -5,7 +5,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += clock.o power.o soc.o system.o pinmux.o tzpc.o
+obj-y += soc.o
+obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
obj-$(CONFIG_EXYNOS5420) += sec_boot.o
@@ -13,6 +14,6 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_EXYNOS5) += clock_init_exynos5.o
obj-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o
obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
-obj-y += spl_boot.o
+obj-y += spl_boot.o tzpc.o
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/mach-exynos/include/mach/cpu.h b/arch/arm/mach-exynos/include/mach/cpu.h
index 14a1692..f12e3d6 100644
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -270,7 +270,7 @@ IS_EXYNOS_TYPE(exynos5420, 0x5420)
IS_EXYNOS_TYPE(exynos5422, 0x5422)
#define SAMSUNG_BASE(device, base) \
-static inline unsigned int __attribute__((no_instrument_function)) \
+static inline unsigned long __attribute__((no_instrument_function)) \
samsung_get_base_##device(void) \
{ \
if (cpu_is_exynos4()) { \
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index 7fc8e61..81363bd 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -1349,7 +1349,7 @@ enum exynos5420_gpio_pin {
};
struct gpio_info {
- unsigned int reg_addr; /* Address of register for this part */
+ unsigned long reg_addr; /* Address of register for this part */
unsigned int max_gpio; /* Maximum GPIO in this part */
};
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index 0f116b1..737a8dd 100644
--- a/arch/arm/mach-exynos/soc.c
+++ b/arch/arm/mach-exynos/soc.c
@@ -11,7 +11,9 @@
void reset_cpu(ulong addr)
{
+#ifdef CONFIG_CPU_V7
writel(0x1, samsung_get_base_swreset());
+#endif
}
#ifndef CONFIG_SYS_DCACHE_OFF