summaryrefslogtreecommitdiff
path: root/arch/arm/include
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-stm32f4/stm32.h1
-rw-r--r--arch/arm/include/asm/cache.h4
-rw-r--r--arch/arm/include/asm/system.h11
3 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 3ed3801..7ca6dc3 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -104,6 +104,7 @@ struct stm32_flash_regs {
#define STM32_FLASH_CR_STRT (1 << 16)
#define STM32_FLASH_CR_LOCK (1 << 31)
#define STM32_FLASH_CR_SNB_OFFSET 3
+#define STM32_FLASH_CR_SNB_MASK (15 << STM32_FLASH_CR_SNB_OFFSET)
enum clock {
CLOCK_CORE,
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index a836e9f..1f63127 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -16,6 +16,9 @@
/*
* Invalidate L2 Cache using co-proc instruction
*/
+#ifdef CONFIG_SYS_THUMB_BUILD
+void invalidate_l2_cache(void);
+#else
static inline void invalidate_l2_cache(void)
{
unsigned int val=0;
@@ -24,6 +27,7 @@ static inline void invalidate_l2_cache(void)
: : "r" (val) : "cc");
isb();
}
+#endif
void l2_cache_enable(void);
void l2_cache_disable(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index cfc7834..71b3108 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -17,6 +17,7 @@
#define PGTABLE_SIZE (0x10000)
/* 2MB granularity */
#define MMU_SECTION_SHIFT 21
+#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
#ifndef __ASSEMBLY__
@@ -278,11 +279,6 @@ enum {
*/
void mmu_page_table_flush(unsigned long start, unsigned long stop);
-#ifdef CONFIG_SYS_NONCACHED_MEMORY
-void noncached_init(void);
-phys_addr_t noncached_alloc(size_t size, size_t align);
-#endif /* CONFIG_SYS_NONCACHED_MEMORY */
-
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)
@@ -302,6 +298,11 @@ phys_addr_t noncached_alloc(size_t size, size_t align);
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option);
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+void noncached_init(void);
+phys_addr_t noncached_alloc(size_t size, size_t align);
+#endif /* CONFIG_SYS_NONCACHED_MEMORY */
+
#endif /* __ASSEMBLY__ */
#endif