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-rw-r--r--arch/arm/include/asm/arch-rockchip/boot_mode.h19
-rw-r--r--arch/arm/include/asm/arch-rockchip/cru_rk3399.h4
-rw-r--r--arch/arm/include/asm/arch-rockchip/pwm.h2
3 files changed, 22 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
new file mode 100644
index 0000000..bd65f60
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -0,0 +1,19 @@
+#ifndef __REBOOT_MODE_H
+#define __REBOOT_MODE_H
+
+/* high 24 bits is tag, low 8 bits is type */
+#define REBOOT_FLAG 0x5242C300
+/* normal boot */
+#define BOOT_NORMAL (REBOOT_FLAG + 0)
+/* enter loader rockusb mode */
+#define BOOT_LOADER (REBOOT_FLAG + 1)
+/* enter recovery */
+#define BOOT_RECOVERY (REBOOT_FLAG + 3)
+/* enter fastboot mode */
+#define BOOT_FASTBOOT (REBOOT_FLAG + 9)
+/* enter charging mode */
+#define BOOT_CHARGING (REBOOT_FLAG + 11)
+/* enter usb mass storage mode */
+#define BOOT_UMS (REBOOT_FLAG + 12)
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index c919f47..6776e48 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -64,9 +64,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
#define APLL_HZ (600*MHz)
#define GPLL_HZ (594*MHz)
#define CPLL_HZ (384*MHz)
-#define PPLL_HZ (594*MHz)
+#define PPLL_HZ (676*MHz)
-#define PMU_PCLK_HZ (99*MHz)
+#define PMU_PCLK_HZ (48*MHz)
#define ACLKM_CORE_HZ (300*MHz)
#define ATCLK_CORE_HZ (300*MHz)
diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h
index 08ff945..5d9a178 100644
--- a/arch/arm/include/asm/arch-rockchip/pwm.h
+++ b/arch/arm/include/asm/arch-rockchip/pwm.h
@@ -10,8 +10,8 @@
struct rk3288_pwm {
u32 cnt;
- u32 period_hpr;
u32 duty_lpr;
+ u32 period_hpr;
u32 ctrl;
};
check_member(rk3288_pwm, ctrl, 0xc);