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Diffstat (limited to 'arch/arm/include/asm/arch-uniphier/sg-regs.h')
-rw-r--r--arch/arm/include/asm/arch-uniphier/sg-regs.h109
1 files changed, 77 insertions, 32 deletions
diff --git a/arch/arm/include/asm/arch-uniphier/sg-regs.h b/arch/arm/include/asm/arch-uniphier/sg-regs.h
index fa5e6ae..4ae67c8 100644
--- a/arch/arm/include/asm/arch-uniphier/sg-regs.h
+++ b/arch/arm/include/asm/arch-uniphier/sg-regs.h
@@ -25,22 +25,29 @@
/* Memory Configuration */
#define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
-#define SG_MEMCONF_CH0_SIZE_64MB ((0x0 << 10) | (0x01 << 0))
-#define SG_MEMCONF_CH0_SIZE_128MB ((0x0 << 10) | (0x02 << 0))
-#define SG_MEMCONF_CH0_SIZE_256MB ((0x0 << 10) | (0x03 << 0))
-#define SG_MEMCONF_CH0_SIZE_512MB ((0x1 << 10) | (0x00 << 0))
-#define SG_MEMCONF_CH0_SIZE_1024MB ((0x1 << 10) | (0x01 << 0))
+#define SG_MEMCONF_CH0_SZ_64M ((0x0 << 10) | (0x01 << 0))
+#define SG_MEMCONF_CH0_SZ_128M ((0x0 << 10) | (0x02 << 0))
+#define SG_MEMCONF_CH0_SZ_256M ((0x0 << 10) | (0x03 << 0))
+#define SG_MEMCONF_CH0_SZ_512M ((0x1 << 10) | (0x00 << 0))
+#define SG_MEMCONF_CH0_SZ_1G ((0x1 << 10) | (0x01 << 0))
#define SG_MEMCONF_CH0_NUM_1 (0x1 << 8)
#define SG_MEMCONF_CH0_NUM_2 (0x0 << 8)
-#define SG_MEMCONF_CH1_SIZE_64MB ((0x0 << 11) | (0x01 << 2))
-#define SG_MEMCONF_CH1_SIZE_128MB ((0x0 << 11) | (0x02 << 2))
-#define SG_MEMCONF_CH1_SIZE_256MB ((0x0 << 11) | (0x03 << 2))
-#define SG_MEMCONF_CH1_SIZE_512MB ((0x1 << 11) | (0x00 << 2))
-#define SG_MEMCONF_CH1_SIZE_1024MB ((0x1 << 11) | (0x01 << 2))
+#define SG_MEMCONF_CH1_SZ_64M ((0x0 << 11) | (0x01 << 2))
+#define SG_MEMCONF_CH1_SZ_128M ((0x0 << 11) | (0x02 << 2))
+#define SG_MEMCONF_CH1_SZ_256M ((0x0 << 11) | (0x03 << 2))
+#define SG_MEMCONF_CH1_SZ_512M ((0x1 << 11) | (0x00 << 2))
+#define SG_MEMCONF_CH1_SZ_1G ((0x1 << 11) | (0x01 << 2))
#define SG_MEMCONF_CH1_NUM_1 (0x1 << 9)
#define SG_MEMCONF_CH1_NUM_2 (0x0 << 9)
+#define SG_MEMCONF_CH2_SZ_64M ((0x0 << 26) | (0x01 << 16))
+#define SG_MEMCONF_CH2_SZ_128M ((0x0 << 26) | (0x02 << 16))
+#define SG_MEMCONF_CH2_SZ_256M ((0x0 << 26) | (0x03 << 16))
+#define SG_MEMCONF_CH2_SZ_512M ((0x1 << 26) | (0x00 << 16))
+#define SG_MEMCONF_CH2_NUM_1 (0x1 << 24)
+#define SG_MEMCONF_CH2_NUM_2 (0x0 << 24)
+
#define SG_MEMCONF_SPARSEMEM (0x1 << 4)
/* Pin Control */
@@ -101,6 +108,7 @@
#else
#include <linux/types.h>
+#include <linux/sizes.h>
#include <asm/io.h>
static inline void sg_set_pinsel(int n, int value)
@@ -111,24 +119,24 @@ static inline void sg_set_pinsel(int n, int value)
static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
{
- int size_mb = (size >> 20) / num;
+ int size_mb = size / num;
u32 ret;
switch (size_mb) {
- case 64:
- ret = SG_MEMCONF_CH0_SIZE_64MB;
+ case SZ_64M:
+ ret = SG_MEMCONF_CH0_SZ_64M;
break;
- case 128:
- ret = SG_MEMCONF_CH0_SIZE_128MB;
+ case SZ_128M:
+ ret = SG_MEMCONF_CH0_SZ_128M;
break;
- case 256:
- ret = SG_MEMCONF_CH0_SIZE_256MB;
+ case SZ_256M:
+ ret = SG_MEMCONF_CH0_SZ_256M;
break;
- case 512:
- ret = SG_MEMCONF_CH0_SIZE_512MB;
+ case SZ_512M:
+ ret = SG_MEMCONF_CH0_SZ_512M;
break;
- case 1024:
- ret = SG_MEMCONF_CH0_SIZE_1024MB;
+ case SZ_1G:
+ ret = SG_MEMCONF_CH0_SZ_1G;
break;
default:
BUG();
@@ -151,24 +159,24 @@ static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
static inline u32 sg_memconf_val_ch1(unsigned long size, int num)
{
- int size_mb = (size >> 20) / num;
+ int size_mb = size / num;
u32 ret;
switch (size_mb) {
- case 64:
- ret = SG_MEMCONF_CH1_SIZE_64MB;
+ case SZ_64M:
+ ret = SG_MEMCONF_CH1_SZ_64M;
break;
- case 128:
- ret = SG_MEMCONF_CH1_SIZE_128MB;
+ case SZ_128M:
+ ret = SG_MEMCONF_CH1_SZ_128M;
break;
- case 256:
- ret = SG_MEMCONF_CH1_SIZE_256MB;
+ case SZ_256M:
+ ret = SG_MEMCONF_CH1_SZ_256M;
break;
- case 512:
- ret = SG_MEMCONF_CH1_SIZE_512MB;
+ case SZ_512M:
+ ret = SG_MEMCONF_CH1_SZ_512M;
break;
- case 1024:
- ret = SG_MEMCONF_CH1_SIZE_1024MB;
+ case SZ_1G:
+ ret = SG_MEMCONF_CH1_SZ_1G;
break;
default:
BUG();
@@ -188,6 +196,43 @@ static inline u32 sg_memconf_val_ch1(unsigned long size, int num)
}
return ret;
}
+
+static inline u32 sg_memconf_val_ch2(unsigned long size, int num)
+{
+ int size_mb = size / num;
+ u32 ret;
+
+ switch (size_mb) {
+ case SZ_64M:
+ ret = SG_MEMCONF_CH2_SZ_64M;
+ break;
+ case SZ_128M:
+ ret = SG_MEMCONF_CH2_SZ_128M;
+ break;
+ case SZ_256M:
+ ret = SG_MEMCONF_CH2_SZ_256M;
+ break;
+ case SZ_512M:
+ ret = SG_MEMCONF_CH2_SZ_512M;
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ switch (num) {
+ case 1:
+ ret |= SG_MEMCONF_CH2_NUM_1;
+ break;
+ case 2:
+ ret |= SG_MEMCONF_CH2_NUM_2;
+ break;
+ default:
+ BUG();
+ break;
+ }
+ return ret;
+}
#endif /* __ASSEMBLY__ */
#endif /* ARCH_SG_REGS_H */