diff options
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi')
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 9 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/dram.h | 28 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/sys_proto.h | 10 |
3 files changed, 21 insertions, 26 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h index d297ed0..c28ee05 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h @@ -144,7 +144,16 @@ struct sunxi_ccm_reg { #define PLL1_CFG_DEFAULT 0xa1005000 +#if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I +/* + * Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, + * halving the mbus frequency, so set it to 300 MHz ourselves and base the + * mbus divider on that. + */ +#define PLL6_CFG_DEFAULT 0xa1009900 +#else #define PLL6_CFG_DEFAULT 0xa1009911 +#endif /* nand clock */ #define NAND_CLK_SRC_OSC24 0 diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 7ff43e6..aedd194 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -25,31 +25,7 @@ #endif unsigned long sunxi_dram_init(void); - -/* - * Wait up to 1s for value to be set in given part of reg. - */ -static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val) -{ - unsigned long tmo = timer_get_us() + 1000000; - - while ((readl(reg) & mask) != val) { - if (timer_get_us() > tmo) - panic("Timeout initialising DRAM\n"); - } -} - -/* - * Test if memory at offset offset matches memory at begin of DRAM - */ -static inline bool mctl_mem_matches(u32 offset) -{ - /* Try to write different values to RAM at two addresses */ - writel(0, CONFIG_SYS_SDRAM_BASE); - writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); - /* Check if the same value is actually observed when reading back */ - return readl(CONFIG_SYS_SDRAM_BASE) == - readl(CONFIG_SYS_SDRAM_BASE + offset); -} +void mctl_await_completion(u32 *reg, u32 mask, u32 val); +bool mctl_mem_matches(u32 offset); #endif /* _SUNXI_DRAM_H */ diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h index c3e636e..60a5bd8 100644 --- a/arch/arm/include/asm/arch-sunxi/sys_proto.h +++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h @@ -13,4 +13,14 @@ void sdelay(unsigned long); +/* return_to_fel() - Return to BROM from SPL + * + * This returns back into the BROM after U-Boot SPL has performed its initial + * init. It uses the provided lr and sp to do so. + * + * @lr: BROM link register value (return address) + * @sp: BROM stack pointer + */ +void return_to_fel(uint32_t lr, uint32_t sp); + #endif |