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Diffstat (limited to 'arch/arm/include/asm/arch-mx5/imx-regs.h')
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4fa6658..cef4190 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -43,6 +43,7 @@
#define NFC_BASE_ADDR_AXI 0xF7FF0000
#define IRAM_BASE_ADDR 0xF8000000
#define CS1_BASE_ADDR 0xF4000000
+#define SATA_BASE_ADDR 0x10000000
#else
#error "CPU_TYPE not defined"
#endif
@@ -93,6 +94,7 @@
#define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000)
#define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000)
#define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000)
+#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000)
#endif
/*
* AIPS 2
@@ -133,6 +135,10 @@
#define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000)
#define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000)
+#if defined(CONFIG_MX53)
+#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000)
+#endif
+
/*
* WEIM CSnGCR1
*/
@@ -485,6 +491,11 @@ struct iim_regs {
} bank[4];
};
+struct fuse_bank0_regs {
+ u32 fuse0_23[24];
+ u32 gp[8];
+};
+
struct fuse_bank1_regs {
u32 fuse0_8[9];
u32 mac_addr[6];