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-rw-r--r--arch/arm/include/asm/arch-keystone/emif_defs.h73
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware-k2hk.h7
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware.h30
-rw-r--r--arch/arm/include/asm/arch-keystone/nand_defs.h23
4 files changed, 4 insertions, 129 deletions
diff --git a/arch/arm/include/asm/arch-keystone/emif_defs.h b/arch/arm/include/asm/arch-keystone/emif_defs.h
deleted file mode 100644
index a3378aa..0000000
--- a/arch/arm/include/asm/arch-keystone/emif_defs.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * emif definitions to re-use davinci emif driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-struct davinci_emif_regs {
- uint32_t ercsr;
- uint32_t awccr;
- uint32_t sdbcr;
- uint32_t sdrcr;
- uint32_t abncr[4];
- uint32_t sdtimr;
- uint32_t ddrsr;
- uint32_t ddrphycr;
- uint32_t ddrphysr;
- uint32_t totar;
- uint32_t totactr;
- uint32_t ddrphyid_rev;
- uint32_t sdsretr;
- uint32_t eirr;
- uint32_t eimr;
- uint32_t eimsr;
- uint32_t eimcr;
- uint32_t ioctrlr;
- uint32_t iostatr;
- uint32_t rsvd0;
- uint32_t one_nand_cr;
- uint32_t nandfcr;
- uint32_t nandfsr;
- uint32_t rsvd1[2];
- uint32_t nandfecc[4];
- uint32_t rsvd2[15];
- uint32_t nand4biteccload;
- uint32_t nand4bitecc[4];
- uint32_t nanderradd1;
- uint32_t nanderradd2;
- uint32_t nanderrval1;
- uint32_t nanderrval2;
-};
-
-#define davinci_emif_regs \
- ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
-
-#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2))
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4)
-#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
-#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
-#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
-
-/* Chip Select setup */
-#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
-#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
-#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
-#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
-#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
-#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
-#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
-#define DAVINCI_ABCR_TA(n) ((n) << 2)
-#define DAVINCI_ABCR_ASIZE_16BIT 1
-#define DAVINCI_ABCR_ASIZE_8BIT 0
-
-#endif
diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
index 7ac2662..50ce649 100644
--- a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
@@ -9,13 +9,6 @@
#ifndef __ASM_ARCH_HARDWARE_K2HK_H
#define __ASM_ARCH_HARDWARE_K2HK_H
-#define K2HK_ASYNC_EMIF_CNTRL_BASE 0x21000a00
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE K2HK_ASYNC_EMIF_CNTRL_BASE
-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE 0x34000000
-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE 0x38000000
-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE 0x3c000000
-
#define K2HK_PLL_CNTRL_BASE 0x02310000
#define CLOCK_BASE K2HK_PLL_CNTRL_BASE
#define KS2_RSTCTRL (K2HK_PLL_CNTRL_BASE + 0xe8)
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h
index 6c532ca..ffdecbf 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -22,32 +22,6 @@
typedef volatile unsigned int dv_reg;
typedef volatile unsigned int *dv_reg_p;
-#define ASYNC_EMIF_NUM_CS 4
-#define ASYNC_EMIF_MODE_NOR 0
-#define ASYNC_EMIF_MODE_NAND 1
-#define ASYNC_EMIF_MODE_ONENAND 2
-#define ASYNC_EMIF_PRESERVE -1
-
-struct async_emif_config {
- unsigned mode;
- unsigned select_strobe;
- unsigned extend_wait;
- unsigned wr_setup;
- unsigned wr_strobe;
- unsigned wr_hold;
- unsigned rd_setup;
- unsigned rd_strobe;
- unsigned rd_hold;
- unsigned turn_around;
- enum {
- ASYNC_EMIF_8 = 0,
- ASYNC_EMIF_16 = 1,
- ASYNC_EMIF_32 = 2,
- } width;
-};
-
-void init_async_emif(int num_cs, struct async_emif_config *config);
-
struct ddr3_phy_config {
unsigned int pllcr;
unsigned int pgcr1_mask;
@@ -145,6 +119,10 @@ struct ddr3_emif_config {
#define KS2_UART0_BASE 0x02530c00
#define KS2_UART1_BASE 0x02531000
+/* AEMIF */
+#define KS2_AEMIF_CNTRL_BASE 0x21000a00
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
+
#ifdef CONFIG_SOC_K2HK
#include <asm/arch/hardware-k2hk.h>
#endif
diff --git a/arch/arm/include/asm/arch-keystone/nand_defs.h b/arch/arm/include/asm/arch-keystone/nand_defs.h
deleted file mode 100644
index 58417db..0000000
--- a/arch/arm/include/asm/arch-keystone/nand_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * nand driver definitions to re-use davinci nand driver on Keystone2
- *
- * (C) Copyright 2012-2014
- * Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <linux/mtd/nand.h>
-
-#define MASK_CLE 0x4000
-#define MASK_ALE 0x2000
-
-#define NAND_READ_START 0x00
-#define NAND_READ_END 0x30
-#define NAND_STATUS 0x70
-
-#endif
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