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Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
-rw-r--r--arch/arm/include/asm/arch-am33xx/clock.h7
-rw-r--r--arch/arm/include/asm/arch-am33xx/cpu.h2
-rw-r--r--arch/arm/include/asm/arch-am33xx/hardware_am43xx.h13
3 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h
index 519249e..7637457 100644
--- a/arch/arm/include/asm/arch-am33xx/clock.h
+++ b/arch/arm/include/asm/arch-am33xx/clock.h
@@ -98,13 +98,12 @@ extern const struct dpll_regs dpll_mpu_regs;
extern const struct dpll_regs dpll_core_regs;
extern const struct dpll_regs dpll_per_regs;
extern const struct dpll_regs dpll_ddr_regs;
-extern const struct dpll_params dpll_mpu;
-extern const struct dpll_params dpll_core;
-extern const struct dpll_params dpll_per;
-extern const struct dpll_params dpll_ddr;
extern struct cm_wkuppll *const cmwkup;
+const struct dpll_params *get_dpll_mpu_params(void);
+const struct dpll_params *get_dpll_core_params(void);
+const struct dpll_params *get_dpll_per_params(void);
const struct dpll_params *get_dpll_ddr_params(void);
void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *);
void prcm_init(void);
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 19b8469..3ee37dc 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -480,6 +480,8 @@ struct ctrl_stat {
unsigned int statusreg; /* ofset 0x40 */
unsigned int resv2[51];
unsigned int secure_emif_sdram_config; /* offset 0x0110 */
+ unsigned int resv3[319];
+ unsigned int dev_attr;
};
/* AM33XX GPIO registers */
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index 0a3f8ee..468521b 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -63,4 +63,17 @@
#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL (CM_PER + 0x5c0)
#define USBPHYOCPSCP_MODULE_EN (1 << 1)
+/* Control status register */
+#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31)
+#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31
+#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29)
+#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29
+#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22)
+#define CTRL_SYSBOOT_15_14_SHIFT 22
+
+#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0
+#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1
+
+#define NUM_CRYSTAL_FREQ 0x4
+
#endif /* __AM43XX_HARDWARE_AM43XX_H */