diff options
Diffstat (limited to 'arch/arm/imx-common')
-rw-r--r-- | arch/arm/imx-common/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/imx-common/cpu.c | 4 | ||||
-rw-r--r-- | arch/arm/imx-common/sata.c | 34 |
3 files changed, 39 insertions, 2 deletions
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 2c80441..ee5c872 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -17,6 +17,9 @@ endif ifeq ($(SOC),$(filter $(SOC),mx6 mxs)) obj-y += misc.o endif +ifeq ($(SOC),$(filter $(SOC),mx6)) +obj-$(CONFIG_CMD_SATA) += sata.o +endif obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 0cd2538..9231649 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -51,9 +51,9 @@ char *get_reset_cause(void) #if defined(CONFIG_MX53) || defined(CONFIG_MX6) #if defined(CONFIG_MX53) -#define MEMCTL_BASE ESDCTL_BASE_ADDR; +#define MEMCTL_BASE ESDCTL_BASE_ADDR #else -#define MEMCTL_BASE MMDC_P0_BASE_ADDR; +#define MEMCTL_BASE MMDC_P0_BASE_ADDR #endif static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; static const unsigned char bank_lookup[] = {3, 2}; diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c new file mode 100644 index 0000000..2e69486 --- /dev/null +++ b/arch/arm/imx-common/sata.c @@ -0,0 +1,34 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/imx-common/iomux-v3.h> +#include <asm/arch/iomux.h> +#include <asm/io.h> +#include <asm/arch/clock.h> + +int setup_sata(void) +{ + struct iomuxc_base_regs *const iomuxc_regs + = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR; + + int ret = enable_sata_clock(); + if (ret) + return ret; + + clrsetbits_le32(&iomuxc_regs->gpr[13], + IOMUXC_GPR13_SATA_MASK, + IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB + |IOMUXC_GPR13_SATA_PHY_7_SATA2M + |IOMUXC_GPR13_SATA_SPEED_3G + |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT) + |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED + |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16 + |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB + |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V + |IOMUXC_GPR13_SATA_PHY_1_SLOW); + + return 0; +} |