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-rw-r--r--arch/arm/dts/zynqmp-ep108.dts10
-rw-r--r--arch/arm/dts/zynqmp.dtsi42
2 files changed, 42 insertions, 10 deletions
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index ee9d0fe..1928b0b 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -23,6 +23,8 @@
spi0 = &qspi;
spi1 = &spi0;
spi2 = &spi1;
+ usb0 = &usb0;
+ usb1 = &usb1;
};
chosen {
@@ -154,12 +156,20 @@
&usb0 {
status = "okay";
+};
+
+&dwc3_0 {
+ status = "okay";
dr_mode = "peripheral";
maximum-speed = "high-speed";
};
&usb1 {
status = "okay";
+};
+
+&dwc3_1 {
+ status = "okay";
dr_mode = "host";
maximum-speed = "high-speed";
};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 324d71b..8413f16 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -796,23 +796,45 @@
};
usb0: usb@fe200000 {
- compatible = "snps,dwc3";
+ #address-cells = <2>;
+ #size-cells = <1>;
status = "disabled";
- interrupt-parent = <&gic>;
- interrupts = <0 65 4>;
- reg = <0x0 0xfe200000 0x40000>;
- clock-names = "clk_xin", "clk_ahb";
+ compatible = "xlnx,zynqmp-dwc3";
+ clock-names = "bus_clk", "ref_clk";
+ clocks = <&clk125>, <&clk125>;
power-domains = <&pd_usb0>;
+ ranges;
+
+ dwc3_0: dwc3@fe200000 {
+ compatible = "snps,dwc3";
+ status = "disabled";
+ reg = <0x0 0xfe200000 0x40000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 65 4>;
+ /* snps,quirk-frame-length-adjustment = <0x20>; */
+ snps,refclk_fladj;
+ };
};
usb1: usb@fe300000 {
- compatible = "snps,dwc3";
+ #address-cells = <2>;
+ #size-cells = <1>;
status = "disabled";
- interrupt-parent = <&gic>;
- interrupts = <0 70 4>;
- reg = <0x0 0xfe300000 0x40000>;
- clock-names = "clk_xin", "clk_ahb";
+ compatible = "xlnx,zynqmp-dwc3";
+ clock-names = "bus_clk", "ref_clk";
+ clocks = <&clk125>, <&clk125>;
power-domains = <&pd_usb1>;
+ ranges;
+
+ dwc3_1: dwc3@fe300000 {
+ compatible = "snps,dwc3";
+ status = "disabled";
+ reg = <0x0 0xfe300000 0x40000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 70 4>;
+ /* snps,quirk-frame-length-adjustment = <0x20>; */
+ snps,refclk_fladj;
+ };
};
watchdog0: watchdog@fd4d0000 {