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-rw-r--r--arch/arm/dts/Makefile6
-rw-r--r--arch/arm/dts/armada-xp-theadorable.dts143
-rw-r--r--arch/arm/dts/fsl-ls1043a-qds-duart.dts16
-rw-r--r--arch/arm/dts/fsl-ls1043a-qds-lpuart.dts16
-rw-r--r--arch/arm/dts/fsl-ls1043a-qds.dtsi (renamed from arch/arm/dts/fsl-ls1043a-qds.dts)51
-rw-r--r--arch/arm/dts/fsl-ls1043a.dtsi64
-rw-r--r--arch/arm/dts/zynq-7000.dtsi10
-rw-r--r--arch/arm/dts/zynq-zc770-xm010.dts5
-rw-r--r--arch/arm/dts/zynq-zc770-xm011.dts17
-rw-r--r--arch/arm/dts/zynq-zc770-xm012.dts17
-rw-r--r--arch/arm/dts/zynq-zc770-xm013.dts35
-rw-r--r--arch/arm/dts/zynqmp-ep108.dts2
-rw-r--r--arch/arm/dts/zynqmp.dtsi6
13 files changed, 337 insertions, 51 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1c7d359..77efb29 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -53,7 +53,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-388-gp.dtb \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
- armada-xp-synology-ds414.dtb
+ armada-xp-synology-ds414.dtb \
+ armada-xp-theadorable.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld4-ref.dtb \
@@ -97,7 +98,8 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb
dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-ls2080a-rdb.dtb
-dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
+ fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
new file mode 100644
index 0000000..cf1be2a
--- /dev/null
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -0,0 +1,143 @@
+/*
+ * Device Tree file for Marvell Armada XP theadorable board
+ *
+ * Copyright (C) 2013-2014 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-xp-mv78260.dtsi"
+
+/ {
+ model = "Marvell Armada XP theadorable";
+ compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ spi0 = &spi0;
+ ethernet0 = &eth0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+ MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
+
+ internal-regs {
+ serial@12000 {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@12100 {
+ status = "okay";
+ };
+
+ serial@12200 {
+ status = "okay";
+ };
+
+ serial@12300 {
+ status = "okay";
+ };
+
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "sgmii";
+ };
+
+ usb@50000 {
+ status = "okay";
+ };
+
+ usb@51000 {
+ status = "okay";
+ };
+
+ spi0: spi@10600 {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q128a13", "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <27777777>;
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts
new file mode 100644
index 0000000..2124e38
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts
@@ -0,0 +1,16 @@
+/*
+ * Device Tree file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a-qds.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &duart0;
+ };
+};
diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts
new file mode 100644
index 0000000..18adb97
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts
@@ -0,0 +1,16 @@
+/*
+ * Device Tree file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a-qds.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &lpuart0;
+ };
+};
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dtsi
index 7435222..66efe67 100644
--- a/arch/arm/dts/fsl-ls1043a-qds.dts
+++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi
@@ -10,11 +10,56 @@
* warranty of any kind, whether express or implied.
*/
-/dts-v1/;
/include/ "fsl-ls1043a.dtsi"
/ {
model = "LS1043A QDS Board";
+ aliases {
+ spi0 = &qspi;
+ spi1 = &dspi0;
+ };
+};
+
+&dspi0 {
+ bus-num = <0>;
+ status = "okay";
+
+ dflash0: n25q128a {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <1000000>; /* input clock */
+ };
+
+ dflash1: sst25wf040b {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <3500000>;
+ reg = <1>;
+ };
+
+ dflash2: en25s64 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <3500000>;
+ reg = <2>;
+ };
+};
+
+&qspi {
+ bus-num = <0>;
+ status = "okay";
+
+ qflash0: s25fl128s@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
};
&i2c0 {
@@ -122,3 +167,7 @@
&duart1 {
status = "okay";
};
+
+&lpuart0 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index 85ea81e..66b409a 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -182,5 +182,69 @@
interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
};
+
+ lpuart0: serial@2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2950000 0x0 0x1000>;
+ interrupts = <0 48 0x4>;
+ clocks = <&sysclk>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial@2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2960000 0x0 0x1000>;
+ interrupts = <0 49 0x4>;
+ clocks = <&sysclk>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial@2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2970000 0x0 0x1000>;
+ interrupts = <0 50 0x4>;
+ clock-names = "ipg";
+ clocks = <&sysclk>;
+ status = "disabled";
+ };
+
+ lpuart3: serial@2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2980000 0x0 0x1000>;
+ interrupts = <0 51 0x4>;
+ clocks = <&sysclk>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial@2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x2990000 0x0 0x1000>;
+ interrupts = <0 52 0x4>;
+ clocks = <&sysclk>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial@29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x0 0x29a0000 0x0 0x1000>;
+ interrupts = <0 53 0x4>;
+ clocks = <&sysclk>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+ qspi: quadspi@1550000 {
+ compatible = "fsl,vf610-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1550000 0x10000>,
+ <0x40000000 0x4000000>;
+ num-cs = <2>;
+ big-endian;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 83be51a..2d786f0 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -234,7 +234,7 @@
interrupt-parent = <&intc>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
- } ;
+ };
sdhci1: sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
@@ -244,7 +244,7 @@
interrupt-parent = <&intc>;
interrupts = <0 47 4>;
reg = <0xe0101000 0x1000>;
- } ;
+ };
slcr: slcr@f8000000 {
#address-cells = <1>;
@@ -326,11 +326,11 @@
scutimer: timer@f8f00600 {
interrupt-parent = <&intc>;
- interrupts = < 1 13 0x301 >;
+ interrupts = <1 13 0x301>;
compatible = "arm,cortex-a9-twd-timer";
- reg = < 0xf8f00600 0x20 >;
+ reg = <0xf8f00600 0x20>;
clocks = <&clkc 4>;
- } ;
+ };
usb0: usb@e0002000 {
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
index 07e2b7a..b6982c0 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -21,9 +21,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts
index 77e3bb0..4fed221 100644
--- a/arch/arm/dts/zynq-zc770-xm011.dts
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -18,9 +18,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -34,12 +33,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can0 {
status = "okay";
};
@@ -54,6 +47,12 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts
index 3e1769a..8d69f0e 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -31,12 +30,6 @@
};
};
-&spi1 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can1 {
status = "okay";
};
@@ -61,6 +54,12 @@
};
};
+&spi1 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts
index 288e248..77fdfcc 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart0;
- stdout-path = &uart0;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -31,21 +30,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
- eeprom: at25@0 {
- at25,byte-len = <8192>;
- at25,addr-mode = <2>;
- at25,page-size = <32>;
-
- compatible = "atmel,at25";
- reg = <2>;
- spi-max-frequency = <1000000>;
- };
-};
-
&can1 {
status = "okay";
};
@@ -74,6 +58,21 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+ eeprom: at25@0 {
+ at25,byte-len = <8192>;
+ at25,addr-mode = <2>;
+ at25,page-size = <32>;
+
+ compatible = "atmel,at25";
+ reg = <2>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 4481bd0..754604e 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -41,7 +41,7 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0{
+ phy0: phy@0 {
reg = <0>;
max-speed = <100>;
};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 24a34e6..8733604 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -520,7 +520,7 @@
};
uart0: serial@ff000000 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 21 4>;
@@ -529,7 +529,7 @@
};
uart1: serial@ff010000 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 22 4>;
@@ -559,7 +559,7 @@
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 52 1>;
+ interrupts = <0 113 1>;
reg = <0x0 0xfd4d0000 0x1000>;
timeout-sec = <10>;
};