summaryrefslogtreecommitdiff
path: root/arch/arm/dts/imx6sx-17x17-arm2.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/imx6sx-17x17-arm2.dts')
-rw-r--r--arch/arm/dts/imx6sx-17x17-arm2.dts73
1 files changed, 57 insertions, 16 deletions
diff --git a/arch/arm/dts/imx6sx-17x17-arm2.dts b/arch/arm/dts/imx6sx-17x17-arm2.dts
index 40b381e..d29143b 100644
--- a/arch/arm/dts/imx6sx-17x17-arm2.dts
+++ b/arch/arm/dts/imx6sx-17x17-arm2.dts
@@ -218,10 +218,13 @@
};
&i2c1 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1_1>;
- status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ pinctrl-1 = <&pinctrl_i2c1_1_gpio>;
+ scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
pmic: pfuze100@08 {
compatible = "fsl,pfuze100";
@@ -325,10 +328,13 @@
};
&i2c2 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2_1>;
- status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c2_1>;
+ pinctrl-1 = <&pinctrl_i2c2_1_gpio>;
+ scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
max7322_1: gpio@68 {
compatible = "maxim,max7322";
@@ -357,17 +363,23 @@
&i2c3 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3_1>;
- status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3_1>;
+ pinctrl-1 = <&pinctrl_i2c3_1_gpio>;
+ scl-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+ status = "okay";
};
&i2c4 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4_1>;
- status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c4_1>;
+ pinctrl-1 = <&pinctrl_i2c4_1_gpio>;
+ scl-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ status = "okay";
};
&iomuxc {
@@ -776,6 +788,13 @@
>;
};
+ pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+ fsl,pins = <
+ MX6SX_PAD_GPIO1_IO01__GPIO1_IO_1 0x1b8b1
+ MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x1b8b1
+ >;
+ };
+
pinctrl_i2c1_2: i2c1grp-2 {
fsl,pins = <
MX6SX_PAD_CSI_DATA01__I2C1_SDA 0x4001b8b1
@@ -791,6 +810,13 @@
MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
>;
};
+
+ pinctrl_i2c2_1_gpio: i2c2grp-1-gpio {
+ fsl,pins = <
+ MX6SX_PAD_GPIO1_IO03__GPIO1_IO_3 0x1b8b1
+ MX6SX_PAD_GPIO1_IO02__GPIO1_IO_2 0x1b8b1
+ >;
+ };
};
i2c3 {
@@ -801,6 +827,13 @@
>;
};
+ pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+ fsl,pins = <
+ MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x1b8b1
+ MX6SX_PAD_KEY_COL4__GPIO2_IO_14 0x1b8b1
+ >;
+ };
+
pinctrl_i2c3_2: i2c3grp-2 {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
@@ -816,6 +849,14 @@
MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
>;
};
+
+ pinctrl_i2c4_1_gpio: i2c4grp-1-gpio {
+ fsl,pins = <
+ MX6SX_PAD_CSI_DATA07__GPIO1_IO_21 0x1b8b1
+ MX6SX_PAD_CSI_DATA06__GPIO1_IO_20 0x1b8b1
+ >;
+ };
+
pinctrl_i2c4_2: i2c4grp-2 {
fsl,pins = <
MX6SX_PAD_SD3_DATA1__I2C4_SDA 0x4001b8b1