diff options
Diffstat (limited to 'arch/arm/cpu')
68 files changed, 352 insertions, 637 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 4ebf38d..248431b 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -23,6 +23,7 @@ #include <common.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> #include <asm/io.h> static u32 mx31_decode_pll(u32 reg, u32 infreq) @@ -60,7 +61,7 @@ static u32 mx31_get_mcu_main_clk(void) return mx31_get_mpl_dpdgck_clk(); } -u32 mx31_get_ipg_clk(void) +static u32 mx31_get_ipg_clk(void) { u32 freq = mx31_get_mcu_main_clk(); u32 pdr0 = __REG(CCM_PDR0); @@ -78,6 +79,24 @@ void mx31_dump_clocks(void) printf("ipg clock : %dHz\n", mx31_get_ipg_clk()); } +unsigned int mxc_get_clock(enum mxc_clock clk) +{ + switch (clk) { + case MXC_ARM_CLK: + return mx31_get_mcu_main_clk(); + case MXC_IPG_CLK: + case MXC_CSPI_CLK: + case MXC_UART_CLK: + return mx31_get_ipg_clk(); + } + return -1; +} + +u32 imx_get_uartclk(void) +{ + return mxc_get_clock(MXC_UART_CLK); +} + void mx31_gpio_mux(unsigned long mode) { unsigned long reg, shift, tmp; diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index c4bc3b3..c05a39d 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -106,18 +106,6 @@ int timer_init (void) return 0; } -void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = GPTCNT; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { ulong now = GPTCNT; /* current tick value */ @@ -147,11 +135,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - gd->tbl = time_to_tick(t); -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile index 20f36e3..284cdc5 100644 --- a/arch/arm/cpu/arm1136/mx35/Makefile +++ b/arch/arm/cpu/arm1136/mx35/Makefile @@ -50,14 +50,3 @@ include $(SRCTREE)/rules.mk sinclude $(obj).depend ######################################################################### - -$(TOPDIR)/include/asm/arch/asm-offsets.h: $(TOPDIR)/include/autoconf.mk.dep \ - ./asm-offsets.s - @echo Generating $@ - $(TOPDIR)/tools/scripts/make-asm-offsets ./asm-offsets.s $@ - -asm-offsets.s: $(TOPDIR)/include/autoconf.mk.dep \ - ./asm-offsets.c - $(CC) -DDO_DEPS_ONLY \ - $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ - -o $@ ./asm-offsets.c -c -S diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c index db1e2c9..80c0675 100644 --- a/arch/arm/cpu/arm1136/mx35/timer.c +++ b/arch/arm/cpu/arm1136/mx35/timer.c @@ -73,11 +73,6 @@ inline ulong get_timer_masked(void) return val; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { ulong tmp; @@ -92,10 +87,6 @@ ulong get_timer(ulong base) return (tmp / 1000) - base; } -void set_timer(ulong t) -{ -} - /* * delay x useconds AND preserve advance timstamp value * GPTCNT is now supposed to tick 1 by 1 us. diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c index 228ceba..73bf4a7 100644 --- a/arch/arm/cpu/arm1136/omap24xx/timer.c +++ b/arch/arm/cpu/arm1136/omap24xx/timer.c @@ -41,6 +41,13 @@ DECLARE_GLOBAL_DATA_PTR; +static void reset_timer_masked (void) +{ + /* reset time */ + gd->lastinc = READ_TIMER; /* capture current incrementer value time */ + gd->tbl = 0; /* start "advancing" time stamp from 0 */ +} + int timer_init (void) { int32_t val; @@ -57,21 +64,11 @@ int timer_init (void) /* * timer without interrupts */ -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - gd->tbl = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { @@ -95,13 +92,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = READ_TIMER; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; /* current tick value */ diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 200a800..f5a1134 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -33,7 +33,7 @@ #include <version.h> .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -68,7 +68,7 @@ _not_used: .word not_used _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .global _end_vect _end_vect: @@ -201,7 +201,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -243,7 +243,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -255,7 +255,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -329,7 +329,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -436,17 +436,17 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words about stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -519,4 +519,4 @@ arm1136_cache_flush: mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache #endif mov pc, lr @ back to caller -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 9768319..f16a37b 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -135,18 +135,6 @@ ulong get_tbclk(void) return (ulong)(timer_load_val / 100); } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = read_timer(); - timestamp = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { unsigned long long res = get_ticks(); @@ -159,11 +147,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ)); -} - void __udelay(unsigned long usec) { unsigned long long tmp; diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index b095f22..0aa613d 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -263,7 +263,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -343,7 +343,7 @@ skip_hw_init: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm1176/tnetv107x/timer.c b/arch/arm/cpu/arm1176/tnetv107x/timer.c index a7a400d..b3123c5 100644 --- a/arch/arm/cpu/arm1176/tnetv107x/timer.c +++ b/arch/arm/cpu/arm1176/tnetv107x/timer.c @@ -60,15 +60,6 @@ int timer_init(void) return 0; } -void reset_timer(void) -{ - lastinc = timestamp = 0; - - __raw_writel(0, ®s->tcr); - __raw_writel(0, ®s->tim34); - __raw_writel(2 << 22, ®s->tcr); -} - static ulong get_timer_raw(void) { ulong now = __raw_readl(®s->tim34); @@ -88,11 +79,6 @@ ulong get_timer(ulong base) return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - unsigned long long get_ticks(void) { return get_timer(0); diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index eb8d425..fa9c5a2 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -209,21 +209,11 @@ int timer_init (void) #if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292) -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -243,13 +233,6 @@ void __udelay (unsigned long usec) #endif } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c index b4dc4a6..bd6a5b1 100644 --- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c +++ b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c @@ -148,7 +148,7 @@ unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer) /* Command 16 to read aBlocks from the MMC/SD - caed */ unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF}; - /* The addres on the MMC/SD-card is in bytes, + /* The address on the MMC/SD-card is in bytes, addr is transformed from blocks to bytes and the result is placed into the command */ @@ -173,7 +173,7 @@ unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer) /* Command 24 to write a block to the MMC/SD - card */ unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF}; - /* The addres on the MMC/SD-card is in bytes, + /* The address on the MMC/SD-card is in bytes, addr is transformed from blocks to bytes and the result is placed into the command */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index e774c3f..ecb92ef 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -178,7 +178,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -220,7 +220,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -274,7 +274,7 @@ _dynsym_start_ofs: #if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) -/* Interupt-Controller base addresses */ +/* Interrupt-Controller base addresses */ INTMR1: .word 0x80000280 @ 32 bit size INTMR2: .word 0x80001280 @ 16 bit size INTMR3: .word 0x80002280 @ 8 bit size diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c index 95cb8fd..443d31d 100644 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ b/arch/arm/cpu/arm920t/a320/timer.c @@ -81,12 +81,6 @@ void reset_timer_masked(void) debug("%s(): lastdec = %lx\n", __func__, lastdec); } -void reset_timer(void) -{ - debug("%s()\n", __func__); - reset_timer_masked(); -} - /* * return timer ticks */ @@ -132,12 +126,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - debug("%s(%lx)\n", __func__, t); - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index f0ad7d6..91607b5 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -59,7 +59,7 @@ int timer_init(void) when the value in TC_RC is reached */ writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr); - writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */ + writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */ writel(TIMER_LOAD_VAL, &tc->tc[0].rc); writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); @@ -72,35 +72,16 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - void __udelay(unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked(void) -{ - /* reset time */ - at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; - gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; - gd->tbl = 0; -} - ulong get_timer_raw(void) { at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; diff --git a/arch/arm/cpu/arm920t/at91rm9200/spi.c b/arch/arm/cpu/arm920t/at91rm9200/spi.c index f3cb5d8..c70efc6 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/spi.c +++ b/arch/arm/cpu/arm920t/at91rm9200/spi.c @@ -108,6 +108,7 @@ void AT91F_SpiEnable(int cs) unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) { unsigned int timeout; + unsigned long start; pDesc->state = BUSY; @@ -132,12 +133,12 @@ unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) } /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); timeout = 0; AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && - ((timeout = get_timer_masked() ) < CONFIG_SYS_SPI_WRITE_TOUT)); + ((timeout = get_timer(start) ) < CONFIG_SYS_SPI_WRITE_TOUT)); AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; pDesc->state = IDLE; diff --git a/arch/arm/cpu/arm920t/at91rm9200/timer.c b/arch/arm/cpu/arm920t/at91rm9200/timer.c index 9c54bbe..fbe74b6 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/timer.c +++ b/arch/arm/cpu/arm920t/at91rm9200/timer.c @@ -71,34 +71,16 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { udelay_masked(usec); } -void reset_timer_masked (void) -{ - /* reset time */ - lastinc = READ_TIMER; - timestamp = 0; -} - ulong get_timer_raw (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c index 4a0ce4d..a3990a7 100644 --- a/arch/arm/cpu/arm920t/ep93xx/timer.c +++ b/arch/arm/cpu/arm920t/ep93xx/timer.c @@ -91,17 +91,6 @@ unsigned long get_timer(unsigned long base) return get_timer_masked() - base; } -void reset_timer_masked(void) -{ - read_timer(); - timer.ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - void __udelay(unsigned long usec) { unsigned long long target; @@ -128,7 +117,9 @@ int timer_init(void) writel(TIMER_ENABLE | TIMER_CLKSEL, &timer_regs->timer3.control); - reset_timer_masked(); + /* Reset the timer */ + read_timer(); + timer.ticks = 0; return 0; } diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c index b06b518..6141bd4 100644 --- a/arch/arm/cpu/arm920t/imx/timer.c +++ b/arch/arm/cpu/arm920t/imx/timer.c @@ -43,7 +43,9 @@ int timer_init (void) TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ - reset_timer_masked(); + /* Reset the timer */ + TCTL1 &= ~TCTL_TEN; + TCTL1 |= TCTL_TEN; /* Enable timer */ return (0); } @@ -51,28 +53,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked() - base; } -void set_timer (ulong t) -{ - /* nop */ -} - -void reset_timer_masked (void) -{ - TCTL1 &= ~TCTL_TEN; - TCTL1 |= TCTL_TEN; /* Enable timer */ -} - ulong get_timer_masked (void) { return TCN1; diff --git a/arch/arm/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c index 886e370..234fe91 100644 --- a/arch/arm/cpu/arm920t/ks8695/timer.c +++ b/arch/arm/cpu/arm920t/ks8695/timer.c @@ -33,7 +33,11 @@ ulong timer_ticks; int timer_init (void) { - reset_timer(); + /* Set the hadware timer for 1ms */ + ks8695_write(KS8695_TIMER1, TIMER_COUNT); + ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); + ks8695_write(KS8695_TIMER_CTRL, 0x2); + timer_ticks = 0; return 0; } @@ -46,20 +50,6 @@ int timer_init (void) #define TIMER_COUNT (TIMER_INTERVAL / 2) #define TIMER_PULSE TIMER_COUNT -void reset_timer_masked(void) -{ - /* Set the hadware timer for 1ms */ - ks8695_write(KS8695_TIMER1, TIMER_COUNT); - ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); - ks8695_write(KS8695_TIMER_CTRL, 0x2); - timer_ticks = 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { /* Check for timer wrap */ @@ -76,11 +66,6 @@ ulong get_timer(ulong base) return (get_timer_masked() - base); } -void set_timer(ulong t) -{ - timer_ticks = t; -} - void __udelay(ulong usec) { ulong start = get_timer_masked(); diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index f17b7ea..9571870 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -83,22 +83,11 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -112,13 +101,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong tmr = get_ticks(); diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index a7476b0..0090f89 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -142,11 +142,11 @@ copyex: # if defined(CONFIG_S3C2400) # define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */ # define CLKDIVN 0x14800014 /* clock divisor register */ #else # define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */ # define INTSUBMSK 0x4A00001C # define CLKDIVN 0x4C000014 /* clock divisor register */ # endif @@ -221,7 +221,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -263,7 +263,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 39f2e99..23ccf31 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -215,7 +215,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -257,7 +257,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm925t/timer.c b/arch/arm/cpu/arm925t/timer.c index 7dfe2b5..1b9386b 100644 --- a/arch/arm/cpu/arm925t/timer.c +++ b/arch/arm/cpu/arm925t/timer.c @@ -56,7 +56,9 @@ int timer_init (void) CONFIG_SYS_TIMERBASE + CNTL_TIMER); /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / + (TIMER_CLOCK / CONFIG_SYS_HZ); + timestamp = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -64,22 +66,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { @@ -96,14 +87,6 @@ void __udelay (unsigned long usec) } } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / - (TIMER_CLOCK / CONFIG_SYS_HZ); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked (void) { uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c index 5d911c5..82a6d7b 100644 --- a/arch/arm/cpu/arm926ejs/armada100/timer.c +++ b/arch/arm/cpu/arm926ejs/armada100/timer.c @@ -77,13 +77,6 @@ ulong read_timer(void) return(readl(&armd1timers->cvwr)); } -void reset_timer_masked(void) -{ - /* reset time */ - gd->tbl = read_timer(); - gd->tbu = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -100,22 +93,12 @@ ulong get_timer_masked(void) return gd->tbu; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) - base); } -void set_timer(ulong t) -{ - gd->tbu = t; -} - void __udelay(unsigned long usec) { ulong delayticks; @@ -152,7 +135,8 @@ int timer_init(void) /* Enable timer 0 */ writel(0x1, &armd1timers->cer); /* init the gd->tbu and gd->tbl value */ - reset_timer_masked(); + gd->tbl = read_timer(); + gd->tbu = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c index 1c6fa4a..8b1734c 100644 --- a/arch/arm/cpu/arm926ejs/davinci/timer.c +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c @@ -78,11 +78,6 @@ int timer_init(void) return(0); } -void reset_timer(void) -{ - gd->timer_reset_value = get_ticks(); -} - /* * Get the current 64 bit timer tick count */ diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c index 3e80329..b4f6cf8 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c @@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->tbl #define lastdec gd->lastinc -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = READ_TIMER; @@ -112,21 +105,11 @@ ulong get_timer_masked(void) return timestamp; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay(unsigned long usec) { uint current; @@ -164,7 +147,8 @@ int timer_init(void) writel(cntmrctrl, CNTMR_CTRL_REG); /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = READ_TIMER; + timestamp = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c index 6966b0d..8f38056 100644 --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c @@ -68,7 +68,9 @@ int timer_init(void) writel(ctrl, &timer->control); - reset_timer_masked(); + /* capture current value time */ + lastdec = readl(&timer->value); + timestamp = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -94,16 +96,6 @@ unsigned long long get_ticks(void) return timestamp; } -void reset_timer_masked(void) -{ - struct mb86r0x_timer * timer = (struct mb86r0x_timer *) - MB86R0x_TIMER_BASE; - - /* capture current value time */ - lastdec = readl(&timer->value); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { return tick_to_time(get_ticks()); @@ -121,11 +113,6 @@ void __udelay(unsigned long usec) /*NOP*/; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile index 38d7f03..9219c06 100644 --- a/arch/arm/cpu/arm926ejs/mx25/Makefile +++ b/arch/arm/cpu/arm926ejs/mx25/Makefile @@ -24,18 +24,18 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS = generic.o timer.o -MX27OBJS = reset.o +COBJS = generic.o timer.o reset.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -SRCS += $(addprefix $(SRCTREE)/arch/arm/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c)) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(MX27OBJS)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c new file mode 100644 index 0000000..ba8dfd4 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c @@ -0,0 +1,60 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + /* Clock Control Module */ + DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl)); + DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0)); + DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1)); + DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2)); + DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2])); + DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr)); + + /* Enhanced SDRAM Controller */ + DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0)); + DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0)); + DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc)); + + /* Multi-Layer AHB Crossbar Switch */ + DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0)); + DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0)); + DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1)); + DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1)); + DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2)); + DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2)); + DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3)); + DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3)); + DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4)); + DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4)); + DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0)); + DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1)); + DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2)); + DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3)); + DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4)); + + /* AHB <-> IP-Bus Interface */ + DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7)); + DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15)); + + return 0; +} diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c index 14f0c2d..5eb2747 100644 --- a/arch/arm/cpu/arm926ejs/mx25/timer.c +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c @@ -121,20 +121,6 @@ int timer_init(void) return 0; } -void reset_timer_masked(void) -{ - struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; - /* reset time */ - /* capture current incrementer value time */ - lastinc = readl(&gpt->counter); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; @@ -170,11 +156,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timstamp value */ void __udelay (unsigned long usec) { @@ -187,3 +168,15 @@ void __udelay (unsigned long usec) while (get_ticks() < tmp) /* loop till event */ /*NOP*/; } + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + ulong tbclk; + + tbclk = CONFIG_MX25_CLK32; + return tbclk; +} diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile index 0e112b3..7ac1a21 100644 --- a/arch/arm/cpu/arm926ejs/mx27/Makefile +++ b/arch/arm/cpu/arm926ejs/mx27/Makefile @@ -34,6 +34,8 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) +$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c new file mode 100644 index 0000000..f3a8d7b --- /dev/null +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c @@ -0,0 +1,45 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0)); + DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1)); + DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0)); + DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1)); + + DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr)); + DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0)); + DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0)); + DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0)); + DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1)); + DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0)); + DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1)); + + DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0)); + DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0)); + DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1)); + DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1)); + DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc)); + + return 0; +} diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index 27642bf..222a8e9 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -271,7 +271,7 @@ void imx_gpio_mode(int gpio_mode) } #ifdef CONFIG_MXC_UART -void mx27_uart_init_pins(void) +void mx27_uart1_init_pins(void) { int i; unsigned int mode[] = { diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index 5c1cf01..df76d16 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -124,20 +124,6 @@ int timer_init(void) return 0; } -void reset_timer_masked(void) -{ - struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; - /* reset time */ - /* capture current incrementer value time */ - lastinc = readl(®s->gpt_tcn); - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long long get_ticks (void) { struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; @@ -173,11 +159,6 @@ ulong get_timer (ulong base) return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timstamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm926ejs/nomadik/timer.c b/arch/arm/cpu/arm926ejs/nomadik/timer.c index 1d98ef3..1cd0e1f 100644 --- a/arch/arm/cpu/arm926ejs/nomadik/timer.c +++ b/arch/arm/cpu/arm926ejs/nomadik/timer.c @@ -40,16 +40,12 @@ /* Configure a free-running, auto-wrap counter with no prescaler */ int timer_init(void) { + ulong val; + writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS, CONFIG_SYS_TIMERBASE + MTU_CR(0)); - reset_timer(); - return 0; -} -/* Restart counting from 0 */ -void reset_timer(void) -{ - ulong val; + /* Reset the timer */ writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* * The load-register isn't really immediate: it changes on clock @@ -59,6 +55,8 @@ void reset_timer(void) val = READ_TIMER(); while (READ_TIMER() == val) ; + + return 0; } /* Return how many HZ passed since "base" */ diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c index 88a0ee6..390c9c8 100644 --- a/arch/arm/cpu/arm926ejs/omap/timer.c +++ b/arch/arm/cpu/arm926ejs/omap/timer.c @@ -65,22 +65,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index 3e1ff7d..5cc31a9 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -53,7 +53,7 @@ int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size( - (volatile long *) orion5x_sdram_bar(0), + (long *) orion5x_sdram_bar(0), CONFIG_MAX_RAM_BANK_SIZE); return 0; } @@ -65,7 +65,7 @@ void dram_init_banksize (void) for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); gd->bd->bi_dram[i].size = get_ram_size( - (volatile long *) (gd->bd->bi_dram[i].start), + (long *) (gd->bd->bi_dram[i].start), CONFIG_MAX_RAM_BANK_SIZE); } } diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c index 9d45260..17df68f 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c @@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR; #define timestamp gd->tbl #define lastdec gd->lastinc -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = read_timer(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -119,21 +112,11 @@ ulong get_timer_masked(void) return timestamp; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - static inline ulong uboot_cntr_val(void) { return readl(CNTMR_VAL_REG(UBOOT_CNTR)); @@ -181,5 +164,6 @@ int timer_init(void) void timer_init_r(void) { /* init the timestamp and lastdec value */ - reset_timer_masked(); + lastdec = read_timer(); + timestamp = 0; } diff --git a/arch/arm/cpu/arm926ejs/pantheon/timer.c b/arch/arm/cpu/arm926ejs/pantheon/timer.c index ca7f7f0..c71162a 100644 --- a/arch/arm/cpu/arm926ejs/pantheon/timer.c +++ b/arch/arm/cpu/arm926ejs/pantheon/timer.c @@ -85,13 +85,6 @@ ulong read_timer(void) return val; } -void reset_timer_masked(void) -{ - /* reset time */ - gd->tbl = read_timer(); - gd->tbu = 0; -} - ulong get_timer_masked(void) { ulong now = read_timer(); @@ -108,22 +101,12 @@ ulong get_timer_masked(void) return gd->tbu; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) - base); } -void set_timer(ulong t) -{ - gd->tbu = t; -} - void __udelay(unsigned long usec) { ulong delayticks; @@ -161,7 +144,8 @@ int timer_init(void) /* Enable timer 0 */ writel(0x1, &panthtimers->cer); /* init the gd->tbu and gd->tbl value */ - reset_timer_masked(); + gd->tbl = read_timer(); + gd->tbu = 0; return 0; } diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index 66cf4de..1dc7860 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -68,7 +68,9 @@ int timer_init(void) /* auto reload, start timer */ writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); - reset_timer_masked(); + /* Reset the timer */ + lastdec = READ_TIMER(); + timestamp = 0; return 0; } @@ -76,22 +78,11 @@ int timer_init(void) /* * timer without interrupts */ - -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return (get_timer_masked() / GPT_RESOLUTION) - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - void __udelay(unsigned long usec) { ulong tmo; @@ -108,13 +99,6 @@ void __udelay(unsigned long usec) ; } -void reset_timer_masked(void) -{ - /* reset time */ - lastdec = READ_TIMER(); - timestamp = 0; -} - ulong get_timer_masked(void) { ulong now = READ_TIMER(); diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 0940937..636be75 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -54,7 +54,7 @@ .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD /* No exception handlers in preloader */ ldr pc, _hang ldr pc, _hang @@ -98,7 +98,7 @@ _irq: _fiq: .word fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -214,7 +214,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -256,7 +256,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -343,7 +343,7 @@ cpu_init_crit: mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* ************************************************************************* * @@ -440,18 +440,18 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ /* * exception handlers */ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* switch to abort stack */ 1: bl 1b /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else /* !CONFIG_SPL_BUILD */ .align 5 undefined_instruction: get_bad_stack @@ -514,4 +514,4 @@ fiq: bl do_fiq #endif -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c index 2e243b1..f58e151 100644 --- a/arch/arm/cpu/arm926ejs/versatile/timer.c +++ b/arch/arm/cpu/arm926ejs/versatile/timer.c @@ -94,22 +94,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay (unsigned long usec) { diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 0054b22..09374d5 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -186,7 +186,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -228,7 +228,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 2fd3b9a..1a93277 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -182,7 +182,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -224,7 +224,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/armv7/mx5/Makefile b/arch/arm/cpu/armv7/mx5/Makefile index e8be9c9..6e13cc3 100644 --- a/arch/arm/cpu/armv7/mx5/Makefile +++ b/arch/arm/cpu/armv7/mx5/Makefile @@ -45,4 +45,6 @@ include $(SRCTREE)/rules.mk sinclude $(obj).depend +lowlevel_init.o : $(TOPDIR)/include/asm/arch/asm-offsets.h + ######################################################################### diff --git a/arch/arm/cpu/armv7/mx5/asm-offsets.c b/arch/arm/cpu/armv7/mx5/asm-offsets.c new file mode 100644 index 0000000..f972498 --- /dev/null +++ b/arch/arm/cpu/armv7/mx5/asm-offsets.c @@ -0,0 +1,76 @@ +/* + * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/arch/imx-regs.h> + +#include <linux/kbuild.h> + +int main(void) +{ + + /* Round up to make sure size gives nice stack alignment */ + DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr)); + DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr)); + DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr)); + DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); + DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr)); + DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr)); + DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr)); + DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1)); + DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2)); + DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1)); + DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr)); + DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr)); + DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr)); + DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr)); + DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2)); + DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3)); + DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4)); + DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr)); + DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr)); + DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr)); + DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor)); + DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr)); + DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr)); + DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr)); + DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr)); + DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr)); + DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0)); + DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1)); + DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2)); + DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3)); + DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4)); + DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5)); + DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6)); + DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor)); +#if defined(CONFIG_MX53) + DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7)); +#endif + + /* DPLL */ + DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl)); + DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config)); + DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op)); + DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd)); + DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn)); + DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op)); + DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd)); + DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn)); + + return 0; +} diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 96ebfe2..94de9f1 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -39,10 +39,14 @@ orr r0, r0, #(1 << 23) /* disable write allocate combine */ orr r0, r0, #(1 << 22) /* disable write allocate */ - cmp r3, #0x10 /* r3 contains the silicon rev */ +#if defined(CONFIG_MX51) + ldr r1, =0x0 + ldr r3, [r1, #ROM_SI_REV] + cmp r3, #0x10 /* disable write combine for TO 2 and lower revs */ orrls r0, r0, #(1 << 25) +#endif mcr 15, 1, r0, c9, c0, 2 .endm /* init_l2cc */ diff --git a/arch/arm/cpu/armv7/mx5/timer.c b/arch/arm/cpu/armv7/mx5/timer.c index 1972f64..2544b08 100644 --- a/arch/arm/cpu/armv7/mx5/timer.c +++ b/arch/arm/cpu/armv7/mx5/timer.c @@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR; int timer_init(void) { int i; + ulong val; /* setup GP Timer 1 */ __raw_writel(GPTCR_SWR, &cur_gpt->control); @@ -65,20 +66,12 @@ int timer_init(void) /* Freerun Mode, PERCLK1 input */ i = __raw_readl(&cur_gpt->control); __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control); - reset_timer_masked(); - return 0; -} - -void reset_timer(void) -{ - reset_timer_masked(); -} -void reset_timer_masked(void) -{ - ulong val = __raw_readl(&cur_gpt->counter); + val = __raw_readl(&cur_gpt->counter); lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); timestamp = 0; + + return 0; } ulong get_timer_masked(void) @@ -99,11 +92,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - timestamp = t; -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 59bbca8..9f8bc93 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -55,7 +55,9 @@ int timer_init(void) writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, &timer_base->tclr); - reset_timer_masked(); /* init the timestamp and lastinc value */ + /* reset time, capture current incrementer value time */ + gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + gd->tbl = 0; /* start "advancing" time stamp from 0 */ return 0; } @@ -63,21 +65,11 @@ int timer_init(void) /* * timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { @@ -94,13 +86,6 @@ void __udelay(unsigned long usec) } } -void reset_timer_masked(void) -{ - /* reset time, capture current incrementer value time */ - gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { /* current tick value */ diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index b750d16..359c21f 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -50,21 +50,11 @@ int timer_init(void) /* * timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - unsigned long get_timer(unsigned long base) { return get_timer_masked() - base; } -void set_timer(unsigned long t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 0e698b6..5c87e9c 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -182,7 +182,7 @@ stack_setup: mov sp, r4 adr r0, _start -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD cmp r0, r6 beq clear_bss /* skip relocation */ #endif @@ -196,7 +196,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -248,7 +248,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -283,6 +283,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /************************************************************************* * * CPU_init_critical registers @@ -327,6 +328,7 @@ cpu_init_crit: bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller +#endif /* ************************************************************************* * diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra2/timer.c index fb061d0..0b9fa64 100644 --- a/arch/arm/cpu/armv7/tegra2/timer.c +++ b/arch/arm/cpu/armv7/tegra2/timer.c @@ -48,21 +48,11 @@ struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE; #define TIMER_LOAD_VAL 0xffffffff /* timer without interrupts */ -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer(ulong base) { return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* delay x useconds */ void __udelay(unsigned long usec) { @@ -79,13 +69,6 @@ void __udelay(unsigned long usec) } } -void reset_timer_masked(void) -{ - /* reset time, capture current incrementer value time */ - gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ); - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - ulong get_timer_masked(void) { ulong now; diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c index 8e96eaa..79aad99 100644 --- a/arch/arm/cpu/armv7/u8500/timer.c +++ b/arch/arm/cpu/armv7/u8500/timer.c @@ -129,11 +129,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->tbl = t; -} - /* * Emulation of Power architecture long long timebase. * diff --git a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c index 09f69ce..642e67a 100644 --- a/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c +++ b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c @@ -386,7 +386,7 @@ ixQMgrNotificationEnable (IxQMgrQId qId, &dispatchQInfo[qId].statusMask); - /* Set the interupt source is this queue is in the range 0-31 */ + /* Set the interrupt source is this queue is in the range 0-31 */ if (qId < IX_QMGR_MIN_QUEUPP_QID) { ixQMgrAqmIfIntSrcSelWrite (qId, srcSel); diff --git a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h index 0ee4123..4e0de82 100644 --- a/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h +++ b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h @@ -279,7 +279,7 @@ typedef struct BOOL portInitialized; UINT32 npeId; /**< NpeId for this port */ IxEthAccTxDataInfo ixEthAccTxData; /**< Transmit data control structures */ - IxEthAccRxDataInfo ixEthAccRxData; /**< Recieve data control structures */ + IxEthAccRxDataInfo ixEthAccRxData; /**< Receive data control structures */ } IxEthAccPortDataInfo; extern IxEthAccPortDataInfo ixEthAccPortData[]; diff --git a/arch/arm/cpu/ixp/npe/include/IxNpeA.h b/arch/arm/cpu/ixp/npe/include/IxNpeA.h index 7427cc4..90669c2 100644 --- a/arch/arm/cpu/ixp/npe/include/IxNpeA.h +++ b/arch/arm/cpu/ixp/npe/include/IxNpeA.h @@ -717,7 +717,7 @@ typedef struct */ typedef struct { - UINT32 rxBitField; /**< Recieved bit field */ + UINT32 rxBitField; /**< Received bit field */ UINT32 atmCellHeader; /**< ATM Cell Header */ UINT32 rsvdWord0; /**< Reserved field */ UINT16 currMbufLen; /**< Mbuf Length */ diff --git a/arch/arm/cpu/ixp/npe/include/IxQMgr.h b/arch/arm/cpu/ixp/npe/include/IxQMgr.h index 165ed96..03d7e07 100644 --- a/arch/arm/cpu/ixp/npe/include/IxQMgr.h +++ b/arch/arm/cpu/ixp/npe/include/IxQMgr.h @@ -570,7 +570,7 @@ typedef enum * @brief Queue interrupt source select. * * This enum defines the different source conditions on a queue that result in - * an interupt being fired by the AQM. Interrupt source is configurable for + * an interrupt being fired by the AQM. Interrupt source is configurable for * queues 0-31 only. The interrupt source for queues 32-63 is hardwired to the * NE(Nearly Empty) status flag. * diff --git a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h index f7194e7..b65d621 100644 --- a/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h +++ b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h @@ -404,7 +404,7 @@ * * @def IX_ETH_ACC_RX_FRAME_ETH_Q * -* @brief Eth0/Eth1 NPE Frame Recieve Q. +* @brief Eth0/Eth1 NPE Frame Receive Q. * * @note THIS IS NOT USED - the Rx queues are read from EthDB QoS configuration * diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index a975d42..b17d267 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -284,7 +284,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -326,7 +326,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c index 9f3ea42..087ddf8 100644 --- a/arch/arm/cpu/ixp/timer.c +++ b/arch/arm/cpu/ixp/timer.c @@ -89,11 +89,6 @@ void reset_timer_masked(void) gd->timestamp = 0; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { return tick_to_time(get_ticks()); @@ -104,11 +99,6 @@ ulong get_timer(ulong base) return get_timer_masked() - base; } -void set_timer(ulong t) -{ - gd->timestamp = time_to_tick(t); -} - /* delay x useconds AND preserve advance timestamp value */ void __udelay(unsigned long usec) { diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 81242b1..14e9854 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -124,7 +124,7 @@ reset: msr cpsr,r0 #define pWDTCTL 0x80001400 /* Watchdog Timer control register */ -#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */ +#define pINTENC 0x8000050C /* Interrupt-Controller enable clear register */ #define pCLKSET 0x80000420 /* clock divisor register */ /* disable watchdog, set watchdog control register to @@ -195,7 +195,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -237,7 +237,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/lh7a40x/timer.c b/arch/arm/cpu/lh7a40x/timer.c index 2691315..58b35b1 100644 --- a/arch/arm/cpu/lh7a40x/timer.c +++ b/arch/arm/cpu/lh7a40x/timer.c @@ -74,22 +74,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return (get_timer_masked() - base); } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo,tmp; diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index f1dbc3b..6191a73 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -43,7 +43,7 @@ sub pc,pc,#4 .globl _start _start: b reset -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -77,7 +77,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ .balignl 16,0xdeadbeef @@ -122,7 +122,7 @@ FIQ_STACK_START: .word 0x0badc0de #endif /* CONFIG_USE_IRQ */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -262,7 +262,7 @@ copy_loop: blo copy_loop ldmfd sp!, {r0-r12} -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -301,10 +301,10 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -316,7 +316,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * We are done. Do not return, instead branch to second part of board @@ -350,7 +350,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* CONFIG_PRELOADER */ +#else /* CONFIG_SPL_BUILD */ /****************************************************************************/ /* */ @@ -375,9 +375,9 @@ reset: /* Start OneNAND IPL */ ldr pc, =start_oneboot -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /****************************************************************************/ /* */ /* Interrupt handling */ @@ -471,7 +471,7 @@ reset: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER +#endif /* CONFIG_SPL_BUILD /****************************************************************************/ @@ -480,7 +480,7 @@ reset: /* */ /****************************************************************************/ -#ifdef CONFIG_PRELOADER +#ifdef CONFIG_SPL_BUILD .align 5 do_hang: ldr sp, _TEXT_BASE /* use 32 words abort stack */ @@ -545,7 +545,7 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ #endif /* CONFIG_USE_IRQ */ /****************************************************************************/ @@ -584,7 +584,7 @@ reset_endless: b reset_endless -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD .section .mmudata, "a" .align 14 .globl mmu_table @@ -604,4 +604,4 @@ mmu_table: .word (__base << 20) | 0xc12 .set __base, __base + 1 .endr -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c index ec950c7..2866745 100644 --- a/arch/arm/cpu/pxa/timer.c +++ b/arch/arm/cpu/pxa/timer.c @@ -59,37 +59,21 @@ static inline unsigned long long us_to_tick(unsigned long long us) int timer_init (void) { - reset_timer(); + writel(0, OSCR); return 0; } -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - /* nop */ -} - void __udelay (unsigned long usec) { udelay_masked (usec); } - -void reset_timer_masked (void) -{ - writel(0, OSCR); -} - ulong get_timer_masked (void) { return tick_to_time(get_ticks()); diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 10f5284..2545cf6 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -167,7 +167,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -209,7 +209,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ diff --git a/arch/arm/cpu/s3c44b0/timer.c b/arch/arm/cpu/s3c44b0/timer.c index 6f1d8f6..6c2f066 100644 --- a/arch/arm/cpu/s3c44b0/timer.c +++ b/arch/arm/cpu/s3c44b0/timer.c @@ -59,22 +59,11 @@ int timer_init (void) /* * timer without interrupts */ - -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked () - base; } -void set_timer (ulong t) -{ - timestamp = t; -} - void __udelay (unsigned long usec) { ulong tmo; @@ -89,13 +78,6 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; -} - ulong get_timer_masked (void) { ulong now = READ_TIMER; diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index b27e970..7223c47 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -171,7 +171,7 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -213,7 +213,7 @@ fixnext: #endif clear_bss: -#ifndef CONFIG_PRELOADER +#ifndef CONFIG_SPL_BUILD ldr r0, _bss_start_ofs ldr r1, _bss_end_ofs mov r4, r6 /* reloc addr */ @@ -263,7 +263,7 @@ _dynsym_start_ofs: */ -/* Interupt-Controller base address */ +/* Interrupt-Controller base address */ IC_BASE: .word 0x90050000 #define ICMR 0x04 diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c index 0207501..53bec0b 100644 --- a/arch/arm/cpu/sa1100/timer.c +++ b/arch/arm/cpu/sa1100/timer.c @@ -34,32 +34,16 @@ int timer_init (void) return 0; } -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base) { return get_timer_masked (); } -void set_timer (ulong t) -{ - /* nop */ -} - void __udelay (unsigned long usec) { udelay_masked (usec); } - -void reset_timer_masked (void) -{ - OSCR = 0; -} - ulong get_timer_masked (void) { return OSCR; |