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-rw-r--r--arch/arm/cpu/armv7/uniphier/Kconfig31
-rw-r--r--arch/arm/cpu/armv7/uniphier/Makefile1
-rw-r--r--arch/arm/cpu/armv7/uniphier/board_early_init_r.c15
-rw-r--r--arch/arm/cpu/armv7/uniphier/board_late_init.c38
-rw-r--r--arch/arm/cpu/armv7/uniphier/init_page_table.c7
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c20
-rw-r--r--arch/arm/cpu/armv7/uniphier/support_card.c125
7 files changed, 145 insertions, 92 deletions
diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig
index 36b7f11..9760299 100644
--- a/arch/arm/cpu/armv7/uniphier/Kconfig
+++ b/arch/arm/cpu/armv7/uniphier/Kconfig
@@ -5,15 +5,17 @@ config SYS_SOC
default "uniphier"
config SYS_CONFIG_NAME
- default "ph1_pro4" if MACH_PH1_PRO4
- default "ph1_ld4" if MACH_PH1_LD4
- default "ph1_sld8" if MACH_PH1_SLD8
+ default "uniphier"
+
+config UNIPHIER_SMP
+ bool
choice
prompt "UniPhier SoC select"
config MACH_PH1_PRO4
bool "PH1-Pro4"
+ select UNIPHIER_SMP
config MACH_PH1_LD4
bool "PH1-LD4"
@@ -23,6 +25,29 @@ config MACH_PH1_SLD8
endchoice
+choice
+ prompt "UniPhier Support Card select"
+ optional
+
+config PFC_MICRO_SUPPORT_CARD
+ bool "Support card with PFC CPLD"
+ help
+ This option provides support for the expansion board with PFC
+ original address mapping.
+
+ Say Y to use the on-board UART, Ether, LED devices.
+
+config DCC_MICRO_SUPPORT_CARD
+ bool "Support card with DCC CPLD"
+ help
+ This option provides support for the expansion board with DCC-
+ arranged address mapping that is compatible with legacy UniPhier
+ reference boards.
+
+ Say Y to use the on-board UART, Ether, LED devices.
+
+endchoice
+
config CMD_PINMON
bool "Enable boot mode pins monitor command"
depends on !SPL_BUILD
diff --git a/arch/arm/cpu/armv7/uniphier/Makefile b/arch/arm/cpu/armv7/uniphier/Makefile
index 0f64d25..4a7b8a9 100644
--- a/arch/arm/cpu/armv7/uniphier/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/Makefile
@@ -11,6 +11,7 @@ obj-y += cache_uniphier.o
obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o
obj-y += dram_init.o
obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
+obj-$(CONFIG_BOARD_EARLY_INIT_R) += board_early_init_r.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
obj-$(CONFIG_UNIPHIER_SMP) += smp.o
obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o
diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_r.c b/arch/arm/cpu/armv7/uniphier/board_early_init_r.c
new file mode 100644
index 0000000..cb7e04f
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/board_early_init_r.c
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/board.h>
+
+int board_early_init_r(void)
+{
+ uniphier_board_late_init();
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/uniphier/board_late_init.c b/arch/arm/cpu/armv7/uniphier/board_late_init.c
index 3730020..0622a1e 100644
--- a/arch/arm/cpu/armv7/uniphier/board_late_init.c
+++ b/arch/arm/cpu/armv7/uniphier/board_late_init.c
@@ -26,42 +26,6 @@ static void nand_denali_wp_disable(void)
#endif
}
-static void nand_denali_fixup(void)
-{
-#if defined(CONFIG_NAND_DENALI) && \
- (defined(CONFIG_MACH_PH1_SLD8) || defined(CONFIG_MACH_PH1_PRO4))
- /*
- * The Denali NAND controller on some of UniPhier SoCs does not
- * automatically query the device parameters. For those SoCs,
- * some registers must be set after the device is probed.
- */
- void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
- struct mtd_info *mtd;
- struct nand_chip *chip;
-
- if (nand_curr_device < 0 ||
- nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE) {
- /* NAND was not detected. Just return. */
- return;
- }
-
- mtd = &nand_info[nand_curr_device];
- chip = mtd->priv;
-
- writel(mtd->erasesize / mtd->writesize, denali_reg + PAGES_PER_BLOCK);
- writel(0, denali_reg + DEVICE_WIDTH);
- writel(mtd->writesize, denali_reg + DEVICE_MAIN_AREA_SIZE);
- writel(mtd->oobsize, denali_reg + DEVICE_SPARE_AREA_SIZE);
- writel(1, denali_reg + DEVICES_CONNECTED);
-
- /*
- * chip->scan_bbt in nand_scan_tail() has been skipped.
- * It should be done in here.
- */
- chip->scan_bbt(mtd);
-#endif
-}
-
int board_late_init(void)
{
puts("MODE: ");
@@ -70,7 +34,6 @@ int board_late_init(void)
case BOOT_DEVICE_MMC1:
printf("eMMC Boot\n");
setenv("bootmode", "emmcboot");
- nand_denali_fixup();
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot\n");
@@ -80,7 +43,6 @@ int board_late_init(void)
case BOOT_DEVICE_NOR:
printf("NOR Boot\n");
setenv("bootmode", "norboot");
- nand_denali_fixup();
break;
default:
printf("Unsupported Boot Mode\n");
diff --git a/arch/arm/cpu/armv7/uniphier/init_page_table.c b/arch/arm/cpu/armv7/uniphier/init_page_table.c
index d273835..a0d10a9 100644
--- a/arch/arm/cpu/armv7/uniphier/init_page_table.c
+++ b/arch/arm/cpu/armv7/uniphier/init_page_table.c
@@ -28,7 +28,12 @@
#define IS_SSC(x) ((IS_SPL_TEXT_AREA(x)) || \
(IS_INIT_STACK_AREA(x)))
#define IS_EXT(x) ((x) < 0x100)
-#define IS_REG(x) (0x500 <= (x) && (x) < 0x700)
+
+/* 0x20000000-0x2fffffff, 0xf0000000-0xffffffff are only used by PH1-sLD3 */
+#define IS_REG(x) (0x200 <= (x) && (x) < 0x300) || \
+ (0x500 <= (x) && (x) < 0x700) || \
+ (0xf00 <= (x))
+
#define IS_DDR(x) (0x800 <= (x) && (x) < 0xf00)
#define MMU_FLAGS(x) (IS_SSC(x)) ? SSC : \
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
index f113db5..3c82a1a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
@@ -22,16 +22,7 @@ void sbc_init(void)
writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
- if (readl(SBBASE0) & 0x1) {
- /*
- * Boot Swap Off: boot from mask ROM
- * 0x00000000-0x01ffffff: mask ROM
- * 0x02000000-0x3effffff: memory bank (31MB)
- * 0x03f00000-0x3fffffff: peripherals (1MB)
- */
- writel(0x0000be01, SBBASE0); /* dummy */
- writel(0x0200be01, SBBASE1);
- } else {
+ if (boot_is_swapped()) {
/*
* Boot Swap On: boot from external NOR/SRAM
* 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
@@ -40,6 +31,15 @@ void sbc_init(void)
* 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
*/
writel(0x0000bc01, SBBASE0);
+ } else {
+ /*
+ * Boot Swap Off: boot from mask ROM
+ * 0x00000000-0x01ffffff: mask ROM
+ * 0x02000000-0x3effffff: memory bank (31MB)
+ * 0x03f00000-0x3fffffff: peripherals (1MB)
+ */
+ writel(0x0000be01, SBBASE0); /* dummy */
+ writel(0x0200be01, SBBASE1);
}
#elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
#if !defined(CONFIG_SPL_BUILD)
diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/cpu/armv7/uniphier/support_card.c
index 40d4940..419012e 100644
--- a/arch/arm/cpu/armv7/uniphier/support_card.c
+++ b/arch/arm/cpu/armv7/uniphier/support_card.c
@@ -83,6 +83,12 @@ static int support_card_show_revision(void)
}
#endif
+int check_support_card(void)
+{
+ printf("SC: Micro Support Card ");
+ return support_card_show_revision();
+}
+
void support_card_init(void)
{
/*
@@ -94,12 +100,6 @@ void support_card_init(void)
support_card_reset_deassert();
}
-int check_support_card(void)
-{
- printf("SC: Micro Support Card ");
- return support_card_show_revision();
-}
-
#if defined(CONFIG_SMC911X)
#include <netdev.h>
@@ -112,18 +112,14 @@ int board_eth_init(bd_t *bis)
#if !defined(CONFIG_SYS_NO_FLASH)
#include <mtd/cfi_flash.h>
+#include <asm/arch/sbc-regs.h>
-#if CONFIG_SYS_MAX_FLASH_BANKS > 1
-static phys_addr_t flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS] =
- CONFIG_SYS_FLASH_BANKS_LIST;
+struct memory_bank {
+ phys_addr_t base;
+ unsigned long size;
+};
-phys_addr_t cfi_flash_bank_addr(int i)
-{
- return flash_banks_list[i];
-}
-#endif
-
-int mem_is_flash(phys_addr_t base)
+static int mem_is_flash(const struct memory_bank *mem)
{
const int loop = 128;
u32 *scratch_addr;
@@ -131,8 +127,9 @@ int mem_is_flash(phys_addr_t base)
int ret = 1;
int i;
- scratch_addr = map_physmem(base + 0x01e00000,
- sizeof(u32) * loop, MAP_NOCACHE);
+ /* just in case, use the tail of the memory bank */
+ scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop,
+ sizeof(u32) * loop, MAP_NOCACHE);
for (i = 0; i < loop; i++, scratch_addr++) {
saved_value = readl(scratch_addr);
@@ -150,31 +147,79 @@ int mem_is_flash(phys_addr_t base)
return ret;
}
-int board_flash_wp_on(void)
+#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
+ /* {address, size} */
+static const struct memory_bank memory_banks_boot_swap_off[] = {
+ {0x02000000, 0x01f00000},
+};
+
+static const struct memory_bank memory_banks_boot_swap_on[] = {
+ {0x00000000, 0x01f00000},
+};
+#endif
+
+#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
+static const struct memory_bank memory_banks_boot_swap_off[] = {
+ {0x04000000, 0x04000000},
+};
+
+static const struct memory_bank memory_banks_boot_swap_on[] = {
+ {0x00000000, 0x04000000},
+ {0x04000000, 0x04000000},
+};
+#endif
+
+static const struct memory_bank
+*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
+
+phys_addr_t cfi_flash_bank_addr(int i)
{
- int i;
- int ret = 1;
+ return flash_banks_list[i]->base;
+}
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- if (mem_is_flash(cfi_flash_bank_addr(i))) {
- /*
- * We found at least one flash.
- * We need to return 0 and call flash_init().
- */
- ret = 0;
- }
-#if CONFIG_SYS_MAX_FLASH_BANKS > 1
- else {
- /*
- * We might have a SRAM here.
- * To prevent SRAM data from being destroyed,
- * we set dummy address (SDRAM).
- */
- flash_banks_list[i] = 0x80000000 + 0x10000 * i;
+unsigned long cfi_flash_bank_size(int i)
+{
+ return flash_banks_list[i]->size;
+}
+
+static void detect_num_flash_banks(void)
+{
+ const struct memory_bank *memory_bank, *end;
+
+ cfi_flash_num_flash_banks = 0;
+
+ if (boot_is_swapped()) {
+ memory_bank = memory_banks_boot_swap_on;
+ end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on);
+ } else {
+ memory_bank = memory_banks_boot_swap_off;
+ end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off);
+ }
+
+ for (; memory_bank < end; memory_bank++) {
+ if (cfi_flash_num_flash_banks >=
+ CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
+ break;
+
+ if (mem_is_flash(memory_bank)) {
+ flash_banks_list[cfi_flash_num_flash_banks] =
+ memory_bank;
+
+ debug("flash bank found: base = 0x%lx, size = 0x%lx\n",
+ memory_bank->base, memory_bank->size);
+ cfi_flash_num_flash_banks++;
}
-#endif
}
- return ret;
+ debug("number of flash banks: %d\n", cfi_flash_num_flash_banks);
+}
+#else /* ONFIG_SYS_NO_FLASH */
+void detect_num_flash_banks(void)
+{
+};
+#endif /* ONFIG_SYS_NO_FLASH */
+
+void support_card_late_init(void)
+{
+ detect_num_flash_banks();
}
-#endif