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-rw-r--r--arch/arm/cpu/armv7/at91/Makefile1
-rw-r--r--arch/arm/cpu/armv7/at91/sama5d4_devices.c30
-rw-r--r--arch/arm/cpu/armv7/at91/timer.c3
3 files changed, 33 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/at91/Makefile b/arch/arm/cpu/armv7/at91/Makefile
index 0a2e48d..f4f35a4 100644
--- a/arch/arm/cpu/armv7/at91/Makefile
+++ b/arch/arm/cpu/armv7/at91/Makefile
@@ -9,6 +9,7 @@
#
obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o
+obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o
obj-y += clock.o
obj-y += cpu.o
obj-y += reset.o
diff --git a/arch/arm/cpu/armv7/at91/sama5d4_devices.c b/arch/arm/cpu/armv7/at91/sama5d4_devices.c
new file mode 100644
index 0000000..2708097
--- /dev/null
+++ b/arch/arm/cpu/armv7/at91/sama5d4_devices.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2014 Atmel
+ * Bo Shen <voice.shen@atmel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sama5d4.h>
+
+char *get_cpu_name()
+{
+ unsigned int extension_id = get_extension_chip_id();
+
+ if (cpu_is_sama5d4())
+ switch (extension_id) {
+ case ARCH_EXID_SAMA5D41:
+ return "SAMA5D41";
+ case ARCH_EXID_SAMA5D42:
+ return "SAMA5D42";
+ case ARCH_EXID_SAMA5D43:
+ return "SAMA5D43";
+ case ARCH_EXID_SAMA5D44:
+ return "SAMA5D44";
+ default:
+ return "Unknown CPU type";
+ }
+ else
+ return "Unknown CPU type";
+}
diff --git a/arch/arm/cpu/armv7/at91/timer.c b/arch/arm/cpu/armv7/at91/timer.c
index e3ebfe0..19bf80b 100644
--- a/arch/arm/cpu/armv7/at91/timer.c
+++ b/arch/arm/cpu/armv7/at91/timer.c
@@ -65,7 +65,8 @@ int timer_init(void)
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
- gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
+ gd->arch.timer_rate_hz = get_pit_clk_rate() / 16;
+
gd->arch.tbu = 0;
gd->arch.tbl = 0;