diff options
Diffstat (limited to 'arch/arm/cpu/armv7/s5pc2xx/clock.c')
-rw-r--r-- | arch/arm/cpu/armv7/s5pc2xx/clock.c | 76 |
1 files changed, 57 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c b/arch/arm/cpu/armv7/s5pc2xx/clock.c index 450a630..5ecd475 100644 --- a/arch/arm/cpu/armv7/s5pc2xx/clock.c +++ b/arch/arm/cpu/armv7/s5pc2xx/clock.c @@ -124,29 +124,35 @@ static unsigned long s5pc210_get_pwm_clk(void) unsigned int sel; unsigned int ratio; - /* - * CLK_SRC_PERIL0 - * PWM_SEL [27:24] - */ - sel = readl(&clk->src_peril0); - sel = (sel >> 24) & 0xf; + if (s5p_get_cpu_rev() == 0) { + /* + * CLK_SRC_PERIL0 + * PWM_SEL [27:24] + */ + sel = readl(&clk->src_peril0); + sel = (sel >> 24) & 0xf; - if (sel == 0x6) + if (sel == 0x6) + sclk = get_pll_clk(MPLL); + else if (sel == 0x7) + sclk = get_pll_clk(EPLL); + else if (sel == 0x8) + sclk = get_pll_clk(VPLL); + else + return 0; + + /* + * CLK_DIV_PERIL3 + * PWM_RATIO [3:0] + */ + ratio = readl(&clk->div_peril3); + ratio = ratio & 0xf; + } else if (s5p_get_cpu_rev() == 1) { sclk = get_pll_clk(MPLL); - else if (sel == 0x7) - sclk = get_pll_clk(EPLL); - else if (sel == 0x8) - sclk = get_pll_clk(VPLL); - else + ratio = 8; + } else return 0; - /* - * CLK_DIV_PERIL3 - * PWM_RATIO [3:0] - */ - ratio = readl(&clk->div_peril3); - ratio = ratio & 0xf; - pclk = sclk / (ratio + 1); return pclk; @@ -199,6 +205,33 @@ static unsigned long s5pc210_get_uart_clk(int dev_index) return uclk; } +/* s5pc210: set the mmc clock */ +static void s5pc210_set_mmc_clk(int dev_index, unsigned int div) +{ + struct s5pc210_clock *clk = + (struct s5pc210_clock *)samsung_get_base_clock(); + unsigned int addr; + unsigned int val; + + /* + * CLK_DIV_FSYS1 + * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] + * CLK_DIV_FSYS2 + * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] + */ + if (dev_index < 2) { + addr = (unsigned int)&clk->div_fsys1; + } else { + addr = (unsigned int)&clk->div_fsys2; + dev_index -= 2; + } + + val = readl(addr); + val &= ~(0xff << ((dev_index << 4) + 8)); + val |= (div & 0xff) << ((dev_index << 4) + 8); + writel(val, addr); +} + unsigned long get_pll_clk(int pllreg) { return s5pc210_get_pll_clk(pllreg); @@ -218,3 +251,8 @@ unsigned long get_uart_clk(int dev_index) { return s5pc210_get_uart_clk(dev_index); } + +void set_mmc_clk(int dev_index, unsigned int div) +{ + s5pc210_set_mmc_clk(dev_index, div); +} |