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-rw-r--r--arch/arm/cpu/armv7/cpu.c83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
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+++ b/arch/arm/cpu/armv7/cpu.c
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+/*
+ * (C) Copyright 2008 Texas Insturments
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * CPU specific code
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/system.h>
+#include <asm/cache.h>
+#ifndef CONFIG_L2_OFF
+#include <asm/arch/sys_proto.h>
+#endif
+
+static void cache_flush(void);
+
+int cleanup_before_linux(void)
+{
+ unsigned int i;
+
+ /*
+ * this function is called just before we call linux
+ * it prepares the processor for linux
+ *
+ * we turn off caches etc ...
+ */
+ disable_interrupts();
+
+ /* turn off I/D-cache */
+ icache_disable();
+ dcache_disable();
+
+ /* invalidate I-cache */
+ cache_flush();
+
+#ifndef CONFIG_L2_OFF
+ /* turn off L2 cache */
+ l2_cache_disable();
+ /* invalidate L2 cache also */
+ invalidate_dcache(get_device_type());
+#endif
+ i = 0;
+ /* mem barrier to sync up things */
+ asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
+
+#ifndef CONFIG_L2_OFF
+ l2_cache_enable();
+#endif
+
+ return 0;
+}
+
+static void cache_flush(void)
+{
+ asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
+}