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Diffstat (limited to 'arch/arm/cpu/armv7/bcm281xx/reset.c')
-rw-r--r--arch/arm/cpu/armv7/bcm281xx/reset.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/bcm281xx/reset.c b/arch/arm/cpu/armv7/bcm281xx/reset.c
new file mode 100644
index 0000000..3beb0ed
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/reset.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sysmap.h>
+
+#define EN_MASK 0x08000000 /* Enable timer */
+#define SRSTEN_MASK 0x04000000 /* Enable soft reset */
+#define CLKS_SHIFT 20 /* Clock period shift */
+#define LD_SHIFT 0 /* Reload value shift */
+
+void reset_cpu(ulong ignored)
+{
+ /*
+ * Set WD enable, RST enable,
+ * 3.9 msec clock period (8), reload value (8*3.9ms)
+ */
+ u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT);
+ writel(reg, SECWD2_BASE_ADDR);
+
+ while (1)
+ ; /* loop forever till reset */
+}