diff options
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/board.c')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/board.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 6de03fd..772203f 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -116,11 +116,27 @@ static int read_eeprom(void) return 0; } -/* UART Defines */ #ifdef CONFIG_SPL_BUILD +/* UART Defines */ #define UART_RESET (0x1 << 1) #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) + +static void rtc32k_enable(void) +{ + struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE; + + /* + * Unlock the RTC's registers. For more details please see the + * RTC_SS section of the TRM. In order to unlock we need to + * write these specific values (keys) in this order. + */ + writel(0x83e70b13, &rtc->kick0r); + writel(0x95a4f1e0, &rtc->kick1r); + + /* Enable the RTC 32K OSC by setting bits 3 and 6. */ + writel((1 << 3) | (1 << 6), &rtc->osc); +} #endif /* @@ -154,6 +170,9 @@ void s_init(void) /* Setup the PLLs and the clocks for the peripherals */ pll_init(); + /* Enable RTC32K clock */ + rtc32k_enable(); + /* UART softreset */ u32 regVal; |