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-rw-r--r--arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c5
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/timer.c77
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c12
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/generic.c12
-rw-r--r--arch/arm/cpu/arm926ejs/start.S23
5 files changed, 69 insertions, 60 deletions
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
index f699f4d..c1822b7 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
@@ -204,6 +204,11 @@ void at91_macb_hw_init(void)
#else
at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */
at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */
+#if defined(CONFIG_AT91SAM9G20)
+ /* 9G20 BOOT ROM initializes those pins to multi-drive, undo that */
+ at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 0);
+ at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 0);
+#endif
#endif
at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */
#endif
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 9da7443..1c6fa4a 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -40,6 +40,8 @@
#include <common.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
struct davinci_timer {
u_int32_t pid12;
u_int32_t emumgt;
@@ -57,11 +59,9 @@ struct davinci_timer {
static struct davinci_timer * const timer =
(struct davinci_timer *)CONFIG_SYS_TIMERBASE;
-#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
-#define TIM_CLK_DIV 16
+#define TIMER_LOAD_VAL 0xffffffff
-static ulong timestamp;
-static ulong lastinc;
+#define TIM_CLK_DIV 16
int timer_init(void)
{
@@ -71,72 +71,51 @@ int timer_init(void)
writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
writel(0x0, &timer->tim34);
writel(TIMER_LOAD_VAL, &timer->prd34);
- lastinc = 0;
- timestamp = 0;
writel(2 << 22, &timer->tcr);
+ gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+ gd->timer_reset_value = 0;
return(0);
}
void reset_timer(void)
{
- writel(0x0, &timer->tcr);
- writel(0x0, &timer->tim34);
- lastinc = 0;
- timestamp = 0;
- writel(2 << 22, &timer->tcr);
+ gd->timer_reset_value = get_ticks();
}
-static ulong get_timer_raw(void)
+/*
+ * Get the current 64 bit timer tick count
+ */
+unsigned long long get_ticks(void)
{
- ulong now = readl(&timer->tim34);
-
- if (now >= lastinc) {
- /* normal mode */
- timestamp += now - lastinc;
- } else {
- /* overflow ... */
- timestamp += now + TIMER_LOAD_VAL - lastinc;
- }
- lastinc = now;
- return timestamp;
+ unsigned long now = readl(&timer->tim34);
+
+ /* increment tbu if tbl has rolled over */
+ if (now < gd->tbl)
+ gd->tbu++;
+ gd->tbl = now;
+
+ return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
}
ulong get_timer(ulong base)
{
- return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base);
-}
+ unsigned long long timer_diff;
-void set_timer(ulong t)
-{
- timestamp = t;
+ timer_diff = get_ticks() - gd->timer_reset_value;
+
+ return (timer_diff / (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
}
void __udelay(unsigned long usec)
{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- tmo = CONFIG_SYS_HZ_CLOCK / 1000;
- tmo *= usec;
- tmo /= (1000 * TIM_CLK_DIV);
-
- endtime = get_timer_raw() + tmo;
+ unsigned long long endtime;
- do {
- ulong now = get_timer_raw();
- diff = endtime - now;
- } while (diff >= 0);
-}
+ endtime = ((unsigned long long)usec * gd->timer_rate_hz) / 1000000UL;
+ endtime += get_ticks();
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return(get_timer(0));
+ while (get_ticks() < endtime)
+ ;
}
/*
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index b80a389..c6e1146 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -260,4 +260,16 @@ void mx25_fec_init_pins (void)
writel (outpadctl, &padctl->pad_fec_tdata1);
}
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+ int i;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank *bank = &iim->bank[0];
+ struct fuse_bank0_regs *fuse =
+ (struct fuse_bank0_regs *)bank->fuse_regs;
+
+ for (i = 0; i < 6; i++)
+ mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
+}
#endif /* CONFIG_FEC_MXC */
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index ae2ce58..27642bf 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -313,6 +313,18 @@ void mx27_fec_init_pins(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
}
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+ int i;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank *bank = &iim->bank[0];
+ struct fuse_bank0_regs *fuse =
+ (struct fuse_bank0_regs *)bank->fuse_regs;
+
+ for (i = 0; i < 6; i++)
+ mac[6 - 1 - i] = readl(&fuse->mac_addr[i]) & 0xff;
+}
#endif /* CONFIG_FEC_MXC */
#ifdef CONFIG_MXC_MMC
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6dcc9b4..5519252 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -174,6 +174,7 @@ reset:
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
@@ -191,22 +192,22 @@ relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
- mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
+ cmp r0, r6
+ beq clear_bss /* skip relocation */
+ mov r1, r6 /* r1 <- scratch for copy loop */
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
- cmp r0, r6
- beq clear_bss
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
- stmia r6!, {r9-r10} /* copy to target address [r1] */
+ stmia r1!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
@@ -215,7 +216,7 @@ copy_loop:
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
- sub r9, r7, r0 /* r9 <- relocation offset */
+ sub r9, r6, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
@@ -226,10 +227,10 @@ fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
- and r8, r1, #0xff
- cmp r8, #23 /* relative fixup? */
+ and r7, r1, #0xff
+ cmp r7, #23 /* relative fixup? */
beq fixrel
- cmp r8, #2 /* absolute fixup? */
+ cmp r7, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
@@ -238,7 +239,7 @@ fixabs:
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
- add r1, r9 /* r1 <- relocated sym addr */
+ add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
@@ -256,7 +257,7 @@ clear_bss:
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
- mov r4, r7 /* reloc addr */
+ mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
@@ -287,7 +288,7 @@ _nand_boot_ofs:
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
- mov r1, r7 /* dest_addr */
+ mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
generated by cgit v1.1 at 2024-08-21 04:46:19 +0000