diff options
Diffstat (limited to 'arch/arm/cpu/arm720t/start.S')
| -rw-r--r-- | arch/arm/cpu/arm720t/start.S | 64 |
1 files changed, 3 insertions, 61 deletions
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index f2320ee..00fa8c9 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -272,25 +272,7 @@ _dynsym_start_ofs: ************************************************************************* */ -#if defined(CONFIG_IMPA7) - -/* Interrupt-Controller base addresses */ -INTMR1: .word 0x80000280 @ 32 bit size -INTMR2: .word 0x80001280 @ 16 bit size -INTMR3: .word 0x80002280 @ 8 bit size - -/* SYSCONs */ -SYSCON1: .word 0x80000100 -SYSCON2: .word 0x80001100 -SYSCON3: .word 0x80002200 - -#define CLKCTL 0x6 /* mask */ -#define CLKCTL_18 0x0 /* 18.432 MHz */ -#define CLKCTL_36 0x2 /* 36.864 MHz */ -#define CLKCTL_49 0x4 /* 49.152 MHz */ -#define CLKCTL_73 0x6 /* 73.728 MHz */ - -#elif defined(CONFIG_LPC2292) +#if defined(CONFIG_LPC2292) PLLCFG_ADR: .word PLLCFG PLLFEED_ADR: .word PLLFEED PLLCON_ADR: .word PLLCON @@ -301,35 +283,7 @@ MEMMAP_ADR: .word MEMMAP #endif cpu_init_crit: -#if defined(CONFIG_IMPA7) - - /* - * mask all IRQs by clearing all bits in the INTMRs - */ - mov r1, #0x00 - ldr r0, INTMR1 - str r1, [r0] - ldr r0, INTMR2 - str r1, [r0] - ldr r0, INTMR3 - str r1, [r0] - - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15,0,r0,c1,c0 - bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) - bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM) - orr r0, r0, #0x00000002 @ set bit 2 (A) Align - mcr p15,0,r0,c1,c0 -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) /* * prior to software reset : need to set pin PORTC4 to be *HRESET */ @@ -634,19 +588,7 @@ fiq: #endif -#if defined(CONFIG_IMPA7) - .align 5 -.globl reset_cpu -reset_cpu: - mov ip, #0 - mcr p15, 0, ip, c7, c7, 0 @ invalidate cache - mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) - mrc p15, 0, ip, c1, c0, 0 @ get ctrl register - bic ip, ip, #0x000f @ ............wcam - bic ip, ip, #0x2100 @ ..v....s........ - mcr p15, 0, ip, c1, c0, 0 @ ctrl register - mov pc, r0 -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) .align 5 .globl reset_cpu reset_cpu: |