diff options
Diffstat (limited to 'arch/arm/cpu/arm1136/omap24xx')
| -rw-r--r-- | arch/arm/cpu/arm1136/omap24xx/Makefile | 47 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/omap24xx/reset.S | 42 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1136/omap24xx/timer.c | 158 |
3 files changed, 247 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm1136/omap24xx/Makefile b/arch/arm/cpu/arm1136/omap24xx/Makefile new file mode 100644 index 0000000..48dc7e3 --- /dev/null +++ b/arch/arm/cpu/arm1136/omap24xx/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +SOBJS = reset.o + +COBJS = timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm1136/omap24xx/reset.S b/arch/arm/cpu/arm1136/omap24xx/reset.S new file mode 100644 index 0000000..5f8343f --- /dev/null +++ b/arch/arm/cpu/arm1136/omap24xx/reset.S @@ -0,0 +1,42 @@ +/* + * armboot - Startup Code for OMP2420/ARM1136 CPU-core + * + * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com> + * + * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> + * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> + * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> + * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> + * Copyright (c) 2003 Kshitij <kshitij@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/omap2420.h> + +.globl reset_cpu +reset_cpu: + ldr r1, rstctl /* get addr for global reset reg */ + mov r3, #0x2 /* full reset pll+mpu */ + str r3, [r1] /* force reset */ + mov r0, r0 +_loop_forever: + b _loop_forever +rstctl: + .word PM_RSTCTRL_WKUP diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c new file mode 100644 index 0000000..6754749 --- /dev/null +++ b/arch/arm/cpu/arm1136/omap24xx/timer.c @@ -0,0 +1,158 @@ +/* + * (C) Copyright 2004 + * Texas Instruments + * Richard Woodruff <r-woodruff2@ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * Alex Zuepke <azu@sysgo.de> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/bits.h> +#include <asm/arch/omap2420.h> + +#define TIMER_LOAD_VAL 0 + +/* macro to read the 32 bit timer */ +#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR))) + +static ulong timestamp; +static ulong lastinc; + +int timer_init (void) +{ + int32_t val; + + /* Start the counter ticking up */ + *((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ + val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ + *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */ + + reset_timer_masked(); /* init the timestamp and lastinc value */ + + return(0); +} +/* + * timer without interrupts + */ +void reset_timer (void) +{ + reset_timer_masked (); +} + +ulong get_timer (ulong base) +{ + return get_timer_masked () - base; +} + +void set_timer (ulong t) +{ + timestamp = t; +} + +/* delay x useconds AND perserve advance timstamp value */ +void __udelay (unsigned long usec) +{ + ulong tmo, tmp; + + if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + } else { /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CONFIG_SYS_HZ; + tmo /= (1000*1000); + } + + tmp = get_timer (0); /* get current timestamp */ + if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */ + reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ + else + tmo += tmp; /* else, set advancing stamp wake up time */ + while (get_timer_masked () < tmo)/* loop till event */ + /*NOP*/; +} + +void reset_timer_masked (void) +{ + /* reset time */ + lastinc = READ_TIMER; /* capture current incrementer value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ +} + +ulong get_timer_masked (void) +{ + ulong now = READ_TIMER; /* current tick value */ + + if (now >= lastinc) /* normal mode (non roll) */ + timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */ + else /* we have rollover of incrementer */ + timestamp += (0xFFFFFFFF - lastinc) + now; + lastinc = now; + return timestamp; +} + +/* waits specified delay value and resets timestamp */ +void udelay_masked (unsigned long usec) +{ + ulong tmo; + ulong endtime; + signed long diff; + + if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + } else { /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CONFIG_SYS_HZ; + tmo /= (1000*1000); + } + endtime = get_timer_masked () + tmo; + + do { + ulong now = get_timer_masked (); + diff = endtime - now; + } while (diff >= 0); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk (void) +{ + ulong tbclk; + tbclk = CONFIG_SYS_HZ; + return tbclk; +} |