diff options
Diffstat (limited to 'README')
| -rw-r--r-- | README | 106 |
1 files changed, 7 insertions, 99 deletions
@@ -325,27 +325,6 @@ The following options need to be configured: - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) Define exactly one, e.g. CONFIG_ATSTK1002 -- CPU Module Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA286_60_OLD ---- FIXME --- not tested yet: - CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P, - CONFIG_CMA287_23, CONFIG_CMA287_50 - -- Motherboard Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA101, CONFIG_CMA102 - -- Motherboard I/O Modules: (if CONFIG_COGENT is defined) - Define one or more of - CONFIG_CMA302 - -- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) - Define one or more of - CONFIG_LCD_HEARTBEAT - update a character position on - the LCD display every second with - a "rotator" |\-/|\-/ - - Marvell Family Member CONFIG_SYS_MVFS - define it if you want to enable multiple fs option at one time @@ -578,20 +557,6 @@ The following options need to be configured: CONFIG_SYS_FSL_SEC_LE Defines the SEC controller register space as Little Endian -- Intel Monahans options: - CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO - - Defines the Monahans run mode to oscillator - ratio. Valid values are 8, 16, 24, 31. The core - frequency is this value multiplied by 13 MHz. - - CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO - - Defines the Monahans turbo mode to oscillator - ratio. Valid values are 1 (default if undefined) and - 2. The core frequency as calculated above is multiplied - by this value. - - MIPS CPU options: CONFIG_SYS_INIT_SP_OFFSET @@ -730,11 +695,6 @@ The following options need to be configured: This causes ft_system_setup() to be called before booting the kernel. - CONFIG_OF_BOOT_CPU - - This define fills in the correct boot CPU in the boot - param header, the default value is zero if undefined. - CONFIG_OF_IDE_FIXUP U-Boot can detect if an IDE device is present or not. @@ -1337,10 +1297,6 @@ The following options need to be configured: CONFIG_LAN91C96 Support for SMSC's LAN91C96 chips. - CONFIG_LAN91C96_BASE - Define this to hold the physical address - of the LAN91C96's I/O space - CONFIG_LAN91C96_USE_32_BIT Define this to enable 32 bit addressing @@ -1405,7 +1361,7 @@ The following options need to be configured: - PWM Support: CONFIG_PWM_IMX - Support for PWM modul on the imx6. + Support for PWM module on the imx6. - TPM Support: CONFIG_TPM @@ -1525,10 +1481,6 @@ The following options need to be configured: Derive USB clock from external clock "blah" - CONFIG_SYS_USB_EXTC_CLK 0x02 - CONFIG_SYS_USB_BRG_CLK 0xBLAH - Derive USB clock from brgclk - - CONFIG_SYS_USB_BRG_CLK 0x04 - If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h or directly in usbd_vendor_info.h. If you don't define @@ -1691,23 +1643,13 @@ The following options need to be configured: If not defined the default value "mbr" is used. - Journaling Flash filesystem support: - CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, - CONFIG_JFFS2_NAND_DEV + CONFIG_JFFS2_NAND Define these for a default partition on a NAND device CONFIG_SYS_JFFS2_FIRST_SECTOR, CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device - CONFIG_SYS_JFFS_CUSTOM_PART - Define this to create an own partition. You have to provide a - function struct part_info* jffs2_part_info(int part_num) - - If you define only one JFFS2 partition you may also want to - #define CONFIG_SYS_JFFS_SINGLE_PART 1 - to disable the command chpart. This is the default when you - have not defined a custom partition - - FAT(File Allocation Table) filesystem write function support: CONFIG_FAT_WRITE @@ -2338,8 +2280,6 @@ CBFS (Coreboot Filesystem) support - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4 - - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5 - - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses - drivers/i2c/omap24xx_i2c.c @@ -2393,10 +2333,7 @@ CBFS (Coreboot Filesystem) support additional defines: CONFIG_SYS_NUM_I2C_BUSES - Hold the number of i2c buses you want to use. If you - don't use/have i2c muxes on your i2c bus, this - is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can - omit this define. + Hold the number of i2c buses you want to use. CONFIG_SYS_I2C_DIRECT_BUS define this, if you don't use i2c muxes on your hardware. @@ -2610,7 +2547,7 @@ CBFS (Coreboot Filesystem) support will skip addresses 0x50 and 0x68 on a board with one I2C bus #define CONFIG_I2C_MULTI_BUS - #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} + #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 @@ -3767,10 +3704,6 @@ Configuration Settings: - CONFIG_SYS_SDRAM_BASE: Physical start address of SDRAM. _Must_ be 0 here. -- CONFIG_SYS_MBIO_BASE: - Physical start address of Motherboard I/O (if using a - Cogent motherboard) - - CONFIG_SYS_FLASH_BASE: Physical start address of Flash memory. @@ -4202,7 +4135,7 @@ to save the current settings. This setting describes a second storage area of CONFIG_ENV_SIZE size used to hold a redundant copy of the environment data, so that there is a valid backup copy in case there is a power failure - during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be aligned to an erase sector boundary. - CONFIG_ENV_SPI_BUS (optional): @@ -4253,7 +4186,7 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. This setting describes a second storage area of CONFIG_ENV_SIZE size used to hold a redundant copy of the environment data, so that there is a valid backup copy in case there is a power failure - during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be aligned to an erase block boundary. - CONFIG_ENV_RANGE (optional): @@ -4554,7 +4487,7 @@ Low Level (hardware related) configuration options: CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - - CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just + GENERATED_GBL_DATA_SIZE), and the initial stack is just below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) downward. @@ -4613,11 +4546,6 @@ Low Level (hardware related) configuration options: enable SPI microcode relocation patch (MPC8xx); define relocation offset in DPRAM [SCC4] -- CONFIG_SYS_USE_OSCCLK: - Use OSCM clock mode on MBX8xx board. Be careful, - wrong setting might damage your board. Read - doc/README.MBX before setting this variable! - - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) Offset of the bootmode word in DPRAM used by post (Power On Self Tests). This definition overrides @@ -4861,10 +4789,6 @@ within that device. Specifies that QE/FMAN firmware is located on the primary SD/MMC device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. -- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH - Specifies that QE/FMAN firmware is located on the primary SPI - device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. - - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE Specifies that QE/FMAN firmware is located in the remote (master) memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which @@ -4883,22 +4807,6 @@ within that device. - CONFIG_FSL_MC_ENET Enable the MC driver for Layerscape SoCs. -- CONFIG_SYS_LS_MC_FW_ADDR - The address in the storage device where the firmware is located. The - meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro - is also specified. - -- CONFIG_SYS_LS_MC_FW_LENGTH - The maximum possible size of the firmware. The firmware binary format - has a field that specifies the actual size of the firmware, but it - might not be possible to read any part of the firmware unless some - local storage is allocated to hold the entire firmware first. - -- CONFIG_SYS_LS_MC_FW_IN_NOR - Specifies that MC firmware is located in NOR flash, mapped as - normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the - virtual address in NOR flash. - Freescale Layerscape Debug Server Support: ------------------------------------------- The Freescale Layerscape Debug Server Support supports the loading of |