diff options
159 files changed, 3938 insertions, 2413 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index aef901c..c871eaf 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -7,62 +7,73 @@ config SYS_ARCH config ARM64 bool select PHYS_64BIT + select SYS_CACHE_SHIFT_6 config DMA_ADDR_T_64BIT bool default y if ARM64 config HAS_VBAR - bool + bool config HAS_THUMB2 - bool + bool config CPU_ARM720T - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_ARM920T - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_ARM926EJS - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_ARM946ES - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_ARM1136 - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_ARM1176 - bool - select HAS_VBAR + bool + select HAS_VBAR + select SYS_CACHE_SHIFT_5 config CPU_V7 - bool - select HAS_VBAR - select HAS_THUMB2 + bool + select HAS_VBAR + select HAS_THUMB2 + select SYS_CACHE_SHIFT_6 config CPU_V7M bool - select HAS_THUMB2 + select HAS_THUMB2 + select SYS_CACHE_SHIFT_5 config CPU_PXA - bool + bool + select SYS_CACHE_SHIFT_5 config CPU_SA1100 - bool + bool + select SYS_CACHE_SHIFT_5 config SYS_CPU - default "arm720t" if CPU_ARM720T - default "arm920t" if CPU_ARM920T - default "arm926ejs" if CPU_ARM926EJS - default "arm946es" if CPU_ARM946ES - default "arm1136" if CPU_ARM1136 - default "arm1176" if CPU_ARM1176 - default "armv7" if CPU_V7 - default "armv7m" if CPU_V7M - default "pxa" if CPU_PXA - default "sa1100" if CPU_SA1100 + default "arm720t" if CPU_ARM720T + default "arm920t" if CPU_ARM920T + default "arm926ejs" if CPU_ARM926EJS + default "arm946es" if CPU_ARM946ES + default "arm1136" if CPU_ARM1136 + default "arm1176" if CPU_ARM1176 + default "armv7" if CPU_V7 + default "armv7m" if CPU_V7M + default "pxa" if CPU_PXA + default "sa1100" if CPU_SA1100 default "armv8" if ARM64 config SYS_ARM_ARCH @@ -79,6 +90,21 @@ config SYS_ARM_ARCH default 4 if CPU_SA1100 default 8 if ARM64 +config SYS_CACHE_SHIFT_5 + bool + +config SYS_CACHE_SHIFT_6 + bool + +config SYS_CACHE_SHIFT_7 + bool + +config SYS_CACHELINE_SIZE + int + default 128 if SYS_CACHE_SHIFT_7 + default 64 if SYS_CACHE_SHIFT_6 + default 32 if SYS_CACHE_SHIFT_5 + config SEMIHOSTING bool "support boot from semihosting" help @@ -372,9 +398,9 @@ config TARGET_RASTABAN select DM_GPIO config TARGET_ETAMIN - bool "Support etamin" - select CPU_V7 - select SUPPORT_SPL + bool "Support etamin" + select CPU_V7 + select SUPPORT_SPL select DM select DM_SERIAL select DM_GPIO @@ -867,6 +893,7 @@ config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" select ARM64 select OF_CONTROL + select SYS_CACHE_SHIFT_7 endchoice diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 7244c2e..ef32c3f 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -53,11 +53,6 @@ static void cache_flush(void) } #ifndef CONFIG_SYS_DCACHE_OFF - -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - void invalidate_dcache_all(void) { asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0)); diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 2119382..02cb24c 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -8,11 +8,6 @@ #include <common.h> #ifndef CONFIG_SYS_DCACHE_OFF - -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - void invalidate_dcache_all(void) { asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c index 7aba112..d26354e 100644 --- a/arch/arm/cpu/pxa/cache.c +++ b/arch/arm/cpu/pxa/cache.c @@ -8,11 +8,6 @@ #include <common.h> #ifndef CONFIG_SYS_DCACHE_OFF - -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - void invalidate_dcache_all(void) { /* Flush/Invalidate I cache */ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 223124e..7d1944f 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -182,6 +182,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a13-ampe-a76.dtb \ sun5i-a13-difrnce-dit4350.dtb \ sun5i-a13-empire-electronix-d709.dtb \ + sun5i-a13-empire-electronix-m712.dtb \ sun5i-a13-hsg-h702.dtb \ sun5i-a13-inet-86vs.dtb \ sun5i-a13-inet-98v-rev2.dtb \ @@ -200,6 +201,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-mixtile-loftq.dtb \ sun6i-a31s-colorfly-e708-q1.dtb \ sun6i-a31s-cs908.dtb \ + sun6i-a31s-inet-q972.dtb \ sun6i-a31s-primo81.dtb \ sun6i-a31s-sina31s.dtb \ sun6i-a31s-sinovoip-bpi-m2.dtb \ @@ -207,6 +209,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-ainol-aw1.dtb \ sun7i-a20-bananapi.dtb \ + sun7i-a20-bananapi-m1-plus.dtb \ sun7i-a20-bananapro.dtb \ sun7i-a20-cubieboard2.dtb \ sun7i-a20-cubietruck.dtb \ @@ -221,6 +224,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-olimex-som-evb.dtb \ sun7i-a20-olinuxino-lime.dtb \ sun7i-a20-olinuxino-lime2.dtb \ + sun7i-a20-olinuxino-lime2-emmc.dtb \ sun7i-a20-olinuxino-micro.dtb \ sun7i-a20-orangepi.dtb \ sun7i-a20-orangepi-mini.dtb \ @@ -247,6 +251,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-sinovoip-bpi-m3.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-lite.dtb \ sun8i-h3-orangepi-one.dtb \ diff --git a/arch/arm/dts/axp209.dtsi b/arch/arm/dts/axp209.dtsi index 051ab3b..afbe89c 100644 --- a/arch/arm/dts/axp209.dtsi +++ b/arch/arm/dts/axp209.dtsi @@ -87,6 +87,7 @@ reg_ldo5: ldo5 { regulator-name = "ldo5"; + status = "disabled"; }; }; diff --git a/arch/arm/dts/axp809.dtsi b/arch/arm/dts/axp809.dtsi new file mode 100644 index 0000000..ab8e5f2 --- /dev/null +++ b/arch/arm/dts/axp809.dtsi @@ -0,0 +1,53 @@ +/* + * Copyright 2015 Chen-Yu Tsai + * + * Chen-Yu Tsai <wens@csie.org> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * AXP809 Integrated Power Management Chip + */ + +&axp809 { + compatible = "x-powers,axp809"; + interrupt-controller; + #interrupt-cells = <1>; +}; diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts index 97570cb..39e368e 100644 --- a/arch/arm/dts/sun4i-a10-a1000.dts +++ b/arch/arm/dts/sun4i-a10-a1000.dts @@ -72,8 +72,9 @@ }; blue { - label = "a1000:blue:usr"; + label = "a1000:blue:pwr"; gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; + default-state = "on"; }; }; @@ -84,9 +85,28 @@ regulator-name = "emac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + startup-delay-us = <20000>; enable-active-high; gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -188,6 +208,12 @@ status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sun4i-a10-hackberry.dts b/arch/arm/dts/sun4i-a10-hackberry.dts index 2b17c51..6de83a6 100644 --- a/arch/arm/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/dts/sun4i-a10-hackberry.dts @@ -66,6 +66,7 @@ regulator-name = "emac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + startup-delay-us = <20000>; enable-active-high; gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts index 43f58fb..9103864 100644 --- a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts +++ b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts @@ -87,6 +87,30 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; +}; + +®_usb0_vbus { + status = "okay"; +}; + ®_usb2_vbus { gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ status = "okay"; @@ -102,7 +126,17 @@ allwinner,pins = "PH6"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <®_usb0_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts index 7afc7a6..e28f080 100644 --- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts +++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts @@ -80,6 +80,7 @@ regulator-name = "emac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + startup-delay-us = <20000>; enable-active-high; gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ }; diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi index 2c8f5e6..7e7dfc2 100644 --- a/arch/arm/dts/sun4i-a10.dtsi +++ b/arch/arm/dts/sun4i-a10.dtsi @@ -65,8 +65,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>, <&dram_gates 26>; + clocks = <&ahb_gates 36>, <&ahb_gates 43>, + <&ahb_gates 44>, <&de_be0_clk>, + <&tcon0_ch1_clk>, <&dram_gates 26>; status = "disabled"; }; @@ -74,8 +75,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, + clocks = <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>, <&ahb_gates 46>, + <&de_be0_clk>, <&de_fe0_clk>, <&tcon0_ch1_clk>, <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; @@ -84,9 +86,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, - <&ahb_gates 46>, <&dram_gates 25>, - <&dram_gates 26>; + clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&ahb_gates 46>, + <&de_be0_clk>, <&de_fe0_clk>, <&tcon0_ch0_clk>, + <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; @@ -94,8 +96,10 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; - clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, + clocks = <&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>, <&ahb_gates 46>, + <&de_be0_clk>, <&de_fe0_clk>, + <&tcon0_ch1_clk>, <&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; @@ -184,6 +188,15 @@ clock-output-names = "osc24M"; }; + osc3M: osc3M_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "osc3M"; + }; + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; @@ -208,6 +221,23 @@ "pll2-4x", "pll2-8x"; }; + pll3: clk@01c20010 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20010 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll3"; + }; + + pll3x2: pll3x2_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll3>; + clock-output-names = "pll3-2x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -232,6 +262,23 @@ clock-output-names = "pll6_sata", "pll6_other", "pll6"; }; + pll7: clk@01c20030 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20030 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll7"; + }; + + pll7x2: pll7x2_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll7>; + clock-output-names = "pll7-2x"; + }; + /* dummy is 200M */ cpu: cpu@01c20054 { #clock-cells = <0>; @@ -477,6 +524,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>; @@ -520,6 +578,81 @@ "dram_de_mp", "dram_ace"; }; + de_be0_clk: clk@01c20104 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20104 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-be0"; + }; + + de_be1_clk: clk@01c20108 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20108 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-be1"; + }; + + de_fe0_clk: clk@01c2010c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c2010c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-fe0"; + }; + + de_fe1_clk: clk@01c20110 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20110 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-fe1"; + }; + + + tcon0_ch0_clk: clk@01c20118 { + #clock-cells = <0>; + #reset-cells = <1>; + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; + reg = <0x01c20118 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon0-ch0-sclk"; + + }; + + tcon1_ch0_clk: clk@01c2011c { + #clock-cells = <0>; + #reset-cells = <1>; + compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; + reg = <0x01c2011c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon1-ch0-sclk"; + + }; + + tcon0_ch1_clk: clk@01c2012c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; + reg = <0x01c2012c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon0-ch1-sclk"; + + }; + + tcon1_ch1_clk: clk@01c20130 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; + reg = <0x01c20130 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon1-ch1-sclk"; + + }; + ve_clk: clk@01c2013c { #clock-cells = <0>; #reset-cells = <0>; @@ -588,6 +721,19 @@ #dma-cells = <2>; }; + nfc: nand@01c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = <37>; + clocks = <&ahb_gates 13>, <&nand_clk>; + clock-names = "ahb", "mod"; + dmas = <&dma SUN4I_DMA_DEDICATED 3>; + dma-names = "rxtx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + spi0: spi@01c05000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; @@ -827,69 +973,62 @@ #interrupt-cells = <3>; #gpio-cells = <3>; - pwm0_pins_a: pwm0@0 { - allwinner,pins = "PB2"; - allwinner,function = "pwm"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - pwm1_pins_a: pwm1@0 { - allwinner,pins = "PI3"; - allwinner,function = "pwm"; + emac_pins_a: emac0@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA9", "PA10", + "PA11", "PA12", "PA13", "PA14", + "PA15", "PA16"; + allwinner,function = "emac"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart0_pins_a: uart0@0 { - allwinner,pins = "PB22", "PB23"; - allwinner,function = "uart0"; + i2c0_pins_a: i2c0@0 { + allwinner,pins = "PB0", "PB1"; + allwinner,function = "i2c0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart0_pins_b: uart0@1 { - allwinner,pins = "PF2", "PF4"; - allwinner,function = "uart0"; + i2c1_pins_a: i2c1@0 { + allwinner,pins = "PB18", "PB19"; + allwinner,function = "i2c1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart1_pins_a: uart1@0 { - allwinner,pins = "PA10", "PA11"; - allwinner,function = "uart1"; + i2c2_pins_a: i2c2@0 { + allwinner,pins = "PB20", "PB21"; + allwinner,function = "i2c2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "i2c0"; + ir0_rx_pins_a: ir0@0 { + allwinner,pins = "PB4"; + allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PB18", "PB19"; - allwinner,function = "i2c1"; + ir0_tx_pins_a: ir0@1 { + allwinner,pins = "PB3"; + allwinner,function = "ir0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PB20", "PB21"; - allwinner,function = "i2c2"; + ir1_rx_pins_a: ir1@0 { + allwinner,pins = "PB23"; + allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - emac_pins_a: emac0@0 { - allwinner,pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA9", "PA10", - "PA11", "PA12", "PA13", "PA14", - "PA15", "PA16"; - allwinner,function = "emac"; + ir1_tx_pins_a: ir1@1 { + allwinner,pins = "PB22"; + allwinner,function = "ir1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; @@ -909,34 +1048,41 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; - ir0_rx_pins_a: ir0@0 { - allwinner,pins = "PB4"; - allwinner,function = "ir0"; + ps20_pins_a: ps20@0 { + allwinner,pins = "PI20", "PI21"; + allwinner,function = "ps2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir0_tx_pins_a: ir0@1 { - allwinner,pins = "PB3"; - allwinner,function = "ir0"; + ps21_pins_a: ps21@0 { + allwinner,pins = "PH12", "PH13"; + allwinner,function = "ps2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_rx_pins_a: ir1@0 { - allwinner,pins = "PB23"; - allwinner,function = "ir1"; + pwm0_pins_a: pwm0@0 { + allwinner,pins = "PB2"; + allwinner,function = "pwm"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_tx_pins_a: ir1@1 { - allwinner,pins = "PB22"; - allwinner,function = "ir1"; + pwm1_pins_a: pwm1@0 { + allwinner,pins = "PI3"; + allwinner,function = "pwm"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + spdif_tx_pins_a: spdif@0 { + allwinner,pins = "PB13"; + allwinner,function = "spdif"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + spi0_pins_a: spi0@0 { allwinner,pins = "PI11", "PI12", "PI13"; allwinner,function = "spi0"; @@ -993,16 +1139,23 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ps20_pins_a: ps20@0 { - allwinner,pins = "PI20", "PI21"; - allwinner,function = "ps2"; + uart0_pins_a: uart0@0 { + allwinner,pins = "PB22", "PB23"; + allwinner,function = "uart0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ps21_pins_a: ps21@0 { - allwinner,pins = "PH12", "PH13"; - allwinner,function = "ps2"; + uart0_pins_b: uart0@1 { + allwinner,pins = "PF2", "PF4"; + allwinner,function = "uart0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + uart1_pins_a: uart1@0 { + allwinner,pins = "PA10", "PA11"; + allwinner,function = "uart1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; @@ -1034,6 +1187,19 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x400>; + interrupts = <13>; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma SUN4I_DMA_NORMAL 2>, + <&dma SUN4I_DMA_NORMAL 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>; diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts index 46ff940..23b0114 100644 --- a/arch/arm/dts/sun5i-a10s-mk802.dts +++ b/arch/arm/dts/sun5i-a10s-mk802.dts @@ -73,6 +73,20 @@ status = "okay"; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp152: pmic@30 { + compatible = "x-powers,axp152"; + reg = <0x30>; + interrupts = <0>; + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mk802>; @@ -83,10 +97,23 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + &ohci0 { status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_mk802: led_pins@0 { allwinner,pins = "PB2"; @@ -122,6 +149,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts index 86d046a..aef9147 100644 --- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts @@ -248,6 +248,13 @@ status = "okay"; }; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>, + <&spi2_cs0_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/dts/sun5i-a10s-wobo-i5.dts index 9fea918..b5de75f 100644 --- a/arch/arm/dts/sun5i-a10s-wobo-i5.dts +++ b/arch/arm/dts/sun5i-a10s-wobo-i5.dts @@ -79,6 +79,7 @@ regulator-name = "emac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + startup-delay-us = <20000>; enable-active-high; gpio = <&pio 0 2 GPIO_ACTIVE_HIGH>; }; @@ -195,7 +196,14 @@ regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; + regulator-name = "vcc-wifi1"; +}; + +®_ldo4 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi2"; }; ®_usb1_vbus { diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi index a5f8855..c41a2ba 100644 --- a/arch/arm/dts/sun5i-a10s.dtsi +++ b/arch/arm/dts/sun5i-a10s.dtsi @@ -65,8 +65,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>; + clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>, + <&ahb_gates 43>, <&ahb_gates 44>; status = "disabled"; }; @@ -74,7 +74,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>, + <&ahb_gates 44>; status = "disabled"; }; @@ -82,8 +83,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>; + clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>, + <&ahb_gates 36>, <&ahb_gates 44>; status = "disabled"; }; }; @@ -242,18 +243,18 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - nand_cs2_pins_a: nand_cs@2 { - allwinner,pins = "PC17"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + spi2_pins_a: spi2@0 { + allwinner,pins = "PB12", "PB13", "PB14"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - nand_cs3_pins_a: nand_cs@3 { - allwinner,pins = "PC18"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + spi2_cs0_pins_a: spi2_cs0@0 { + allwinner,pins = "PB11"; + allwinner,function = "spi2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; }; diff --git a/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts b/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts index 6546fa0..894c4c4 100644 --- a/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts +++ b/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts @@ -42,185 +42,9 @@ /dts-v1/; #include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> +#include "sun5i-reference-design-tablet.dtsi" / { model = "Difrnce DIT4350"; compatible = "difrnce,dit4350", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - /* TODO: backlight uses axp gpio1 as enable pin */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ - cd-inverted; - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - mmc0_cd_pin_d709: mmc0_cd_pin@0 { - allwinner,pins = "PG0"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { - allwinner,pins = "PG1"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; - }; - - usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PG2"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-pll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_usb0_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins_b>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb0_vbus_pin_a { - allwinner,pins = "PG12"; -}; - -&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_ldo3>; - status = "okay"; }; diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts b/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts new file mode 100644 index 0000000..b1e2afd --- /dev/null +++ b/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts @@ -0,0 +1,51 @@ +/* + * Copyright 2016 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun5i-a13.dtsi" +#include "sun5i-reference-design-tablet.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "Empire Electronix M712 tablet"; + compatible = "empire-electronix,m712", "allwinner,sun5i-a13"; +}; diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts index ad84fe4..081329e 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts @@ -109,6 +109,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 { allwinner,pins = "PG0"; @@ -124,6 +128,27 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + + usb0_vbus_pin_olinuxinom: usb0_vbus_pin@0 { + allwinner,pins = "PG12"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; @@ -132,6 +157,12 @@ }; }; +®_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin_olinuxinom>; + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + ®_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxinom>; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; @@ -144,7 +175,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <®_usb0_vbus>; usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts index 30e069a..b3c234c 100644 --- a/arch/arm/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/dts/sun5i-a13-olinuxino.dts @@ -155,21 +155,6 @@ status = "okay"; }; -&nfc { - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; - status = "okay"; - - nand@0 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0>; - allwinner,rb = <0>; - nand-ecc-mode = "hw"; - allwinner,randomize; - }; -}; - &ohci0 { status = "okay"; }; diff --git a/arch/arm/dts/sun5i-a13-q8-tablet.dts b/arch/arm/dts/sun5i-a13-q8-tablet.dts index 72e93ac..a89f29f 100644 --- a/arch/arm/dts/sun5i-a13-q8-tablet.dts +++ b/arch/arm/dts/sun5i-a13-q8-tablet.dts @@ -42,19 +42,45 @@ /dts-v1/; #include "sun5i-a13.dtsi" -#include "sun5i-q8-common.dtsi" +#include "sun5i-reference-design-tablet.dtsi" / { model = "Q8 A13 Tablet"; compatible = "allwinner,q8-a13", "allwinner,sun5i-a13"; + + panel: panel { + compatible = "urt,umsh-8596md-t", "simple-panel"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + /* TODO: lcd panel uses axp gpio0 as enable pin */ + backlight = <&backlight>; + #address-cells = <1>; + #size-cells = <0>; + + panel_input: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_lcd>; + }; + }; + }; +}; + +&be0 { + status = "okay"; }; -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; +&tcon0 { + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rgb666_pins>; + status = "okay"; }; -&usbphy { - usb1_vbus-supply = <®_ldo3>; +&tcon0_out { + tcon0_out_lcd: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_input>; + }; }; diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts index fa9ddfd..a8b0bcc 100644 --- a/arch/arm/dts/sun5i-a13-utoo-p66.dts +++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts @@ -42,24 +42,20 @@ /dts-v1/; #include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> +#include "sun5i-reference-design-tablet.dtsi" #include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> / { model = "Utoo P66"; compatible = "utoo,p66", "allwinner,sun5i-a13"; - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - /* Note levels of 10 / 20% result in backlight off */ - brightness-levels = <0 30 40 50 60 70 80 90 100>; - default-brightness-level = <6>; - /* TODO: backlight uses axp gpio1 as enable pin */ + /* The P66 uses the uart pins as gpios */ + aliases { + /delete-property/serial0; + }; + + chosen { + /delete-property/stdout-path; }; i2c_lcd: i2c@0 { @@ -73,39 +69,21 @@ }; }; -&codec { - pinctrl-names = "default"; - pinctrl-0 = <&codec_pa_pin>; - allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */ - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; +&backlight { + /* Note levels of 10 / 20% result in backlight off */ + brightness-levels = <0 30 40 50 60 70 80 90 100>; + default-brightness-level = <6>; }; -&ehci0 { - status = "okay"; +&codec { + allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */ }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; +&codec_pa_pin { + allwinner,pins = "PG3"; }; -#include "axp209.dtsi" - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; - icn8318: touchscreen@40 { compatible = "chipone,icn8318"; reg = <0x40>; @@ -119,40 +97,6 @@ touchscreen-inverted-x; touchscreen-swapped-x-y; }; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_p66>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ - cd-inverted; - status = "okay"; }; &mmc2 { @@ -170,39 +114,7 @@ }; }; -&otg_sram { - status = "okay"; -}; - &pio { - codec_pa_pin: codec_pa_pin@0 { - allwinner,pins = "PG3"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_cd_pin_p66: mmc0_cd_pin@0 { - allwinner,pins = "PG0"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { - allwinner,pins = "PG1"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; - }; - - usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PG2"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - i2c_lcd_pins: i2c_lcd_pin@0 { allwinner,pins = "PG10", "PG12"; allwinner,function = "gpio_out"; @@ -217,67 +129,17 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - usb0_vbus_pin_a: usb0_vbus_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-pll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; }; ®_usb0_vbus { gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - status = "okay"; }; -&usb_otg { - dr_mode = "otg"; - status = "okay"; +&uart1 { + /* The P66 uses the uart pins as gpios */ + status = "disabled"; }; -&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_ldo3>; - status = "okay"; +&usb0_vbus_pin_a { + allwinner,pins = "PB4"; }; diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi index d910d3a..e012890 100644 --- a/arch/arm/dts/sun5i-a13.dtsi +++ b/arch/arm/dts/sun5i-a13.dtsi @@ -61,7 +61,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>, + <&tcon_ch0_clk>, <&dram_gates 26>; status = "disabled"; }; }; @@ -110,8 +111,8 @@ <10>, <13>, <14>, <20>, <21>, <22>, - <28>, <32>, <36>, - <40>, <44>, + <28>, <32>, <34>, + <36>, <40>, <44>, <46>, <51>, <52>; clock-output-names = "ahb_usbotg", "ahb_ehci", @@ -120,8 +121,8 @@ "ahb_mmc2", "ahb_nand", "ahb_sdram", "ahb_spi0", "ahb_spi1", "ahb_spi2", - "ahb_stimer", "ahb_ve", "ahb_lcd", - "ahb_csi", "ahb_de_be", + "ahb_stimer", "ahb_ve", "ahb_tve", + "ahb_lcd", "ahb_csi", "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; }; @@ -149,9 +150,107 @@ "apb1_i2c2", "apb1_uart1", "apb1_uart3"; }; + + dram_gates: clk@01c20100 { + #clock-cells = <1>; + compatible = "allwinner,sun5i-a13-dram-gates-clk", + "allwinner,sun4i-a10-gates-clk"; + reg = <0x01c20100 0x4>; + clocks = <&pll5 0>; + clock-indices = <0>, + <1>, + <25>, + <26>, + <29>, + <31>; + clock-output-names = "dram_ve", + "dram_csi", + "dram_de_fe", + "dram_de_be", + "dram_ace", + "dram_iep"; + }; + + de_be_clk: clk@01c20104 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20104 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-be"; + }; + + de_fe_clk: clk@01c2010c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c2010c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-fe"; + }; + + tcon_ch0_clk: clk@01c20118 { + #clock-cells = <0>; + #reset-cells = <1>; + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; + reg = <0x01c20118 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon-ch0-sclk"; + }; + + tcon_ch1_clk: clk@01c2012c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; + reg = <0x01c2012c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon-ch1-sclk"; + }; + }; + + display-engine { + compatible = "allwinner,sun5i-a13-display-engine"; + allwinner,pipelines = <&fe0>; }; soc@01c00000 { + tcon0: lcd-controller@01c0c000 { + compatible = "allwinner,sun5i-a13-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = <44>; + resets = <&tcon_ch0_clk 1>; + reset-names = "lcd"; + clocks = <&ahb_gates 36>, + <&tcon_ch0_clk>, + <&tcon_ch1_clk>; + clock-names = "ahb", + "tcon-ch0", + "tcon-ch1"; + clock-output-names = "tcon-pixel-clock"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_be0: endpoint@0 { + reg = <0>; + remote-endpoint = <&be0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + pwm: pwm@01c20e00 { compatible = "allwinner,sun5i-a13-pwm"; reg = <0x01c20e00 0xc>; @@ -159,6 +258,75 @@ #pwm-cells = <3>; status = "disabled"; }; + + fe0: display-frontend@01e00000 { + compatible = "allwinner,sun5i-a13-display-frontend"; + reg = <0x01e00000 0x20000>; + interrupts = <47>; + clocks = <&ahb_gates 46>, <&de_fe_clk>, + <&dram_gates 25>; + clock-names = "ahb", "mod", + "ram"; + resets = <&de_fe_clk>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + fe0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + fe0_out_be0: endpoint@0 { + reg = <0>; + remote-endpoint = <&be0_in_fe0>; + }; + }; + }; + }; + + be0: display-backend@01e60000 { + compatible = "allwinner,sun5i-a13-display-backend"; + reg = <0x01e60000 0x10000>; + clocks = <&ahb_gates 44>, <&de_be_clk>, + <&dram_gates 26>; + clock-names = "ahb", "mod", + "ram"; + resets = <&de_be_clk>; + status = "disabled"; + + assigned-clocks = <&de_be_clk>; + assigned-clock-rates = <300000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + be0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + be0_in_fe0: endpoint@0 { + reg = <0>; + remote-endpoint = <&fe0_out_be0>; + }; + }; + + be0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + be0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_be0>; + }; + }; + }; + }; }; }; @@ -181,6 +349,16 @@ &pio { compatible = "allwinner,sun5i-a13-pinctrl"; + lcd_rgb666_pins: lcd_rgb666@0 { + allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", + "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + allwinner,function = "lcd0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + uart1_pins_a: uart1@0 { allwinner,pins = "PE10", "PE11"; allwinner,function = "uart1"; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index b1b62d5..7a8cc27 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -52,7 +52,7 @@ / { model = "NextThing C.H.I.P."; - compatible = "nextthing,chip", "allwinner,sun5i-r8"; + compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13"; aliases { i2c0 = &i2c0; @@ -78,6 +78,10 @@ }; }; +&be0 { + status = "okay"; +}; + &codec { status = "okay"; }; @@ -142,21 +146,6 @@ status = "okay"; }; -&nfc { - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; - status = "okay"; - - nand@0 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0>; - allwinner,rb = <0>; - nand-ecc-mode = "hw"; - nand-on-flash-bbt; - }; -}; - &ohci0 { status = "okay"; }; @@ -240,6 +229,14 @@ status = "okay"; }; +&tcon0 { + status = "okay"; +}; + +&tve0 { + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_b>; diff --git a/arch/arm/dts/sun5i-r8.dtsi b/arch/arm/dts/sun5i-r8.dtsi index 0ef8656..8b058f5 100644 --- a/arch/arm/dts/sun5i-r8.dtsi +++ b/arch/arm/dts/sun5i-r8.dtsi @@ -51,9 +51,37 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>; + clocks = <&ahb_gates 34>, <&ahb_gates 36>, + <&ahb_gates 44>, <&de_be_clk>, + <&tcon_ch1_clk>, <&dram_gates 26>; status = "disabled"; }; }; + + soc@01c00000 { + tve0: tv-encoder@01c0a000 { + compatible = "allwinner,sun4i-a10-tv-encoder"; + reg = <0x01c0a000 0x1000>; + clocks = <&ahb_gates 34>; + resets = <&tcon_ch0_clk 0>; + status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + tve0_in_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_tve0>; + }; + }; + }; + }; +}; + +&tcon0_out { + tcon0_out_tve0: endpoint@1 { + reg = <1>; + remote-endpoint = <&tve0_in_tcon0>; + }; }; diff --git a/arch/arm/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/dts/sun5i-reference-design-tablet.dtsi new file mode 100644 index 0000000..20cc940 --- /dev/null +++ b/arch/arm/dts/sun5i-reference-design-tablet.dtsi @@ -0,0 +1,210 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +#include "sunxi-reference-design-tablet.dtsi" + +#include <dt-bindings/pwm/pwm.h> + +/ { + aliases { + serial0 = &uart1; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + /* TODO: backlight uses axp gpio1 as enable pin */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&codec { + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */ + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +&i2c1 { + pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +#include "axp209.dtsi" + +&lradc { + vref-supply = <®_ldo2>; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PG10"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin: mmc0_cd_pin@0 { + allwinner,pins = "PG0"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_pin_a: usb0_vbus_pin@0 { + allwinner,pins = "PG12"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-pll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_ldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_usb0_vbus { + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_b>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_ldo3>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi index 87e5353..e374f4f 100644 --- a/arch/arm/dts/sun5i.dtsi +++ b/arch/arm/dts/sun5i.dtsi @@ -88,6 +88,15 @@ clock-output-names = "osc24M"; }; + osc3M: osc3M_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "osc3M"; + }; + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; @@ -112,6 +121,23 @@ "pll2-4x", "pll2-8x"; }; + pll3: clk@01c20010 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20010 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll3"; + }; + + pll3x2: pll3x2_clk { + compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll3>; + clock-output-names = "pll3-2x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -136,6 +162,23 @@ clock-output-names = "pll6_sata", "pll6_other", "pll6"; }; + pll7: clk@01c20030 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20030 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll7"; + }; + + pll7x2: pll7x2_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <2>; + clocks = <&pll7>; + clock-output-names = "pll7-2x"; + }; + /* dummy is 200M */ cpu: cpu@01c20054 { #clock-cells = <0>; @@ -356,17 +399,6 @@ #dma-cells = <2>; }; - nfc: nand@01c03000 { - compatible = "allwinner,sun4i-a10-nand"; - reg = <0x01c03000 0x1000>; - interrupts = <37>; - clocks = <&ahb_gates 13>, <&nand_clk>; - clock-names = "ahb", "mod"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - spi0: spi@01c05000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; @@ -559,44 +591,6 @@ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; - nand_pins_a: nand_base0@0 { - allwinner,pins = "PC0", "PC1", "PC2", - "PC5", "PC8", "PC9", "PC10", - "PC11", "PC12", "PC13", "PC14", - "PC15"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - nand_cs0_pins_a: nand_cs@0 { - allwinner,pins = "PC4"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - nand_cs1_pins_a: nand_cs@1 { - allwinner,pins = "PC3"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - nand_rb0_pins_a: nand_rb@0 { - allwinner,pins = "PC6"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - nand_rb1_pins_a: nand_rb@1 { - allwinner,pins = "PC7"; - allwinner,function = "nand0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - uart3_pins_a: uart3@0 { allwinner,pins = "PG9", "PG10"; allwinner,function = "uart3"; diff --git a/arch/arm/dts/sun6i-a31-m9.dts b/arch/arm/dts/sun6i-a31-m9.dts index 6e0e568..29016a1 100644 --- a/arch/arm/dts/sun6i-a31-m9.dts +++ b/arch/arm/dts/sun6i-a31-m9.dts @@ -65,12 +65,17 @@ pinctrl-0 = <&led_pins_m9>; blue { - label = "m9:blue:usr"; + label = "m9:blue:pwr"; gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; + default-state = "on"; }; }; }; +&cpu0 { + cpu-supply = <®_dcdc3>; +}; + &ehci0 { status = "okay"; }; @@ -84,6 +89,7 @@ pinctrl-0 = <&gmac_pins_mii_a>; phy = <&phy1>; phy-mode = "mii"; + phy-supply = <®_dldo1>; status = "okay"; phy1: ethernet-phy@1 { @@ -100,13 +106,26 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; - vmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dcdc1>; bus-width = <4>; cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ cd-inverted; status = "okay"; }; +&p2wi { + status = "okay"; + + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + &pio { led_pins_m9: led_pins@0 { allwinner,pins = "PH13"; @@ -130,6 +149,78 @@ }; }; +®_aldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; /* This is an educated guess */ +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-ethernet-phy"; +}; + +/* + * Both reg_usb1_vbus and reg_dldo4 need to be on for the hub attached + * to usb1 to work, and we can list only one usb1_vbus-supply, so dldo4 is + * marked as regulator-always-on. + */ +®_dldo4 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-usb-hub"; +}; + ®_usb1_vbus { pinctrl-names = "default"; pinctrl-0 = <&usb1_vbus_pin_m9>; @@ -145,5 +236,6 @@ &usbphy { usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_aldo1>; status = "okay"; }; diff --git a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts index 4dd70cc..5faeae4 100644 --- a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts +++ b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts @@ -65,12 +65,17 @@ pinctrl-0 = <&led_pins_m9>; blue { - label = "m9:blue:usr"; + label = "a1000g:blue:pwr"; gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; + default-state = "on"; }; }; }; +&cpu0 { + cpu-supply = <®_dcdc3>; +}; + &ehci0 { status = "okay"; }; @@ -84,6 +89,7 @@ pinctrl-0 = <&gmac_pins_mii_a>; phy = <&phy1>; phy-mode = "mii"; + phy-supply = <®_dldo1>; status = "okay"; phy1: ethernet-phy@1 { @@ -100,13 +106,26 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; - vmmc-supply = <®_vcc3v3>; + vmmc-supply = <®_dcdc1>; bus-width = <4>; cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ cd-inverted; status = "okay"; }; +&p2wi { + status = "okay"; + + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + &pio { led_pins_m9: led_pins@0 { allwinner,pins = "PH13"; @@ -130,6 +149,78 @@ }; }; +®_aldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; /* This is an educated guess */ +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-ethernet-phy"; +}; + +/* + * Both reg_usb1_vbus and reg_dldo4 need to be on for the hub attached + * to usb1 to work, and we can list only one usb1_vbus-supply, so dldo4 is + * marked as regulator-always-on. + */ +®_dldo4 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-usb-hub"; +}; + ®_usb1_vbus { pinctrl-names = "default"; pinctrl-0 = <&usb1_vbus_pin_m9>; @@ -150,5 +241,6 @@ &usbphy { usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_aldo1>; status = "okay"; }; diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi index 1867af2..b674bf7 100644 --- a/arch/arm/dts/sun6i-a31.dtsi +++ b/arch/arm/dts/sun6i-a31.dtsi @@ -469,7 +469,8 @@ }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c0f000 0x1000>; clocks = <&ahb1_gates 8>, <&mmc0_clk 0>, @@ -488,7 +489,8 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c10000 0x1000>; clocks = <&ahb1_gates 9>, <&mmc1_clk 0>, @@ -507,7 +509,8 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c11000 0x1000>; clocks = <&ahb1_gates 10>, <&mmc2_clk 0>, @@ -526,7 +529,8 @@ }; mmc3: mmc@01c12000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c12000 0x1000>; clocks = <&ahb1_gates 11>, <&mmc3_clk 0>, diff --git a/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts b/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts index e182eec..882a4d8 100644 --- a/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts +++ b/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts @@ -42,32 +42,11 @@ /dts-v1/; #include "sun6i-a31s.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sun6i-reference-design-tablet.dtsi" / { model = "Colorfly E708 Q1 tablet"; compatible = "colorfly,e708-q1", "allwinner,sun6i-a31s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc3>; -}; - -&ehci0 { - /* rtl8188etv wifi is connected here */ - status = "okay"; }; &lradc { @@ -82,103 +61,6 @@ }; }; -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>; - vmmc-supply = <®_dcdc1>; - bus-width = <4>; - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ - cd-inverted; - status = "okay"; -}; - -&pio { - mma8452_int_e708_q1: mma8452_int_pin@0 { - allwinner,pins = "PA9"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 { - allwinner,pins = "PA8"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&p2wi { - status = "okay"; - - axp22x: pmic@68 { - compatible = "x-powers,axp221"; - reg = <0x68>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -#include "axp22x.dtsi" - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-cpus"; /* This is an educated guess */ -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-gpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc4 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-sys-dll"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_dldo1 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - ®_dldo2 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -186,23 +68,5 @@ }; &simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; vcc-pg-supply = <®_dldo2>; }; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp221 pmic on the board. - * - * Once we have axp221 power-supply and vbus-usb support we should switch - * to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_dldo1>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun6i-a31s-inet-q972.dts b/arch/arm/dts/sun6i-a31s-inet-q972.dts new file mode 100644 index 0000000..e584e6b --- /dev/null +++ b/arch/arm/dts/sun6i-a31s-inet-q972.dts @@ -0,0 +1,100 @@ +/* + * Copyright 2016 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun6i-a31s.dtsi" +#include "sun6i-reference-design-tablet.dtsi" + +/ { + model = "iNet Q972 tablet"; + compatible = "inet-tek,inet-q972", "allwinner,sun6i-a31s"; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + ft5406ee8: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>; /* PA3 */ + touchscreen-size-x = <768>; + touchscreen-size-y = <1024>; + touchscreen-swapped-x-y; + }; +}; + +&lradc { + vref-supply = <®_aldo3>; + status = "okay"; + + button@200 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <200000>; + }; + + button@900 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <900000>; + }; + + button@1200 { + label = "Back"; + linux,code = <KEY_BACK>; + channel = <0>; + voltage = <1200000>; + }; +}; + +&ohci1 { + status = "okay"; +}; diff --git a/arch/arm/dts/sun6i-a31s-primo81.dts b/arch/arm/dts/sun6i-a31s-primo81.dts index 379746a..73c133f 100644 --- a/arch/arm/dts/sun6i-a31s-primo81.dts +++ b/arch/arm/dts/sun6i-a31s-primo81.dts @@ -53,14 +53,6 @@ / { model = "MSI Primo81 tablet"; compatible = "msi,primo81", "allwinner,sun6i-a31s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; }; &cpu0 { @@ -184,8 +176,6 @@ }; ®_dc1sw { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; regulator-name = "vcc-lcd"; }; diff --git a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts index 360adfb..d6ad619 100644 --- a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts +++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts @@ -135,8 +135,6 @@ ®_dc1sw { regulator-name = "vcc-lcd-usb2"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; }; ®_dc5ldo { diff --git a/arch/arm/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/dts/sun6i-reference-design-tablet.dtsi new file mode 100644 index 0000000..0c43430 --- /dev/null +++ b/arch/arm/dts/sun6i-reference-design-tablet.dtsi @@ -0,0 +1,193 @@ +/* + * Copyright 2016 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc3>; +}; + +&ehci0 { + /* Wifi is connected here */ + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ + cd-inverted; + status = "okay"; +}; + +&pio { + mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 { + allwinner,pins = "PA8"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&p2wi { + status = "okay"; + + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + drivevbus-supply = <®_vcc5v0>; + x-powers,drive-vbus-en; + }; +}; + +#include "axp22x.dtsi" + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; /* This is an educated guess */ +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_dldo1>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts new file mode 100644 index 0000000..ba5bca0 --- /dev/null +++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts @@ -0,0 +1,229 @@ +/* + * Copyright 2016 Luo Yi <luoyi.ly@gmail.com> + * + * Thanks to the original work by Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + model = "Banana Pi BPI-M1-Plus"; + compatible = "sinovoip,bpi-m1-plus", "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_bpi_m1p>; + + green { + label = "bananapi-m1-plus:green:usr"; + gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>; + }; + + pwr { + label = "bananapi-m1-plus:pwr:usr"; + gpios = <&pio 7 25 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + mmc3_pwrseq: mmc3_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pwrseq_pin_bpi_m1p>; + reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */ + }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_power_pin_bpi_m1p>; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; + }; +}; + +&ahci { + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii_a>; + phy = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&ir0 { + pinctrl-names = "default"; + pinctrl-0 = <&ir0_rx_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m1p>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ + cd-inverted; + status = "okay"; +}; + +&mmc3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&mmc3_pwrseq>; + bus-width = <4>; + non-removable; + enable-sdio-wakeup; + status = "okay"; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "host-wake"; + }; +}; + +&mmc3_pins_a { + /* AP6210 requires pull-up */ + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + gmac_power_pin_bpi_m1p: gmac_power_pin@0 { + allwinner,pins = "PH23"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + led_pins_bpi_m1p: led_pins@0 { + allwinner,pins = "PH24", "PH25"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_bpi_m1p: mmc0_cd_pin@0 { + allwinner,pins = "PH10"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts index 8da939a..83f39b03 100644 --- a/arch/arm/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/dts/sun7i-a20-cubietruck.dts @@ -94,6 +94,24 @@ pinctrl-0 = <&mmc3_pwrseq_pin_cubietruck>; reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -301,6 +319,12 @@ status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts index 661c21d..10d48cb 100644 --- a/arch/arm/dts/sun7i-a20-itead-ibox.dts +++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts @@ -65,6 +65,24 @@ default-state = "on"; }; }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; }; &ahci { @@ -123,3 +141,9 @@ ®_ahci_5v { status = "okay"; }; + +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pins_a>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts index 5ee43d8..73c05da 100644 --- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts +++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts @@ -95,6 +95,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &cpu0 { cpu-supply = <®_dcdc2>; }; @@ -110,13 +114,67 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_pins_rgmii_a>; - phy = <&phy1>; phy-mode = "rgmii"; phy-supply = <®_gmac_3v3>; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; + fixed-link { + speed = <1000>; + full-duplex; + }; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + switch: ethernet-switch@1e { + compatible = "brcm,bcm53125"; + reg = <30>; + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + reg = <0>; + label = "lan2"; + }; + + port1: port@1 { + reg = <1>; + label = "lan3"; + }; + + port2: port@2 { + reg = <2>; + label = "lan4"; + }; + + port3: port@3 { + reg = <3>; + label = "wan"; + }; + + port4: port@4 { + reg = <4>; + label = "lan1"; + }; + + port8: port@8 { + reg = <8>; + label = "cpu"; + ethernet = <&gmac>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; }; }; @@ -158,10 +216,6 @@ status = "okay"; }; -&ohci1 { - status = "okay"; -}; - &otg_sram { status = "okay"; }; @@ -199,7 +253,7 @@ #include "axp209.dtsi" ®_ahci_5v { - gpio = <&pio 1 3 0>; /* PB3 */ + gpio = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ status = "okay"; }; @@ -232,11 +286,8 @@ status = "okay"; }; -®_usb1_vbus { - status = "okay"; -}; - ®_usb2_vbus { + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */ status = "okay"; }; @@ -275,13 +326,16 @@ status = "okay"; }; +&usb2_vbus_pin_a { + allwinner,pins = "PH12"; +}; + &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>; usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts new file mode 100644 index 0000000..5ea4915 --- /dev/null +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts @@ -0,0 +1,82 @@ + /* + * Copyright 2015 - Ultimaker B.V. + * Author Olliver Schinagl <oliver@schinagl.nl> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun7i-a20-olinuxino-lime2.dts" + +/ { + model = "Olimex A20-OLinuXino-LIME2-eMMC"; + compatible = "olimex,a20-olinuxino-lime2-emmc", "allwinner,sun7i-a20"; + + mmc2_pwrseq: pwrseq { + pinctrl-0 = <&mmc2_pins_nrst>; + pinctrl-names = "default"; + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>; + }; +}; + +&pio { + mmc2_pins_nrst: mmc2@0 { + allwinner,pins = "PC16"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins_a>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + mmc-pwrseq = <&mmc2_pwrseq>; + status = "okay"; + + emmc: emmc@0 { + reg = <0>; + compatible = "mmc-card"; + broken-hpi; + }; +}; diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi index 0940a78..4394711 100644 --- a/arch/arm/dts/sun7i-a20.dtsi +++ b/arch/arm/dts/sun7i-a20.dtsi @@ -67,8 +67,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>, <&dram_gates 26>; + clocks = <&ahb_gates 36>, <&ahb_gates 43>, + <&ahb_gates 44>, <&de_be0_clk>, + <&tcon0_ch1_clk>, <&dram_gates 26>; status = "disabled"; }; @@ -76,7 +77,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, + clocks = <&ahb_gates 36>, <&ahb_gates 44>, + <&de_be0_clk>, <&tcon0_ch0_clk>, <&dram_gates 26>; status = "disabled"; }; @@ -85,8 +87,10 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>, <&dram_gates 26>; + clocks = <&ahb_gates 34>, <&ahb_gates 36>, + <&ahb_gates 44>, + <&de_be0_clk>, <&tcon0_ch1_clk>, + <&dram_gates 5>, <&dram_gates 26>; status = "disabled"; }; }; @@ -186,6 +190,15 @@ clock-output-names = "osc24M"; }; + osc3M: osc3M_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <8>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "osc3M"; + }; + osc32k: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; @@ -210,6 +223,23 @@ "pll2-4x", "pll2-8x"; }; + pll3: clk@01c20010 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20010 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll3"; + }; + + pll3x2: pll3x2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&pll3>; + clock-div = <1>; + clock-mult = <2>; + clock-output-names = "pll3-2x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun7i-a20-pll4-clk"; @@ -235,6 +265,23 @@ "pll6_div_4"; }; + pll7: clk@01c20030 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-pll3-clk"; + reg = <0x01c20030 0x4>; + clocks = <&osc3M>; + clock-output-names = "pll7"; + }; + + pll7x2: pll7x2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&pll7>; + clock-div = <1>; + clock-mult = <2>; + clock-output-names = "pll7-2x"; + }; + pll8: clk@01c20040 { #clock-cells = <0>; compatible = "allwinner,sun7i-a20-pll4-clk"; @@ -324,9 +371,9 @@ <5>, <6>, <7>, <8>, <10>; clock-output-names = "apb0_codec", "apb0_spdif", - "apb0_ac97", "apb0_iis0", "apb0_iis1", + "apb0_ac97", "apb0_i2s0", "apb0_i2s1", "apb0_pio", "apb0_ir0", "apb0_ir1", - "apb0_iis2", "apb0_keypad"; + "apb0_i2s2", "apb0_keypad"; }; apb1: clk@01c20058 { @@ -476,6 +523,39 @@ clock-output-names = "ir1"; }; + i2s0_clk: clk@01c200b8 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200b8 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "i2s0"; + }; + + ac97_clk: clk@01c200bc { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200bc 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "ac97"; + }; + + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + keypad_clk: clk@01c200c4 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; @@ -502,6 +582,28 @@ clock-output-names = "spi3"; }; + i2s1_clk: clk@01c200d8 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200d8 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "i2s1"; + }; + + i2s2_clk: clk@01c200dc { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200dc 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "i2s2"; + }; + dram_gates: clk@01c20100 { #clock-cells = <1>; compatible = "allwinner,sun4i-a10-dram-gates-clk"; @@ -527,6 +629,80 @@ "dram_de_mp", "dram_ace"; }; + de_be0_clk: clk@01c20104 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20104 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-be0"; + }; + + de_be1_clk: clk@01c20108 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20108 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-be1"; + }; + + de_fe0_clk: clk@01c2010c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c2010c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-fe0"; + }; + + de_fe1_clk: clk@01c20110 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-display-clk"; + reg = <0x01c20110 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de-fe1"; + }; + + tcon0_ch0_clk: clk@01c20118 { + #clock-cells = <0>; + #reset-cells = <1>; + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; + reg = <0x01c20118 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon0-ch0-sclk"; + + }; + + tcon1_ch0_clk: clk@01c2011c { + #clock-cells = <0>; + #reset-cells = <1>; + compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; + reg = <0x01c2011c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon1-ch0-sclk"; + + }; + + tcon0_ch1_clk: clk@01c2012c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; + reg = <0x01c2012c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon0-ch1-sclk"; + + }; + + tcon1_ch1_clk: clk@01c20130 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; + reg = <0x01c20130 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "tcon1-ch1-sclk"; + + }; + ve_clk: clk@01c2013c { #clock-cells = <0>; #reset-cells = <0>; @@ -670,6 +846,19 @@ #dma-cells = <2>; }; + nfc: nand@01c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb_gates 13>, <&nand_clk>; + clock-names = "ahb", "mod"; + dmas = <&dma SUN4I_DMA_DEDICATED 3>; + dma-names = "rxtx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + spi0: spi@01c05000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; @@ -716,7 +905,8 @@ }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c0f000 0x1000>; clocks = <&ahb_gates 8>, <&mmc0_clk 0>, @@ -733,7 +923,8 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c10000 0x1000>; clocks = <&ahb_gates 9>, <&mmc1_clk 0>, @@ -750,7 +941,8 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c11000 0x1000>; clocks = <&ahb_gates 10>, <&mmc2_clk 0>, @@ -767,7 +959,8 @@ }; mmc3: mmc@01c12000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c12000 0x1000>; clocks = <&ahb_gates 11>, <&mmc3_clk 0>, @@ -902,160 +1095,177 @@ #interrupt-cells = <3>; #gpio-cells = <3>; - pwm0_pins_a: pwm0@0 { - allwinner,pins = "PB2"; - allwinner,function = "pwm"; + clk_out_a_pins_a: clk_out_a@0 { + allwinner,pins = "PI12"; + allwinner,function = "clk_out_a"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - pwm1_pins_a: pwm1@0 { - allwinner,pins = "PI3"; - allwinner,function = "pwm"; + clk_out_b_pins_a: clk_out_b@0 { + allwinner,pins = "PI13"; + allwinner,function = "clk_out_b"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart0_pins_a: uart0@0 { - allwinner,pins = "PB22", "PB23"; - allwinner,function = "uart0"; + emac_pins_a: emac0@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA9", "PA10", + "PA11", "PA12", "PA13", "PA14", + "PA15", "PA16"; + allwinner,function = "emac"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart2_pins_a: uart2@0 { - allwinner,pins = "PI16", "PI17", "PI18", "PI19"; - allwinner,function = "uart2"; + gmac_pins_mii_a: gmac_mii@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA9", "PA10", + "PA11", "PA12", "PA13", "PA14", + "PA15", "PA16"; + allwinner,function = "gmac"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart3_pins_a: uart3@0 { - allwinner,pins = "PG6", "PG7", "PG8", "PG9"; - allwinner,function = "uart3"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; + gmac_pins_rgmii_a: gmac_rgmii@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA10", + "PA11", "PA12", "PA13", + "PA15", "PA16"; + allwinner,function = "gmac"; + /* + * data lines in RGMII mode use DDR mode + * and need a higher signal drive strength + */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart3_pins_b: uart3@1 { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "uart3"; + i2c0_pins_a: i2c0@0 { + allwinner,pins = "PB0", "PB1"; + allwinner,function = "i2c0"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart4_pins_a: uart4@0 { - allwinner,pins = "PG10", "PG11"; - allwinner,function = "uart4"; + i2c1_pins_a: i2c1@0 { + allwinner,pins = "PB18", "PB19"; + allwinner,function = "i2c1"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart4_pins_b: uart4@1 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "uart4"; + i2c2_pins_a: i2c2@0 { + allwinner,pins = "PB20", "PB21"; + allwinner,function = "i2c2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart5_pins_a: uart5@0 { - allwinner,pins = "PI10", "PI11"; - allwinner,function = "uart5"; + i2c3_pins_a: i2c3@0 { + allwinner,pins = "PI0", "PI1"; + allwinner,function = "i2c3"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart6_pins_a: uart6@0 { - allwinner,pins = "PI12", "PI13"; - allwinner,function = "uart6"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + ir0_rx_pins_a: ir0@0 { + allwinner,pins = "PB4"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart7_pins_a: uart7@0 { - allwinner,pins = "PI20", "PI21"; - allwinner,function = "uart7"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + ir0_tx_pins_a: ir0@1 { + allwinner,pins = "PB3"; + allwinner,function = "ir0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "i2c0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + ir1_rx_pins_a: ir1@0 { + allwinner,pins = "PB23"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PB18", "PB19"; - allwinner,function = "i2c1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + ir1_tx_pins_a: ir1@1 { + allwinner,pins = "PB22"; + allwinner,function = "ir1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PB20", "PB21"; - allwinner,function = "i2c2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - i2c3_pins_a: i2c3@0 { - allwinner,pins = "PI0", "PI1"; - allwinner,function = "i2c3"; + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + mmc2_pins_a: mmc2@0 { + allwinner,pins = "PC6", "PC7", "PC8", + "PC9", "PC10", "PC11"; + allwinner,function = "mmc2"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + mmc3_pins_a: mmc3@0 { + allwinner,pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; + allwinner,function = "mmc3"; + allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - emac_pins_a: emac0@0 { - allwinner,pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA9", "PA10", - "PA11", "PA12", "PA13", "PA14", - "PA15", "PA16"; - allwinner,function = "emac"; + ps20_pins_a: ps20@0 { + allwinner,pins = "PI20", "PI21"; + allwinner,function = "ps2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - clk_out_a_pins_a: clk_out_a@0 { - allwinner,pins = "PI12"; - allwinner,function = "clk_out_a"; + ps21_pins_a: ps21@0 { + allwinner,pins = "PH12", "PH13"; + allwinner,function = "ps2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - clk_out_b_pins_a: clk_out_b@0 { - allwinner,pins = "PI13"; - allwinner,function = "clk_out_b"; + pwm0_pins_a: pwm0@0 { + allwinner,pins = "PB2"; + allwinner,function = "pwm"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - gmac_pins_mii_a: gmac_mii@0 { - allwinner,pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA9", "PA10", - "PA11", "PA12", "PA13", "PA14", - "PA15", "PA16"; - allwinner,function = "gmac"; + pwm1_pins_a: pwm1@0 { + allwinner,pins = "PI3"; + allwinner,function = "pwm"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - gmac_pins_rgmii_a: gmac_rgmii@0 { - allwinner,pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA10", - "PA11", "PA12", "PA13", - "PA15", "PA16"; - allwinner,function = "gmac"; - /* - * data lines in RGMII mode use DDR mode - * and need a higher signal drive strength - */ - allwinner,drive = <SUN4I_PINCTRL_40_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + spdif_tx_pins_a: spdif@0 { + allwinner,pins = "PB13"; + allwinner,function = "spdif"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; spi0_pins_a: spi0@0 { @@ -1121,75 +1331,65 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - allwinner,function = "mmc0"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; + uart0_pins_a: uart0@0 { + allwinner,pins = "PB22", "PB23"; + allwinner,function = "uart0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { - allwinner,pins = "PH1"; - allwinner,function = "gpio_in"; + uart2_pins_a: uart2@0 { + allwinner,pins = "PI16", "PI17", "PI18", "PI19"; + allwinner,function = "uart2"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - mmc2_pins_a: mmc2@0 { - allwinner,pins = "PC6", "PC7", "PC8", - "PC9", "PC10", "PC11"; - allwinner,function = "mmc2"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - mmc3_pins_a: mmc3@0 { - allwinner,pins = "PI4", "PI5", "PI6", - "PI7", "PI8", "PI9"; - allwinner,function = "mmc3"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; + uart3_pins_a: uart3@0 { + allwinner,pins = "PG6", "PG7", "PG8", "PG9"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir0_rx_pins_a: ir0@0 { - allwinner,pins = "PB4"; - allwinner,function = "ir0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart3_pins_b: uart3@1 { + allwinner,pins = "PH0", "PH1"; + allwinner,function = "uart3"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir0_tx_pins_a: ir0@1 { - allwinner,pins = "PB3"; - allwinner,function = "ir0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart4_pins_a: uart4@0 { + allwinner,pins = "PG10", "PG11"; + allwinner,function = "uart4"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_rx_pins_a: ir1@0 { - allwinner,pins = "PB23"; - allwinner,function = "ir1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart4_pins_b: uart4@1 { + allwinner,pins = "PH4", "PH5"; + allwinner,function = "uart4"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ir1_tx_pins_a: ir1@1 { - allwinner,pins = "PB22"; - allwinner,function = "ir1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart5_pins_a: uart5@0 { + allwinner,pins = "PI10", "PI11"; + allwinner,function = "uart5"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ps20_pins_a: ps20@0 { - allwinner,pins = "PI20", "PI21"; - allwinner,function = "ps2"; + uart6_pins_a: uart6@0 { + allwinner,pins = "PI12", "PI13"; + allwinner,function = "uart6"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - ps21_pins_a: ps21@0 { - allwinner,pins = "PH12", "PH13"; - allwinner,function = "ps2"; + uart7_pins_a: uart7@0 { + allwinner,pins = "PI20", "PI21"; + allwinner,function = "uart7"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; @@ -1226,6 +1426,19 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x400>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma SUN4I_DMA_NORMAL 2>, + <&dma SUN4I_DMA_NORMAL 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>; @@ -1244,6 +1457,32 @@ status = "disabled"; }; + i2s1: i2s@01c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-i2s"; + reg = <0x01c22000 0x400>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 4>, <&i2s1_clk>; + clock-names = "apb", "mod"; + dmas = <&dma SUN4I_DMA_NORMAL 4>, + <&dma SUN4I_DMA_NORMAL 4>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + i2s0: i2s@01c22400 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-i2s"; + reg = <0x01c22400 0x400>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 3>, <&i2s0_clk>; + clock-names = "apb", "mod"; + dmas = <&dma SUN4I_DMA_NORMAL 3>, + <&dma SUN4I_DMA_NORMAL 3>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + lradc: lradc@01c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; @@ -1269,6 +1508,19 @@ reg = <0x01c23800 0x200>; }; + i2s2: i2s@01c24400 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-i2s"; + reg = <0x01c24400 0x400>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 8>, <&i2s2_clk>; + clock-names = "apb", "mod"; + dmas = <&dma SUN4I_DMA_NORMAL 6>, + <&dma SUN4I_DMA_NORMAL 6>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + rtp: rtp@01c25000 { compatible = "allwinner,sun5i-a13-ts"; reg = <0x01c25000 0x100>; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index 7e05e09..f97c38f 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -266,7 +266,8 @@ }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c0f000 0x1000>; clocks = <&ahb1_gates 8>, <&mmc0_clk 0>, @@ -285,7 +286,8 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c10000 0x1000>; clocks = <&ahb1_gates 9>, <&mmc1_clk 0>, @@ -304,7 +306,8 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c11000 0x1000>; clocks = <&ahb1_gates 10>, <&mmc2_clk 0>, diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun8i-a23-gt90h-v4.dts index b2ce284..da55b5a 100644 --- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/dts/sun8i-a23-gt90h-v4.dts @@ -42,70 +42,26 @@ /dts-v1/; #include "sun8i-a23.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> +#include "sun8i-reference-design-tablet.dtsi" / { model = "Allwinner GT90H Dual Core Tablet (v4)"; compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23"; - - aliases { - serial0 = &r_uart; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&bl_en_pin_gt90h>; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; }; &ehci0 { status = "okay"; }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; +&gsl1680 { + compatible = "silead,gsl3675"; + touchscreen-fw-name = "silead/gsl3675-gt90h.fw"; + touchscreen-size-x = <1792>; + touchscreen-size-y = <1024>; status = "okay"; }; &lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; - button@600 { label = "Back"; linux,code = <KEY_BACK>; @@ -114,144 +70,6 @@ }; }; -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>; - vmmc-supply = <®_aldo1>; - bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; - status = "okay"; -}; - -&pio { - bl_en_pin_gt90h: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_cd_pin_gt90h: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -&r_rsb { - status = "okay"; - - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - }; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -#include "axp22x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-io"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <2350000>; - regulator-max-microvolt = <2650000>; - regulator-name = "vdd-dll"; -}; - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pll-avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpus"; -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-sys"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_dldo1 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -&simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; -}; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp223 pmic on the board. - * - * Once we have axp223 support we should switch to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - &usbphy { usb1_vbus-supply = <®_dldo1>; - status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a23-inet86dz.dts b/arch/arm/dts/sun8i-a23-inet86dz.dts index 0405258..9972021 100644 --- a/arch/arm/dts/sun8i-a23-inet86dz.dts +++ b/arch/arm/dts/sun8i-a23-inet86dz.dts @@ -42,252 +42,24 @@ /dts-v1/; #include "sun8i-a23.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> +#include "sun8i-reference-design-tablet.dtsi" / { model = "INet-86DZ Rev 01"; compatible = "primux,inet86dz", "allwinner,sun8i-a23"; - - aliases { - serial0 = &r_uart; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&bl_en_pin_inet86dz>; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; }; &ehci0 { status = "okay"; }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - /* - * The gsl1680 is rated at 400KHz and it will not work reliable at - * 100KHz, this has been confirmed on multiple different tablets. - * The gsl1680 is the only device on this bus. - */ - clock-frequency = <400000>; - - gsl1680: touchscreen@40 { - compatible = "silead,gsl1680"; - reg = <0x40>; - interrupt-parent = <&pio>; - interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */ - pinctrl-names = "default"; - pinctrl-0 = <&ts_power_pin_inet86dz>; - power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ - touchscreen-size-x = <960>; - touchscreen-size-y = <640>; - touchscreen-max-fingers = <5>; - touchscreen-fw-name = "silead/gsl1680-inet86dz.fw"; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; - -&lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet86dz>; - vmmc-supply = <®_dcdc1>; - bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; - status = "okay"; -}; - -&pio { - bl_en_pin_inet86dz: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_cd_pin_inet86dz: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - ts_power_pin_inet86dz: ts_power_pin@0 { - allwinner,pins = "PH1"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PH8"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -&r_rsb { - status = "okay"; - - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -#include "axp22x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-io"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <2350000>; - regulator-max-microvolt = <2650000>; - regulator-name = "vdd-dll"; -}; - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pll-avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpus"; -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-sys"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_dldo1 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_drivevbus { - regulator-name = "usb0-vbus"; - status = "okay"; -}; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -&simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { +&gsl1680 { + touchscreen-size-x = <960>; + touchscreen-size-y = <640>; + touchscreen-fw-name = "silead/gsl1680-inet86dz.fw"; status = "okay"; }; &usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_drivevbus>; usb1_vbus-supply = <®_dldo1>; - status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts index bb2f073..f23ca63 100644 --- a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts +++ b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts @@ -42,251 +42,68 @@ /dts-v1/; #include "sun8i-a23.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> +#include "sun8i-reference-design-tablet.dtsi" / { model = "Polaroid MID2407PXE03 tablet"; compatible = "polaroid,mid2407pxe03", "allwinner,sun8i-a23"; aliases { - serial0 = &r_uart; + ethernet0 = &esp8089; }; - backlight: backlight { - compatible = "pwm-backlight"; + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; - pinctrl-0 = <&bl_en_pin_mid2407>; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ - }; - - chosen { - stdout-path = "serial0:115200n8"; + pinctrl-0 = <&wifi_pwrseq_pin_mid2407>; + reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ + /* The esp8089 needs 200 ms after driving wifi-en high */ + post-power-on-delay-ms = <200>; }; }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; +&gsl1680 { + vddio-supply = <®_ldo_io1>; + touchscreen-size-x = <960>; + touchscreen-size-y = <640>; + touchscreen-inverted-x; + touchscreen-inverted-y; + touchscreen-fw-name = "silead/gsl1680-polaroid-mid2407pxe03.fw"; status = "okay"; - /* - * The gsl1680 is rated at 400KHz and it will not work reliable at - * 100KHz, this has been confirmed on multiple different tablets. - * The gsl1680 is the only device on this bus. - */ - clock-frequency = <400000>; - - gsl1680: touchscreen@40 { - compatible = "silead,gsl1680"; - reg = <0x40>; - interrupt-parent = <&pio>; - interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */ - pinctrl-names = "default"; - pinctrl-0 = <&ts_power_pin_mid2407>; - power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ - touchscreen-size-x = <960>; - touchscreen-size-y = <640>; - touchscreen-inverted-x; - touchscreen-inverted-y; - touchscreen-max-fingers = <5>; - touchscreen-fw-name = "silead/gsl1680-polaroid-mid2407pxe03.fw"; - }; }; -&i2c1 { +&mmc1 { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; - -&lradc { - vref-supply = <®_vcc3v0>; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_dldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; status = "okay"; - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; + esp8089: sdio_wifi@1 { + compatible = "esp,esp8089"; + reg = <1>; + esp,crystal-26M-en = <2>; }; }; -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mid2407>; - vmmc-supply = <®_dcdc1>; - bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; - status = "okay"; +&mmc1_pins_a { + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; -&pio { - bl_en_pin_mid2407: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_cd_pin_mid2407: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - ts_power_pin_mid2407: ts_power_pin@0 { - allwinner,pins = "PH1"; +&r_pio { + wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 { + allwinner,pins = "PL6"; allwinner,function = "gpio_out"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - - usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PH8"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -&r_rsb { - status = "okay"; - - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; - }; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -#include "axp22x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-io"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <2350000>; - regulator-max-microvolt = <2650000>; - regulator-name = "vdd-dll"; -}; - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pll-avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpus"; -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-sys"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_drivevbus { - regulator-name = "usb0-vbus"; - status = "okay"; }; ®_ldo_io1 { - regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-touchscreen"; status = "okay"; }; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -&simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_drivevbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts index cb5daaf..8e8f3e0 100644 --- a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts +++ b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts @@ -42,202 +42,59 @@ /dts-v1/; #include "sun8i-a23.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include <dt-bindings/pwm/pwm.h> +#include "sun8i-reference-design-tablet.dtsi" / { model = "Polaroid MID2809PXE04 tablet"; compatible = "polaroid,mid2809pxe04", "allwinner,sun8i-a23"; aliases { - serial0 = &r_uart; + ethernet0 = &esp8089; }; - backlight: backlight { - compatible = "pwm-backlight"; + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; - pinctrl-0 = <&bl_en_pin_mid2809>; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ - }; - - chosen { - stdout-path = "serial0:115200n8"; + pinctrl-0 = <&wifi_pwrseq_pin_mid2809>; + reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ + /* The esp8089 needs 200 ms after driving wifi-en high */ + post-power-on-delay-ms = <200>; }; }; -&ehci0 { - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; +&gsl1680 { + compatible = "silead,gsl3670"; + touchscreen-fw-name = "silead/gsl3670-polaroid-mid2809pxe04.fw"; + touchscreen-size-x = <1660>; + touchscreen-size-y = <890>; status = "okay"; }; -&i2c1 { +&mmc1 { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; - -&lradc { - vref-supply = <®_vcc3v0>; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_dldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; status = "okay"; - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; + esp8089: sdio_wifi@1 { + compatible = "esp,esp8089"; + reg = <1>; + esp,crystal-26M-en = <2>; }; }; -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mid2809>; - vmmc-supply = <®_dcdc1>; - bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; - status = "okay"; +&mmc1_pins_a { + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; -&pio { - bl_en_pin_mid2809: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; +&r_pio { + wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 { + allwinner,pins = "PL6"; + allwinner,function = "gpio_out"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - - mmc0_cd_pin_mid2809: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; - status = "okay"; -}; - -&r_rsb { - status = "okay"; - - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - }; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -#include "axp22x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-io"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <2350000>; - regulator-max-microvolt = <2650000>; - regulator-name = "vdd-dll"; -}; - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pll-avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpus"; -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-sys"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -&simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; -}; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp223 pmic on the board. - * - * Once we have axp223 support we should switch to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a23-q8-tablet.dts b/arch/arm/dts/sun8i-a23-q8-tablet.dts index 6062ea7..956320a 100644 --- a/arch/arm/dts/sun8i-a23-q8-tablet.dts +++ b/arch/arm/dts/sun8i-a23-q8-tablet.dts @@ -48,18 +48,3 @@ model = "Q8 A23 Tablet"; compatible = "allwinner,q8-a23", "allwinner,sun8i-a23"; }; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp223 pmic on the board. - * - * Once we have axp223 support we should switch to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts index 1aefc67..2fea1af 100644 --- a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts +++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts @@ -42,22 +42,15 @@ /dts-v1/; #include "sun8i-a33.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sun8i-reference-design-tablet.dtsi" / { model = "Allwinner GA10H Quad Core Tablet (v1.1)"; compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33"; aliases { - serial0 = &r_uart; - }; - - chosen { - stdout-path = "serial0:115200n8"; + /* Make u-boot set mac-address for rtl8703as (no eeprom) */ + ethernet0 = &rtl8703as; }; }; @@ -65,36 +58,16 @@ status = "okay"; }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; +&gsl1680 { + compatible = "silead,gsl3675"; + touchscreen-fw-name = "silead/gsl3675-ga10h.fw"; + touchscreen-size-x = <1630>; + touchscreen-size-y = <990>; + touchscreen-inverted-y; status = "okay"; }; &lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; - button@600 { label = "Back"; linux,code = <KEY_BACK>; @@ -103,40 +76,19 @@ }; }; -&mmc0 { +&mmc1 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>; - vmmc-supply = <®_vcc3v0>; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_dldo1>; bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; + non-removable; status = "okay"; -}; -&ohci0 { - status = "okay"; -}; - -&pio { - mmc0_cd_pin_q8h: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + rtl8703as: sdio_wifi@1 { + reg = <1>; }; }; -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { +&ohci0 { status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a33-q8-tablet.dts b/arch/arm/dts/sun8i-a33-q8-tablet.dts index 44b3229..b0bc236 100644 --- a/arch/arm/dts/sun8i-a33-q8-tablet.dts +++ b/arch/arm/dts/sun8i-a33-q8-tablet.dts @@ -48,18 +48,3 @@ model = "Q8 A33 Tablet"; compatible = "allwinner,q8-a33", "allwinner,sun8i-a33"; }; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp223 pmic on the board. - * - * Once we have axp223 support we should switch to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts new file mode 100644 index 0000000..f3b1d5f --- /dev/null +++ b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Banana Pi BPI-M2-Plus"; + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_led_bpi_m2p>; + + pwr_led { + label = "bananapi-m2-plus:red:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + default-state = "on"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_bpi_m2p>; + + sw4 { + label = "power"; + linux,code = <BTN_0>; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_en_bpi_m2p>; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ + }; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&r_pio { + pwr_led_bpi_m2p: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + sw_r_bpi_m2p: key_pins@0 { + allwinner,pins = "PL3"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + wifi_en_bpi_m2p: wifi_en_pin { + allwinner,pins = "PL7"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_a>; + status = "okay"; +}; + +&usbphy { + /* USB VBUS is on as long as VCC-IO is on */ + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts index d3f8f55..f89fe00 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts @@ -54,6 +54,8 @@ aliases { serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ + ethernet1 = &rtl8189; }; chosen { @@ -131,6 +133,14 @@ bus-width = <4>; non-removable; status = "okay"; + + /* + * Explicitly define the sdio device, so that we can add an ethernet + * alias for it (which e.g. makes u-boot set a mac-address). + */ + rtl8189: sdio_wifi@1 { + reg = <1>; + }; }; &pio { @@ -184,16 +194,3 @@ usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; }; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; - phy = <&phy1>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - diff --git a/arch/arm/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/dts/sun8i-h3-orangepi-lite.dts index ac71749..1550fee 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-lite.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-lite.dts @@ -54,7 +54,7 @@ aliases { /* The H3 emac is not used so the wifi is ethernet0 */ - ethernet1 = &rtl8189ftv; + ethernet0 = &rtl8189ftv; serial0 = &uart0; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts index 9a8cdd4..851fd2c 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts @@ -44,7 +44,8 @@ #include "sun8i-h3-orangepi-pc.dts" / { - model = "Xunlong Orange Pi PC / PC Plus"; + model = "Xunlong Orange Pi PC Plus"; + compatible = "xunlong,orangepi-pc-plus", "allwinner,sun8i-h3"; aliases { /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts index 0a74a91..24f8e97 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts @@ -63,34 +63,26 @@ leds { compatible = "gpio-leds"; pinctrl-names = "default"; - pinctrl-0 = <&leds_opc>; + pinctrl-0 = <&leds_opc>, <&leds_r_opc>; - status_led { - label = "status:red:user"; - gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; - }; - }; - - r_leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_r_opc>; - - tx { - label = "pwr:green:user"; + pwr_led { + label = "orangepi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; }; + + status_led { + label = "orangepi:red:status"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; }; r_gpio_keys { compatible = "gpio-keys"; - input-name = "sw4"; - pinctrl-names = "default"; pinctrl-0 = <&sw_r_opc>; - sw4@0 { + sw4 { label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -156,7 +148,7 @@ }; sw_r_opc: key_pins@0 { - allwinner,pins = "PL03"; + allwinner,pins = "PL3"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -177,10 +169,8 @@ &emac { phy = <&phy1>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { reg = <1>; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts index 28f74f6..4f4bb0f 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts @@ -58,6 +58,18 @@ enable-active-high; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_power_pin_orangepi>; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; }; &ehci2 { @@ -104,8 +116,30 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + gmac_power_pin_orangepi: gmac_power_pin@0 { + allwinner,pins = "PD6"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; &usbphy { usb3_vbus-supply = <®_usb3_vbus>; }; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy = <&phy1>; + phy-mode = "rgmii"; + + allwinner,leds-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <0>; + }; +}; diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index 84e52b9..6babaf3 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -42,14 +42,16 @@ #include "skeleton.dtsi" +#include <dt-bindings/clock/sun8i-h3-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/reset/sun8i-h3-ccu.h> / { interrupt-parent = <&gic>; aliases { - ethernet0 = <&emac>; + ethernet0 = &emac; }; cpus { @@ -108,191 +110,6 @@ clock-output-names = "osc32k"; }; - pll1: clk@01c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-pll1-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll1"; - }; - - /* dummy clock until actually implemented */ - pll5: pll5_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - clock-output-names = "pll5"; - }; - - pll6: clk@01c20028 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll6", "pll6x2"; - }; - - pll6d2: pll6d2_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <2>; - clock-mult = <1>; - clocks = <&pll6 0>; - clock-output-names = "pll6d2"; - }; - - /* dummy clock until pll6 can be reused */ - pll8: pll8_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <1>; - clock-output-names = "pll8"; - }; - - cpu: cpu_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-cpu-clk"; - reg = <0x01c20050 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; - clock-output-names = "cpu"; - }; - - axi: axi_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-axi-clk"; - reg = <0x01c20050 0x4>; - clocks = <&cpu>; - clock-output-names = "axi"; - }; - - ahb1: ahb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun6i-a31-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; - clock-output-names = "ahb1"; - }; - - ahb2: ahb2_clk@01c2005c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-h3-ahb2-clk"; - reg = <0x01c2005c 0x4>; - clocks = <&ahb1>, <&pll6d2>; - clock-output-names = "ahb2"; - }; - - apb1: apb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb0-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - apb2: apb2_clk@01c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; - clock-output-names = "apb2"; - }; - - bus_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-h3-bus-gates-clk"; - reg = <0x01c20060 0x14>; - clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>; - clock-names = "ahb1", "ahb2", "apb1", "apb2"; - clock-indices = <5>, <6>, <8>, - <9>, <10>, <13>, - <14>, <17>, <18>, - <19>, <20>, - <21>, <23>, - <24>, <25>, - <26>, <27>, - <28>, <29>, - <30>, <31>, <32>, - <35>, <36>, <37>, - <40>, <41>, <43>, - <44>, <52>, <53>, - <54>, <64>, - <65>, <69>, <72>, - <76>, <77>, <78>, - <96>, <97>, <98>, - <112>, <113>, - <114>, <115>, - <116>, <128>, <135>; - clock-output-names = "bus_ce", "bus_dma", "bus_mmc0", - "bus_mmc1", "bus_mmc2", "bus_nand", - "bus_sdram", "bus_gmac", "bus_ts", - "bus_hstimer", "bus_spi0", - "bus_spi1", "bus_otg", - "bus_otg_ehci0", "bus_ehci1", - "bus_ehci2", "bus_ehci3", - "bus_otg_ohci0", "bus_ohci1", - "bus_ohci2", "bus_ohci3", "bus_ve", - "bus_lcd0", "bus_lcd1", "bus_deint", - "bus_csi", "bus_tve", "bus_hdmi", - "bus_de", "bus_gpu", "bus_msgbox", - "bus_spinlock", "bus_codec", - "bus_spdif", "bus_pio", "bus_ths", - "bus_i2s0", "bus_i2s1", "bus_i2s2", - "bus_i2c0", "bus_i2c1", "bus_i2c2", - "bus_uart0", "bus_uart1", - "bus_uart2", "bus_uart3", - "bus_scr", "bus_ephy", "bus_dbg"; - }; - - mmc0_clk: clk@01c20088 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8>; - clock-output-names = "mmc0", - "mmc0_output", - "mmc0_sample"; - }; - - mmc1_clk: clk@01c2008c { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8>; - clock-output-names = "mmc1", - "mmc1_output", - "mmc1_sample"; - }; - - mmc2_clk: clk@01c20090 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8>; - clock-output-names = "mmc2", - "mmc2_output", - "mmc2_sample"; - }; - - usb_clk: clk@01c200cc { - #clock-cells = <1>; - #reset-cells = <1>; - compatible = "allwinner,sun8i-h3-usb-clk"; - reg = <0x01c200cc 0x4>; - clocks = <&osc24M>; - clock-output-names = "usb_phy0", "usb_phy1", - "usb_phy2", "usb_phy3", - "usb_ohci0", "usb_ohci1", - "usb_ohci2", "usb_ohci3"; - }; - - mbus_clk: clk@01c2015c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-mbus-clk"; - reg = <0x01c2015c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll5>; - clock-output-names = "mbus"; - }; - apb0: apb0_clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -327,27 +144,33 @@ #size-cells = <1>; ranges; + syscon: syscon@01c00000 { + compatible = "allwinner,sun8i-h3-syscon","syscon"; + reg = <0x01c00000 0x34>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 6>; - resets = <&ahb_rst 6>; + clocks = <&ccu CLK_BUS_DMA>; + resets = <&ccu RST_BUS_DMA>; #dma-cells = <1>; }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c0f000 0x1000>; - clocks = <&bus_gates 8>, - <&mmc0_clk 0>, - <&mmc0_clk 1>, - <&mmc0_clk 2>; + clocks = <&ccu CLK_BUS_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb_rst 8>; + resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -356,17 +179,18 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c10000 0x1000>; - clocks = <&bus_gates 9>, - <&mmc1_clk 0>, - <&mmc1_clk 1>, - <&mmc1_clk 2>; + clocks = <&ccu CLK_BUS_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb_rst 9>; + resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -375,17 +199,18 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc", + "allwinner,sun5i-a13-mmc"; reg = <0x01c11000 0x1000>; - clocks = <&bus_gates 10>, - <&mmc2_clk 0>, - <&mmc2_clk 1>, - <&mmc2_clk 2>; + clocks = <&ccu CLK_BUS_MMC2>, + <&ccu CLK_MMC2>, + <&ccu CLK_MMC2_OUTPUT>, + <&ccu CLK_MMC2_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb_rst 10>; + resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -405,18 +230,18 @@ "pmu1", "pmu2", "pmu3"; - clocks = <&usb_clk 8>, - <&usb_clk 9>, - <&usb_clk 10>, - <&usb_clk 11>; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>, + <&ccu CLK_USB_PHY2>, + <&ccu CLK_USB_PHY3>; clock-names = "usb0_phy", "usb1_phy", "usb2_phy", "usb3_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>, - <&usb_clk 2>, - <&usb_clk 3>; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>, + <&ccu RST_USB_PHY2>, + <&ccu RST_USB_PHY3>; reset-names = "usb0_reset", "usb1_reset", "usb2_reset", @@ -429,8 +254,8 @@ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 25>, <&bus_gates 29>; - resets = <&ahb_rst 25>, <&ahb_rst 29>; + clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; + resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -440,9 +265,9 @@ compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; reg = <0x01c1b400 0x100>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 29>, <&bus_gates 25>, - <&usb_clk 17>; - resets = <&ahb_rst 29>, <&ahb_rst 25>; + clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -452,8 +277,8 @@ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; reg = <0x01c1c000 0x100>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 26>, <&bus_gates 30>; - resets = <&ahb_rst 26>, <&ahb_rst 30>; + clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; + resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -463,9 +288,9 @@ compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; reg = <0x01c1c400 0x100>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 30>, <&bus_gates 26>, - <&usb_clk 18>; - resets = <&ahb_rst 30>, <&ahb_rst 26>; + clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, + <&ccu CLK_USB_OHCI2>; + resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -475,8 +300,8 @@ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; reg = <0x01c1d000 0x100>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 27>, <&bus_gates 31>; - resets = <&ahb_rst 27>, <&ahb_rst 31>; + clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; + resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; phys = <&usbphy 3>; phy-names = "usb"; status = "disabled"; @@ -486,43 +311,45 @@ compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; reg = <0x01c1d400 0x100>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 31>, <&bus_gates 27>, - <&usb_clk 19>; - resets = <&ahb_rst 31>, <&ahb_rst 27>; + clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, + <&ccu CLK_USB_OHCI3>; + resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; phys = <&usbphy 3>; phy-names = "usb"; status = "disabled"; }; + ccu: clock@01c20000 { + compatible = "allwinner,sun8i-h3-ccu"; + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&osc32k>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + pio: pinctrl@01c20800 { compatible = "allwinner,sun8i-h3-pinctrl"; reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 69>; + clocks = <&ccu CLK_BUS_PIO>; gpio-controller; #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; - rgmii_pins: rgmii_pins { + emac_rgmii_pins: emac0@0 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", - "PD4", "PD5", "PD7", - "PD8", "PD9", "PD10", - "PD12", "PD13", "PD15", - "PD16", "PD17"; + "PD4", "PD5", "PD7", + "PD8", "PD9", "PD10", + "PD12", "PD13", "PD15", + "PD16", "PD17"; allwinner,function = "emac"; allwinner,drive = <SUN4I_PINCTRL_40_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - uart0_pins_a: uart0@0 { - allwinner,pins = "PA4", "PA5"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -555,24 +382,20 @@ allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - }; - ahb_rst: reset@01c202c0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-ahb1-reset"; - reg = <0x01c202c0 0xc>; - }; - - apb1_rst: reset@01c202d0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d0 0x4>; - }; + uart0_pins_a: uart0@0 { + allwinner,pins = "PA4", "PA5"; + allwinner,function = "uart0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; - apb2_rst: reset@01c202d8 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d8 0x4>; + uart1_pins_a: uart1@0 { + allwinner,pins = "PG6", "PG7", "PG8", "PG9"; + allwinner,function = "uart1"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; timer@01c20c00 { @@ -595,8 +418,8 @@ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 112>; - resets = <&apb2_rst 16>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; dma-names = "rx", "tx"; status = "disabled"; @@ -608,8 +431,8 @@ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 113>; - resets = <&apb2_rst 17>; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; dma-names = "rx", "tx"; status = "disabled"; @@ -621,8 +444,8 @@ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 114>; - resets = <&apb2_rst 18>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -634,21 +457,22 @@ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 115>; - resets = <&apb2_rst 19>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; dmas = <&dma 9>, <&dma 9>; dma-names = "rx", "tx"; status = "disabled"; }; - emac: ethernet@01c30000 { + emac: ethernet@1c30000 { compatible = "allwinner,sun8i-h3-emac"; - reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; + syscon = <&syscon>; + reg = <0x01c30000 0x104>; + reg-names = "emac"; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - resets = <&ahb_rst 17>, <&ahb_rst 66>; + resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; reset-names = "ahb", "ephy"; - clocks = <&bus_gates 17>, <&bus_gates 128>; + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; clock-names = "ahb", "ephy"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi index 346a49d..8e2cc30 100644 --- a/arch/arm/dts/sun8i-q8-common.dtsi +++ b/arch/arm/dts/sun8i-q8-common.dtsi @@ -39,140 +39,83 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ -#include "sunxi-q8-common.dtsi" - -#include <dt-bindings/pwm/pwm.h> +#include "sunxi-reference-design-tablet.dtsi" +#include "sun8i-reference-design-tablet.dtsi" / { aliases { serial0 = &r_uart; + /* Make u-boot set mac-address for wifi without an eeprom */ + ethernet0 = &sdio_wifi; }; - backlight: backlight { - compatible = "pwm-backlight"; - pinctrl-names = "default"; - pinctrl-0 = <&bl_en_pin_q8>; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + q8_hardwaremgr { + compatible = "allwinner,sunxi-q8-hardwaremgr"; + touchscreen-i2c-bus = <&i2c0>; + touchscreen-supply = <®_ldo_io1>; + touchscreen-power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ }; - chosen { - stdout-path = "serial0:115200n8"; + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + /* + * Q8 boards use various PL# pins as wifi-en. On other boards + * these may be connected to a wifi module output pin. To avoid + * short-circuits we configure these as inputs with pull-ups via + * pinctrl, instead of listing them as active-low reset-gpios. + */ + pinctrl-names = "default"; + pinctrl-0 = <&wifi_pwrseq_pin_q8>; + /* The esp8089 needs 200 ms after driving wifi-en high */ + post-power-on-delay-ms = <200>; }; }; -&mmc0 { +&ehci0 { + status = "okay"; +}; + +&mmc1 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>; - vmmc-supply = <®_dcdc1>; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_dldo1>; + mmc-pwrseq = <&wifi_pwrseq>; bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; + non-removable; status = "okay"; -}; -&pio { - bl_en_pin_q8: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + sdio_wifi: sdio_wifi@1 { + reg = <1>; }; +}; - mmc0_cd_pin_q8: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; +&mmc1_pins_a { + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; +}; + +&r_pio { + wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 { + allwinner,pins = "PL6", "PL7", "PL11"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; }; -&r_rsb { - status = "okay"; - - axp22x: pmic@3a3 { - compatible = "x-powers,axp223"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - }; +&usbphy { + usb1_vbus-supply = <®_dldo1>; }; -#include "axp22x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-io"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <2350000>; - regulator-max-microvolt = <2650000>; - regulator-name = "vdd-dll"; +&gsl1680 { + touchscreen-size-x = <1024>; + touchscreen-size-y = <600>; + touchscreen-fw-name = "silead/gsl1680-q8-700.fw"; + status = "okay"; }; -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <2700000>; +®_ldo_io1 { + regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-name = "vcc-pll-avcc"; -}; - -®_dc1sw { - regulator-name = "vcc-lcd"; -}; - -®_dc5ldo { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpus"; -}; - -®_dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-sys"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; -}; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; + regulator-name = "vcc-touchscreen"; status = "okay"; }; - -&simplefb_lcd { - vcc-lcd-supply = <®_dc1sw>; -}; diff --git a/arch/arm/dts/sun8i-r16-parrot.dts b/arch/arm/dts/sun8i-r16-parrot.dts index 39c40be..47553e5 100644 --- a/arch/arm/dts/sun8i-r16-parrot.dts +++ b/arch/arm/dts/sun8i-r16-parrot.dts @@ -93,7 +93,10 @@ pinctrl-0 = <&i2c1_pins_a>; status = "okay"; - /* FIXME: An as-yet-unknown accelerometer is connected to this i2c bus. */ + /* + * FIXME: An as-yet-unknown accelerometer is connected to this + * i2c bus. + */ }; &lradc { diff --git a/arch/arm/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/dts/sun8i-reference-design-tablet.dtsi new file mode 100644 index 0000000..f29897c --- /dev/null +++ b/arch/arm/dts/sun8i-reference-design-tablet.dtsi @@ -0,0 +1,244 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +#include "sunxi-reference-design-tablet.dtsi" + +#include <dt-bindings/pwm/pwm.h> + +/ { + aliases { + serial0 = &r_uart; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&i2c0 { + /* + * The gsl1680 is rated at 400KHz and it will not work reliable at + * 100KHz, this has been confirmed on multiple different q8 tablets. + * The gsl1680 is the only device on this bus. + */ + clock-frequency = <400000>; + + gsl1680: touchscreen@40 { + compatible = "silead,gsl1680"; + reg = <0x40>; + interrupt-parent = <&pio>; + interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */ + pinctrl-names = "default"; + pinctrl-0 = <&ts_power_pin>; + power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + /* Most tablets use this touchscreen, but not all */ + status = "disabled"; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + bl_en_pin: bl_en_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + ts_power_pin: ts_power_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH8"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + drivevbus-supply = <®_vcc5v0>; + x-powers,drive-vbus-en; + }; +}; + +#include "axp22x.dtsi" + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <®_dc1sw>; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_drivevbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts b/arch/arm/dts/sun9i-a80-cubieboard4.dts index eb2ccd0..1526b41 100644 --- a/arch/arm/dts/sun9i-a80-cubieboard4.dts +++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts @@ -45,7 +45,6 @@ /dts-v1/; #include "sun9i-a80.dtsi" -#include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -79,26 +78,10 @@ }; }; -&pio { - led_pins_cubieboard4: led-pins@0 { - allwinner,pins = "PH6", "PH17"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 { - allwinner,pins = "PH18"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_cubieboard4>; - vmmc-supply = <®_vcc3v0>; + vmmc-supply = <®_dcdc1>; bus-width = <4>; cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH18 */ cd-inverted; @@ -108,7 +91,7 @@ &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; - vmmc-supply = <®_vcc3v0>; + vmmc-supply = <®_dcdc1>; bus-width = <8>; non-removable; cap-mmc-hw-reset; @@ -120,14 +103,157 @@ allwinner,drive = <SUN4I_PINCTRL_40_MA>; }; +&pio { + led_pins_cubieboard4: led-pins@0 { + allwinner,pins = "PH6", "PH17"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 { + allwinner,pins = "PH18"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + &r_ir { status = "okay"; }; &r_rsb { status = "okay"; + + axp809: pmic@3a3 { + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + regulators { + reg_aldo1: aldo1 { + /* + * TODO: This should be handled by the + * USB PHY driver. + */ + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc33-usbh"; + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pb-io-cam"; + }; + + aldo3 { + /* unused */ + }; + + reg_dc5ldo: dc5ldo { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpus-09-usbh"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v"; + }; + + reg_dcdc2: dcdc2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-gpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpua"; + }; + + reg_dcdc4: dcdc4 { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys-usb0-hdmi"; + }; + + reg_dcdc5: dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1425000>; + regulator-max-microvolt = <1575000>; + regulator-name = "vcc-dram"; + }; + + reg_dldo1: dldo1 { + /* + * The WiFi chip supports a wide range + * (3.0 ~ 4.8V) of voltages, and so does + * this regulator (3.0 ~ 4.2V), but + * Allwinner SDK always sets it to 3.3V. + */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; + }; + + reg_dldo2: dldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pl"; + }; + + reg_eldo1: eldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-dvdd-cam"; + }; + + reg_eldo2: eldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pe"; + }; + + reg_eldo3: eldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pm-codec-io1"; + }; + + reg_ldo_io0: ldo_io0 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pg"; + }; + + reg_ldo_io1: ldo_io1 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc-pa-gmac-2v5"; + }; + + reg_rtc_ldo: rtc_ldo { + regulator-name = "vcc-rtc-vdd1v8-io"; + }; + }; + }; }; +#include "axp809.dtsi" + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts index d7a20d9..7fd22e8 100644 --- a/arch/arm/dts/sun9i-a80-optimus.dts +++ b/arch/arm/dts/sun9i-a80-optimus.dts @@ -44,7 +44,6 @@ /dts-v1/; #include "sun9i-a80.dtsi" -#include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -85,6 +84,17 @@ }; }; + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&usb1_vbus_pin_optimus>; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + }; + reg_usb3_vbus: usb3-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -109,6 +119,31 @@ status = "okay"; }; +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */ + cd-inverted; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_dcdc1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; +}; + &ohci0 { status = "okay"; }; @@ -147,37 +182,6 @@ }; }; -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>; - vmmc-supply = <®_vcc3v0>; - bus-width = <4>; - cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */ - cd-inverted; - status = "okay"; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_8bit_pins>; - vmmc-supply = <®_vcc3v0>; - bus-width = <8>; - non-removable; - cap-mmc-hw-reset; - status = "okay"; -}; - -&mmc2_8bit_pins { - /* Increase drive strength for DDR modes */ - allwinner,drive = <SUN4I_PINCTRL_40_MA>; -}; - -®_usb1_vbus { - pinctrl-0 = <&usb1_vbus_pin_optimus>; - gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - status = "okay"; -}; - &r_ir { status = "okay"; }; @@ -193,8 +197,135 @@ &r_rsb { status = "okay"; + + axp809: pmic@3a3 { + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + regulators { + reg_aldo1: aldo1 { + /* + * TODO: This should be handled by the + * USB PHY driver. + */ + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc33-usbh"; + }; + + reg_aldo2: aldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pb-io-cam"; + }; + + aldo3 { + /* unused */ + }; + + reg_dc5ldo: dc5ldo { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpus-09-usbh"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v"; + }; + + reg_dcdc2: dcdc2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-gpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpua"; + }; + + reg_dcdc4: dcdc4 { + regulator-always-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys-usb0-hdmi"; + }; + + reg_dcdc5: dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1425000>; + regulator-max-microvolt = <1575000>; + regulator-name = "vcc-dram"; + }; + + reg_dldo1: dldo1 { + /* + * The WiFi chip supports a wide range + * (3.0 ~ 4.8V) of voltages, and so does + * this regulator (3.0 ~ 4.2V), but + * Allwinner SDK always sets it to 3.3V. + */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; + }; + + reg_dldo2: dldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pl"; + }; + + reg_eldo1: eldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vcc-dvdd-cam"; + }; + + reg_eldo2: eldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pe"; + }; + + reg_eldo3: eldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pm-codec-io1"; + }; + + reg_ldo_io0: ldo_io0 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-pg"; + }; + + reg_ldo_io1: ldo_io1 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc-pa-gmac-2v5"; + }; + + reg_rtc_ldo: rtc_ldo { + regulator-name = "vcc-rtc-vdd1v8-io"; + }; + }; + }; }; +#include "axp809.dtsi" + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/dts/sunxi-reference-design-tablet.dtsi new file mode 100644 index 0000000..b824146 --- /dev/null +++ b/arch/arm/dts/sunxi-reference-design-tablet.dtsi @@ -0,0 +1,83 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede@redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sunxi-common-regulators.dtsi" + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <400000>; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; diff --git a/arch/arm/include/asm/arch-armada100/config.h b/arch/arm/include/asm/arch-armada100/config.h index e062da1..6ebc759 100644 --- a/arch/arm/include/asm/arch-armada100/config.h +++ b/arch/arm/include/asm/arch-armada100/config.h @@ -16,8 +16,6 @@ #define _ARMD1_CONFIG_H #include <asm/arch/armada100.h> -/* default Dcache Line length for armada100 */ -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ #define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index b0ad4b4..5279981 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_FSL_SRDS_1 #define CONFIG_SYS_FSL_SRDS_2 #define CONFIG_SYS_PAGE_SIZE 0x10000 -#define CONFIG_SYS_CACHELINE_SIZE 64 #ifndef L1_CACHE_BYTES #define L1_CACHE_SHIFT 6 #define L1_CACHE_BYTES BIT(L1_CACHE_SHIFT) @@ -150,7 +149,6 @@ #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #elif defined(CONFIG_FSL_LSCH2) -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */ diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index d408fe4..56d8f32 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARMV7_LS102XA_CONFIG_ #define _ASM_ARMV7_LS102XA_CONFIG_ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define OCRAM_BASE_ADDR 0x10000000 #define OCRAM_SIZE 0x00010000 #define OCRAM_BASE_S_ADDR 0x10010000 diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index e73cc07..3e79fa3 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -9,8 +9,6 @@ #define ARCH_MXC -#define CONFIG_SYS_CACHELINE_SIZE 64 - #if defined(CONFIG_MX51) #define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ #define IPU_SOC_BASE_ADDR 0x40000000 diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index ac37e4f..53bf054 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -9,12 +9,6 @@ #define ARCH_MXC -#ifdef CONFIG_MX6UL -#define CONFIG_SYS_CACHELINE_SIZE 64 -#else -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - #define ROMCP_ARB_BASE_ADDR 0x00000000 #define ROMCP_ARB_END_ADDR 0x000FFFFF diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 74917f0..d33be31 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -9,8 +9,6 @@ #define ARCH_MXC -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define ROM_SW_INFO_ADDR 0x000001E8 #define ROMCP_ARB_BASE_ADDR 0x00000000 #define ROMCP_ARB_END_ADDR 0x00017FFF diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d4dff1e..be9fcfd 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -116,7 +116,9 @@ struct sunxi_ccm_reg { u32 mipi_bias_cfg; /* 0x240 MIPI Bias config */ u32 pll9_bias_cfg; /* 0x244 PLL9 Bias config */ u32 pll10_bias_cfg; /* 0x248 PLL10 Bias config */ - u32 reserved21[13]; + u32 reserved21[5]; + u32 pll5_tuning_cfg; /* 0x260 PLL5 Tuning config */ + u32 reserved21_5[7]; u32 pll1_pattern_cfg; /* 0x280 PLL1 Pattern config */ u32 pll2_pattern_cfg; /* 0x284 PLL2 Pattern config */ u32 pll3_pattern_cfg; /* 0x288 PLL3 Pattern config */ @@ -223,6 +225,11 @@ struct sunxi_ccm_reg { #define CCM_PLL11_CTRL_UPD (0x1 << 30) #define CCM_PLL11_CTRL_EN (0x1 << 31) +#define CCM_PLL5_TUN_LOCK_TIME(x) (((x) & 0x7) << 24) +#define CCM_PLL5_TUN_LOCK_TIME_MASK CCM_PLL5_TUN_LOCK_TIME(0x7) +#define CCM_PLL5_TUN_INIT_FREQ(x) (((x) & 0x7f) << 16) +#define CCM_PLL5_TUN_INIT_FREQ_MASK CCM_PLL5_TUN_INIT_FREQ(0x7f) + #if defined(CONFIG_MACH_SUN50I) /* AHB1=100MHz failsafe setup from the FEL mode, usable with PMIC defaults */ #define AHB1_ABP1_DIV_DEFAULT 0x00003190 /* AHB1=PLL6/6,APB1=AHB1/2 */ diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index cd009d7..5f93830 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -76,8 +76,15 @@ #define SUNXI_INTC_BASE 0x01c20400 #define SUNXI_PIO_BASE 0x01c20800 #define SUNXI_TIMER_BASE 0x01c20c00 +#ifndef CONFIG_SUNXI_GEN_SUN6I +#define SUNXI_PWM_BASE 0x01c20e00 +#endif #define SUNXI_SPDIF_BASE 0x01c21000 +#ifdef CONFIG_SUNXI_GEN_SUN6I +#define SUNXI_PWM_BASE 0x01c21400 +#else #define SUNXI_AC97_BASE 0x01c21400 +#endif #define SUNXI_IR0_BASE 0x01c21800 #define SUNXI_IR1_BASE 0x01c21c00 diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index bff7d14..85a4ec3 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -150,6 +150,7 @@ enum sunxi_gpio_number { #define SUN6I_GPA_SDC3 4 #define SUN8I_H3_GPA_UART0 2 +#define SUN4I_GPB_PWM 2 #define SUN4I_GPB_TWI0 2 #define SUN4I_GPB_TWI1 2 #define SUN5I_GPB_TWI1 2 @@ -186,6 +187,8 @@ enum sunxi_gpio_number { #define SUN6I_GPG_TWI3 2 #define SUN5I_GPG_UART1 4 +#define SUN6I_GPH_PWM 2 +#define SUN8I_GPH_PWM 2 #define SUN4I_GPH_SDC1 5 #define SUN6I_GPH_TWI0 2 #define SUN8I_GPH_TWI0 2 diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h b/arch/arm/include/asm/arch-sunxi/pwm.h new file mode 100644 index 0000000..5884b5d --- /dev/null +++ b/arch/arm/include/asm/arch-sunxi/pwm.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2016 Hans de Goede <hdegoede@redhat.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_PWM_H +#define _SUNXI_PWM_H + +#define SUNXI_PWM_CTRL_REG (SUNXI_PWM_BASE + 0) +#define SUNXI_PWM_CH0_PERIOD (SUNXI_PWM_BASE + 4) + +#define SUNXI_PWM_CTRL_PRESCALE0(x) ((x) & 0xf) +#define SUNXI_PWM_CTRL_ENABLE0 (0x5 << 4) +#define SUNXI_PWM_CTRL_POLARITY0(x) ((x) << 5) + +#define SUNXI_PWM_PERIOD_80PCT 0x04af03c0 + +#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN5I +#define SUNXI_PWM_PIN0 SUNXI_GPB(2) +#define SUNXI_PWM_MUX SUN4I_GPB_PWM +#endif + +#if defined CONFIG_MACH_SUN6I +#define SUNXI_PWM_PIN0 SUNXI_GPH(13) +#define SUNXI_PWM_MUX SUN6I_GPH_PWM +#endif + +#if defined CONFIG_MACH_SUN8I_A23 || defined CONFIG_MACH_SUN8I_A33 +#define SUNXI_PWM_PIN0 SUNXI_GPH(0) +#define SUNXI_PWM_MUX SUN8I_GPH_PWM +#endif + +#endif diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 16e65c3..5400cbe 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -43,14 +43,11 @@ void dram_bank_mmu_setup(int bank); #endif /* - * The current upper bound for ARM L1 data cache line sizes is 64 bytes. We - * use that value for aligning DMA buffers unless the board config has specified - * an alternate cache line size. + * The value of the largest data cache relevant to DMA operations shall be set + * for us in CONFIG_SYS_CACHELINE_SIZE. In some cases this may be a larger + * value than found in the L1 cache but this is OK to use in terms of + * alignment. */ -#ifdef CONFIG_SYS_CACHELINE_SIZE #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE -#else -#define ARCH_DMA_MINALIGN 64 -#endif #endif /* _ASM_CACHE_H */ diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 1121dc3..70e94f0 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -61,7 +61,12 @@ __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, enum dcache_option option) { +#ifdef CONFIG_ARMV7_LPAE + u64 *page_table = (u64 *)gd->arch.tlb_addr; +#else u32 *page_table = (u32 *)gd->arch.tlb_addr; +#endif + unsigned long startpt, stoppt; unsigned long upto, end; end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT; @@ -70,7 +75,18 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, option); for (upto = start; upto < end; upto++) set_section_dcache(upto, option); - mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]); + + /* + * Make sure range is cache line aligned + * Only CPU maintains page tables, hence it is safe to always + * flush complete cache lines... + */ + + startpt = (unsigned long)&page_table[start]; + startpt &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); + stoppt = (unsigned long)&page_table[end]; + stoppt = ALIGN(stoppt, CONFIG_SYS_CACHELINE_SIZE); + mmu_page_table_flush(startpt, stoppt); } __weak void dram_bank_mmu_setup(int bank) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index d330b09..4f72f89 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -10,10 +10,6 @@ #include <common.h> #include <malloc.h> -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - /* * Flush range from all levels of d-cache/unified-cache. * Affects the range [start, start + size - 1]. diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 60b60aa..446457f 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -24,8 +24,6 @@ #endif /* CONFIG_KW88F6281 */ #include <asm/arch/soc.h> -#define CONFIG_SYS_CACHELINE_SIZE 32 - /* default Dcache Line length for kirkwood */ #define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 4df70d7..1b35e08 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -26,8 +26,6 @@ #define MV88F78X60 /* for the DDR training bin_hdr code */ #endif -#define CONFIG_SYS_CACHELINE_SIZE 32 - #define CONFIG_SYS_L2_PL310 #ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index 15272c9..ed8cd9b 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -148,6 +148,12 @@ void clock_set_pll5(unsigned int clk, bool sigma_delta_enable) const int max_n = 32; int k = 1, m = 2; +#ifdef CONFIG_MACH_SUN8I_H3 + clrsetbits_le32(&ccm->pll5_tuning_cfg, CCM_PLL5_TUN_LOCK_TIME_MASK | + CCM_PLL5_TUN_INIT_FREQ_MASK, + CCM_PLL5_TUN_LOCK_TIME(2) | CCM_PLL5_TUN_INIT_FREQ(16)); +#endif + if (sigma_delta_enable) writel(CCM_PLL5_PATTERN, &ccm->pll5_pattern_cfg); diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index a8a0b90..8961458 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -75,6 +75,7 @@ config ARCH_UNIPHIER_LD6B config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" depends on ARCH_UNIPHIER_32BIT + select SYS_CACHE_SHIFT_7 default y help This option allows to use the UniPhier System Cache as L2 cache. diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c index 7ac9378..47cee6f 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c @@ -304,7 +304,7 @@ static int do_ddrm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( ddrm, 2, 1, do_ddrm, "UniPhier DDR PHY parameters dumper", - "- dump all of the followings\n" + "- dump all of the following\n" "ddrm zq - dump Impedance Data\n" "ddrm wbdl - dump Write Bit Delay\n" "ddrm rbdl - dump Read Bit Delay\n" diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c index 0a5a73d..6ac261d 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c @@ -258,7 +258,7 @@ static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( ddr, 2, 1, do_ddr, "UniPhier DDR PHY parameters dumper", - "- dump all of the followings\n" + "- dump all of the following\n" "ddr wbdl - dump Write Bit Delay\n" "ddr rbdl - dump Read Bit Delay\n" "ddr wld - dump Write Leveling\n" diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 5c98866..f288750 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -112,7 +112,7 @@ X-QSGMII-16PORT riser card ---------------------------- The X-QSGMII-16PORT is a 4xQSGMII/8xSGMII riser card with eighth SerDes interfaces implemented in PCIe form factor board. -It supports followings +It supports following: - Card can operate with up to 4 QSGMII lane simultaneously - Card can operate with up to 8 SGMII lane simultaneously diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index e69de29..c825d5e 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -0,0 +1,6 @@ +EVB-RK3399 +M: Kever Yang <kever.yang@rock-chips.com> +S: Maintained +F: board/rockchip/evb_rk3399 +F: include/configs/evb_rk3399.h +F: configs/evb-rk3399_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index de719cd..7072bd8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -28,6 +28,7 @@ F: configs/Auxtek-T004_defconfig F: configs/CHIP_defconfig F: configs/difrnce_dit4350_defconfig F: configs/Empire_electronix_d709_defconfig +F: configs/Empire_electronix_m712_defconfig F: configs/inet98v_rev2_defconfig F: configs/mk802_a10s_defconfig F: configs/q8_a13_tablet_defconfig @@ -37,6 +38,7 @@ F: configs/Wobo_i5_defconfig F: include/configs/sun6i.h F: configs/colorfly_e708_q1_defconfig F: configs/CSQ_CS908_defconfig +F: configs/inet_q972_defconfig F: configs/Mele_A1000G_quad_defconfig F: configs/Mele_M9_defconfig F: configs/Sinovoip_BPI_M2_defconfig @@ -115,8 +115,7 @@ free_dat: static int set_dev(int dev) { - if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || - !nand_info[dev]->name) { + if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[dev]) { puts("No such device\n"); return -1; } diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig new file mode 100644 index 0000000..224098f --- /dev/null +++ b/configs/Empire_electronix_m712_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN5I=y +CONFIG_DRAM_CLK=408 +CONFIG_MMC0_CD_PIN="PG0" +CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_USB0_VBUS_DET="PG1" +CONFIG_USB0_ID_DET="PG2" +CONFIG_AXP_GPIO=y +# CONFIG_VIDEO_HDMI is not set +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="AXP0-0" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_USB_MUSB_HOST=y diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index 3d71bf5..8847271 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_AXP_DLDO1_VOLT=3300 +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_USB_MUSB_HOST=y CONFIG_VIDEO_LCD_SSD2828_TX_CLK=27 CONFIG_VIDEO_LCD_SSD2828_RESET="PA26" diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig new file mode 100644 index 0000000..fdbbd6a --- /dev/null +++ b/configs/inet_q972_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN6I=y +CONFIG_DRAM_CLK=384 +CONFIG_DRAM_ZQ=251 +CONFIG_MMC0_CD_PIN="PA8" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PA15" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:280,ri:20,up:22,lo:8,hs:20,vs:8,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_BL_EN="PA25" +CONFIG_VIDEO_LCD_BL_PWM="PH13" +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_EHCI_HCD=y diff --git a/doc/README.kconfig b/doc/README.kconfig index 288d17d..0689f66 100644 --- a/doc/README.kconfig +++ b/doc/README.kconfig @@ -22,7 +22,7 @@ Here are some worth-mentioning configuration targets. - silentoldconfig This target updates .config, include/generated/autoconf.h and - include/configs/* as in Linux. In U-Boot, it also does the followings + include/configs/* as in Linux. In U-Boot, it also does the following for the compatibility with the old configuration system: * create a symbolic link "arch/${ARCH}/include/asm/arch" pointing to diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 56f6c8e..50b16a9 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -12,6 +12,7 @@ #include <asm/arch/clock.h> #include <asm/arch/display.h> #include <asm/arch/gpio.h> +#include <asm/arch/pwm.h> #include <asm/global_data.h> #include <asm/gpio.h> #include <asm/io.h> @@ -743,6 +744,16 @@ static void sunxi_lcdc_backlight_enable(void) gpio_direction_output(pin, 1); pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_BL_PWM); +#ifdef SUNXI_PWM_PIN0 + if (pin == SUNXI_PWM_PIN0) { + writel(SUNXI_PWM_CTRL_POLARITY0(PWM_ON) | + SUNXI_PWM_CTRL_ENABLE0 | + SUNXI_PWM_CTRL_PRESCALE0(0xf), SUNXI_PWM_CTRL_REG); + writel(SUNXI_PWM_PERIOD_80PCT, SUNXI_PWM_CH0_PERIOD); + sunxi_gpio_set_cfgpin(pin, SUNXI_PWM_MUX); + return; + } +#endif if (pin >= 0) gpio_direction_output(pin, PWM_ON); } diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index a65d1a8..30c4278 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -13,8 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * High Level Configuration Options */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 4d88aac..ef4a8ba 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -18,8 +18,6 @@ #define CONFIG_OMAP #define CONFIG_OMAP_COMMON -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_SYS_NO_FLASH #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 0467953..518b904 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -11,7 +11,6 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ @@ -49,7 +48,6 @@ /* Enabling L2 Cache */ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x48242000 -#define CONFIG_SYS_CACHELINE_SIZE 32 /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index 9257c5f..051186d 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -12,8 +12,6 @@ #include <asm/hardware.h> -#define CONFIG_SYS_CACHELINE_SIZE 32 - #define CONFIG_SYS_TEXT_BASE 0x26f00000 /* ARM asynchronous clock */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index 770dd87..b968801 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -127,7 +127,6 @@ /* Commands */ #define CONFIG_FAT_WRITE -#define CONFIG_SYS_CACHELINE_SIZE 64 #undef CONFIG_USB_GADGET_VBUS_DRAW #define CONFIG_USB_GADGET_VBUS_DRAW 0 #define CONFIG_USBID_ADDR 0x34052c46 diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index df0b2ba..f38f081 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -126,7 +126,6 @@ /* Commands */ #define CONFIG_FAT_WRITE -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_USBID_ADDR 0x34052c46 #endif /* __BCM28155_AP_H */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index 50cd743..b5e5029 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -11,8 +11,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * Memory configuration * (these must be defined elsewhere) diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index a94b1e2..04da877 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -15,7 +15,6 @@ #define CONFIG_AM33XX #define CONFIG_OMAP #define CONFIG_OMAP_COMMON -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index ea9983b..a89ccb7 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * High Level Configuration Options */ @@ -30,7 +28,6 @@ * Although the default iss 64, we still define it * to be on the safe side once the default is changed. */ -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 5d94f13..b896d4d 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -79,7 +79,6 @@ /* Enabling L2 Cache */ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x48242000 -#define CONFIG_SYS_CACHELINE_SIZE 32 /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 5892595..fb68e59 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -12,8 +12,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include <asm/arch/imx-regs.h> #define CONFIG_VF610 @@ -207,8 +205,6 @@ #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_CACHELINE_SIZE 32 - /* USB Host Support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_VF diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 28ea15b..746475d 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -118,7 +118,6 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) #define DFU_MANIFEST_POLL_TIMEOUT 25000 -#define CONFIG_SYS_CACHELINE_SIZE SZ_8K #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6 /* bootstrap + u-boot + env in nandflash */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 1dbe219..cc7ab83 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) #define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16MB max kernel size */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* UART */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index fbe0fa9..fdbaf02 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -15,7 +15,6 @@ #define CONFIG_BOARD_COMMON -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_REVISION_TAG /* SD/MMC configuration */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index f2ed798..1538787 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -13,7 +13,6 @@ #include "exynos-common.h" -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_EXYNOS_SPL #ifdef FTRACE diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 824aca4..e84803d 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -19,7 +19,6 @@ #define CONFIG_MX35 #define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_DISPLAY_CPUINFO diff --git a/include/configs/hikey.h b/include/configs/hikey.h index ffcc4d2..9cbccd9 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -21,9 +21,6 @@ #define CONFIG_SUPPORT_RAW_INITRD -/* MMU Definitions */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_IDENT_STRING "hikey" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/kc1.h b/include/configs/kc1.h index b08cf21..8b95799 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_L2_PL310 1 #define CONFIG_SYS_PL310_BASE 0x48242000 -#define CONFIG_SYS_CACHELINE_SIZE 32 /* * Platform diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 94f3516..a4b296a 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -10,8 +10,6 @@ #undef DEBUG -#define CONFIG_SYS_CACHELINE_SIZE 32 - #define CONFIG_SH73A0 #define CONFIG_KZM_A9_GT #define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT" diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 0c6e111..8387f19 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -25,8 +25,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MCX #define CONFIG_BOARD_LATE_INIT -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ #include <asm/arch/cpu.h> /* get chip and board defs */ diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h index eaf6a9c..3bba2e6 100644 --- a/include/configs/meson-gxbb-common.h +++ b/include/configs/meson-gxbb-common.h @@ -10,7 +10,6 @@ #define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_SYS_NO_FLASH #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_ENV_IS_NOWHERE 1 diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index cd154a4..cdae544 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -19,8 +19,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * High Level Configuration Options */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 4dbe2b6..fc5de03 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -275,8 +275,6 @@ #define CONFIG_OMAP3_SPI -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Defines for SPL */ #define CONFIG_SPL_OMAP3_ID_NAND diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h index 82e0d50..4310bad 100644 --- a/include/configs/omap3_cairo.h +++ b/include/configs/omap3_cairo.h @@ -192,8 +192,6 @@ #define CONFIG_OMAP3_SPI -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Defines for SPL */ #define CONFIG_SPL_OMAP3_ID_NAND diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 52a24d3..e87b4c0 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -340,8 +340,6 @@ /* Uncomment to define the board revision statically */ /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40200800 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 49a8b3f..05a4361 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -82,7 +82,6 @@ #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 -#define CONFIG_SYS_CACHELINE_SIZE 64 /* TWL4030 */ #define CONFIG_TWL4030_PWM diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index fbd0c2a..618a546 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -215,7 +215,6 @@ /* Initial RAM setup */ #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_CACHELINE_SIZE 64 /* NAND boot config */ #define CONFIG_SYS_NAND_BUSWIDTH_16BIT diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 380ec12..9e7bd88 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -119,6 +119,4 @@ #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -#define CONFIG_SYS_CACHELINE_SIZE 64 - #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 99d9fc3..6397051 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -176,8 +176,6 @@ #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -#define CONFIG_SYS_CACHELINE_SIZE 64 - #ifdef CONFIG_CMD_NET /* Ethernet (LAN9211 from SMSC9118 family) */ #define CONFIG_SMC911X diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 74e22db..57a7630 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include <asm/arch/imx-regs.h> #define CONFIG_VF610 diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 80313fc..8f91e8e 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -9,8 +9,6 @@ #ifndef __RCAR_GEN2_COMMON_H #define __RCAR_GEN2_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch/rmobile.h> #define CONFIG_CMD_DFL diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 21d4683..101a3ed 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch/hardware.h> #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index d3d4c68..601186c 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_RK3288_COMMON_H #define __CONFIG_RK3288_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch/hardware.h> #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 6875308..e9626a5 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_RK3399_COMMON_H #define __CONFIG_RK3399_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_SYS_NO_FLASH #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_ENV_SIZE 0x2000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index dbbb81e..752cc31 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -14,12 +14,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif -#ifdef CONFIG_BCM2835 -#define CONFIG_SYS_CACHELINE_SIZE 32 -#else -#define CONFIG_SYS_CACHELINE_SIZE 64 -#endif - /* Architecture, CPU, etc.*/ #define CONFIG_ARCH_CPU_INIT diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 87e51d0..61c5663 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -17,8 +17,6 @@ #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ #define CONFIG_MACH_GONI 1 /* working with Goni */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <linux/sizes.h> #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -236,8 +234,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_MAX8998 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index eab665c..3d25e3d 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -36,8 +36,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* commands to include */ #define CONFIG_ENV_VARS_UBOOT_CONFIG diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 076a5ce..8ad8f24 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -170,8 +170,6 @@ #define CONFIG_DFU_NAND #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M #define DFU_MANIFEST_POLL_TIMEOUT 25000 - -#define CONFIG_SYS_CACHELINE_SIZE 0x2000 #endif /* General Boot Parameter */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 84a188a..9d52689 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -12,8 +12,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * High Level Configuration Options * (easy to change) diff --git a/include/configs/sniper.h b/include/configs/sniper.h index fb348a5..e2f5e60 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -16,8 +16,6 @@ * CPU */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_ARM_ARCH_CP15_ERRATA #define CONFIG_ARM_ERRATA_454179 #define CONFIG_ARM_ERRATA_430973 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f654f94..ce5781b 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -75,7 +75,6 @@ /* * Cache */ -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index b9aa62b..f64edd4 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -55,7 +55,6 @@ /* CPU */ #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_TIMER_CLK_FREQ 24000000 /* diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 73ff416..5213065 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_TEXT_BASE 0x80008000 -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ #include <asm/arch/cpu.h> /* get chip and board defs */ diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 6616d73..52bd837 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -13,8 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * High Level Configuration Options */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 2d091db..513e655 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -133,8 +133,6 @@ #define CONFIG_DFU_NAND #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) #define DFU_MANIFEST_POLL_TIMEOUT 25000 - -#define CONFIG_SYS_CACHELINE_SIZE SZ_8K #endif /* SPI EEPROM */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 21454d4..107a0f8 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -8,9 +8,6 @@ #define _TEGRA114_COMMON_H_ #include "tegra-common.h" -/* Cortex-A15 uses a cache line size of 64 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * NS16550 Configuration */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 39e74f0..8cf9bac 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -10,9 +10,6 @@ #include "tegra-common.h" -/* Cortex-A15 uses a cache line size of 64 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * NS16550 Configuration */ diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h index aa7b9d0..98e4fc2 100644 --- a/include/configs/tegra186-common.h +++ b/include/configs/tegra186-common.h @@ -9,9 +9,6 @@ #include "tegra-common.h" -/* Cortex-A57 uses a cache line size of 64 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * NS16550 Configuration */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 00e85c4..793310f 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -9,9 +9,6 @@ #define _TEGRA20_COMMON_H_ #include "tegra-common.h" -/* Cortex-A9 uses a cache line size of 32 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - /* * Errata configuration */ diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 8f35a7b..874fe34d 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -10,9 +10,6 @@ #include "tegra-common.h" -/* Cortex-A57 uses a cache line size of 64 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * NS16550 Configuration */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 9afd864..baf3d00 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -9,9 +9,6 @@ #define _TEGRA30_COMMON_H_ #include "tegra-common.h" -/* Cortex-A9 uses a cache line size of 32 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - /* * Errata configuration */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 3c05883..732854e 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -16,8 +16,6 @@ #ifndef __CONFIG_TI814X_EVM_H #define __CONFIG_TI814X_EVM_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_TI81XX #define CONFIG_TI814X #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 05fd00f..17f12a8 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_TI816X_EVM_H #define __CONFIG_TI816X_EVM_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_TI81XX #define CONFIG_TI816X #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index bcd56fc..a9b10d0 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -14,7 +14,6 @@ #define CONFIG_AM33XX #define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 4aa262e..c830c0c 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -200,7 +200,6 @@ #define CONFIG_USB_STORAGE #define CONFIG_EFI_PARTITION #define CONFIG_FS_FAT -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_USB_SS_BASE KS2_USB_SS_BASE #define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE #define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 32877d1..c54b7b5 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -18,8 +18,6 @@ * High Level Configuration Options */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch/cpu.h> #include <asm/arch/omap.h> diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 5fad3c1..e6e88c5 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_L2_PL310 1 #define CONFIG_SYS_PL310_BASE 0x48242000 #endif -#define CONFIG_SYS_CACHELINE_SIZE 32 /* Get CPU defs */ #include <asm/arch/cpu.h> diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 3589cdc..e42c88e 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -23,8 +23,6 @@ /* Common ARM Erratas */ #define CONFIG_ARM_ERRATA_798870 -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 127a968..ae0e89c 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -16,8 +16,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* High Level Configuration Options */ #define CONFIG_SYS_THUMB_BUILD #define CONFIG_OMAP /* in a TI OMAP core */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 184704b..55ba99c 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -31,12 +31,6 @@ /* #define CONFIG_SYS_ICACHE_OFF */ /* #define CONFIG_SYS_DCACHE_OFF */ -#ifdef CONFIG_CACHE_UNIPHIER -#define CONFIG_SYS_CACHELINE_SIZE 128 -#else -#define CONFIG_SYS_CACHELINE_SIZE 32 -#endif - #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_MISC_INIT_F diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 9aca393..71c4a1f 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -19,9 +19,6 @@ #define CONFIG_SUPPORT_RAW_INITRD -/* MMU Definitions */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_IDENT_STRING " vexpress_aemv8a" /* Link Definitions */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 51898e6..a8eba31 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_MEMTEST_START V2M_BASE #define CONFIG_SYS_MEMTEST_END 0x20000000 -#define CONFIG_SYS_CACHELINE_SIZE 64 - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_SYS_L2CACHE_OFF 1 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index c4a1fd0..33f966a 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include <asm/arch/imx-regs.h> #define CONFIG_VF610 diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index 153466a..de6b183 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_FSL_CLK #define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_DISPLAY_CPUINFO diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ca60e5d..02f0e4c 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -34,9 +34,6 @@ /* Have release address at the end of 256MB for now */ #define CPU_RELEASE_ADDR 0xFFFFFF0 -/* Cache Definitions */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - #if !defined(CONFIG_IDENT_STRING) # define CONFIG_IDENT_STRING " Xilinx ZynqMP" #endif diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e59e412..5f7fefd 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -16,8 +16,6 @@ #endif /* Cache options */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - #define CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF # define CONFIG_SYS_L2_PL310 diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h b/include/dt-bindings/clock/sun8i-h3-ccu.h new file mode 100644 index 0000000..efb7ba2 --- /dev/null +++ b/include/dt-bindings/clock/sun8i-h3-ccu.h @@ -0,0 +1,145 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ +#define _DT_BINDINGS_CLK_SUN8I_H3_H_ + +#define CLK_CPUX 14 + +#define CLK_BUS_CE 20 +#define CLK_BUS_DMA 21 +#define CLK_BUS_MMC0 22 +#define CLK_BUS_MMC1 23 +#define CLK_BUS_MMC2 24 +#define CLK_BUS_NAND 25 +#define CLK_BUS_DRAM 26 +#define CLK_BUS_EMAC 27 +#define CLK_BUS_TS 28 +#define CLK_BUS_HSTIMER 29 +#define CLK_BUS_SPI0 30 +#define CLK_BUS_SPI1 31 +#define CLK_BUS_OTG 32 +#define CLK_BUS_EHCI0 33 +#define CLK_BUS_EHCI1 34 +#define CLK_BUS_EHCI2 35 +#define CLK_BUS_EHCI3 36 +#define CLK_BUS_OHCI0 37 +#define CLK_BUS_OHCI1 38 +#define CLK_BUS_OHCI2 39 +#define CLK_BUS_OHCI3 40 +#define CLK_BUS_VE 41 +#define CLK_BUS_TCON0 42 +#define CLK_BUS_TCON1 43 +#define CLK_BUS_DEINTERLACE 44 +#define CLK_BUS_CSI 45 +#define CLK_BUS_TVE 46 +#define CLK_BUS_HDMI 47 +#define CLK_BUS_DE 48 +#define CLK_BUS_GPU 49 +#define CLK_BUS_MSGBOX 50 +#define CLK_BUS_SPINLOCK 51 +#define CLK_BUS_CODEC 52 +#define CLK_BUS_SPDIF 53 +#define CLK_BUS_PIO 54 +#define CLK_BUS_THS 55 +#define CLK_BUS_I2S0 56 +#define CLK_BUS_I2S1 57 +#define CLK_BUS_I2S2 58 +#define CLK_BUS_I2C0 59 +#define CLK_BUS_I2C1 60 +#define CLK_BUS_I2C2 61 +#define CLK_BUS_UART0 62 +#define CLK_BUS_UART1 63 +#define CLK_BUS_UART2 64 +#define CLK_BUS_UART3 65 +#define CLK_BUS_SCR 66 +#define CLK_BUS_EPHY 67 +#define CLK_BUS_DBG 68 + +#define CLK_THS 69 +#define CLK_NAND 70 +#define CLK_MMC0 71 +#define CLK_MMC0_SAMPLE 72 +#define CLK_MMC0_OUTPUT 73 +#define CLK_MMC1 74 +#define CLK_MMC1_SAMPLE 75 +#define CLK_MMC1_OUTPUT 76 +#define CLK_MMC2 77 +#define CLK_MMC2_SAMPLE 78 +#define CLK_MMC2_OUTPUT 79 +#define CLK_TS 80 +#define CLK_CE 81 +#define CLK_SPI0 82 +#define CLK_SPI1 83 +#define CLK_I2S0 84 +#define CLK_I2S1 85 +#define CLK_I2S2 86 +#define CLK_SPDIF 87 +#define CLK_USB_PHY0 88 +#define CLK_USB_PHY1 89 +#define CLK_USB_PHY2 90 +#define CLK_USB_PHY3 91 +#define CLK_USB_OHCI0 92 +#define CLK_USB_OHCI1 93 +#define CLK_USB_OHCI2 94 +#define CLK_USB_OHCI3 95 + +#define CLK_DRAM_VE 97 +#define CLK_DRAM_CSI 98 +#define CLK_DRAM_DEINTERLACE 99 +#define CLK_DRAM_TS 100 +#define CLK_DE 101 +#define CLK_TCON0 102 +#define CLK_TVE 103 +#define CLK_DEINTERLACE 104 +#define CLK_CSI_MISC 105 +#define CLK_CSI_SCLK 106 +#define CLK_CSI_MCLK 107 +#define CLK_VE 108 +#define CLK_AC_DIG 109 +#define CLK_AVS 110 +#define CLK_HDMI 111 +#define CLK_HDMI_DDC 112 + +#define CLK_GPU 114 + +#endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */ diff --git a/include/dt-bindings/reset/sun8i-h3-ccu.h b/include/dt-bindings/reset/sun8i-h3-ccu.h new file mode 100644 index 0000000..6b7af80 --- /dev/null +++ b/include/dt-bindings/reset/sun8i-h3-ccu.h @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_RST_SUN8I_H3_H_ +#define _DT_BINDINGS_RST_SUN8I_H3_H_ + +#define RST_USB_PHY0 0 +#define RST_USB_PHY1 1 +#define RST_USB_PHY2 2 +#define RST_USB_PHY3 3 + +#define RST_MBUS 4 + +#define RST_BUS_CE 5 +#define RST_BUS_DMA 6 +#define RST_BUS_MMC0 7 +#define RST_BUS_MMC1 8 +#define RST_BUS_MMC2 9 +#define RST_BUS_NAND 10 +#define RST_BUS_DRAM 11 +#define RST_BUS_EMAC 12 +#define RST_BUS_TS 13 +#define RST_BUS_HSTIMER 14 +#define RST_BUS_SPI0 15 +#define RST_BUS_SPI1 16 +#define RST_BUS_OTG 17 +#define RST_BUS_EHCI0 18 +#define RST_BUS_EHCI1 19 +#define RST_BUS_EHCI2 20 +#define RST_BUS_EHCI3 21 +#define RST_BUS_OHCI0 22 +#define RST_BUS_OHCI1 23 +#define RST_BUS_OHCI2 24 +#define RST_BUS_OHCI3 25 +#define RST_BUS_VE 26 +#define RST_BUS_TCON0 27 +#define RST_BUS_TCON1 28 +#define RST_BUS_DEINTERLACE 29 +#define RST_BUS_CSI 30 +#define RST_BUS_TVE 31 +#define RST_BUS_HDMI0 32 +#define RST_BUS_HDMI1 33 +#define RST_BUS_DE 34 +#define RST_BUS_GPU 35 +#define RST_BUS_MSGBOX 36 +#define RST_BUS_SPINLOCK 37 +#define RST_BUS_DBG 38 +#define RST_BUS_EPHY 39 +#define RST_BUS_CODEC 40 +#define RST_BUS_SPDIF 41 +#define RST_BUS_THS 42 +#define RST_BUS_I2S0 43 +#define RST_BUS_I2S1 44 +#define RST_BUS_I2S2 45 +#define RST_BUS_I2C0 46 +#define RST_BUS_I2C1 47 +#define RST_BUS_I2C2 48 +#define RST_BUS_UART0 49 +#define RST_BUS_UART1 50 +#define RST_BUS_UART2 51 +#define RST_BUS_UART3 52 +#define RST_BUS_SCR 53 + +#endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */ diff --git a/tools/moveconfig.py b/tools/moveconfig.py index aaa8e96..5283689 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -41,7 +41,7 @@ The log is printed for each defconfig as follows: <defconfig_name> is the name of the defconfig. <action*> shows what the tool did for that defconfig. -It looks like one of the followings: +It looks like one of the following: - Move 'CONFIG_... ' This config option was moved to the defconfig @@ -179,7 +179,7 @@ SLEEP_TIME=0.03 # Here is the list of cross-tools I use. # Most of them are available at kernel.org -# (https://www.kernel.org/pub/tools/crosstool/files/bin/), except the followings: +# (https://www.kernel.org/pub/tools/crosstool/files/bin/), except the following: # arc: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases # blackfin: http://sourceforge.net/projects/adi-toolchain/files/ # nds32: http://osdk.andestech.com/packages/nds32le-linux-glibc-v1.tgz @@ -203,7 +203,8 @@ CROSS_COMPILE = { 'powerpc': 'powerpc-linux-', 'sh': 'sh-linux-gnu-', 'sparc': 'sparc-linux-', - 'x86': 'i386-linux-' + 'x86': 'i386-linux-', + 'xtensa': 'xtensa-linux-' } STATE_IDLE = 0 |