diff options
| -rw-r--r-- | board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 32 | ||||
| -rw-r--r-- | configs/mx6sxsabreauto_defconfig | 1 | ||||
| -rw-r--r-- | configs/mx6sxsabreauto_plugin_defconfig | 1 | ||||
| -rw-r--r-- | include/configs/mx6sxsabreauto.h | 32 |
4 files changed, 40 insertions, 26 deletions
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index fc985c6..36c4c12 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -160,40 +160,24 @@ int power_init_board(void) { struct udevice *dev; int ret; - u32 dev_id, rev_id, i; - u32 switch_num = 6; - u32 offset = PFUZE100_SW1CMODE; - ret = pmic_get("pfuze100", &dev); - if (ret == -ENODEV) - return 0; + dev = pfuze_common_init(); + if (!dev) + return -ENODEV; - if (ret != 0) + ret = pfuze_mode_init(dev, APS_PFM); + if (ret < 0) return ret; - dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID); - rev_id = pmic_reg_read(dev, PFUZE100_REVID); - printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id); - - - /* Init mode to APS_PFM */ - pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM); - - for (i = 0; i < switch_num - 1; i++) - pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM); - - /* set SW1AB staby volatage 0.975V */ - pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b); - - /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ - pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40); - /* set SW1C staby volatage 1.10V */ pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x20); /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */ pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40); + /* Enable power of VGEN5 3V3, needed for SD3 */ + pmic_clrsetbits(dev, PFUZE100_SW1CCONF, LDO_VOL_MASK, (LDOB_3_30V | (1 << LDO_EN))); + return 0; } diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index b546740..b2c4c68 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -46,3 +46,4 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y +CONFIG_IMX_BOOTAUX=y diff --git a/configs/mx6sxsabreauto_plugin_defconfig b/configs/mx6sxsabreauto_plugin_defconfig index d10d58b..2f77ac6 100644 --- a/configs/mx6sxsabreauto_plugin_defconfig +++ b/configs/mx6sxsabreauto_plugin_defconfig @@ -47,3 +47,4 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y +CONFIG_IMX_BOOTAUX=y diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 7f8fb86..d24e2c1 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -25,6 +25,28 @@ #define MFG_NAND_PARTITION "" #endif +#ifdef CONFIG_IMX_BOOTAUX +#define CONFIG_SYS_AUXCORE_BOOTDATA 0x62000000 /* Set to QSPI1 B flash at default */ + +#define UPDATE_M4_ENV \ + "m4image=m4_qspi.bin\0" \ + "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ + "update_m4_from_sd=" \ + "if sf probe 1:0; then " \ + "if run loadm4image; then " \ + "setexpr fw_sz ${filesize} + 0xffff; " \ + "setexpr fw_sz ${fw_sz} / 0x10000; " \ + "setexpr fw_sz ${fw_sz} * 0x10000; " \ + "sf erase 0x0 ${fw_sz}; " \ + "sf write ${loadaddr} 0x0 ${filesize}; " \ + "fi; " \ + "fi\0" \ + "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" +#else +#define UPDATE_M4_ENV "" +#endif + + #define CONFIG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ "rdinit=/linuxrc " \ @@ -40,6 +62,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ + UPDATE_M4_ENV \ CONFIG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -51,9 +74,9 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "panel=Hannstar-XGA\0" \ - "mmcdev=0\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ @@ -137,6 +160,9 @@ /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC3*/ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ /* I2C Configs */ #define CONFIG_SYS_I2C_MXC @@ -217,6 +243,8 @@ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } +#define CONFIG_CMD_BMODE + #define CONFIG_VIDEO #define CONFIG_VIDEO_GIS #ifdef CONFIG_VIDEO |