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-rw-r--r--arch/arm/cpu/armv7/mx6/Kconfig8
-rw-r--r--board/freescale/mx6dqscm/Kconfig37
-rw-r--r--board/freescale/mx6dqscm/MAINTAINERS13
-rw-r--r--board/freescale/mx6dqscm/Makefile6
-rw-r--r--board/freescale/mx6dqscm/README64
-rw-r--r--board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg7
-rw-r--r--board/freescale/mx6dqscm/mx6dqscm.c221
-rw-r--r--board/freescale/mx6dqscm/plugin.S3
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev2_android_defconfig52
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev2_defconfig60
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev2_plugin_defconfig61
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig60
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev3_android_defconfig53
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev3_defconfig61
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev3_plugin_defconfig62
-rw-r--r--configs/mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig61
-rw-r--r--include/configs/mx6dqscm.h131
-rw-r--r--include/configs/mx6dqscm_android.h7
18 files changed, 781 insertions, 186 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index fe5c06d..91571a1 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -430,6 +430,13 @@ config TARGET_ZC5601
select DM
select DM_THERMAL
+config TARGET_MX6DQSCM
+ bool "mx6dqscm"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_THERMAL
+ select BOARD_EARLY_INIT_F
+
endchoice
config SYS_SOC
@@ -482,5 +489,6 @@ source "board/udoo/Kconfig"
source "board/udoo/neo/Kconfig"
source "board/wandboard/Kconfig"
source "board/warp/Kconfig"
+source "board/freescale/mx6dqscm/Kconfig"
endif
diff --git a/board/freescale/mx6dqscm/Kconfig b/board/freescale/mx6dqscm/Kconfig
index d852d1e..d71145f 100644
--- a/board/freescale/mx6dqscm/Kconfig
+++ b/board/freescale/mx6dqscm/Kconfig
@@ -6,10 +6,41 @@ config SYS_BOARD
config SYS_VENDOR
default "freescale"
-config SYS_SOC
- default "mx6"
-
config SYS_CONFIG_NAME
default "mx6dqscm"
+config QWKS_REV3
+ bool "Support for SCM QWKS rev3 board"
+ help
+ Enable this when building for SCM QWKS board rev3 (revC).
+
+config SCMEVB
+ bool "Support for SCM EVB board"
+ help
+ Enable this when building for SCM EVB board.
+
+config SCMHVB
+ bool "Support for Hardware Evaluation board"
+ help
+ Enable this when building for SCM HVB board.
+
+config INTERLEAVING_MODE
+ bool "Interleaving mode"
+ help
+ Enable the MMDC interlaving mode for lpddr2
+ fix mode is used when this is not enabled.
+
+config SCM_LPDDR2_512MB
+ bool "lpddr2 size of 512MB"
+ help
+ Set the lpddr2 size to 512 MB
+ 1GB is defaulted size.
+
+
+config SCM_LPDDR2_2GB
+ bool "lpddr2 size of 2GB"
+ help
+ Set the lpddr2 size to 2GB
+ 1GB is defaulted size.
+
endif
diff --git a/board/freescale/mx6dqscm/MAINTAINERS b/board/freescale/mx6dqscm/MAINTAINERS
index 31bd57d..7d23b7d 100644
--- a/board/freescale/mx6dqscm/MAINTAINERS
+++ b/board/freescale/mx6dqscm/MAINTAINERS
@@ -4,8 +4,11 @@ M: Juan Gutierrez <juan.gutierrez@nxp.com>
S: Maintained
F: board/freescale/mx6dqscm/
F: include/configs/mx6dqscm.h
-F: configs/mx6dqscm_1gb_fix_evb_defconfig
-F: configs/mx6dqscm_1gb_fix_qwks_rev2_defconfig
-F: configs/mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig
-F: configs/mx6dqscm_1gb_interleaving_evb_android_defconfig
-F: configs/mx6dqscm_1gb_interleaving_qwks_rev2_android_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev2_android_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev2_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev2_plugin_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev3_android_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev3_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev3_plugin_defconfig
+F: mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig
diff --git a/board/freescale/mx6dqscm/Makefile b/board/freescale/mx6dqscm/Makefile
index 5b8fb46..98f1457 100644
--- a/board/freescale/mx6dqscm/Makefile
+++ b/board/freescale/mx6dqscm/Makefile
@@ -1,11 +1,9 @@
#
-# (C) Copyright 2016 Freescale Semiconductor, Inc.
+# Copyright (C) 2016 Freescale Semiconductor, Inc.
+# Copyright 2017 NXP
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := mx6dqscm.o
-extra-$(CONFIG_USE_PLUGIN) := plugin.bin
-$(obj)/plugin.bin: $(obj)/plugin.o
- $(OBJCOPY) -O binary --gap-fill 0xff $< $@
diff --git a/board/freescale/mx6dqscm/README b/board/freescale/mx6dqscm/README
index 7dec852..3737fd8 100644
--- a/board/freescale/mx6dqscm/README
+++ b/board/freescale/mx6dqscm/README
@@ -1,9 +1,9 @@
How to use U-Boot on Freescale MX6DQSCM boards
----------------------------------------------
-- Build U-Boot for MX6DQSCM QWKS rev2 board*:
+- Build U-Boot for MX6DQSCM QWKS rev3 board*:
-$ make mx6dqscm_1gb_fix_qwks_rev2_defconfig
+$ make mx6dqscm_1gb_fix_qwks_rev3_defconfig
$ make
This will generate the u-boot image u-boot.imx.
@@ -13,9 +13,9 @@ This will generate the u-boot image u-boot.imx.
sudo dd if=u-boot.imx of=/dev/sdX bs=1k seek=1; sync
*Other defconfigs availabe are:
- mx6dqscm_1gb_fix_qwks_rev2_defconfig
- mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig
- mx6dqscm_1gb_interleaving_qwks_rev2_android_defconfig
+ mx6dqscm_1gb_fix_qwks_rev3_defconfig
+ mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig
+ mx6dqscm_1gb_interleaving_qwks_rev3_android_defconfig
- Jumper settings for fix mode images to boot from the top SD:
@@ -38,52 +38,26 @@ Single channel(epop) SW1: ON OFF OFF ON ON OFF ON ON
Additional configurations
==========================
-For custom configurations like 2GB or 512MB, the CONFIG_SYS_EXTRA_OPTIONS option on the defconfig
-file can be modified according to the customization needed.
+For custom configurations like 2GB or 512MB, the following option can be added on the defconfig
+according with the customization needed. (Check also the Kconfig file at the mx6dqscm directory)
-Here are some examples for some combinations among the different supported options:
+ - memory size option: 512MB, 2GB (if not set any, 1GB is the default value)
- - memory size option: 512MB, 1GB, 2GB
- - memeory mode: fix, interleave or single(only for 512MB)
- - boot mode: SPI-NOR boot or SD
- - board: evb, qwks
+ CONFIG_SCM_LPDDR2_512MB
+ CONFIG_SCM_LPDDR2_2GB
+ - memeory mode: fix or interleave (if not set any, fix/single mode is the default mode)
-512mb qwks-rev2:
-----------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=512,SYS_USE_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-512mb-qwks-rev2-ldo.dtb\",SCM_LPDDR2_512MB"
+ CONFIG_INTERLEAVING_MODE
+ - boot mode: SPI-NOR boot or SD (if not set any, MMC/SD is the default boot mode)
-512mb qwks-rev2 spinor-boot:
-----------------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=512,SYS_BOOT_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-512mb-qwks-rev2-ldo.dtb\",SCM_LPDDR2_512MB"
+ CONFIG_SPI_BOOT
+ - board: evb, qwks (if not set any, qwks-rev2 is the default board)
-2gb fix evb:
-------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=2048,SYS_USE_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-2gb-evb-fix-ldo.dtb\",SCMEVB,SCM_LPDDR2_2GB"
-
-
-2gb interleaving evb:
----------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=2048,SYS_USE_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-2gb-evb-interleave-ldo.dtb\",INTERLEAVING_MODE,SCMEVB,SCM_LPDDR2_2GB"
-
-
-2gb interleaving evb spinor-boot:
----------------------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=2048,SYS_BOOT_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-2gb-evb-interleave-ldo.dtb\",INTERLEAVING_MODE,SCMEVB,SCM_LPDDR2_2GB"
-
-1gb interleaving evb android:
------------------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=1024,SYS_USE_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-1gb-evb-interleave-ldo.dtb\",INTERLEAVING_MODE,SCMEVB,ANDROID_SUPPORT"
-
-
-1gb interleaving qwks_rev2:
----------------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=1024,SYS_USE_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-1gb-qwks-rev2-interleave-ldo.dtb\",INTERLEAVING_MODE"
-
-
-1gb interleaving evb spinor-boot:
----------------------------------
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q,DDR_MB=1024,SYS_BOOT_SPINOR,DEFAULT_FDT_FILE=\"imx6dqscm-1gb-evb-interleave-ldo.dtb\",INTERLEAVING_MODE,SCMEVB"
+ CONFIG_SCMHVB
+ CONFIG_QWKS_REV3
+ CONFIG_SCMEVB
+ CONFIG_SCMHVB
diff --git a/board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg b/board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg
index d95b9bc..9bf48bd 100644
--- a/board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg
+++ b/board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg
@@ -1,7 +1,8 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
@@ -23,9 +24,9 @@ IMAGE_VERSION 2
BOOT_FROM sd
-#ifdef CONFIG_USE_PLUGIN
+#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
-PLUGIN board/freescale/mx6dscm/plugin.bin 0x00907000
+PLUGIN board/freescale/mx6dqscm/plugin.bin 0x00907000
#else
#ifdef CONFIG_SECURE_BOOT
diff --git a/board/freescale/mx6dqscm/mx6dqscm.c b/board/freescale/mx6dqscm/mx6dqscm.c
index de08e95..98f91cc 100644
--- a/board/freescale/mx6dqscm/mx6dqscm.c
+++ b/board/freescale/mx6dqscm/mx6dqscm.c
@@ -1,14 +1,15 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/mxc_i2c.h>
#include <asm/imx-common/iomux-v3.h>
@@ -200,6 +201,7 @@ static iomux_v3_cfg_t const ecspi1_pads[] = {
static void setup_spi(void)
{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+ gpio_request(IMX_GPIO_NR(2, 30), "ECSPI1 CS");
}
int board_spi_cs_gpio(unsigned bus, unsigned cs)
@@ -238,15 +240,31 @@ static iomux_v3_cfg_t const rgb_pads[] = {
MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const bl_pads[] = {
MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
+static void enable_backlight(void)
+{
+ imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
+ gpio_request(DISP0_PWR_EN, "Display Power Enable");
+ gpio_direction_output(DISP0_PWR_EN, 1);
+}
+
static void enable_rgb(struct display_info_t const *dev)
{
imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads));
- gpio_direction_output(DISP0_PWR_EN, 1);
+ enable_backlight();
+}
+
+static void enable_lvds(struct display_info_t const *dev)
+{
+ enable_backlight();
}
+#ifdef CONFIG_SYS_I2C
static struct i2c_pads_info i2c_pad_info1 = {
.scl = {
.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
@@ -259,7 +277,9 @@ static struct i2c_pads_info i2c_pad_info1 = {
.gp = IMX_GPIO_NR(4, 13)
}
};
+#endif
+#ifdef CONFIG_PCIE_IMX
iomux_v3_cfg_t const pcie_pads[] = {
MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */
MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */
@@ -268,7 +288,10 @@ iomux_v3_cfg_t const pcie_pads[] = {
static void setup_pcie(void)
{
imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
+ gpio_request(CONFIG_PCIE_IMX_POWER_GPIO, "PCIE Power Enable");
+ gpio_request(CONFIG_PCIE_IMX_PERST_GPIO, "PCIE Reset");
}
+#endif
iomux_v3_cfg_t const di0_pads[] = {
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */
@@ -355,6 +378,7 @@ int board_mmc_init(bd_t *bis)
case 0:
imx_iomux_v3_setup_multiple_pads(
usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+ gpio_request(USDHC2_CD_GPIO, "USDHC2 CD");
gpio_direction_input(USDHC2_CD_GPIO);
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
break;
@@ -362,6 +386,7 @@ int board_mmc_init(bd_t *bis)
#ifndef CONFIG_SCMHVB
imx_iomux_v3_setup_multiple_pads(
usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+ gpio_request(USDHC3_CD_GPIO, "USDHC3 CD");
gpio_direction_input(USDHC3_CD_GPIO);
#endif
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
@@ -388,7 +413,7 @@ int board_mmc_init(bd_t *bis)
}
#endif
-int mx6_rgmii_rework(struct phy_device *phydev)
+static int mx6_rgmii_rework(struct phy_device *phydev)
{
/* add necessary delays for RGMII,
* there are no board skew delays added
@@ -445,9 +470,6 @@ static void disable_lvds(struct display_info_t const *dev)
IOMUXC_GPR2_LVDS_CH1_MODE_MASK);
writel(reg, &iomux->gpr[2]);
-#ifndef CONFIG_SCMEVB
- gpio_direction_output(DISP0_PWR_EN, 0);
-#endif
}
static void do_enable_hdmi(struct display_info_t const *dev)
@@ -456,20 +478,6 @@ static void do_enable_hdmi(struct display_info_t const *dev)
imx_enable_hdmi_phy();
}
-static void enable_lvds(struct display_info_t const *dev)
-{
- struct iomuxc *iomux = (struct iomuxc *)
- IOMUXC_BASE_ADDR;
- u32 reg = readl(&iomux->gpr[2]);
-
- reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
- IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT;
- writel(reg, &iomux->gpr[2]);
-#ifndef CONFIG_SCMEVB
- gpio_direction_output(DISP0_PWR_EN, 1);
-#endif
-}
-
struct display_info_t const displays[] = {{
.bus = -1,
.addr = 0,
@@ -481,13 +489,13 @@ struct display_info_t const displays[] = {{
.refresh = 60,
.xres = 1024,
.yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
+ .pixclock = 15384,
+ .left_margin = 160,
+ .right_margin = 24,
+ .upper_margin = 29,
+ .lower_margin = 3,
+ .hsync_len = 136,
+ .vsync_len = 6,
.sync = FB_SYNC_EXT,
.vmode = FB_VMODE_NONINTERLACED
} }, {
@@ -610,7 +618,6 @@ static void setup_fec(void)
int board_eth_init(bd_t *bis)
{
setup_iomux_enet();
- setup_pcie();
return cpu_eth_init(bis);
}
@@ -654,6 +661,8 @@ static void setup_usb(void)
imx_iomux_v3_setup_multiple_pads(usb_hc1_pads,
ARRAY_SIZE(usb_hc1_pads));
+
+ gpio_request(IMX_GPIO_NR(1, 29), "USB HC1 Power Enable");
}
int board_ehci_hcd_init(int port)
@@ -709,12 +718,19 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
+
+#ifdef CONFIG_SYS_I2C
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+#endif
#ifdef CONFIG_USB_EHCI_MX6
setup_usb();
#endif
+#ifdef CONFIG_PCIE_IMX
+ setup_pcie();
+#endif
+
#ifdef CONFIG_CMD_SATA
setup_sata();
#endif
@@ -725,6 +741,7 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_POWER
int power_init_board(void)
{
struct pmic *pfuze;
@@ -811,8 +828,98 @@ int power_init_board(void)
return 0;
}
+#elif defined(CONFIG_DM_PMIC_PFUZE100)
+
+int power_init_board(void)
+{
+ struct udevice *dev;
+ unsigned int reg;
+ int ret;
+
+ dev = pfuze_common_init();
+ if (!dev)
+ return -ENODEV;
+
+ ret = pfuze_mode_init(dev, APS_PFM);
+ if (ret < 0)
+ return ret;
+
+ /* set SW3A to 1.25V for LPDDR2 */
+ reg = pmic_reg_read(dev, PFUZE100_SW3AVOL);
+ reg &= ~0x3f;
+ reg |= 0x22;
+ pmic_reg_write(dev, PFUZE100_SW3AVOL, reg);
+
+ /* set SW2 to 3.2V */
+ reg = pmic_reg_read(dev, PFUZE100_SW2VOL);
+ reg &= ~0x7f;
+ reg |= 0x72;
+ pmic_reg_write(dev, PFUZE100_SW2VOL, reg);
+
+ /* set VGEN1 to 1.5V */
+ reg = pmic_reg_read(dev, PFUZE100_VGEN1VOL);
+ reg &= ~0x0f;
+ reg |= 0x0e;
+ pmic_reg_write(dev, PFUZE100_VGEN1VOL, reg);
+
+ /* set VGEN3 to 2.8V */
+ reg = pmic_reg_read(dev, PFUZE100_VGEN3VOL);
+ reg &= ~0x0f;
+ reg |= 0x0a;
+ pmic_reg_write(dev, PFUZE100_VGEN3VOL, reg);
+
+ /* set VGEN4 to 2.5V */
+ reg = pmic_reg_read(dev, PFUZE100_VGEN4VOL);
+ reg &= ~0x0f;
+ reg |= 0x07;
+ pmic_reg_write(dev, PFUZE100_VGEN4VOL, reg);
+
+ /* set VGEN5 to 3.3V */
+ reg = pmic_reg_read(dev, PFUZE100_VGEN5VOL);
+ reg &= ~0x0f;
+#ifdef CONFIG_QWKS_REV3
+ reg |= 0x07;
+#else
+ reg |= 0x0f;
+#endif
+ pmic_reg_write(dev, PFUZE100_VGEN5VOL, reg);
+
+ /* set VGEN6 to 3.2V */
+ reg = pmic_reg_read(dev, PFUZE100_VGEN6VOL);
+ reg &= ~0x0f;
+ reg |= 0x0e;
+ pmic_reg_write(dev, PFUZE100_VGEN6VOL, reg);
+
+ /* set SW1AB staby volatage 0.975V*/
+ reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
+ reg &= ~0x3f;
+ reg |= 0x1b;
+ pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
+
+ /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+ reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
+ reg &= ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
+
+ /* set SW1C staby volatage 0.975V*/
+ reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
+ reg &= ~0x3f;
+ reg |= 0x1b;
+ pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
+
+ /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
+ reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
+ reg &= ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
+
+ return 0;
+}
+#endif
#ifdef CONFIG_LDO_BYPASS_CHECK
+#ifdef CONFIG_POWER
void ldo_mode_set(int ldo_bypass)
{
unsigned int value;
@@ -885,6 +992,61 @@ void ldo_mode_set(int ldo_bypass)
printf("switch to ldo_bypass mode!\n");
}
}
+#elif defined(CONFIG_DM_PMIC_PFUZE100)
+void ldo_mode_set(int ldo_bypass)
+{
+ int is_400M;
+ struct udevice *dev;
+ int ret;
+
+ ret = pmic_get("pfuze100", &dev);
+
+ if (ret == -ENODEV) {
+ printf("No PMIC found!\n");
+ return;
+ }
+
+ /* increase VDDARM/VDDSOC to support 1.2G chip */
+ if (check_1_2G()) {
+ ldo_bypass = 0; /* ldo_enable on 1.2G chip */
+ printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n");
+ /* increase VDDARM to 1.425V */
+ pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x2d);
+
+ /* increase VDDSOC to 1.425V */
+ pmic_clrsetbits(dev, PFUZE100_SW1CVOL, 0x3f, 0x2d);
+ }
+ /* switch to ldo_bypass mode , boot on 800Mhz */
+ if (ldo_bypass) {
+ prep_anatop_bypass();
+
+ /* decrease VDDARM for 400Mhz DQ:1.1V */
+
+ pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x20);
+
+ /* increase VDDSOC to 1.3V */
+ pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x28);
+
+ /*
+ * MX6Q:
+ * VDDARM:1.15V@800M; VDDSOC:1.175V@800M
+ * VDDARM:0.975V@400M; VDDSOC:1.175V@400M
+ */
+ is_400M = set_anatop_bypass(2);
+
+ if (is_400M)
+ pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x1b);
+ else
+ pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x22);
+
+ /* decrease VDDSOC to 1.175V */
+ pmic_clrsetbits(dev, PFUZE100_SW1CVOL, 0x3f, 0x23);
+
+ finish_anatop_bypass();
+ printf("switch to ldo_bypass mode!\n");
+ }
+}
+#endif
#endif
#ifdef CONFIG_CMD_BMODE
@@ -983,6 +1145,7 @@ int check_recovery_cmd_file(void)
imx_iomux_v3_setup_multiple_pads(recovery_key_pads,
ARRAY_SIZE(recovery_key_pads));
+ gpio_request(GPIO_VOL_DN_KEY, "volume_dn_key");
gpio_direction_input(GPIO_VOL_DN_KEY);
if (gpio_get_value(GPIO_VOL_DN_KEY) == 0) { /* VOL_DN is low assert */
diff --git a/board/freescale/mx6dqscm/plugin.S b/board/freescale/mx6dqscm/plugin.S
index bd4f542..f604e97 100644
--- a/board/freescale/mx6dqscm/plugin.S
+++ b/board/freescale/mx6dqscm/plugin.S
@@ -1,7 +1,8 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev2_android_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev2_android_defconfig
new file mode 100644
index 0000000..50f15e7
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev2_android_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_FASTBOOT=y
+CONFIG_EFI_PARTITION=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev2-interleave-android-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev2_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev2_defconfig
new file mode 100644
index 0000000..1998482
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev2_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev2-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev2_plugin_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev2_plugin_defconfig
new file mode 100644
index 0000000..235cc86
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev2_plugin_defconfig
@@ -0,0 +1,61 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_USE_IMXIMG_PLUGIN=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev2-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig
new file mode 100644
index 0000000..4b5b187
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev2_spinor_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_SPI_BOOT=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev2-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev3_android_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev3_android_defconfig
new file mode 100644
index 0000000..6b906dc
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev3_android_defconfig
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_QWKS_REV3=y
+CONFIG_FASTBOOT=y
+CONFIG_EFI_PARTITION=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev3-interleave-android-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev3_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev3_defconfig
new file mode 100644
index 0000000..1b9a270
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev3_defconfig
@@ -0,0 +1,61 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_QWKS_REV3=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev3-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev3_plugin_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev3_plugin_defconfig
new file mode 100644
index 0000000..573e796
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev3_plugin_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_QWKS_REV3=y
+CONFIG_USE_IMXIMG_PLUGIN=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev3-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/configs/mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig b/configs/mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig
new file mode 100644
index 0000000..cacf1c6
--- /dev/null
+++ b/configs/mx6dqscm_1gb_fix_qwks_rev3_spinor_defconfig
@@ -0,0 +1,61 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_MX6DQSCM=y
+CONFIG_VIDEO=y
+CONFIG_QWKS_REV3=y
+CONFIG_SPI_BOOT=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6dqscm-1gb-qwks-rev3-fix-ldo"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
diff --git a/include/configs/mx6dqscm.h b/include/configs/mx6dqscm.h
index 8603289..6f92cab 100644
--- a/include/configs/mx6dqscm.h
+++ b/include/configs/mx6dqscm.h
@@ -1,9 +1,8 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*
- * Configuration settings for the Freescale i.MX6DQ SCM boards.
- *
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX6DQSCM_CONFIG_H
@@ -11,34 +10,16 @@
#include "mx6_common.h"
-/* uncomment for PLUGIN mode support */
-/* #define CONFIG_USE_PLUGIN */
-
-/* uncomment for SECURE mode support */
-/* #define CONFIG_SECURE_BOOT */
-
-#ifdef CONFIG_SECURE_BOOT
-#ifndef CONFIG_CSF_SIZE
-#define CONFIG_CSF_SIZE 0x4000
-#endif
-#endif
-
#define CONFIG_IMX_THERMAL
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_LATE_INIT
-
#define CONFIG_MXC_UART
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
@@ -55,17 +36,17 @@
#define CONFIG_MACH_TYPE 3980
#ifdef CONFIG_SCMHVB
#define CONFIG_MXC_UART_BASE UART4_BASE
-#define CONFIG_CONSOLE_DEV "ttymxc3"
+#define CONSOLE_DEV "ttymxc3"
#else
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONSOLE_DEV "ttymxc0"
+#define CONSOLE_DEV "ttymxc0"
#endif
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */
#if defined(CONFIG_SCMHVB) || defined(CONFIG_SCMEVB)
-#define CONFIG_VIDEO_PRIMARY " "
+#define VIDEO_PRIMARY " "
#else
-#define CONFIG_VIDEO_PRIMARY "video=mxcfb0:dev=hdmi,1920x1080M@60,bpp=32 "
+#define VIDEO_PRIMARY "video=mxcfb0:dev=hdmi,1920x1080M@60,bpp=32 "
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
@@ -115,7 +96,7 @@
#define CONFIG_MFG_ENV_SETTINGS \
- "mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \
+ "mfgtool_args=setenv bootargs console=" CONSOLE_DEV ",115200 " \
"rdinit=/linuxrc " \
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
"g_mass_storage.file=/fat g_mass_storage.ro=1 " \
@@ -150,12 +131,12 @@
#define EMMC_ENV ""
#endif
-#if defined(CONFIG_SYS_BOOT_SATA)
+#if defined(CONFIG_SATA_BOOT)
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
"fdt_addr=0x18000000\0" \
"fdt_high=0xffffffff\0" \
- "bootargs=console=" CONFIG_CONSOLE_DEV ",115200 \0"\
+ "bootargs=console=" CONSOLE_DEV ",115200 \0"\
"bootargs_sata=setenv bootargs ${bootargs} " \
"root=/dev/sda1 rootwait rw \0" \
"bootcmd_sata=run bootargs_sata; sata init; " \
@@ -168,16 +149,12 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
+#ifndef CONFIG_SYS_MMC_ENV_PART
#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */
-
-#ifdef CONFIG_SYS_USE_SPINOR
-#define CONFIG_SF_DEFAULT_CS 0
#endif
-
#define CONFIG_ARP_TIMEOUT 200UL
-#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
@@ -187,20 +164,22 @@
/* Environment organization */
#define CONFIG_ENV_SIZE (8 * 1024)
-#ifndef CONFIG_SYS_NOSMP
-#define CONFIG_SYS_NOSMP
-#endif
-#if defined CONFIG_SYS_BOOT_SPINOR
-#define CONFIG_SYS_USE_SPINOR
+#if defined CONFIG_SPI_BOOT
+#define CONFIG_CMD_SF
#define CONFIG_ENV_IS_IN_SPI_FLASH
-#elif defined CONFIG_SYS_BOOT_SATA
+#elif defined CONFIG_SATA_BOOT
#define CONFIG_ENV_IS_IN_SATA
#define CONFIG_CMD_SATA
#else
#define CONFIG_ENV_IS_IN_MMC
#endif
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_CS 0
+#endif
+
+
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
@@ -210,8 +189,7 @@
#define CONFIG_LIBATA
#endif
-#ifdef CONFIG_SYS_USE_SPINOR
-#define CONFIG_CMD_SF
+#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MXC_SPI
@@ -222,36 +200,34 @@
#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
+#define CONFIG_ENV_OFFSET (896 * 1024)
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-#define CONFIG_ENV_OFFSET (768 * 1024)
+#define CONFIG_ENV_OFFSET (896 * 1024)
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#elif defined(CONFIG_ENV_IS_IN_SATA)
-#define CONFIG_ENV_OFFSET (768 * 1024)
-#define CONFIG_SATA_ENV_DEV 0
+#define CONFIG_ENV_OFFSET (896 * 1024)
+#define CONFIG_SYS_SATA_ENV_DEV 0
#define CONFIG_SYS_DCACHE_OFF /* remove when sata driver support cache */
#endif
/* I2C Configs */
-#define CONFIG_CMD_I2C
+#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
+#endif
+#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
+#endif
/* Framebuffer */
-#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
@@ -266,33 +242,13 @@
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
-#if defined(CONFIG_ANDROID_SUPPORT)
+#if defined(CONFIG_FASTBOOT)
#include "mx6dqscm_android.h"
#else
-#define CONFIG_CI_UDC
#define CONFIG_USBD_HS
-#define CONFIG_USB_GADGET_DUALSPEED
-
-#define CONFIG_USB_GADGET
-#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_USB_GADGET_DOWNLOAD
-#define CONFIG_USB_GADGET_VBUS_DRAW 2
-
-#define CONFIG_G_DNL_VENDOR_NUM 0x0525
-#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
-#define CONFIG_G_DNL_MANUFACTURER "FSL"
-
-/* USB Device Firmware Update support */
-#define CONFIG_CMD_DFU
-#define CONFIG_USB_FUNCTION_DFU
-#define CONFIG_DFU_MMC
-#if defined(CONFIG_SYS_USE_SPINOR)
-#define CONFIG_DFU_SF
-#endif
-
-#endif /* CONFIG_ANDROID_SUPPORT */
+#endif /* CONFIG_FASTBOOT */
/*
* imx6 q/dl/solo pcie would be failed to work properly in kernel, if
@@ -306,9 +262,8 @@
* the kernel's, are required.
*/
/* #define CONFIG_CMD_PCI */
-#ifdef CONFIG_CMD_PCI
-#define CONFIG_PCI
-#define CONFIG_PCI_PNP
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
@@ -316,17 +271,17 @@
#endif
/* PMIC */
+#ifndef CONFIG_DM_PMIC
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+#endif
/* USB Configs */
-#define CONFIG_CMD_USB
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
-#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
@@ -335,7 +290,7 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
#endif
-#if !defined(CONFIG_ANDROID_SUPPORT)
+#if !defined(CONFIG_FASTBOOT)
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
@@ -345,7 +300,7 @@
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
- "console=" CONFIG_CONSOLE_DEV "\0" \
+ "console=" CONSOLE_DEV "\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -366,9 +321,8 @@
"fi; " \
"fi\0" \
EMMC_ENV \
- "smp=" CONFIG_SYS_NOSMP "\0"\
"mmcargs=setenv bootargs console=${console},${baudrate} ${smp} " \
- "root=${mmcroot} " CONFIG_VIDEO_PRIMARY "\0" \
+ "root=${mmcroot} " VIDEO_PRIMARY "\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
@@ -435,11 +389,11 @@
#define CONFIG_ENV_OFFSET (448 * 1024)
#undef CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
-#define CONFIG_INTERNAL_SPI_NOR_PARTITION \
+#define INTERNAL_SPI_NOR_PARTITION \
"mtdparts=spi0.0:512k(uboot),64k(dtb),7m(linux),-(rootfs) "
#undef CONFIG_MFG_ENV_SETTINGS
#define CONFIG_MFG_ENV_SETTINGS \
- "mfgtool_args=setenv bootargs console=" CONFIG_CONSOLE_DEV ",115200 " \
+ "mfgtool_args=setenv bootargs console=" CONSOLE_DEV ",115200 " \
"rdinit=/linuxrc " \
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
"g_mass_storage.file=/fat g_mass_storage.ro=1 " \
@@ -447,7 +401,7 @@
"g_mass_storage.idProduct=0x37FF "\
"g_mass_storage.iSerialNumber=\"\" "\
"enable_wait_mode=off "\
- CONFIG_INTERNAL_SPI_NOR_PARTITION \
+ INTERNAL_SPI_NOR_PARTITION \
"\0" \
"initrd_addr=0x12C00000\0" \
"initrd_high=0xffffffff\0" \
@@ -462,7 +416,7 @@
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
- "console=" CONFIG_CONSOLE_DEV "\0" \
+ "console=" CONSOLE_DEV "\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -483,9 +437,8 @@
"fi; " \
"fi\0" \
EMMC_ENV \
- "smp=" CONFIG_SYS_NOSMP "\0"\
"mmcargs=setenv bootargs console=${console},${baudrate} ${smp} " \
- "root=${mmcroot} " CONFIG_VIDEO_PRIMARY "\0" \
+ "root=${mmcroot} " VIDEO_PRIMARY "\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
@@ -533,7 +486,7 @@
"fi;\0" \
"spinorargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/mtdblock3 rootwait rw " \
- CONFIG_INTERNAL_SPI_NOR_PARTITION "\0" \
+ INTERNAL_SPI_NOR_PARTITION "\0" \
"spinorboot=echo Booting from internal SPI-NOR Flash...; " \
"run spinorargs; sf probe; " \
"sf read 0x12000000 0x90000 0x700000; " \
diff --git a/include/configs/mx6dqscm_android.h b/include/configs/mx6dqscm_android.h
index 24ad0bf..6cd6076 100644
--- a/include/configs/mx6dqscm_android.h
+++ b/include/configs/mx6dqscm_android.h
@@ -36,13 +36,6 @@
#define CONFIG_FASTBOOT_STORAGE_MMC
#endif
-#define CONFIG_ANDROID_MAIN_MMC_BUS 2
-#define CONFIG_ANDROID_BOOT_PARTITION_MMC 1
-#define CONFIG_ANDROID_SYSTEM_PARTITION_MMC 5
-#define CONFIG_ANDROID_RECOVERY_PARTITION_MMC 2
-#define CONFIG_ANDROID_CACHE_PARTITION_MMC 6
-#define CONFIG_ANDROID_DATA_PARTITION_MMC 4
-
#define CONFIG_CMD_BOOTA
#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_SERIAL_TAG
generated by cgit v1.1 at 2024-10-04 00:42:40 +0000