14 files changed, 487 insertions, 250 deletions

diff --git a/common/image.c b/common/image.c
index 38b56e3..085771c 100644
--- a/common/image.c
+++ b/common/image.c
@@ -138,6 +138,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_PBLIMAGE,   "pblimage",   "Freescale PBL Boot Image",},
 	{	IH_TYPE_RAMDISK,    "ramdisk",	  "RAMDisk Image",	},
 	{	IH_TYPE_SCRIPT,     "script",	  "Script",		},
+	{	IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SOCFPGA preloader",},
 	{	IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
 	{	IH_TYPE_UBLIMAGE,   "ublimage",   "Davinci UBL image",},
 	{	IH_TYPE_MXSIMAGE,   "mxsimage",   "Freescale MXS Boot Image",},
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 6e34a8e..fd2b4f0 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -12,216 +12,159 @@
  *  Altera FPGA support
  */
 #include <common.h>
+#include <errno.h>
 #include <ACEX1K.h>
 #include <stratixII.h>
 
-/* Define FPGA_DEBUG to get debug printf's */
-/* #define FPGA_DEBUG */
+/* Define FPGA_DEBUG to 1 to get debug printf's */
+#define FPGA_DEBUG	0
 
-#ifdef	FPGA_DEBUG
-#define	PRINTF(fmt,args...)	printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Local Static Functions */
-static int altera_validate (Altera_desc * desc, const char *fn);
-
-/* ------------------------------------------------------------------------- */
-int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
-{
-	int ret_val = FPGA_FAIL;	/* assume a failure */
-
-	if (!altera_validate (desc, (char *)__FUNCTION__)) {
-		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
-	} else {
-		switch (desc->family) {
-		case Altera_ACEX1K:
-		case Altera_CYC2:
+static const struct altera_fpga {
+	enum altera_family	family;
+	const char		*name;
+	int			(*load)(Altera_desc *, const void *, size_t);
+	int			(*dump)(Altera_desc *, const void *, size_t);
+	int			(*info)(Altera_desc *);
+} altera_fpga[] = {
 #if defined(CONFIG_FPGA_ACEX1K)
-			PRINTF ("%s: Launching the ACEX1K Loader...\n",
-					__FUNCTION__);
-			ret_val = ACEX1K_load (desc, buf, bsize);
+	{ Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
+	{ Altera_CYC2,   "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
 #elif defined(CONFIG_FPGA_CYCLON2)
-			PRINTF ("%s: Launching the CYCLONE II Loader...\n",
-					__FUNCTION__);
-			ret_val = CYC2_load (desc, buf, bsize);
-#else
-			printf ("%s: No support for ACEX1K devices.\n",
-					__FUNCTION__);
+	{ Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
+	{ Altera_CYC2,   "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
 #endif
-			break;
-
 #if defined(CONFIG_FPGA_STRATIX_II)
-		case Altera_StratixII:
-			PRINTF ("%s: Launching the Stratix II Loader...\n",
-				__FUNCTION__);
-			ret_val = StratixII_load (desc, buf, bsize);
-			break;
+	{ Altera_StratixII, "StratixII", StratixII_load,
+	  StratixII_dump, StratixII_info },
 #endif
-		default:
-			printf ("%s: Unsupported family type, %d\n",
-					__FUNCTION__, desc->family);
-		}
+};
+
+static int altera_validate(Altera_desc *desc, const char *fn)
+{
+	if (!desc) {
+		printf("%s: NULL descriptor!\n", fn);
+		return -EINVAL;
+	}
+
+	if ((desc->family < min_altera_type) ||
+	    (desc->family > max_altera_type)) {
+		printf("%s: Invalid family type, %d\n", fn, desc->family);
+		return -EINVAL;
 	}
 
-	return ret_val;
+	if ((desc->iface < min_altera_iface_type) ||
+	    (desc->iface > max_altera_iface_type)) {
+		printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
+		return -EINVAL;
+	}
+
+	if (!desc->size) {
+		printf("%s: NULL part size\n", fn);
+		return -EINVAL;
+	}
+
+	return 0;
 }
 
-int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
+static const struct altera_fpga *
+altera_desc_to_fpga(Altera_desc *desc, const char *fn)
 {
-	int ret_val = FPGA_FAIL;	/* assume a failure */
+	int i;
 
-	if (!altera_validate (desc, (char *)__FUNCTION__)) {
-		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
-	} else {
-		switch (desc->family) {
-		case Altera_ACEX1K:
-#if defined(CONFIG_FPGA_ACEX)
-			PRINTF ("%s: Launching the ACEX1K Reader...\n",
-					__FUNCTION__);
-			ret_val = ACEX1K_dump (desc, buf, bsize);
-#else
-			printf ("%s: No support for ACEX1K devices.\n",
-					__FUNCTION__);
-#endif
-			break;
+	if (altera_validate(desc, fn)) {
+		printf("%s: Invalid device descriptor\n", fn);
+		return NULL;
+	}
 
-#if defined(CONFIG_FPGA_STRATIX_II)
-		case Altera_StratixII:
-			PRINTF ("%s: Launching the Stratix II Reader...\n",
-				__FUNCTION__);
-			ret_val = StratixII_dump (desc, buf, bsize);
+	for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
+		if (desc->family == altera_fpga[i].family)
 			break;
-#endif
-		default:
-			printf ("%s: Unsupported family type, %d\n",
-					__FUNCTION__, desc->family);
-		}
 	}
 
-	return ret_val;
+	if (i == ARRAY_SIZE(altera_fpga)) {
+		printf("%s: Unsupported family type, %d\n", fn, desc->family);
+		return NULL;
+	}
+
+	return &altera_fpga[i];
 }
 
-int altera_info( Altera_desc *desc )
+int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
 {
-	int ret_val = FPGA_FAIL;
+	const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
 
-	if (altera_validate (desc, (char *)__FUNCTION__)) {
-		printf ("Family:        \t");
-		switch (desc->family) {
-		case Altera_ACEX1K:
-			printf ("ACEX1K\n");
-			break;
-		case Altera_CYC2:
-			printf ("CYCLON II\n");
-			break;
-		case Altera_StratixII:
-			printf ("Stratix II\n");
-			break;
-			/* Add new family types here */
-		default:
-			printf ("Unknown family type, %d\n", desc->family);
-		}
-
-		printf ("Interface type:\t");
-		switch (desc->iface) {
-		case passive_serial:
-			printf ("Passive Serial (PS)\n");
-			break;
-		case passive_parallel_synchronous:
-			printf ("Passive Parallel Synchronous (PPS)\n");
-			break;
-		case passive_parallel_asynchronous:
-			printf ("Passive Parallel Asynchronous (PPA)\n");
-			break;
-		case passive_serial_asynchronous:
-			printf ("Passive Serial Asynchronous (PSA)\n");
-			break;
-		case altera_jtag_mode:		/* Not used */
-			printf ("JTAG Mode\n");
-			break;
-		case fast_passive_parallel:
-			printf ("Fast Passive Parallel (FPP)\n");
-			break;
-		case fast_passive_parallel_security:
-			printf
-			    ("Fast Passive Parallel with Security (FPPS) \n");
-			break;
-			/* Add new interface types here */
-		default:
-			printf ("Unsupported interface type, %d\n", desc->iface);
-		}
-
-		printf("Device Size:   \t%zd bytes\n"
-		      "Cookie:        \t0x%x (%d)\n",
-		      desc->size, desc->cookie, desc->cookie);
-
-		if (desc->iface_fns) {
-			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-			switch (desc->family) {
-			case Altera_ACEX1K:
-			case Altera_CYC2:
-#if defined(CONFIG_FPGA_ACEX1K)
-				ACEX1K_info (desc);
-#elif defined(CONFIG_FPGA_CYCLON2)
-				CYC2_info (desc);
-#else
-				/* just in case */
-				printf ("%s: No support for ACEX1K devices.\n",
-						__FUNCTION__);
-#endif
-				break;
-#if defined(CONFIG_FPGA_STRATIX_II)
-			case Altera_StratixII:
-				StratixII_info (desc);
-				break;
-#endif
-				/* Add new family types here */
-			default:
-				/* we don't need a message here - we give one up above */
-				break;
-			}
-		} else {
-			printf ("No Device Function Table.\n");
-		}
-
-		ret_val = FPGA_SUCCESS;
-	} else {
-		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
-	}
+	if (!fpga)
+		return FPGA_FAIL;
 
-	return ret_val;
+	debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
+		   __func__, fpga->name);
+	if (fpga->load)
+		return fpga->load(desc, buf, bsize);
+	return 0;
 }
 
-/* ------------------------------------------------------------------------- */
+int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
+{
+	const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
+
+	if (!fpga)
+		return FPGA_FAIL;
 
-static int altera_validate (Altera_desc * desc, const char *fn)
+	debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
+		   __func__, fpga->name);
+	if (fpga->dump)
+		return fpga->dump(desc, buf, bsize);
+	return 0;
+}
+
+int altera_info(Altera_desc *desc)
 {
-	int ret_val = false;
-
-	if (desc) {
-		if ((desc->family > min_altera_type) &&
-			(desc->family < max_altera_type)) {
-			if ((desc->iface > min_altera_iface_type) &&
-				(desc->iface < max_altera_iface_type)) {
-				if (desc->size) {
-					ret_val = true;
-				} else {
-					printf ("%s: NULL part size\n", fn);
-				}
-			} else {
-				printf ("%s: Invalid Interface type, %d\n",
-					fn, desc->iface);
-			}
-		} else {
-			printf ("%s: Invalid family type, %d\n", fn, desc->family);
-		}
+	const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
+
+	if (!fpga)
+		return FPGA_FAIL;
+
+	printf("Family:        \t%s\n", fpga->name);
+
+	printf("Interface type:\t");
+	switch (desc->iface) {
+	case passive_serial:
+		printf("Passive Serial (PS)\n");
+		break;
+	case passive_parallel_synchronous:
+		printf("Passive Parallel Synchronous (PPS)\n");
+		break;
+	case passive_parallel_asynchronous:
+		printf("Passive Parallel Asynchronous (PPA)\n");
+		break;
+	case passive_serial_asynchronous:
+		printf("Passive Serial Asynchronous (PSA)\n");
+		break;
+	case altera_jtag_mode:		/* Not used */
+		printf("JTAG Mode\n");
+		break;
+	case fast_passive_parallel:
+		printf("Fast Passive Parallel (FPP)\n");
+		break;
+	case fast_passive_parallel_security:
+		printf("Fast Passive Parallel with Security (FPPS)\n");
+		break;
+		/* Add new interface types here */
+	default:
+		printf("Unsupported interface type, %d\n", desc->iface);
+	}
+
+	printf("Device Size:   \t%zd bytes\n"
+	       "Cookie:        \t0x%x (%d)\n",
+	       desc->size, desc->cookie, desc->cookie);
+
+	if (desc->iface_fns) {
+		printf("Device Function Table @ 0x%p\n", desc->iface_fns);
+		if (fpga->info)
+			fpga->info(desc);
 	} else {
-		printf ("%s: NULL descriptor!\n", fn);
+		printf("No Device Function Table.\n");
 	}
 
-	return ret_val;
+	return FPGA_SUCCESS;
 }
-
-/* ------------------------------------------------------------------------- */
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 0df30bc..785eed5 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -119,7 +119,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 
 	while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
 		if (get_timer(start) > timeout) {
-			printf("Timeout on data busy\n");
+			printf("%s: Timeout on data busy\n", __func__);
 			return TIMEOUT;
 		}
 	}
@@ -177,14 +177,24 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 		}
 	}
 
-	if (i == retry)
+	if (i == retry) {
+		printf("%s: Timeout.\n", __func__);
 		return TIMEOUT;
+	}
 
 	if (mask & DWMCI_INTMSK_RTO) {
-		debug("Response Timeout..\n");
+		/*
+		 * Timeout here is not necessarily fatal. (e)MMC cards
+		 * will splat here when they receive CMD55 as they do
+		 * not support this command and that is exactly the way
+		 * to tell them apart from SD cards. Thus, this output
+		 * below shall be debug(). eMMC cards also do not favor
+		 * CMD8, please keep that in mind.
+		 */
+		debug("%s: Response Timeout.\n", __func__);
 		return TIMEOUT;
 	} else if (mask & DWMCI_INTMSK_RE) {
-		debug("Response Error..\n");
+		printf("%s: Response Error.\n", __func__);
 		return -1;
 	}
 
@@ -204,7 +214,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 		do {
 			mask = dwmci_readl(host, DWMCI_RINTSTS);
 			if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
-				debug("DATA ERROR!\n");
+				printf("%s: DATA ERROR!\n", __func__);
 				return -1;
 			}
 		} while (!(mask & DWMCI_INTMSK_DTO));
@@ -232,16 +242,16 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	if ((freq == host->clock) || (freq == 0))
 		return 0;
 	/*
-	 * If host->get_mmc_clk didn't define,
+	 * If host->get_mmc_clk isn't defined,
 	 * then assume that host->bus_hz is source clock value.
-	 * host->bus_hz should be set from user.
+	 * host->bus_hz should be set by user.
 	 */
 	if (host->get_mmc_clk)
 		sclk = host->get_mmc_clk(host);
 	else if (host->bus_hz)
 		sclk = host->bus_hz;
 	else {
-		printf("Didn't get source clock value..\n");
+		printf("%s: Didn't get source clock value.\n", __func__);
 		return -EINVAL;
 	}
 
@@ -260,7 +270,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	do {
 		status = dwmci_readl(host, DWMCI_CMD);
 		if (timeout-- < 0) {
-			printf("TIMEOUT error!!\n");
+			printf("%s: Timeout!\n", __func__);
 			return -ETIMEDOUT;
 		}
 	} while (status & DWMCI_CMD_START);
@@ -275,7 +285,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	do {
 		status = dwmci_readl(host, DWMCI_CMD);
 		if (timeout-- < 0) {
-			printf("TIMEOUT error!!\n");
+			printf("%s: Timeout!\n", __func__);
 			return -ETIMEDOUT;
 		}
 	} while (status & DWMCI_CMD_START);
@@ -290,7 +300,7 @@ static void dwmci_set_ios(struct mmc *mmc)
 	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
 	u32 ctype, regs;
 
-	debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock);
+	debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock);
 
 	dwmci_setup_bus(host, mmc->clock);
 	switch (mmc->bus_width) {
@@ -329,7 +339,7 @@ static int dwmci_init(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_PWREN, 1);
 
 	if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
-		debug("%s[%d] Fail-reset!!\n",__func__,__LINE__);
+		printf("%s[%d] Fail-reset!!\n", __func__, __LINE__);
 		return -1;
 	}
 
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 7186e3b..9ded895 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -279,19 +279,21 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 	struct eth_dma_regs *dma_p = priv->dma_regs_p;
 	u32 desc_num = priv->tx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-
+	uint32_t desc_start = (uint32_t)desc_p;
+	uint32_t desc_end = desc_start +
+		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
+	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
+	uint32_t data_end = data_start +
+		roundup(length, ARCH_DMA_MINALIGN);
 	/*
 	 * Strictly we only need to invalidate the "txrx_status" field
 	 * for the following check, but on some platforms we cannot
-	 * invalidate only 4 bytes, so roundup to
-	 * ARCH_DMA_MINALIGN. This is safe because the individual
-	 * descriptors in the array are each aligned to
-	 * ARCH_DMA_MINALIGN.
+	 * invalidate only 4 bytes, so we flush the entire descriptor,
+	 * which is 16 bytes in total. This is safe because the
+	 * individual descriptors in the array are each aligned to
+	 * ARCH_DMA_MINALIGN and padded appropriately.
 	 */
-	invalidate_dcache_range(
-		(unsigned long)desc_p,
-		(unsigned long)desc_p +
-		roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN));
+	invalidate_dcache_range(desc_start, desc_end);
 
 	/* Check if the descriptor is owned by CPU */
 	if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
@@ -299,11 +301,10 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 		return -1;
 	}
 
-	memcpy((void *)desc_p->dmamac_addr, packet, length);
+	memcpy(desc_p->dmamac_addr, packet, length);
 
 	/* Flush data to be sent */
-	flush_dcache_range((unsigned long)desc_p->dmamac_addr,
-			   (unsigned long)desc_p->dmamac_addr + length);
+	flush_dcache_range(data_start, data_end);
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
 	desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
@@ -321,8 +322,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 #endif
 
 	/* Flush modified buffer descriptor */
-	flush_dcache_range((unsigned long)desc_p,
-			   (unsigned long)desc_p + sizeof(struct dmamacdescr));
+	flush_dcache_range(desc_start, desc_end);
 
 	/* Test the wrap-around condition. */
 	if (++desc_num >= CONFIG_TX_DESCR_NUM)
@@ -342,11 +342,14 @@ static int dw_eth_recv(struct eth_device *dev)
 	u32 status, desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
 	int length = 0;
+	uint32_t desc_start = (uint32_t)desc_p;
+	uint32_t desc_end = desc_start +
+		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
+	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
+	uint32_t data_end;
 
 	/* Invalidate entire buffer descriptor */
-	invalidate_dcache_range((unsigned long)desc_p,
-				(unsigned long)desc_p +
-				sizeof(struct dmamacdescr));
+	invalidate_dcache_range(desc_start, desc_end);
 
 	status = desc_p->txrx_status;
 
@@ -357,9 +360,8 @@ static int dw_eth_recv(struct eth_device *dev)
 			 DESC_RXSTS_FRMLENSHFT;
 
 		/* Invalidate received data */
-		invalidate_dcache_range((unsigned long)desc_p->dmamac_addr,
-					(unsigned long)desc_p->dmamac_addr +
-					roundup(length, ARCH_DMA_MINALIGN));
+		data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
+		invalidate_dcache_range(data_start, data_end);
 
 		NetReceive(desc_p->dmamac_addr, length);
 
@@ -370,9 +372,7 @@ static int dw_eth_recv(struct eth_device *dev)
 		desc_p->txrx_status |= DESC_RXSTS_OWNBYDMA;
 
 		/* Flush only status field - others weren't changed */
-		flush_dcache_range((unsigned long)&desc_p->txrx_status,
-				   (unsigned long)&desc_p->txrx_status +
-				   sizeof(desc_p->txrx_status));
+		flush_dcache_range(desc_start, desc_end);
 
 		/* Test the wrap-around condition. */
 		if (++desc_num >= CONFIG_RX_DESCR_NUM)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 5d7e3be..507b9a3 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -25,8 +25,7 @@ static struct phy_driver KSZ804_driver = {
 #ifndef CONFIG_PHY_MICREL_KSZ9021
 /*
  * I can't believe Micrel used the exact same part number
- * for the KSZ9021
- * Shame Micrel, Shame!!!!!
+ * for the KSZ9021. Shame Micrel, Shame!
  */
 static struct phy_driver KS8721_driver = {
 	.name = "Micrel KS8721BL",
@@ -40,7 +39,7 @@ static struct phy_driver KS8721_driver = {
 #endif
 
 
-/**
+/*
  * KSZ9021 - KSZ9031 common
  */
 
@@ -69,8 +68,8 @@ static int ksz90xx_startup(struct phy_device *phydev)
 		phydev->speed = SPEED_10;
 	return 0;
 }
-#ifdef CONFIG_PHY_MICREL_KSZ9021
 
+#ifdef CONFIG_PHY_MICREL_KSZ9021
 /*
  * KSZ9021
  */
diff --git a/include/altera.h b/include/altera.h
index ae5f7ee..e266a64 100644
--- a/include/altera.h
+++ b/include/altera.h
@@ -10,35 +10,57 @@
 #ifndef _ALTERA_H_
 #define _ALTERA_H_
 
-typedef enum {				/* typedef Altera_iface */
-	min_altera_iface_type,		/* insert all new types after this */
-	passive_serial,			/* serial data and external clock */
-	passive_parallel_synchronous,	/* parallel data */
-	passive_parallel_asynchronous,	/* parallel data */
-	passive_serial_asynchronous,	/* serial data w/ internal clock (not used)	*/
-	altera_jtag_mode,		/* jtag/tap serial (not used ) */
-	fast_passive_parallel,		/* fast passive parallel (FPP) */
-	fast_passive_parallel_security,	/* fast passive parallel with security (FPPS) */
-	max_altera_iface_type		/* insert all new types before this */
-} Altera_iface;				/* end, typedef Altera_iface */
+enum altera_iface {
+	/* insert all new types after this */
+	min_altera_iface_type,
+	/* serial data and external clock */
+	passive_serial,
+	/* parallel data */
+	passive_parallel_synchronous,
+	/* parallel data */
+	passive_parallel_asynchronous,
+	/* serial data w/ internal clock (not used) */
+	passive_serial_asynchronous,
+	/* jtag/tap serial (not used ) */
+	altera_jtag_mode,
+	/* fast passive parallel (FPP) */
+	fast_passive_parallel,
+	/* fast passive parallel with security (FPPS) */
+	fast_passive_parallel_security,
+	/* insert all new types before this */
+	max_altera_iface_type,
+};
 
-typedef enum {			/* typedef Altera_Family */
-	min_altera_type,	/* insert all new types after this */
-	Altera_ACEX1K,		/* ACEX1K Family */
-	Altera_CYC2,		/* CYCLONII Family */
-	Altera_StratixII,	/* StratixII Family */
-/* Add new models here */
-	max_altera_type		/* insert all new types before this */
-} Altera_Family;		/* end, typedef Altera_Family */
+enum altera_family {
+	/* insert all new types after this */
+	min_altera_type,
+	/* ACEX1K Family */
+	Altera_ACEX1K,
+	/* CYCLONII Family */
+	Altera_CYC2,
+	/* StratixII Family */
+	Altera_StratixII,
 
-typedef struct {		/* typedef Altera_desc */
-	Altera_Family	family;	/* part type */
-	Altera_iface	iface;	/* interface type */
-	size_t		size;	/* bytes of data part can accept */
-	void *		iface_fns;/* interface function table */
-	void *		base;	/* base interface address */
-	int		cookie;	/* implementation specific cookie */
-} Altera_desc;			/* end, typedef Altera_desc */
+	/* Add new models here */
+
+	/* insert all new types before this */
+	max_altera_type,
+};
+
+typedef struct {
+	/* part type */
+	enum altera_family	family;
+	/* interface type */
+	enum altera_iface	iface;
+	/* bytes of data part can accept */
+	size_t			size;
+	/* interface function table */
+	void			*iface_fns;
+	/* base interface address */
+	void			*base;
+	/* implementation specific cookie */
+	int			cookie;
+} Altera_desc;
 
 /* Generic Altera Functions
  *********************************************************************/
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index c22d6d0..1bf8390 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -125,7 +125,6 @@
  */
 #define CONFIG_DESIGNWARE_ETH
 #define CONFIG_DW_AUTONEG
-#define CONFIG_DW_SEARCH_PHY
 #define CONFIG_NET_MULTI
 
 /*
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 5d145cd..39e9368 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -225,7 +225,6 @@
 /* designware */
 #define CONFIG_NET_MULTI
 #define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_DW_SEARCH_PHY
 #define CONFIG_MII
 #define CONFIG_PHY_GIGE
 #define CONFIG_DW_AUTONEG
diff --git a/include/dwmmc.h b/include/dwmmc.h
index b67f11b..109f7c8 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -157,7 +157,7 @@ struct dwmci_idmac {
 	u32 cnt;
 	u32 addr;
 	u32 next_addr;
-};
+} __aligned(ARCH_DMA_MINALIGN);
 
 static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val)
 {
diff --git a/include/image.h b/include/image.h
index 3401056..4347532 100644
--- a/include/image.h
+++ b/include/image.h
@@ -232,6 +232,7 @@ struct lmb;
 #define IH_TYPE_MXSIMAGE	16	/* Freescale MXSBoot Image	*/
 #define IH_TYPE_GPIMAGE		17	/* TI Keystone GPHeader Image	*/
 #define IH_TYPE_ATMELIMAGE	18	/* ATMEL ROM bootable Image	*/
+#define IH_TYPE_SOCFPGAIMAGE	19	/* Altera SOCFPGA Preloader	*/
 
 /*
  * Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 90e966d..2b05b20 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -87,6 +87,7 @@ dumpimage-mkimage-objs := aisimage.o \
 			os_support.o \
 			pblimage.o \
 			pbl_crc32.o \
+			socfpgaimage.o \
 			lib/sha1.o \
 			lib/sha256.o \
 			ublimage.o \
diff --git a/tools/imagetool.c b/tools/imagetool.c
index 32d6278..98717bd 100644
--- a/tools/imagetool.c
+++ b/tools/imagetool.c
@@ -47,6 +47,8 @@ void register_image_tool(imagetool_register_t image_register)
 	init_ubl_image_type();
 	/* Init Davinci AIS support */
 	init_ais_image_type();
+	/* Init Altera SOCFPGA support */
+	init_socfpga_image_type();
 	/* Init TI Keystone boot image generation/list support */
 	init_gpimage_type();
 }
diff --git a/tools/imagetool.h b/tools/imagetool.h
index c8af0e8..8bce059 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -168,6 +168,7 @@ void init_mxs_image_type(void);
 void init_fit_image_type(void);
 void init_ubl_image_type(void);
 void init_omap_image_type(void);
+void init_socfpga_image_type(void);
 void init_gpimage_type(void);
 
 void pbl_load_uboot(int fd, struct image_tool_params *mparams);
diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
new file mode 100644
index 0000000..396d8a5
--- /dev/null
+++ b/tools/socfpgaimage.c
@@ -0,0 +1,259 @@
+/*
+ * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
+ * Note this doc is not entirely accurate. Of particular interest to us is the
+ * "header" length field being in U32s and not bytes.
+ *
+ * "Header" is a structure of the following format.
+ * this is positioned at 0x40.
+ *
+ * Endian is LSB.
+ *
+ * Offset   Length   Usage
+ * -----------------------
+ *   0x40        4   Validation word 0x31305341
+ *   0x44        1   Version (whatever, zero is fine)
+ *   0x45        1   Flags   (unused, zero is fine)
+ *   0x46        2   Length  (in units of u32, including the end checksum).
+ *   0x48        2   Zero
+ *   0x4A        2   Checksum over the header. NB Not CRC32
+ *
+ * At the end of the code we have a 32-bit CRC checksum over whole binary
+ * excluding the CRC.
+ *
+ * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
+ * CRC-32 used in bzip2, ethernet and elsewhere.
+ *
+ * The image is padded out to 64k, because that is what is
+ * typically used to write the image to the boot medium.
+ */
+
+#include "pbl_crc32.h"
+#include "imagetool.h"
+#include <image.h>
+
+#define HEADER_OFFSET	0x40
+#define VALIDATION_WORD	0x31305341
+#define PADDED_SIZE	0x10000
+
+/* To allow for adding CRC, the max input size is a bit smaller. */
+#define MAX_INPUT_SIZE	(PADDED_SIZE - sizeof(uint32_t))
+
+static uint8_t buffer[PADDED_SIZE];
+
+static struct socfpga_header {
+	uint32_t validation;
+	uint8_t  version;
+	uint8_t  flags;
+	uint16_t length_u32;
+	uint16_t zero;
+	uint16_t checksum;
+} header;
+
+/*
+ * The header checksum is just a very simple checksum over
+ * the header area.
+ * There is still a crc32 over the whole lot.
+ */
+static uint16_t hdr_checksum(struct socfpga_header *header)
+{
+	int len = sizeof(*header) - sizeof(header->checksum);
+	uint8_t *buf = (uint8_t *)header;
+	uint16_t ret = 0;
+
+	while (--len)
+		ret += *buf++;
+
+	return ret;
+}
+
+
+static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,
+			 uint16_t length_bytes)
+{
+	header.validation = htole32(VALIDATION_WORD);
+	header.version = version;
+	header.flags = flags;
+	header.length_u32 = htole16(length_bytes/4);
+	header.zero = 0;
+	header.checksum = htole16(hdr_checksum(&header));
+
+	memcpy(buf, &header, sizeof(header));
+}
+
+/*
+ * Perform a rudimentary verification of header and return
+ * size of image.
+ */
+static int verify_header(const uint8_t *buf)
+{
+	memcpy(&header, buf, sizeof(header));
+
+	if (le32toh(header.validation) != VALIDATION_WORD)
+		return -1;
+	if (le16toh(header.checksum) != hdr_checksum(&header))
+		return -1;
+
+	return le16toh(header.length_u32) * 4;
+}
+
+/* Sign the buffer and return the signed buffer size */
+static int sign_buffer(uint8_t *buf,
+			uint8_t version, uint8_t flags,
+			int len, int pad_64k)
+{
+	uint32_t calc_crc;
+
+	/* Align the length up */
+	len = (len + 3) & (~3);
+
+	/* Build header, adding 4 bytes to length to hold the CRC32. */
+	build_header(buf + HEADER_OFFSET,  version, flags, len + 4);
+
+	/* Calculate and apply the CRC */
+	calc_crc = ~pbl_crc32(0, (char *)buf, len);
+
+	*((uint32_t *)(buf + len)) = htole32(calc_crc);
+
+	if (!pad_64k)
+		return len + 4;
+
+	return PADDED_SIZE;
+}
+
+/* Verify that the buffer looks sane */
+static int verify_buffer(const uint8_t *buf)
+{
+	int len; /* Including 32bit CRC */
+	uint32_t calc_crc;
+	uint32_t buf_crc;
+
+	len = verify_header(buf + HEADER_OFFSET);
+	if (len < 0) {
+		fprintf(stderr, "Invalid header\n");
+		return -1;
+	}
+
+	if (len < HEADER_OFFSET || len > PADDED_SIZE) {
+		fprintf(stderr, "Invalid header length (%i)\n", len);
+		return -1;
+	}
+
+	/*
+	 * Adjust length to the base of the CRC.
+	 * Check the CRC.
+	*/
+	len -= 4;
+
+	calc_crc = ~pbl_crc32(0, (const char *)buf, len);
+
+	buf_crc = le32toh(*((uint32_t *)(buf + len)));
+
+	if (buf_crc != calc_crc) {
+		fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
+			buf_crc, calc_crc);
+		return -1;
+	}
+
+	return 0;
+}
+
+/* mkimage glue functions */
+static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
+			struct image_tool_params *params)
+{
+	if (image_size != PADDED_SIZE)
+		return -1;
+
+	return verify_buffer(ptr);
+}
+
+static void socfpgaimage_print_header(const void *ptr)
+{
+	if (verify_buffer(ptr) == 0)
+		printf("Looks like a sane SOCFPGA preloader\n");
+	else
+		printf("Not a sane SOCFPGA preloader\n");
+}
+
+static int socfpgaimage_check_params(struct image_tool_params *params)
+{
+	/* Not sure if we should be accepting fflags */
+	return	(params->dflag && (params->fflag || params->lflag)) ||
+		(params->fflag && (params->dflag || params->lflag)) ||
+		(params->lflag && (params->dflag || params->fflag));
+}
+
+static int socfpgaimage_check_image_types(uint8_t type)
+{
+	if (type == IH_TYPE_SOCFPGAIMAGE)
+		return EXIT_SUCCESS;
+	return EXIT_FAILURE;
+}
+
+/*
+ * To work in with the mkimage framework, we do some ugly stuff...
+ *
+ * First, socfpgaimage_vrec_header() is called.
+ * We prepend a fake header big enough to make the file PADDED_SIZE.
+ * This gives us enough space to do what we want later.
+ *
+ * Next, socfpgaimage_set_header() is called.
+ * We fix up the buffer by moving the image to the start of the buffer.
+ * We now have some room to do what we need (add CRC and padding).
+ */
+
+static int data_size;
+#define FAKE_HEADER_SIZE (PADDED_SIZE - data_size)
+
+static int socfpgaimage_vrec_header(struct image_tool_params *params,
+				struct image_type_params *tparams)
+{
+	struct stat sbuf;
+
+	if (params->datafile &&
+	    stat(params->datafile, &sbuf) == 0 &&
+	    sbuf.st_size <= MAX_INPUT_SIZE) {
+		data_size = sbuf.st_size;
+		tparams->header_size = FAKE_HEADER_SIZE;
+	}
+	return 0;
+}
+
+static void socfpgaimage_set_header(void *ptr, struct stat *sbuf, int ifd,
+				struct image_tool_params *params)
+{
+	uint8_t *buf = (uint8_t *)ptr;
+
+	/*
+	 * This function is called after vrec_header() has been called.
+	 * At this stage we have the FAKE_HEADER_SIZE dummy bytes followed by
+	 * data_size image bytes. Total = PADDED_SIZE.
+	 * We need to fix the buffer by moving the image bytes back to
+	 * the beginning of the buffer, then actually do the signing stuff...
+	 */
+	memmove(buf, buf + FAKE_HEADER_SIZE, data_size);
+	memset(buf + data_size, 0, FAKE_HEADER_SIZE);
+
+	sign_buffer(buf, 0, 0, data_size, 0);
+}
+
+static struct image_type_params socfpgaimage_params = {
+	.name		= "Altera SOCFPGA preloader support",
+	.vrec_header	= socfpgaimage_vrec_header,
+	.header_size	= 0, /* This will be modified by vrec_header() */
+	.hdr		= (void *)buffer,
+	.check_image_type = socfpgaimage_check_image_types,
+	.verify_header	= socfpgaimage_verify_header,
+	.print_header	= socfpgaimage_print_header,
+	.set_header	= socfpgaimage_set_header,
+	.check_params	= socfpgaimage_check_params,
+};
+
+void init_socfpga_image_type(void)
+{
+	register_image_type(&socfpgaimage_params);
+}