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-rw-r--r--arch/x86/cpu/ivybridge/bd82x6x.c32
1 files changed, 0 insertions, 32 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index ca8cccf..3e7a907 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -55,38 +55,6 @@ void bd82x6x_pci_init(pci_dev_t dev)
x86_pci_write_config16(dev, SECSTS, reg16);
}
-#define PCI_BRIDGE_UPDATE_COMMAND
-void bd82x6x_pci_dev_enable_resources(pci_dev_t dev)
-{
- uint16_t command;
-
- command = x86_pci_read_config16(dev, PCI_COMMAND);
- command |= PCI_COMMAND_IO;
-#ifdef PCI_BRIDGE_UPDATE_COMMAND
- /*
- * If we write to PCI_COMMAND, on some systems this will cause the
- * ROM and APICs to become invisible.
- */
- debug("%x cmd <- %02x\n", dev, command);
- x86_pci_write_config16(dev, PCI_COMMAND, command);
-#else
- printf("%s cmd <- %02x (NOT WRITTEN!)\n", dev_path(dev), command);
-#endif
-}
-
-void bd82x6x_pci_bus_enable_resources(pci_dev_t dev)
-{
- uint16_t ctrl;
-
- ctrl = x86_pci_read_config16(dev, PCI_BRIDGE_CONTROL);
- ctrl |= PCI_COMMAND_IO;
- ctrl |= PCI_BRIDGE_CTL_VGA;
- debug("%x bridge ctrl <- %04x\n", dev, ctrl);
- x86_pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
-
- bd82x6x_pci_dev_enable_resources(dev);
-}
-
static int bd82x6x_probe(struct udevice *dev)
{
const void *blob = gd->fdt_blob;