diff options
| -rw-r--r-- | drivers/mtd/nand/mxc_nand.c | 46 | ||||
| -rw-r--r-- | include/asm-arm/arch-mx31/mx31-regs.h | 39 | ||||
| -rw-r--r-- | include/configs/mx31pdk.h | 25 |
3 files changed, 103 insertions, 7 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index eb0323f..b2b612e 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -149,6 +149,43 @@ static struct nand_ecclayout nand_soft_eccoob = { }; #endif +static struct nand_ecclayout nand_hw_eccoob_largepage = { + .eccbytes = 20, + .eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26, + 38, 39, 40, 41, 42, 54, 55, 56, 57, 58}, + .oobfree = {{2, 4}, {11, 10}, {27, 10}, {43, 10}, {59, 5}, } +}; + +#ifdef CONFIG_MX27 +static int is_16bit_nand(void) +{ + struct system_control_regs *sc_regs = + (struct system_control_regs *)IMX_SYSTEM_CTL_BASE; + + if (readl(&sc_regs->fmcr) & NF_16BIT_SEL) + return 1; + else + return 0; +} +#elif defined(CONFIG_MX31) +static int is_16bit_nand(void) +{ + struct clock_control_regs *sc_regs = + (struct clock_control_regs *)CCM_BASE; + + if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B) + return 1; + else + return 0; +} +#else +#warning "8/16 bit NAND autodetection not supported" +static int is_16bit_nand(void) +{ + return 0; +} +#endif + static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size) { uint32_t *d = dest; @@ -808,8 +845,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, int board_nand_init(struct nand_chip *this) { - struct system_control_regs *sc_regs = - (struct system_control_regs *)IMX_SYSTEM_CTL_BASE; struct mtd_info *mtd; uint16_t tmp; int err = 0; @@ -871,10 +906,15 @@ int board_nand_init(struct nand_chip *this) writew(0x4, &host->regs->nfc_wrprot); /* NAND bus width determines access funtions used by upper layer */ - if (readl(&sc_regs->fmcr) & NF_16BIT_SEL) + if (is_16bit_nand()) this->options |= NAND_BUSWIDTH_16; +#ifdef CONFIG_SYS_NAND_LARGEPAGE + host->pagesize_2k = 1; + this->ecc.layout = &nand_hw_eccoob_largepage; +#else host->pagesize_2k = 0; +#endif return err; } diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 51b02a2..6f6e9a4 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -24,6 +24,45 @@ #ifndef __ASM_ARCH_MX31_REGS_H #define __ASM_ARCH_MX31_REGS_H +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +#include <asm/types.h> + +/* Clock control module registers */ +struct clock_control_regs { + u32 ccmr; + u32 pdr0; + u32 pdr1; + u32 rcsr; + u32 mpctl; + u32 upctl; + u32 spctl; + u32 cosr; + u32 cgr0; + u32 cgr1; + u32 cgr2; + u32 wimr0; + u32 ldc; + u32 dcvr0; + u32 dcvr1; + u32 dcvr2; + u32 dcvr3; + u32 ltr0; + u32 ltr1; + u32 ltr2; + u32 ltr3; + u32 ltbr0; + u32 ltbr1; + u32 pmcr0; + u32 pmcr1; + u32 pdr2; +}; + +/* Bit definitions for RCSR register in CCM */ +#define CCM_RCSR_NF16B (1 << 31) +#define CCM_RCSR_NFMS (1 << 30) + +#endif + #define __REG(x) (*((volatile u32 *)(x))) #define __REG16(x) (*((volatile u16 *)(x))) #define __REG8(x) (*((volatile u8 *)(x))) diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index fb61432..bee2f45 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -30,6 +30,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include <asm/arch/mx31-regs.h> + /* High Level Configuration Options */ #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ #define CONFIG_MX31 1 /* in a mx31 */ @@ -51,7 +53,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2*CONFIG_ENV_SIZE + 2 * 128 * 1024) /* Bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -89,6 +91,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SPI #define CONFIG_CMD_DATE +#define CONFIG_CMD_NAND /* * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require @@ -104,7 +107,10 @@ "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ "bootcmd=run bootcmd_net\0" \ "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \ - "tftpboot 0x81000000 uImage-mx31; bootm\0" + "tftpboot 0x81000000 uImage-mx31; bootm\0" \ + "prg_uboot=tftpboot 0x81000000 u-boot-nand.bin; " \ + "nand erase 0x0 0x40000; " \ + "nand write 0x81000000 0x0 0x40000\0" #define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 @@ -156,9 +162,20 @@ /* No NOR flash present */ #define CONFIG_SYS_NO_FLASH 1 -#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x40000 +#define CONFIG_ENV_OFFSET_REDUND 0x60000 +#define CONFIG_ENV_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (128 * 1024) +/* + * NAND driver + */ +#define CONFIG_NAND_MXC +#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR +#define CONFIG_MXC_NAND_HWECC +#define CONFIG_SYS_NAND_LARGEPAGE /* NAND configuration for the NAND_SPL */ |