diff options
1133 files changed, 14035 insertions, 14442 deletions
@@ -200,10 +200,6 @@ N: Andreas Heppel E: aheppel@sysgo.de D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!] -N: August Hoeraendl -E: august.hoerandl@gmx.at -D: Support for the logodl board (PXA2xx) - N: Josh Huber E: huber@alum.wpi.edu D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series. @@ -441,7 +437,7 @@ D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR) N: Robert Schwebel E: r.schwebel@pengutronix.de -D: Support for csb226, logodl and innokom boards (PXA2xx) +D: Support for csb226 and innokom boards (PXA2xx) N: Aaron Sells E: sellsa@embeddedplanet.com diff --git a/MAINTAINERS b/MAINTAINERS index a394ac9..5108c54 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -305,6 +305,10 @@ Andrea "llandre" Marson <andrea.marson@dave-tech.it> PPChameleonEVB PPC405EP +Tirumala Marri <tmarri@apm.com> + + bluestone APM821XX + Reinhard Meyer <r.meyer@emk-elektronik.de> TOP860 MPC860T @@ -343,6 +347,10 @@ Daniel Poirot <dan.poirot@windriver.com> sbc8240 MPC8240 sbc405 PPC405GP +Sergei Poselenov <sposelenov@emcraft.com> + + a4m072 MPC5200 + Sudhakar Rajashekhara <sudhakar.raj@ti.com> da850evm ARM926EJS (DA850/OMAP-L138) @@ -498,10 +506,6 @@ Detlev Zundel <dzu@denx.de> inka4x0 MPC5200 -Tirumala Marri <tmarri@apm.com> - - bluestone APM821XX - ------------------------------------------------------------------------- Unknown / orphaned boards: @@ -550,6 +554,11 @@ Stefano Babic <sbabic@denx.de> mx51evk i.MX51 vision2 i.MX51 +Enric Balletbo i Serra <eballetbo@iseebcn.com> + + igep0020 ARM ARMV7 (OMAP3xx SoC) + igep0030 ARM ARMV7 (OMAP3xx SoC) + Dirk Behme <dirk.behme@gmail.com> omap3_beagle ARM ARMV7 (OMAP3530 SoC) @@ -1,5 +1,134 @@ #!/bin/bash +# Tool mainly for U-Boot Quality Assurance: build one or more board +# configurations with minimal verbosity, showing only warnings and +# errors. +# +# There are several ways to select which boards to build. +# +# Traditionally, architecture names (like "powerpc"), CPU family names +# (like "mpc83xx") or board names can be specified on the command +# line; without any arguments, MAKEALL defaults to building all Power +# Architecture systems (i. e. same as for "MAKEALL powerpc"). +# +# With the iontroduction of the board.cfg file, it has become possible +# to provide additional selections. We use standard command line +# options for this: +# +# -a or --arch : Select architecture +# -c or --cpu : Select CPU family +# -s or --soc : Select SoC type +# -v or --vendor: Select board vendor +# +# Selections by these options are logically ANDed; if the same option +# is used repeatedly, such selections are ORed. So "-v FOO -v BAR" +# will select all configurations where the vendor is either FOO or +# BAR. Any additional arguments specified on the command line are +# always build additionally. +# +# Examples: +# +# - build all Power Architecture boards: +# +# MAKEALL -a powerpc +# or +# MAKEALL --arch powerpc +# or +# MAKEALL powerpc +# +# - build all PowerPC boards manufactured by vendor "esd": +# +# MAKEALL -a powerpc -v esd +# +# - build all PowerPC boards manufactured either by "keymile" or +# "siemens": +# +# MAKEALL -a powerpc -v keymile -v siemens +# +# - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards: +# +# MAKEALL -c mpc83xx -v freescale 4xx +# +######################################################################### + +SHORT_OPTS="a:c:v:s:" +LONG_OPTS="arch:,cpu:,vendor:,soc:" + +# Option processing based on util-linux-2.13/getopt-parse.bash + +# Note that we use `"$@"' to let each command-line parameter expand to a +# separate word. The quotes around `$@' are essential! +# We need TEMP as the `eval set --' would nuke the return value of +# getopt. +TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \ + -n 'MAKEALL' -- "$@"` + +if [ $? != 0 ] ; then echo "Terminating..." >&2 ; exit 1 ; fi + +# Note the quotes around `$TEMP': they are essential! +eval set -- "$TEMP" + +SELECTED='' + +while true ; do + case "$1" in + -a|--arch) + # echo "Option ARCH: argument \`$2'" + if [ "$opt_a" ] ; then + opt_a="${opt_a%)} || \$2 == \"$2\")" + else + opt_a="(\$2 == \"$2\")" + fi + SELECTED='y' + shift 2 ;; + -c|--cpu) + # echo "Option CPU: argument \`$2'" + if [ "$opt_c" ] ; then + opt_c="${opt_c%)} || \$3 == \"$2\")" + else + opt_c="(\$3 == \"$2\")" + fi + SELECTED='y' + shift 2 ;; + -s|--soc) + # echo "Option SoC: argument \`$2'" + if [ "$opt_s" ] ; then + opt_s="${opt_s%)} || \$6 == \"$2\")" + else + opt_s="(\$6 == \"$2\")" + fi + SELECTED='y' + shift 2 ;; + -v|--vendor) + # echo "Option VENDOR: argument \`$2'" + if [ "$opt_v" ] ; then + opt_v="${opt_v%)} || \$5 == \"$2\")" + else + opt_v="(\$5 == \"$2\")" + fi + SELECTED='y' + shift 2 ;; + --) + shift ; break ;; + *) + echo "Internal error!" >&2 ; exit 1 ;; + esac +done +# echo "Remaining arguments:" +# for arg do echo '--> '"\`$arg'" ; done + +FILTER="\$1 !~ /^#/" +[ "$opt_a" ] && FILTER="${FILTER} && $opt_a" +[ "$opt_c" ] && FILTER="${FILTER} && $opt_c" +[ "$opt_s" ] && FILTER="${FILTER} && $opt_s" +[ "$opt_v" ] && FILTER="${FILTER} && $opt_v" + +if [ "$SELECTED" ] ; then + SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg) +fi + +######################################################################### + # Print statistics when we exit trap exit 1 2 3 15 trap print_stats 0 @@ -63,122 +192,25 @@ LIST_5xx="$(boards_by_cpu mpc5xx)" ## MPC5xxx Systems ######################################################################### -LIST_5xxx="$(boards_by_cpu mpc5xxx) - digsy_mtc \ - EVAL5200 \ - fo300 \ - galaxy5200 \ - icecube_5200 \ - lite5200b \ - mcc200 \ - MVBC_P \ - MVSMR \ - pcm030 \ - PM520 \ - TB5200 \ - Total5200 \ - Total5200_Rev2 \ - TQM5200 \ - TQM5200_B \ - TQM5200S \ -" +LIST_5xxx="$(boards_by_cpu mpc5xxx)" ######################################################################### ## MPC512x Systems ######################################################################### -LIST_512x="$(boards_by_cpu mpc512x) - mpc5121ads \ -" +LIST_512x="$(boards_by_cpu mpc512x)" ######################################################################### ## MPC8xx Systems ######################################################################### -LIST_8xx="$(boards_by_cpu mpc8xx) - Adder87x \ - AdderII \ - ADS860 \ - FADS823 \ - FADS850SAR \ - FADS860T \ - FPS850L \ - GEN860T \ - GEN860T_SC \ - ICU862_100MHz \ - IVML24 \ - IVML24_128 \ - IVML24_256 \ - IVMS8 \ - IVMS8_128 \ - IVMS8_256 \ - MBX \ - MBX860T \ - MPC86xADS \ - MPC885ADS \ - NETPHONE \ - NETTA \ - NETTA2 \ - NETTA_ISDN \ - NETVIA \ - NETVIA_V2 \ - RPXlite_DW \ - SPD823TS \ - SXNI855T \ - TK885D \ - TQM823L \ - TQM823L_LCD \ - TQM850L \ - TQM855L \ - TQM860L \ - TQM885D \ - v37 \ -" +LIST_8xx="$(boards_by_cpu mpc8xx)" ######################################################################### ## PPC4xx Systems ######################################################################### -LIST_4xx="$(boards_by_cpu ppc4xx) - acadia_nand \ - arches \ - bamboo_nand \ - canyonlands \ - canyonlands_nand \ - CPCI405 \ - CPCI4052 \ - CPCI405AB \ - CPCI405DT \ - devconcenter \ - fx12mm \ - glacier \ - haleakala \ - haleakala_nand \ - hcu4 \ - hcu5 \ - intip \ - kilauea \ - kilauea_nand \ - mcu25 \ - MIP405T \ - ml507 \ - ml507_flash \ - OCRTC \ - ORSG \ - PPChameleonEVB \ - rainier \ - sequoia \ - sequoia_nand \ - v5fx30teval \ - v5fx30teval_flash \ - W7OLMC \ - W7OLMG \ - walnut \ - xilinx-ppc440-generic \ - xilinx-ppc440-generic_flash \ - yellowstone \ - yosemite \ -" +LIST_4xx="$(boards_by_cpu ppc4xx)" ######################################################################### ## MPC8220 Systems @@ -190,146 +222,37 @@ LIST_8220="$(boards_by_cpu mpc8220)" ## MPC824x Systems ######################################################################### -LIST_824x="$(boards_by_cpu mpc824x) - CPC45 \ - eXalion \ - IDS8247 \ - linkstation_HGLAN \ - Sandpoint8240 \ - Sandpoint8245 \ -" +LIST_824x="$(boards_by_cpu mpc824x)" ######################################################################### ## MPC8260 Systems (includes 8250, 8255 etc.) ######################################################################### -LIST_8260="$(boards_by_cpu mpc8260) - cogent_mpc8260 \ - CPU86 \ - CPU87 \ - ep8248 \ - ISPAN \ - MPC8260ADS \ - MPC8272ADS \ - PM826 \ - PM828 \ - Rattler8248 \ - TQM8260_AC \ - TQM8260_AD \ - TQM8260_AE \ -" +LIST_8260="$(boards_by_cpu mpc8260)" ######################################################################### ## MPC83xx Systems (includes 8349, etc.) ######################################################################### -LIST_83xx="$(boards_by_cpu mpc83xx) - caddy2 \ - MPC8313ERDB_33 \ - MPC8313ERDB_NAND_66 \ - MPC8315ERDB \ - MPC8315ERDB_NAND \ - MPC832XEMDS \ - MPC832XEMDS_ATM \ - MPC8349ITX \ - MPC8349ITXGP \ - MPC8360EMDS \ - MPC8360EMDS_ATM \ - MPC8360ERDK_33 \ - MPC8360ERDK_66 \ - MPC837XEMDS \ - sbc8349 \ - SIMPC8313_LP \ - vme8349 \ -" - +LIST_83xx="$(boards_by_cpu mpc83xx)" ######################################################################### ## MPC85xx Systems (includes 8540, 8560 etc.) ######################################################################### -LIST_85xx="$(boards_by_cpu mpc85xx) - MPC8536DS \ - MPC8536DS_NAND \ - MPC8536DS_SDCARD \ - MPC8536DS_SPIFLASH \ - MPC8536DS_36BIT \ - MPC8540EVAL \ - MPC8541CDS \ - MPC8548CDS \ - MPC8555CDS \ - MPC8569MDS \ - MPC8569MDS_ATM \ - MPC8569MDS_NAND \ - MPC8572DS \ - MPC8572DS_36BIT \ - P2020DS \ - P2020DS_36BIT \ - P1011RDB \ - P1011RDB_NAND \ - P1011RDB_SDCARD \ - P1011RDB_SPIFLASH \ - P1020RDB \ - P1020RDB_NAND \ - P1020RDB_SDCARD \ - P1020RDB_SPIFLASH \ - P2010RDB \ - P2010RDB_NAND \ - P2010RDB_SDCARD \ - P2010RDB_SPIFLASH \ - P2020RDB \ - P2020RDB_NAND \ - P2020RDB_SDCARD \ - P2020RDB_SPIFLASH \ - sbc8540 \ - sbc8548 \ - sbc8548_PCI_33 \ - sbc8548_PCI_66 \ - sbc8548_PCI_33_PCIE \ - sbc8548_PCI_66_PCIE \ - sbc8560 \ - stxssa \ - TQM8540 \ - TQM8541 \ - TQM8548 \ - TQM8548_AG \ - TQM8548_BE \ - TQM8555 \ - TQM8560 \ -" +LIST_85xx="$(boards_by_cpu mpc85xx)" ######################################################################### ## MPC86xx Systems ######################################################################### -LIST_86xx="$(boards_by_cpu mpc86xx) - MPC8641HPCN_36BIT \ - MPC8641HPCN \ -" +LIST_86xx="$(boards_by_cpu mpc86xx)" ######################################################################### ## 74xx/7xx Systems ######################################################################### -LIST_74xx=" \ - DB64360 \ - DB64460 \ - EVB64260 \ - mpc7448hpc2 \ - P3G4 \ - p3m7448 \ - PCIPPC2 \ - PCIPPC6 \ - ZUMA \ -" - -LIST_7xx=" \ - BAB7xx \ - CPCI750 \ - ELPPC \ - p3m750 \ - ppmc7xx \ -" +LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)" ######################################################################### ## PowerPC groups @@ -353,8 +276,7 @@ LIST_powerpc=" \ ${LIST_85xx} \ ${LIST_86xx} \ ${LIST_4xx} \ - ${LIST_74xx} \ - ${LIST_7xx} \ + ${LIST_74xx_7xx}\ " # Alias "ppc" -> "powerpc" to not break compatibility with older scripts @@ -491,6 +413,8 @@ LIST_ARMV7=" \ am3517_evm \ ca9x4_ct_vxp \ devkit8000 \ + igep0020 \ + igep0030 \ mx51evk \ omap3_beagle \ omap3_overo \ @@ -783,7 +707,8 @@ print_stats() { #----------------------------------------------------------------------- -#----- for now, just run PowerPC by default ----- +# Build target groups selected by options, plus any command line args +set -- ${SELECTED} "$@" +# run PowerPC by default [ $# = 0 ] && set -- powerpc - build_targets "$@" @@ -330,18 +330,18 @@ $(obj)u-boot.ldr.srec: $(obj)u-boot.ldr $(obj)u-boot.img: $(obj)u-boot.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ - -a $(TEXT_BASE) -e 0 \ + -a $(CONFIG_SYS_TEXT_BASE) -e 0 \ -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \ sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \ -d $< $@ $(obj)u-boot.imx: $(obj)u-boot.bin $(obj)tools/mkimage -n $(IMX_CONFIG) -T imximage \ - -e $(TEXT_BASE) -d $< $@ + -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ $(obj)u-boot.kwb: $(obj)u-boot.bin $(obj)tools/mkimage -n $(KWD_CONFIG) -T kwbimage \ - -a $(TEXT_BASE) -e $(TEXT_BASE) -d $< $@ + -a $(CONFIG_SYS_TEXT_BASE) -e $(TEXT_BASE) -d $< $@ $(obj)u-boot.sha1: $(obj)u-boot.bin $(obj)tools/ubsha1 $(obj)u-boot.bin @@ -503,882 +503,6 @@ sinclude .boards.depend lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/') ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/') -#======================================================================== -# PowerPC -#======================================================================== - -######################################################################### -## MPC5xxx Systems -######################################################################### - -digsy_mtc_config \ -digsy_mtc_LOWBOOT_config \ -digsy_mtc_RAMBOOT_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/digsy_mtc - @ >$(obj)include/config.h - @[ -z "$(findstring LOWBOOT_,$@)" ] || \ - echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp - @[ -z "$(findstring RAMBOOT_,$@)" ] || \ - echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp - @$(MKCONFIG) -n $@ -a digsy_mtc powerpc mpc5xxx digsy_mtc - -galaxy5200_LOWBOOT_config \ -galaxy5200_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a galaxy5200 powerpc mpc5xxx galaxy5200 - -Lite5200_config \ -Lite5200_LOWBOOT_config \ -Lite5200_LOWBOOT08_config \ -icecube_5200_config \ -icecube_5200_LOWBOOT_config \ -icecube_5200_LOWBOOT08_config \ -icecube_5200_DDR_config \ -icecube_5200_DDR_LOWBOOT_config \ -icecube_5200_DDR_LOWBOOT08_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/icecube - @[ -z "$(findstring LOWBOOT_,$@)" ] || \ - if [ "$(findstring DDR,$@)" ] ; \ - then echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \ - else echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \ - fi - @[ -z "$(findstring LOWBOOT08,$@)" ] || \ - echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp - @[ -z "$(findstring DDR,$@)" ] || \ - echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube - -lite5200b_config \ -lite5200b_PM_config \ -lite5200b_LOWBOOT_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/icecube - @ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h - @ echo "#define CONFIG_LITE5200B" >>$(obj)include/config.h - @[ -z "$(findstring _PM_,$@)" ] || \ - echo "#define CONFIG_LITE5200B_PM" >>$(obj)include/config.h - @[ -z "$(findstring LOWBOOT_,$@)" ] || \ - echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp - @$(MKCONFIG) -n $@ -a IceCube powerpc mpc5xxx icecube - -mcc200_config \ -mcc200_SDRAM_config \ -mcc200_highboot_config \ -mcc200_COM12_config \ -mcc200_COM12_SDRAM_config \ -mcc200_COM12_highboot_config \ -mcc200_COM12_highboot_SDRAM_config \ -mcc200_highboot_SDRAM_config \ -prs200_config \ -prs200_DDR_config \ -prs200_highboot_config \ -prs200_highboot_DDR_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/mcc200 - @[ -z "$(findstring highboot,$@)" ] || \ - echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp - @[ -n "$(findstring _SDRAM,$@)" ] || \ - if [ -n "$(findstring prs200,$@)" ]; \ - then \ - if [ -z "$(findstring _DDR,$@)" ];\ - then \ - echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ;\ - fi; \ - fi - @[ -z "$(findstring _SDRAM,$@)" ] || \ - echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h - @[ -z "$(findstring COM12,$@)" ] || \ - echo "#define CONFIG_CONSOLE_COM12" >>$(obj)include/config.h - @[ -z "$(findstring prs200,$@)" ] || \ - echo "#define CONFIG_PRS200" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a mcc200 powerpc mpc5xxx mcc200 - -MVBC_P_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/mvbc_p - @ >$(obj)include/config.h - @[ -z "$(findstring MVBC_P,$@)" ] || \ - echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a $@ powerpc mpc5xxx mvbc_p matrix_vision - -MVSMR_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/matrix_vision/mvsmr - @$(MKCONFIG) $@ powerpc mpc5xxx mvsmr matrix_vision - -pcm030_config \ -pcm030_LOWBOOT_config: unconfig - @mkdir -p $(obj)include $(obj)board/phytec/pcm030 - @ >$(obj)include/config.h - @[ -z "$(findstring LOWBOOT_,$@)" ] || \ - echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp - @$(MKCONFIG) -n $@ -a pcm030 powerpc mpc5xxx pcm030 phytec - -PM520_config \ -PM520_DDR_config \ -PM520_ROMBOOT_config \ -PM520_ROMBOOT_DDR_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring DDR,$@)" ] || \ - echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h - @[ -z "$(findstring ROMBOOT,$@)" ] || \ - echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a PM520 powerpc mpc5xxx pm520 - -TB5200_B_config \ -TB5200_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _B,$@)" ] || \ - echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a TB5200 powerpc mpc5xxx tqm5200 tqc - -MINI5200_config \ -EVAL5200_config \ -TOP5200_config: unconfig - @mkdir -p $(obj)include - @ echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a TOP5200 powerpc mpc5xxx top5200 emk - -Total5200_config \ -Total5200_lowboot_config \ -Total5200_Rev2_config \ -Total5200_Rev2_lowboot_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/total5200 - @[ -n "$(findstring Rev,$@)" ] || \ - echo "#define CONFIG_TOTAL5200_REV 1" >>$(obj)include/config.h - @[ -z "$(findstring Rev2_,$@)" ] || \ - echo "#define CONFIG_TOTAL5200_REV 2" >>$(obj)include/config.h - @[ -z "$(findstring lowboot_,$@)" ] || \ - echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp - @$(MKCONFIG) -n $@ -a Total5200 powerpc mpc5xxx total5200 - -cam5200_config \ -cam5200_niosflash_config \ -fo300_config \ -MiniFAP_config \ -TQM5200S_config \ -TQM5200S_HIGHBOOT_config \ -TQM5200_B_config \ -TQM5200_B_HIGHBOOT_config \ -TQM5200_config \ -TQM5200_STK100_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/tqc/tqm5200 - @[ -z "$(findstring cam5200,$@)" ] || \ - { echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \ - echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \ - echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \ - } - @[ -z "$(findstring niosflash,$@)" ] || \ - echo "#define CONFIG_CAM5200_NIOSFLASH" >>$(obj)include/config.h - @[ -z "$(findstring fo300,$@)" ] || \ - echo "#define CONFIG_FO300" >>$(obj)include/config.h - @[ -z "$(findstring MiniFAP,$@)" ] || \ - echo "#define CONFIG_MINIFAP" >>$(obj)include/config.h - @[ -z "$(findstring STK100,$@)" ] || \ - echo "#define CONFIG_STK52XX_REV100" >>$(obj)include/config.h - @[ -z "$(findstring TQM5200_B,$@)" ] || \ - echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h - @[ -z "$(findstring TQM5200S,$@)" ] || \ - { echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \ - echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \ - } - @[ -z "$(findstring HIGHBOOT,$@)" ] || \ - echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp - @$(MKCONFIG) -n $@ -a TQM5200 powerpc mpc5xxx tqm5200 tqc - -######################################################################### -## MPC512x Systems -######################################################################### - -mpc5121ads_config \ -mpc5121ads_rev2_config \ - : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring rev2,$@)" ] ; then \ - echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ - fi - @$(MKCONFIG) -n $@ -a mpc5121ads powerpc mpc512x mpc5121ads freescale - -######################################################################### -## MPC8xx Systems -######################################################################### - -Adder87x_config \ -AdderII_config \ -AdderUSB_config \ -Adder_config \ - : unconfig - @mkdir -p $(obj)include - $(if $(findstring AdderII,$@), \ - @echo "#define CONFIG_MPC852T" > $(obj)include/config.h) - @$(MKCONFIG) -n $@ -a Adder powerpc mpc8xx adder - -ADS860_config \ -FADS823_config \ -FADS850SAR_config \ -MPC86xADS_config \ -MPC885ADS_config \ -FADS860T_config: unconfig - @$(MKCONFIG) -n $@ $@ powerpc mpc8xx fads - -GEN860T_SC_config \ -GEN860T_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _SC,$@)" ] || \ - echo "#define CONFIG_SC" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a GEN860T powerpc mpc8xx gen860t - -ICU862_100MHz_config \ -ICU862_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _100MHz,$@)" ] || \ - echo "#define CONFIG_100MHz" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a ICU862 powerpc mpc8xx icu862 - -IVML24_256_config \ -IVML24_128_config \ -IVML24_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring IVML24_config,$@)" ] || \ - echo "#define CONFIG_IVML24_16M" >>$(obj)include/config.h - @[ -z "$(findstring IVML24_128_config,$@)" ] || \ - echo "#define CONFIG_IVML24_32M" >>$(obj)include/config.h - @[ -z "$(findstring IVML24_256_config,$@)" ] || \ - echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a IVML24 powerpc mpc8xx ivm - -IVMS8_256_config \ -IVMS8_128_config \ -IVMS8_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring IVMS8_config,$@)" ] || \ - echo "#define CONFIG_IVMS8_16M" >>$(obj)include/config.h - @[ -z "$(findstring IVMS8_128_config,$@)" ] || \ - echo "#define CONFIG_IVMS8_32M" >>$(obj)include/config.h - @[ -z "$(findstring IVMS8_256_config,$@)" ] || \ - echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a IVMS8 powerpc mpc8xx ivm - -MBX_config \ -MBX860T_config: unconfig - @$(MKCONFIG) -n $@ $@ powerpc mpc8xx mbx8xx - -NETVIA_V2_config \ -NETVIA_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring NETVIA_config,$@)" ] || \ - echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h - @[ -z "$(findstring NETVIA_V2_config,$@)" ] || \ - echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a NETVIA powerpc mpc8xx netvia - -NETPHONE_V2_config \ -NETPHONE_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring NETPHONE_config,$@)" ] || \ - echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h - @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \ - echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a NETPHONE powerpc mpc8xx netphone - -NETTA_ISDN_6412_SWAPHOOK_config \ -NETTA_ISDN_SWAPHOOK_config \ -NETTA_6412_SWAPHOOK_config \ -NETTA_SWAPHOOK_config \ -NETTA_ISDN_6412_config \ -NETTA_ISDN_config \ -NETTA_6412_config \ -NETTA_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring ISDN_,$@)" ] || \ - echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h - @[ -n "$(findstring ISDN_,$@)" ] || \ - echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h - @[ -z "$(findstring 6412_,$@)" ] || \ - echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h - @[ -n "$(findstring 6412_,$@)" ] || \ - echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h - @[ -z "$(findstring SWAPHOOK_,$@)" ] || \ - echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h - @[ -n "$(findstring SWAPHOOK_,$@)" ] || \ - echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a NETTA powerpc mpc8xx netta - -NETTA2_V2_config \ -NETTA2_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring NETTA2_config,$@)" ] || \ - echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h - @[ -z "$(findstring NETTA2_V2_config,$@)" ] || \ - echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a NETTA2 powerpc mpc8xx netta2 - -NC650_Rev1_config \ -NC650_Rev2_config \ -CP850_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring CP850,$@)" ] || \ - { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \ - echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \ - } - @[ -z "$(findstring Rev1,$@)" ] || \ - { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \ - } - @[ -z "$(findstring Rev2,$@)" ] || \ - { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \ - } - @$(MKCONFIG) -n $@ -a NC650 powerpc mpc8xx nc650 - -RPXlite_DW_64_config \ -RPXlite_DW_LCD_config \ -RPXlite_DW_64_LCD_config \ -RPXlite_DW_NVRAM_config \ -RPXlite_DW_NVRAM_64_config \ -RPXlite_DW_NVRAM_LCD_config \ -RPXlite_DW_NVRAM_64_LCD_config \ -RPXlite_DW_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _64,$@)" ] || \ - echo "#define RPXlite_64MHz" >>$(obj)include/config.h - @[ -z "$(findstring _LCD,$@)" ] || \ - { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \ - echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \ - } - @[ -z "$(findstring _NVRAM,$@)" ] || \ - echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a RPXlite_DW powerpc mpc8xx RPXlite_dw - -RRvision_LCD_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_LCD" >$(obj)include/config.h - @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h - @$(MKCONFIG) -a RRvision powerpc mpc8xx RRvision - -SPD823TS_config: unconfig - @$(MKCONFIG) $@ powerpc mpc8xx spd8xx - -SXNI855T_config: unconfig - @$(MKCONFIG) $@ powerpc mpc8xx sixnet - -# Play some tricks for configuration selection -# Only 855 and 860 boards may come with FEC -# and only 823 boards may have LCD support -xtract_8xx = $(subst _LCD,,$1) - -FPS850L_config \ -FPS860L_config \ -NSCU_config \ -TQM823L_config \ -TQM823L_LCD_config \ -TQM850L_config \ -TQM855L_config \ -TQM860L_config \ -TQM862L_config \ -TQM823M_config \ -TQM850M_config \ -TQM855M_config \ -TQM860M_config \ -TQM862M_config \ -TQM866M_config \ -TQM885D_config \ -TK885D_config \ -virtlab2_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _LCD,$@)" ] || \ - { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \ - echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \ - } - @$(MKCONFIG) -n $@ -a $(call xtract_8xx,$@) powerpc mpc8xx tqm8xx tqc - -TTTech_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_LCD" >$(obj)include/config.h - @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h - @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc - -v37_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_LCD" >$(obj)include/config.h - @echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h - @$(MKCONFIG) $@ powerpc mpc8xx v37 - -wtk_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_LCD" >$(obj)include/config.h - @echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h - @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc - -######################################################################### -## PPC4xx Systems -######################################################################### - -acadia_nand_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/acadia - @mkdir -p $(obj)nand_spl/board/amcc/acadia - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a acadia powerpc ppc4xx acadia amcc - -bamboo_nand_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/bamboo - @mkdir -p $(obj)nand_spl/board/amcc/bamboo - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc - -# Arches, Canyonlands & Glacier use different U-Boot images -arches_config \ -canyonlands_config \ -glacier_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc - -canyonlands_nand_config \ -glacier_nand_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/canyonlands - @mkdir -p $(obj)nand_spl/board/amcc/canyonlands - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \ - tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc - -CATcenter_config \ -CATcenter_25_config \ -CATcenter_33_config: unconfig - @mkdir -p $(obj)include - @echo "/* CATcenter uses PPChameleon Model ME */" > $(obj)include/config.h - @echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h - @[ -z "$(findstring _25,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h - @[ -z "$(findstring _33,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a CATcenter powerpc ppc4xx PPChameleonEVB dave - -CPCI405_config \ -CPCI4052_config \ -CPCI405DT_config \ -CPCI405AB_config: unconfig - @mkdir -p $(obj)board/esd/cpci405 - @$(MKCONFIG) -n $@ $@ powerpc ppc4xx cpci405 esd - -fx12mm_flash_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic - @mkdir -p $(obj)include $(obj)board/avnet/fx12mm - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\ - > $(obj)board/avnet/fx12mm/config.tmp - @echo "TEXT_BASE := 0xFFCB0000" \ - >> $(obj)board/avnet/fx12mm/config.tmp - @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet - -fx12mm_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic - @mkdir -p $(obj)include $(obj)board/avnet/fx12mm - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\ - > $(obj)board/avnet/fx12mm/config.tmp - @echo "TEXT_BASE := 0x03000000" \ - >> $(obj)board/avnet/fx12mm/config.tmp - @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet - -# Compact-Center(codename intip) & DevCon-Center use different U-Boot images -intip_config \ -devconcenter_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a intip powerpc ppc4xx intip gdsys - -hcu4_config \ -hcu5_config \ -mcu25_config: unconfig - @mkdir -p $(obj)board/netstal/common - @$(MKCONFIG) $@ powerpc ppc4xx $(call lcname,$@) netstal - -# Kilauea & Haleakala images are identical (recognized via PVR) -kilauea_config \ -haleakala_config: unconfig - @$(MKCONFIG) -n $@ kilauea powerpc ppc4xx kilauea amcc - -kilauea_nand_config \ -haleakala_nand_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/kilauea - @mkdir -p $(obj)nand_spl/board/amcc/kilauea - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc - -MIP405T_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_MIP405T" >$(obj)include/config.h - @$(XECHO) "Enable subset config for MIP405T" - @$(MKCONFIG) -a MIP405 powerpc ppc4xx mip405 mpl - -ml507_flash_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @mkdir -p $(obj)include $(obj)board/xilinx/ml507 - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\ - > $(obj)board/xilinx/ml507/config.tmp - @echo "TEXT_BASE := 0xFE360000" \ - >> $(obj)board/xilinx/ml507/config.tmp - @$(MKCONFIG) ml507 powerpc ppc4xx ml507 xilinx - -ml507_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @mkdir -p $(obj)include $(obj)board/xilinx/ml507 - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\ - > $(obj)board/xilinx/ml507/config.tmp - @echo "TEXT_BASE := 0x04000000" \ - >> $(obj)board/xilinx/ml507/config.tmp - @$(MKCONFIG) $@ powerpc ppc4xx ml507 xilinx - -OCRTC_config \ -ORSG_config: unconfig - @$(MKCONFIG) -n $@ $@ powerpc ppc4xx ocrtc esd - -PPChameleonEVB_config \ -PPChameleonEVB_BA_25_config \ -PPChameleonEVB_ME_25_config \ -PPChameleonEVB_HI_25_config \ -PPChameleonEVB_BA_33_config \ -PPChameleonEVB_ME_33_config \ -PPChameleonEVB_HI_33_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring EVB_BA,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h - @[ -z "$(findstring EVB_ME,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h - @[ -z "$(findstring EVB_HI,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h - @[ -z "$(findstring _25,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h - @[ -z "$(findstring _33,$@)" ] || \ - echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave - -sequoia_config \ -rainier_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc - -sequoia_nand_config \ -rainier_nand_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/sequoia - @mkdir -p $(obj)nand_spl/board/amcc/sequoia - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc - -sequoia_ramboot_config \ -rainier_ramboot_config: unconfig - @mkdir -p $(obj)include $(obj)board/amcc/sequoia - @echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp - @echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \ - $(obj)board/amcc/sequoia/config.tmp - @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc - -v5fx30teval_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\ - > $(obj)board/avnet/v5fx30teval/config.tmp - @echo "TEXT_BASE := 0x03000000" \ - >> $(obj)board/avnet/v5fx30teval/config.tmp - @$(MKCONFIG) $@ powerpc ppc4xx v5fx30teval avnet - -v5fx30teval_flash_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\ - > $(obj)board/avnet/v5fx30teval/config.tmp - @echo "TEXT_BASE := 0xFF1C0000" \ - >> $(obj)board/avnet/v5fx30teval/config.tmp - @$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet - -W7OLMC_config \ -W7OLMG_config: unconfig - @$(MKCONFIG) $@ powerpc ppc4xx w7o - -# Walnut & Sycamore images are identical (recognized via PVR) -walnut_config \ -sycamore_config: unconfig - @$(MKCONFIG) -n $@ walnut powerpc ppc4xx walnut amcc - -xilinx-ppc405-generic_flash_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\ - > $(obj)board/xilinx/ppc405-generic/config.tmp - @echo "TEXT_BASE := 0xFE360000" \ - >> $(obj)board/xilinx/ppc405-generic/config.tmp - @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - -xilinx-ppc405-generic_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\ - > $(obj)board/xilinx/ppc405-generic/config.tmp - @echo "TEXT_BASE := 0x04000000" \ - >> $(obj)board/xilinx/ppc405-generic/config.tmp - @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - -xilinx-ppc440-generic_flash_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\ - > $(obj)board/xilinx/ppc440-generic/config.tmp - @echo "TEXT_BASE := 0xFE360000" \ - >> $(obj)board/xilinx/ppc440-generic/config.tmp - @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - -xilinx-ppc440-generic_config: unconfig - @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic - @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\ - > $(obj)board/xilinx/ppc440-generic/config.tmp - @echo "TEXT_BASE := 0x04000000" \ - >> $(obj)board/xilinx/ppc440-generic/config.tmp - @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - -yosemite_config \ -yellowstone_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ - tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a yosemite powerpc ppc4xx yosemite amcc - -######################################################################### -## MPC824x Systems -######################################################################### - -eXalion_config: unconfig - @$(MKCONFIG) $(@:_config=) powerpc mpc824x eXalion - -CPC45_config \ -CPC45_ROMBOOT_config: unconfig - @mkdir -p $(obj)include ; \ - if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ - echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \ - else \ - echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \ - fi; \ - echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk; - @$(MKCONFIG) -n $@ CPC45 powerpc mpc824x cpc45 - -# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as -# time permits. -#linkstation_HDLAN_config \ -# Remove this line when HDLAN is fixed -linkstation_HGLAN_config: unconfig - @mkdir -p $(obj)include - @case $@ in \ - *HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \ - *HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \ - esac - @$(MKCONFIG) -n $@ -a linkstation powerpc mpc824x linkstation - -Sandpoint8240_config: unconfig - @$(MKCONFIG) $@ powerpc mpc824x sandpoint - -Sandpoint8245_config: unconfig - @$(MKCONFIG) $@ powerpc mpc824x sandpoint - -######################################################################### -## MPC8260 Systems -######################################################################### - -cogent_mpc8260_config: unconfig - @$(MKCONFIG) $(@:_config=) powerpc mpc8260 cogent - -CPU86_config \ -CPU86_ROMBOOT_config: unconfig - @mkdir -p $(obj)include ; \ - if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ - echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \ - else \ - echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \ - fi; \ - echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk; - @$(MKCONFIG) -n $@ CPU86 powerpc mpc8260 cpu86 - -CPU87_config \ -CPU87_ROMBOOT_config: unconfig - @mkdir -p $(obj)include ; \ - if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ - echo "CONFIG_BOOT_ROM = y" >> $(obj)include/config.mk ; \ - else \ - echo "CONFIG_BOOT_ROM = n" >> $(obj)include/config.mk ; \ - fi; \ - echo "export CONFIG_BOOT_ROM" >> $(obj)include/config.mk; - @$(MKCONFIG) -n $@ CPU87 powerpc mpc8260 cpu87 - -ep8248_config \ -ep8248E_config : unconfig - @$(MKCONFIG) -n $@ ep8248 powerpc mpc8260 ep8248 - -ISPAN_config \ -ISPAN_REVB_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _REVB_,$@)" ] ; then \ - echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a ISPAN powerpc mpc8260 ispan - -MPC8260ADS_config \ -MPC8260ADS_lowboot_config \ -MPC8260ADS_33MHz_config \ -MPC8260ADS_33MHz_lowboot_config \ -MPC8260ADS_40MHz_config \ -MPC8260ADS_40MHz_lowboot_config \ -MPC8272ADS_config \ -MPC8272ADS_lowboot_config \ -PQ2FADS_config \ -PQ2FADS_lowboot_config \ -PQ2FADS-VR_config \ -PQ2FADS-VR_lowboot_config \ -PQ2FADS-ZU_config \ -PQ2FADS-ZU_lowboot_config \ -PQ2FADS-ZU_66MHz_config \ -PQ2FADS-ZU_66MHz_lowboot_config \ - : unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/mpc8260ads - $(if $(findstring PQ2FADS,$@), \ - @echo "#define CONFIG_ADSTYPE CONFIG_SYS_PQ2FADS" > $(obj)include/config.h, \ - @echo "#define CONFIG_ADSTYPE CONFIG_SYS_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h) - $(if $(findstring MHz,$@), \ - @echo "#define CONFIG_8260_CLKIN" $(subst MHz,,$(word 2,$(subst _, ,$@)))"000000" >> $(obj)include/config.h, \ - $(if $(findstring VR,$@), \ - @echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h)) - @[ -z "$(findstring lowboot_,$@)" ] || \ - echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp - @$(MKCONFIG) -n $@ -a MPC8260ADS powerpc mpc8260 mpc8260ads freescale - -muas3001_dev_config \ -muas3001_config : unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/muas3001 - @if [ "$(findstring dev,$@)" ] ; then \ - echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a muas3001 powerpc mpc8260 muas3001 - -# PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash -PM825_config \ -PM825_ROMBOOT_config \ -PM825_BIGFLASH_config \ -PM825_ROMBOOT_BIGFLASH_config \ -PM826_config \ -PM826_ROMBOOT_config \ -PM826_BIGFLASH_config \ -PM826_ROMBOOT_BIGFLASH_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/pm826 - @if [ "$(findstring PM825_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >$(obj)include/config.h ; \ - else \ - >$(obj)include/config.h ; \ - fi - @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ - echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \ - echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \ - if [ "$(findstring _BIGFLASH_,$@)" ] ; then \ - echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \ - fi; \ - else \ - if [ "$(findstring _BIGFLASH_,$@)" ] ; then \ - $(XECHO) "... with 32 MB Flash" ; \ - echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \ - echo "TEXT_BASE = 0x40000000" >$(obj)board/pm826/config.tmp ; \ - else \ - echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \ - fi; \ - fi - @$(MKCONFIG) -n $@ -a PM826 powerpc mpc8260 pm826 - -PM828_config \ -PM828_PCI_config \ -PM828_ROMBOOT_config \ -PM828_ROMBOOT_PCI_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/pm826 - @if [ "$(findstring _PCI_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - fi - @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ - echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \ - echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \ - fi - @$(MKCONFIG) -n $@ -a PM828 powerpc mpc8260 pm828 - -Rattler8248_config \ -Rattler_config: unconfig - @mkdir -p $(obj)include - $(if $(findstring 8248,$@), \ - @echo "#define CONFIG_MPC8248" > $(obj)include/config.h) - @$(MKCONFIG) -n $@ -a Rattler powerpc mpc8260 rattler - -TQM8255_AA_config \ -TQM8260_AA_config \ -TQM8260_AB_config \ -TQM8260_AC_config \ -TQM8260_AD_config \ -TQM8260_AE_config \ -TQM8260_AF_config \ -TQM8260_AG_config \ -TQM8260_AH_config \ -TQM8260_AI_config \ -TQM8265_AA_config: unconfig - @mkdir -p $(obj)include - @case "$@" in \ - TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no; BMODE=8260;; \ - TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no; BMODE=8260;; \ - TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \ - TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \ - TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \ - TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no; BMODE=8260;; \ - TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \ - TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=8260;; \ - TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;; \ - TQM8260_AI_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \ - TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no; BMODE=60x;; \ - esac; \ - if [ "$${CTYPE}" != "MPC8260" ] ; then \ - echo "#define CONFIG_$${CTYPE}" >>$(obj)include/config.h ; \ - fi; \ - echo "#define CONFIG_$${CFREQ}MHz" >>$(obj)include/config.h ; \ - if [ "$${CACHE}" = "yes" ] ; then \ - echo "#define CONFIG_L2_CACHE" >>$(obj)include/config.h ; \ - else \ - echo "#undef CONFIG_L2_CACHE" >>$(obj)include/config.h ; \ - fi; \ - if [ "$${BMODE}" = "60x" ] ; then \ - echo "#define CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \ - else \ - echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a TQM8260 powerpc mpc8260 tqm8260 tqc - -VoVPN-GW_66MHz_config \ -VoVPN-GW_100MHz_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h - @$(MKCONFIG) -n $@ -a VoVPN-GW powerpc mpc8260 vovpn-gw funkwerk - ######################################################################### ## Coldfire ######################################################################### @@ -1397,13 +521,13 @@ M52277EVB_stmicro_config : unconfig esac; \ if [ "$${FLASH}" = "SPANSION" ] ; then \ echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \ cp $(obj)board/freescale/m52277evb/u-boot.spa $(obj)board/freescale/m52277evb/u-boot.lds ; \ fi; \ if [ "$${FLASH}" = "STMICRO" ] ; then \ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \ cp $(obj)board/freescale/m52277evb/u-boot.stm $(obj)board/freescale/m52277evb/u-boot.lds ; \ fi @$(MKCONFIG) -n $@ -a M52277EVB m68k mcf5227x m52277evb freescale @@ -1418,10 +542,10 @@ M5235EVB_Flash32_config: unconfig esac; \ if [ "$${FLASH}" != "16" ] ; then \ echo "#define NORFLASH_PS32BIT 1" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ cp $(obj)board/freescale/m5235evb/u-boot.32 $(obj)board/freescale/m5235evb/u-boot.lds ; \ else \ - echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \ cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \ fi @$(MKCONFIG) -n $@ -a M5235EVB m68k mcf523x m5235evb freescale @@ -1432,13 +556,13 @@ cobra5272_config : unconfig EB+MCF-EV123_config : unconfig @mkdir -p $(obj)include @mkdir -p $(obj)board/BuS/EB+MCF-EV123 - @echo "TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk + @echo "CONFIG_SYS_TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS EB+MCF-EV123_internal_config : unconfig @mkdir -p $(obj)include @mkdir -p $(obj)board/BuS/EB+MCF-EV123 - @echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk + @echo "CONFIG_SYS_TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk @$(MKCONFIG) -n $@ EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS M5329AFEE_config \ @@ -1468,13 +592,13 @@ M54451EVB_stmicro_config : unconfig M54451EVB_stmicro_config) FLASH=STMICRO;; \ esac; \ if [ "$${FLASH}" = "NOR" ] ; then \ - echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \ cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \ fi; \ if [ "$${FLASH}" = "STMICRO" ] ; then \ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \ cp $(obj)board/freescale/m54451evb/u-boot.stm $(obj)board/freescale/m54451evb/u-boot.lds ; \ fi; \ echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ; @@ -1500,18 +624,18 @@ M54455EVB_stm33_config : unconfig esac; \ if [ "$${FLASH}" = "INTEL" ] ; then \ echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \ fi; \ if [ "$${FLASH}" = "ATMEL" ] ; then \ echo "#define CONFIG_SYS_ATMEL_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \ fi; \ if [ "$${FLASH}" = "STMICRO" ] ; then \ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \ cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \ fi; \ echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ @@ -1585,299 +709,6 @@ M5485HFE_config : unconfig fi @$(MKCONFIG) -n $@ -a M5485EVB m68k mcf547x_8x m548xevb freescale -######################################################################### -## MPC83xx Systems -######################################################################### - -MPC8313ERDB_33_config \ -MPC8313ERDB_66_config \ -MPC8313ERDB_NAND_33_config \ -MPC8313ERDB_NAND_66_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/mpc8313erdb - @if [ "$(findstring _33_,$@)" ] ; then \ - echo "#define CONFIG_SYS_33MHZ" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _66_,$@)" ] ; then \ - echo "#define CONFIG_SYS_66MHZ" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _NAND_,$@)" ] ; then \ - echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \ - echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \ - fi ; - @if [ "$(findstring _NAND_,$@)" ] ; then \ - echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \ - fi ; - @$(MKCONFIG) -n $@ -a MPC8313ERDB powerpc mpc83xx mpc8313erdb freescale - -MPC8315ERDB_NAND_config \ -MPC8315ERDB_config: unconfig - @$(MKCONFIG) -n $@ -t $@ MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - -MPC832XEMDS_config \ -MPC832XEMDS_HOST_33_config \ -MPC832XEMDS_HOST_66_config \ -MPC832XEMDS_SLAVE_config \ -MPC832XEMDS_ATM_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _HOST_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _SLAVE_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _33_,$@)" ] ; then \ - echo "#define PCI_33M" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _66_,$@)" ] ; then \ - echo "#define PCI_66M" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _ATM_,$@)" ] ; then \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \ - fi ; - @$(MKCONFIG) -n $@ -a MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - -MPC8349ITX_config \ -MPC8349ITX_LOWBOOT_config \ -MPC8349ITXGP_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/freescale/mpc8349itx - @echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h - @if [ "$(findstring GP,$@)" ] ; then \ - echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \ - fi - @if [ "$(findstring LOWBOOT,$@)" ] ; then \ - echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8349ITX powerpc mpc83xx mpc8349itx freescale - -MPC8360EMDS_config \ -MPC8360EMDS_HOST_33_config \ -MPC8360EMDS_HOST_66_config \ -MPC8360EMDS_SLAVE_config \ -MPC8360EMDS_ATM_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _HOST_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _SLAVE_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _33_,$@)" ] ; then \ - echo "#define PCI_33M" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _66_,$@)" ] ; then \ - echo "#define PCI_66M" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _ATM_,$@)" ] ; then \ - echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ - echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \ - fi ; - @$(MKCONFIG) -n $@ -a MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - -MPC8360ERDK_33_config \ -MPC8360ERDK_66_config \ -MPC8360ERDK_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _33_,$@)" ] ; then \ - echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\ - fi ; - @$(MKCONFIG) -n $@ -a MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - -MPC837XEMDS_config \ -MPC837XEMDS_HOST_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _HOST_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - fi ; - @$(MKCONFIG) -n $@ -a MPC837XEMDS powerpc mpc83xx mpc837xemds freescale - -sbc8349_config \ -sbc8349_PCI_33_config \ -sbc8349_PCI_66_config: unconfig - @$(MKCONFIG) -n $@ -t $@ sbc8349 powerpc mpc83xx sbc8349 - -SIMPC8313_LP_config \ -SIMPC8313_SP_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/sheldon/simpc8313 - @if [ "$(findstring _LP_,$@)" ] ; then \ - echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _SP_,$@)" ] ; then \ - echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \ - fi ; - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @$(MKCONFIG) -n $@ -a SIMPC8313 powerpc mpc83xx simpc8313 sheldon - -caddy2_config \ -vme8349_config: unconfig - @$(MKCONFIG) -n $@ -t $@ vme8349 powerpc mpc83xx vme8349 esd - -######################################################################### -## MPC85xx Systems -######################################################################### - -MPC8536DS_NAND_config \ -MPC8536DS_SDCARD_config \ -MPC8536DS_SPIFLASH_config \ -MPC8536DS_36BIT_config \ -MPC8536DS_config: unconfig - @$(MKCONFIG) -n $@ -t $@ MPC8536DS powerpc mpc85xx mpc8536ds freescale - -MPC8540EVAL_config \ -MPC8540EVAL_33_config \ -MPC8540EVAL_66_config \ -MPC8540EVAL_33_slave_config \ -MPC8540EVAL_66_slave_config: unconfig - @mkdir -p $(obj)include - @if [ -z "$(findstring _33_,$@)" ] ; then \ - echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \ - fi ; \ - if [ "$(findstring _slave_,$@)" ] ; then \ - echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8540EVAL powerpc mpc85xx mpc8540eval - -MPC8541CDS_legacy_config \ -MPC8541CDS_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _legacy_,$@)" ] ; then \ - echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8541CDS powerpc mpc85xx mpc8541cds freescale - -MPC8548CDS_legacy_config \ -MPC8548CDS_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _legacy_,$@)" ] ; then \ - echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8548CDS powerpc mpc85xx mpc8548cds freescale - -MPC8555CDS_legacy_config \ -MPC8555CDS_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _legacy_,$@)" ] ; then \ - echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8555CDS powerpc mpc85xx mpc8555cds freescale - -MPC8569MDS_ATM_config \ -MPC8569MDS_NAND_config \ -MPC8569MDS_config: unconfig - @$(MKCONFIG) -n $@ -t $@ MPC8569MDS powerpc mpc85xx mpc8569mds freescale - -MPC8572DS_36BIT_config \ -MPC8572DS_config: unconfig - @$(MKCONFIG) -n $@ -t $@ MPC8572DS powerpc mpc85xx mpc8572ds freescale - -P2020DS_36BIT_config \ -P2020DS_config: unconfig - @$(MKCONFIG) -n $@ -t $@ P2020DS powerpc mpc85xx p2020ds freescale - -P1011RDB_config \ -P1011RDB_NAND_config \ -P1011RDB_SDCARD_config \ -P1011RDB_SPIFLASH_config \ -P1020RDB_config \ -P1020RDB_NAND_config \ -P1020RDB_SDCARD_config \ -P1020RDB_SPIFLASH_config \ -P2010RDB_config \ -P2010RDB_NAND_config \ -P2010RDB_SDCARD_config \ -P2010RDB_SPIFLASH_config \ -P2020DS_DDR2_config \ -P2020RDB_config \ -P2020RDB_NAND_config \ -P2020RDB_SDCARD_config \ -P2020RDB_SPIFLASH_config: unconfig - @$(MKCONFIG) -n $@ -t $@ P1_P2_RDB powerpc mpc85xx p1_p2_rdb freescale - -sbc8540_config \ -sbc8540_33_config \ -sbc8540_66_config: unconfig - @$(MKCONFIG) -n $@ -t $@ SBC8540 powerpc mpc85xx sbc8560 - -sbc8548_config \ -sbc8548_PCI_33_config \ -sbc8548_PCI_66_config \ -sbc8548_PCI_33_PCIE_config \ -sbc8548_PCI_66_PCIE_config: unconfig - @$(MKCONFIG) -n $@ -t $@ sbc8548 powerpc mpc85xx sbc8548 - -sbc8560_config \ -sbc8560_33_config \ -sbc8560_66_config: unconfig - @$(MKCONFIG) -n $@ -t $@ sbc8560 powerpc mpc85xx sbc8560 - -stxssa_config \ -stxssa_4M_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _4M_,$@)" ] ; then \ - echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a stxssa powerpc mpc85xx stxssa stx - -TQM8540_config \ -TQM8541_config \ -TQM8548_config \ -TQM8548_AG_config \ -TQM8548_BE_config \ -TQM8555_config \ -TQM8560_config: unconfig - @mkdir -p $(obj)include - @BTYPE=$(@:_config=); \ - CTYPE=$(subst TQM,,$(subst _AG,,$(subst _BE,,$(@:_config=)))); \ - echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \ - echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \ - echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \ - echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h; - @echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk; - @$(MKCONFIG) -n $@ -a TQM85xx powerpc mpc85xx tqm85xx tqc - -######################################################################### -## MPC86xx Systems -######################################################################### - -MPC8641HPCN_36BIT_config \ -MPC8641HPCN_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _36BIT_,$@)" ] ; then \ - echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale - -######################################################################### -## 74xx/7xx Systems -######################################################################### - -EVB64260_config \ -EVB64260_750CX_config: unconfig - @$(MKCONFIG) -n $@ EVB64260 powerpc 74xx_7xx evb64260 - -p3m750_config \ -p3m7448_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring 750_,$@)" ] ; then \ - echo "#define CONFIG_P3M750" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \ - fi - @$(MKCONFIG) -n $@ -a p3mx powerpc 74xx_7xx p3mx prodrive - -PCIPPC2_config \ -PCIPPC6_config: unconfig - @$(MKCONFIG) -n $@ $@ powerpc 74xx_7xx pcippc2 - #======================================================================== # ARM #======================================================================== @@ -2135,12 +966,12 @@ trab_old_config: unconfig @[ -z "$(findstring _bigflash,$@)" ] || \ { echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \ echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \ - echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \ } @[ -z "$(findstring _old,$@)" ] || \ { echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \ echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \ - echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \ + echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \ } @$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0 @@ -2420,7 +1251,7 @@ sh7785lcr_config : unconfig @echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h @if [ "$(findstring 32bit, $@)" ] ; then \ echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \ - echo "TEXT_BASE = 0x8ff80000" > \ + echo "CONFIG_SYS_TEXT_BASE = 0x8ff80000" > \ $(obj)board/renesas/sh7785lcr/config.tmp ; \ fi @$(MKCONFIG) -n $@ -a sh7785lcr sh sh4 sh7785lcr renesas @@ -2458,6 +1289,7 @@ clean: $(obj)tools/mkimage $(obj)tools/mpc86x_clk \ $(obj)tools/ncb $(obj)tools/ubsha1 @rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \ + $(obj)board/matrix_vision/*/bootscript.img \ $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \ $(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \ $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ @@ -2248,7 +2248,7 @@ Configuration Settings: - CONFIG_SYS_MONITOR_BASE: Physical start address of boot monitor code (set by make config files to be same as the text base address - (TEXT_BASE) used when linking) - same as + (CONFIG_SYS_TEXT_BASE) used when linking) - same as CONFIG_SYS_FLASH_BASE when booting from flash. - CONFIG_SYS_MONITOR_LEN: @@ -2275,6 +2275,19 @@ Configuration Settings: all data for the Linux kernel must be between "bootm_low" and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. +- CONFIG_SYS_BOOT_RAMDISK_HIGH: + Enable initrd_high functionality. If defined then the + initrd_high feature is enabled and the bootm ramdisk subcommand + is enabled. + +- CONFIG_SYS_BOOT_GET_CMDLINE: + Enables allocating and saving kernel cmdline in space between + "bootm_low" and "bootm_low" + BOOTMAPSZ. + +- CONFIG_SYS_BOOT_GET_KBD: + Enables allocating and saving a kernel copy of the bd_info in + space between "bootm_low" and "bootm_low" + BOOTMAPSZ. + - CONFIG_SYS_MAX_FLASH_BANKS: Max number of Flash memory banks @@ -2534,18 +2547,32 @@ to save the current settings. - CONFIG_ENV_SIZE: These two #defines specify the offset and size of the environment - area within the first NAND device. + area within the first NAND device. CONFIG_ENV_OFFSET must be + aligned to an erase block boundary. - - CONFIG_ENV_OFFSET_REDUND + - CONFIG_ENV_OFFSET_REDUND (optional): This setting describes a second storage area of CONFIG_ENV_SIZE - size used to hold a redundant copy of the environment data, - so that there is a valid backup copy in case there is a - power failure during a "saveenv" operation. - - Note: CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND must be aligned - to a block boundary, and CONFIG_ENV_SIZE must be a multiple of - the NAND devices block size. + size used to hold a redundant copy of the environment data, so + that there is a valid backup copy in case there is a power failure + during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + aligned to an erase block boundary. + + - CONFIG_ENV_RANGE (optional): + + Specifies the length of the region in which the environment + can be written. This should be a multiple of the NAND device's + block size. Specifying a range with more erase blocks than + are needed to hold CONFIG_ENV_SIZE allows bad blocks within + the range to be avoided. + + - CONFIG_ENV_OFFSET_OOB (optional): + + Enables support for dynamically retrieving the offset of the + environment from block zero's out-of-band data. The + "nand env.oob" command can be used to record this offset. + Currently, CONFIG_ENV_OFFSET_REDUND is not supported when + using CONFIG_ENV_OFFSET_OOB. - CONFIG_NAND_ENV_DST diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 1415d6c..cbe8243 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -23,6 +23,7 @@ #include <common.h> #include <asm/arch/mx31-regs.h> +#include <asm/io.h> static u32 mx31_decode_pll(u32 reg, u32 infreq) { @@ -90,6 +91,22 @@ void mx31_gpio_mux(unsigned long mode) __REG(reg) = tmp; } +void mx31_set_pad(enum iomux_pins pin, u32 config) +{ + u32 field, l; + void *reg; + + pin &= IOMUX_PADNUM_MASK; + reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4; + field = (pin + 2) % 3; + + l = __raw_readl(reg); + l &= ~(0x1ff << (field * 10)); + l |= config << (field * 10); + __raw_writel(l, reg); + +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo (void) { diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index a86114b..29ed065 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -87,7 +87,7 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 6277ae0..24e5bf4 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -97,7 +97,7 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE /* * Below variable is very important because we use MMU in U-Boot. @@ -205,7 +205,7 @@ cpu_init_crit: /* Prepare to disable the MMU */ adr r2, mmu_disable_phys - sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE) + sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) b mmu_disable .align 5 @@ -444,7 +444,7 @@ cpu_init_crit: /* Prepare to disable the MMU */ adr r2, mmu_disable_phys - sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE) + sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) b mmu_disable .align 5 diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 6a8d57b..d93911f 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -77,7 +77,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start @@ -298,11 +298,11 @@ relocate: /* relocate U-Boot to RAM */ cmp r0, r1 /* don't reloc during debug */ beq stack_setup -#if TEXT_BASE +#if CONFIG_SYS_TEXT_BASE #ifndef CONFIG_LPC2292 /* already done in lowlevel_init */ ldr r2, =0x0 /* Relocate the exception vectors */ cmp r1, r2 /* and associated data to address */ - ldmneia r0!, {r3-r10} /* 0x0. Do nothing if TEXT_BASE is */ + ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */ stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */ ldmneia r0, {r3-r9} stmneia r2, {r3-r9} @@ -755,7 +755,7 @@ reset_cpu: ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR] ldr r1, =0xFFFFF000 and r0, r1, r0 - ldr r1, =(relocate-TEXT_BASE) + ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE) add r0, r1, r0 ldr r4, =NETARM_GEN_MODULE_BASE ldr r1, =NETARM_GEN_SW_SVC_RESETA diff --git a/arch/arm/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/cpu/arm920t/at91/lowlevel_init.S index 22fc86c..eaea9d2 100644 --- a/arch/arm/cpu/arm920t/at91/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/at91/lowlevel_init.S @@ -39,9 +39,9 @@ _MTEXT_BASE: #undef START_FROM_MEM #ifdef START_FROM_MEM - .word TEXT_BASE-PHYS_FLASH_1 + .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1 #else - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #endif .globl lowlevel_init diff --git a/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S b/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S index d8bb960..2e7160f 100644 --- a/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S @@ -43,9 +43,9 @@ _MTEXT_BASE: #undef START_FROM_MEM #ifdef START_FROM_MEM - .word TEXT_BASE-PHYS_FLASH_1 + .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1 #else - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #endif .globl lowlevel_init diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 09ee815..343a760 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -72,7 +72,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index f173400..cf18a01 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -83,7 +83,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S index 559c35c..7f7ca5e 100644 --- a/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S @@ -43,7 +43,7 @@ #endif _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init .type lowlevel_init,function @@ -54,7 +54,7 @@ POS1: ldr r0, =POS1 /* r0 = POS1 compile */ ldr r2, _TEXT_BASE sub r0, r0, r2 /* r0 = POS1-_TEXT_BASE (POS1 relative) */ - sub r5, r5, r0 /* r0 = TEXT_BASE-1 */ + sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */ sub r5, r5, #4 /* r1 = text base - current */ /* memory control configuration 1 */ diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index e882487..863de3b 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -117,7 +117,7 @@ _fiq: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 4f062e5..077886f 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -87,7 +87,7 @@ _fiq: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 79ef517..07356cb 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -85,7 +85,7 @@ _fiq: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE /* address of _start in the linked image */ + .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */ #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/armv7/mx51/Makefile b/arch/arm/cpu/armv7/mx5/Makefile index 7cfaa2c..7cfaa2c 100644 --- a/arch/arm/cpu/armv7/mx51/Makefile +++ b/arch/arm/cpu/armv7/mx5/Makefile diff --git a/arch/arm/cpu/armv7/mx51/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index a27227d..00f649c 100644 --- a/arch/arm/cpu/armv7/mx51/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -71,7 +71,7 @@ u32 get_mcu_main_clk(void) reg = (__raw_readl(&mxc_ccm->cacrr) & MXC_CCM_CACRR_ARM_PODF_MASK) >> MXC_CCM_CACRR_ARM_PODF_OFFSET; - freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ); + freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK); return freq / (reg + 1); } @@ -84,14 +84,14 @@ static u32 get_periph_clk(void) reg = __raw_readl(&mxc_ccm->cbcdr); if (!(reg & MXC_CCM_CBCDR_PERIPH_CLK_SEL)) - return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ); + return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK); reg = __raw_readl(&mxc_ccm->cbcmr); switch ((reg & MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >> MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) { case 0: - return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ); + return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK); case 1: - return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ); + return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK); default: return 0; } @@ -146,15 +146,15 @@ static u32 get_uart_clk(void) MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET) { case 0x0: freq = decode_pll(mxc_plls[PLL1_CLOCK], - CONFIG_MX51_HCLK_FREQ); + CONFIG_SYS_MX5_HCLK); break; case 0x1: freq = decode_pll(mxc_plls[PLL2_CLOCK], - CONFIG_MX51_HCLK_FREQ); + CONFIG_SYS_MX5_HCLK); break; case 0x2: freq = decode_pll(mxc_plls[PLL3_CLOCK], - CONFIG_MX51_HCLK_FREQ); + CONFIG_SYS_MX5_HCLK); break; default: return 66500000; @@ -181,7 +181,7 @@ u32 get_lp_apm(void) u32 ccsr = __raw_readl(&mxc_ccm->ccsr); if (((ccsr >> 9) & 1) == 0) - ret_val = CONFIG_MX51_HCLK_FREQ; + ret_val = CONFIG_SYS_MX5_HCLK; else ret_val = ((32768 * 1024)); @@ -207,17 +207,17 @@ u32 imx_get_cspiclk(void) switch (clk_sel) { case 0: ret_val = decode_pll(mxc_plls[PLL1_CLOCK], - CONFIG_MX51_HCLK_FREQ) / + CONFIG_SYS_MX5_HCLK) / ((pre_pdf + 1) * (pdf + 1)); break; case 1: ret_val = decode_pll(mxc_plls[PLL2_CLOCK], - CONFIG_MX51_HCLK_FREQ) / + CONFIG_SYS_MX5_HCLK) / ((pre_pdf + 1) * (pdf + 1)); break; case 2: ret_val = decode_pll(mxc_plls[PLL3_CLOCK], - CONFIG_MX51_HCLK_FREQ) / + CONFIG_SYS_MX5_HCLK) / ((pre_pdf + 1) * (pdf + 1)); break; default: @@ -248,7 +248,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return imx_get_cspiclk(); case MXC_FEC_CLK: return decode_pll(mxc_plls[PLL1_CLOCK], - CONFIG_MX51_HCLK_FREQ); + CONFIG_SYS_MX5_HCLK); default: break; } @@ -269,16 +269,16 @@ u32 imx_get_fecclk(void) /* * Dump some core clockes. */ -int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { u32 freq; - freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ); - printf("mx51 pll1: %dMHz\n", freq / 1000000); - freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ); - printf("mx51 pll2: %dMHz\n", freq / 1000000); - freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ); - printf("mx51 pll3: %dMHz\n", freq / 1000000); + freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK); + printf("pll1: %dMHz\n", freq / 1000000); + freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK); + printf("pll2: %dMHz\n", freq / 1000000); + freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK); + printf("pll3: %dMHz\n", freq / 1000000); printf("ipg clock : %dHz\n", mxc_get_clock(MXC_IPG_CLK)); printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK)); @@ -288,7 +288,7 @@ int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] /***************************************************/ U_BOOT_CMD( - clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx51_showclocks, - "display mx51 clocks\n", + clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx5_showclocks, + "display clocks\n", "" ); diff --git a/arch/arm/cpu/armv7/mx51/iomux.c b/arch/arm/cpu/armv7/mx5/iomux.c index 62b2954..e8928d5 100644 --- a/arch/arm/cpu/armv7/mx51/iomux.c +++ b/arch/arm/cpu/armv7/mx5/iomux.c @@ -23,7 +23,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/mx51_pins.h> +#include <asm/arch/mx5x_pins.h> #include <asm/arch/iomux.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/cpu/armv7/mx51/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 783c81f..e984870 100644 --- a/arch/arm/cpu/armv7/mx51/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -257,20 +257,6 @@ lowlevel_init: orr r1, r1, #(1 << 23) str r1, [r0, #0x4] -#ifdef ENABLE_IMPRECISE_ABORT - mrs r1, spsr /* save old spsr */ - mrs r0, cpsr /* read out the cpsr */ - bic r0, r0, #0x100 /* clear the A bit */ - msr spsr, r0 /* update spsr */ - add lr, pc, #0x8 /* update lr */ - movs pc, lr /* update cpsr */ - nop - nop - nop - nop - msr spsr, r1 /* restore old spsr */ -#endif - init_l2cc init_aips diff --git a/arch/arm/cpu/armv7/mx51/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index f22ebe9..7c7a565 100644 --- a/arch/arm/cpu/armv7/mx51/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -33,28 +33,33 @@ #include <fsl_esdhc.h> #endif +#if defined(CONFIG_MX51) +#define CPU_TYPE 0x51000 +#else +#error "CPU_TYPE not defined" +#endif + u32 get_cpu_rev(void) { - int reg; - int system_rev; + int system_rev = CPU_TYPE; + int reg = __raw_readl(ROM_SI_REV); - reg = __raw_readl(ROM_SI_REV); switch (reg) { case 0x02: - system_rev = 0x51000 | CHIP_REV_1_1; + system_rev |= CHIP_REV_1_1; break; case 0x10: if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) - system_rev = 0x51000 | CHIP_REV_2_5; + system_rev |= CHIP_REV_2_5; else - system_rev = 0x51000 | CHIP_REV_2_0; + system_rev |= CHIP_REV_2_0; break; case 0x20: - system_rev = 0x51000 | CHIP_REV_3_0; + system_rev |= CHIP_REV_3_0; break; return system_rev; default: - system_rev = 0x51000 | CHIP_REV_1_0; + system_rev |= CHIP_REV_1_0; break; } return system_rev; @@ -67,9 +72,10 @@ int print_cpuinfo(void) u32 cpurev; cpurev = get_cpu_rev(); - printf("CPU: Freescale i.MX51 family rev%d.%d at %d MHz\n", - (cpurev & 0xF0) >> 4, - (cpurev & 0x0F) >> 4, + printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n", + (cpurev & 0xFF000) >> 12, + (cpurev & 0x000F0) >> 4, + (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); return 0; } diff --git a/arch/arm/cpu/armv7/mx51/speed.c b/arch/arm/cpu/armv7/mx5/speed.c index a444def..a444def 100644 --- a/arch/arm/cpu/armv7/mx51/speed.c +++ b/arch/arm/cpu/armv7/mx5/speed.c diff --git a/arch/arm/cpu/armv7/mx51/timer.c b/arch/arm/cpu/armv7/mx5/timer.c index 110edbf..3044fcf 100644 --- a/arch/arm/cpu/armv7/mx51/timer.c +++ b/arch/arm/cpu/armv7/mx5/timer.c @@ -75,18 +75,18 @@ void reset_timer(void) void reset_timer_masked(void) { ulong val = __raw_readl(&cur_gpt->counter); - lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ); + lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); timestamp = 0; } ulong get_timer_masked(void) { ulong val = __raw_readl(&cur_gpt->counter); - val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ); + val /= (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ); if (val >= lastinc) timestamp += (val - lastinc); else - timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ)) + timestamp += ((0xFFFFFFFF / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ)) - lastinc) + val; lastinc = val; return timestamp; @@ -106,7 +106,7 @@ void set_timer(ulong t) void __udelay(unsigned long usec) { unsigned long now, start, tmo; - tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000; + tmo = usec * (CONFIG_SYS_MX5_CLK32 / 1000) / 1000; if (!tmo) tmo = 1; diff --git a/arch/arm/cpu/armv7/mx51/u-boot.lds b/arch/arm/cpu/armv7/mx5/u-boot.lds index 55d6599..55d6599 100644 --- a/arch/arm/cpu/armv7/mx51/u-boot.lds +++ b/arch/arm/cpu/armv7/mx5/u-boot.lds diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 935bbb6..109481e 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -33,7 +33,7 @@ #include <asm/arch/clocks_omap3.h> _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ #if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT) /************************************************************************** diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 2719bb5..6c419f5 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -99,7 +99,7 @@ u32 get_sdr_cs_offset(u32 cs) return 0; offset = readl(&sdrc_base->cs_cfg); - offset = (offset & 15) << 27 | (offset & 0x30) >> 17; + offset = (offset & 15) << 27 | (offset & 0x30) << 17; return offset; } diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 8c1f395..24a66f5 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -102,8 +102,13 @@ int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = sdram_size(); +#else + gd->ram_size = sdram_size(); +#endif + return 0; } diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index d5c053d..64c86e9 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -67,7 +67,7 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 940d45d..836c33b 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -95,7 +95,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index b8cf1b8..d944860 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -74,7 +74,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index cfb9411..9c5023b 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -84,7 +84,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index c5a67dc..20091b2 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -65,7 +65,7 @@ _start: b reset .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index d1262ad..8eabb66 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -75,7 +75,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h index 35a1585..76493a1 100644 --- a/arch/arm/include/asm/arch-davinci/emac_defs.h +++ b/arch/arm/include/asm/arch-davinci/emac_defs.h @@ -367,7 +367,6 @@ typedef struct { int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data); int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data); -void davinci_eth_set_mac_addr(const u_int8_t *addr); typedef struct { diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h index f05e743..46ed47c 100644 --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h +++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h @@ -64,6 +64,370 @@ struct gpio_regs { u32 gpio_psr; }; +#define IOMUX_PADNUM_MASK 0x1ff +#define IOMUX_PIN(gpionum, padnum) ((padnum) & IOMUX_PADNUM_MASK) + +/* + * various IOMUX pad functions + */ +enum iomux_pad_config { + PAD_CTL_NOLOOPBACK = 0x0 << 9, + PAD_CTL_LOOPBACK = 0x1 << 9, + PAD_CTL_PKE_NONE = 0x0 << 8, + PAD_CTL_PKE_ENABLE = 0x1 << 8, + PAD_CTL_PUE_KEEPER = 0x0 << 7, + PAD_CTL_PUE_PUD = 0x1 << 7, + PAD_CTL_100K_PD = 0x0 << 5, + PAD_CTL_100K_PU = 0x1 << 5, + PAD_CTL_47K_PU = 0x2 << 5, + PAD_CTL_22K_PU = 0x3 << 5, + PAD_CTL_HYS_CMOS = 0x0 << 4, + PAD_CTL_HYS_SCHMITZ = 0x1 << 4, + PAD_CTL_ODE_CMOS = 0x0 << 3, + PAD_CTL_ODE_OpenDrain = 0x1 << 3, + PAD_CTL_DRV_NORMAL = 0x0 << 1, + PAD_CTL_DRV_HIGH = 0x1 << 1, + PAD_CTL_DRV_MAX = 0x2 << 1, + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0 +}; + +/* + * This enumeration is constructed based on the Section + * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated + * value is constructed based on the rules described above. + */ + +enum iomux_pins { + MX31_PIN_TTM_PAD = IOMUX_PIN(0xff, 0), + MX31_PIN_CSPI3_SPI_RDY = IOMUX_PIN(0xff, 1), + MX31_PIN_CSPI3_SCLK = IOMUX_PIN(0xff, 2), + MX31_PIN_CSPI3_MISO = IOMUX_PIN(0xff, 3), + MX31_PIN_CSPI3_MOSI = IOMUX_PIN(0xff, 4), + MX31_PIN_CLKSS = IOMUX_PIN(0xff, 5), + MX31_PIN_CE_CONTROL = IOMUX_PIN(0xff, 6), + MX31_PIN_ATA_RESET_B = IOMUX_PIN(95, 7), + MX31_PIN_ATA_DMACK = IOMUX_PIN(94, 8), + MX31_PIN_ATA_DIOW = IOMUX_PIN(93, 9), + MX31_PIN_ATA_DIOR = IOMUX_PIN(92, 10), + MX31_PIN_ATA_CS1 = IOMUX_PIN(91, 11), + MX31_PIN_ATA_CS0 = IOMUX_PIN(90, 12), + MX31_PIN_SD1_DATA3 = IOMUX_PIN(63, 13), + MX31_PIN_SD1_DATA2 = IOMUX_PIN(62, 14), + MX31_PIN_SD1_DATA1 = IOMUX_PIN(61, 15), + MX31_PIN_SD1_DATA0 = IOMUX_PIN(60, 16), + MX31_PIN_SD1_CLK = IOMUX_PIN(59, 17), + MX31_PIN_SD1_CMD = IOMUX_PIN(58, 18), + MX31_PIN_D3_SPL = IOMUX_PIN(0xff, 19), + MX31_PIN_D3_CLS = IOMUX_PIN(0xff, 20), + MX31_PIN_D3_REV = IOMUX_PIN(0xff, 21), + MX31_PIN_CONTRAST = IOMUX_PIN(0xff, 22), + MX31_PIN_VSYNC3 = IOMUX_PIN(0xff, 23), + MX31_PIN_READ = IOMUX_PIN(0xff, 24), + MX31_PIN_WRITE = IOMUX_PIN(0xff, 25), + MX31_PIN_PAR_RS = IOMUX_PIN(0xff, 26), + MX31_PIN_SER_RS = IOMUX_PIN(89, 27), + MX31_PIN_LCS1 = IOMUX_PIN(88, 28), + MX31_PIN_LCS0 = IOMUX_PIN(87, 29), + MX31_PIN_SD_D_CLK = IOMUX_PIN(86, 30), + MX31_PIN_SD_D_IO = IOMUX_PIN(85, 31), + MX31_PIN_SD_D_I = IOMUX_PIN(84, 32), + MX31_PIN_DRDY0 = IOMUX_PIN(0xff, 33), + MX31_PIN_FPSHIFT = IOMUX_PIN(0xff, 34), + MX31_PIN_HSYNC = IOMUX_PIN(0xff, 35), + MX31_PIN_VSYNC0 = IOMUX_PIN(0xff, 36), + MX31_PIN_LD17 = IOMUX_PIN(0xff, 37), + MX31_PIN_LD16 = IOMUX_PIN(0xff, 38), + MX31_PIN_LD15 = IOMUX_PIN(0xff, 39), + MX31_PIN_LD14 = IOMUX_PIN(0xff, 40), + MX31_PIN_LD13 = IOMUX_PIN(0xff, 41), + MX31_PIN_LD12 = IOMUX_PIN(0xff, 42), + MX31_PIN_LD11 = IOMUX_PIN(0xff, 43), + MX31_PIN_LD10 = IOMUX_PIN(0xff, 44), + MX31_PIN_LD9 = IOMUX_PIN(0xff, 45), + MX31_PIN_LD8 = IOMUX_PIN(0xff, 46), + MX31_PIN_LD7 = IOMUX_PIN(0xff, 47), + MX31_PIN_LD6 = IOMUX_PIN(0xff, 48), + MX31_PIN_LD5 = IOMUX_PIN(0xff, 49), + MX31_PIN_LD4 = IOMUX_PIN(0xff, 50), + MX31_PIN_LD3 = IOMUX_PIN(0xff, 51), + MX31_PIN_LD2 = IOMUX_PIN(0xff, 52), + MX31_PIN_LD1 = IOMUX_PIN(0xff, 53), + MX31_PIN_LD0 = IOMUX_PIN(0xff, 54), + MX31_PIN_USBH2_DATA1 = IOMUX_PIN(0xff, 55), + MX31_PIN_USBH2_DATA0 = IOMUX_PIN(0xff, 56), + MX31_PIN_USBH2_NXT = IOMUX_PIN(0xff, 57), + MX31_PIN_USBH2_STP = IOMUX_PIN(0xff, 58), + MX31_PIN_USBH2_DIR = IOMUX_PIN(0xff, 59), + MX31_PIN_USBH2_CLK = IOMUX_PIN(0xff, 60), + MX31_PIN_USBOTG_DATA7 = IOMUX_PIN(0xff, 61), + MX31_PIN_USBOTG_DATA6 = IOMUX_PIN(0xff, 62), + MX31_PIN_USBOTG_DATA5 = IOMUX_PIN(0xff, 63), + MX31_PIN_USBOTG_DATA4 = IOMUX_PIN(0xff, 64), + MX31_PIN_USBOTG_DATA3 = IOMUX_PIN(0xff, 65), + MX31_PIN_USBOTG_DATA2 = IOMUX_PIN(0xff, 66), + MX31_PIN_USBOTG_DATA1 = IOMUX_PIN(0xff, 67), + MX31_PIN_USBOTG_DATA0 = IOMUX_PIN(0xff, 68), + MX31_PIN_USBOTG_NXT = IOMUX_PIN(0xff, 69), + MX31_PIN_USBOTG_STP = IOMUX_PIN(0xff, 70), + MX31_PIN_USBOTG_DIR = IOMUX_PIN(0xff, 71), + MX31_PIN_USBOTG_CLK = IOMUX_PIN(0xff, 72), + MX31_PIN_USB_BYP = IOMUX_PIN(31, 73), + MX31_PIN_USB_OC = IOMUX_PIN(30, 74), + MX31_PIN_USB_PWR = IOMUX_PIN(29, 75), + MX31_PIN_SJC_MOD = IOMUX_PIN(0xff, 76), + MX31_PIN_DE_B = IOMUX_PIN(0xff, 77), + MX31_PIN_TRSTB = IOMUX_PIN(0xff, 78), + MX31_PIN_TDO = IOMUX_PIN(0xff, 79), + MX31_PIN_TDI = IOMUX_PIN(0xff, 80), + MX31_PIN_TMS = IOMUX_PIN(0xff, 81), + MX31_PIN_TCK = IOMUX_PIN(0xff, 82), + MX31_PIN_RTCK = IOMUX_PIN(0xff, 83), + MX31_PIN_KEY_COL7 = IOMUX_PIN(57, 84), + MX31_PIN_KEY_COL6 = IOMUX_PIN(56, 85), + MX31_PIN_KEY_COL5 = IOMUX_PIN(55, 86), + MX31_PIN_KEY_COL4 = IOMUX_PIN(54, 87), + MX31_PIN_KEY_COL3 = IOMUX_PIN(0xff, 88), + MX31_PIN_KEY_COL2 = IOMUX_PIN(0xff, 89), + MX31_PIN_KEY_COL1 = IOMUX_PIN(0xff, 90), + MX31_PIN_KEY_COL0 = IOMUX_PIN(0xff, 91), + MX31_PIN_KEY_ROW7 = IOMUX_PIN(53, 92), + MX31_PIN_KEY_ROW6 = IOMUX_PIN(52, 93), + MX31_PIN_KEY_ROW5 = IOMUX_PIN(51, 94), + MX31_PIN_KEY_ROW4 = IOMUX_PIN(50, 95), + MX31_PIN_KEY_ROW3 = IOMUX_PIN(0xff, 96), + MX31_PIN_KEY_ROW2 = IOMUX_PIN(0xff, 97), + MX31_PIN_KEY_ROW1 = IOMUX_PIN(0xff, 98), + MX31_PIN_KEY_ROW0 = IOMUX_PIN(0xff, 99), + MX31_PIN_BATT_LINE = IOMUX_PIN(49, 100), + MX31_PIN_CTS2 = IOMUX_PIN(0xff, 101), + MX31_PIN_RTS2 = IOMUX_PIN(0xff, 102), + MX31_PIN_TXD2 = IOMUX_PIN(28, 103), + MX31_PIN_RXD2 = IOMUX_PIN(27, 104), + MX31_PIN_DTR_DCE2 = IOMUX_PIN(48, 105), + MX31_PIN_DCD_DTE1 = IOMUX_PIN(47, 106), + MX31_PIN_RI_DTE1 = IOMUX_PIN(46, 107), + MX31_PIN_DSR_DTE1 = IOMUX_PIN(45, 108), + MX31_PIN_DTR_DTE1 = IOMUX_PIN(44, 109), + MX31_PIN_DCD_DCE1 = IOMUX_PIN(43, 110), + MX31_PIN_RI_DCE1 = IOMUX_PIN(42, 111), + MX31_PIN_DSR_DCE1 = IOMUX_PIN(41, 112), + MX31_PIN_DTR_DCE1 = IOMUX_PIN(40, 113), + MX31_PIN_CTS1 = IOMUX_PIN(39, 114), + MX31_PIN_RTS1 = IOMUX_PIN(38, 115), + MX31_PIN_TXD1 = IOMUX_PIN(37, 116), + MX31_PIN_RXD1 = IOMUX_PIN(36, 117), + MX31_PIN_CSPI2_SPI_RDY = IOMUX_PIN(0xff, 118), + MX31_PIN_CSPI2_SCLK = IOMUX_PIN(0xff, 119), + MX31_PIN_CSPI2_SS2 = IOMUX_PIN(0xff, 120), + MX31_PIN_CSPI2_SS1 = IOMUX_PIN(0xff, 121), + MX31_PIN_CSPI2_SS0 = IOMUX_PIN(0xff, 122), + MX31_PIN_CSPI2_MISO = IOMUX_PIN(0xff, 123), + MX31_PIN_CSPI2_MOSI = IOMUX_PIN(0xff, 124), + MX31_PIN_CSPI1_SPI_RDY = IOMUX_PIN(0xff, 125), + MX31_PIN_CSPI1_SCLK = IOMUX_PIN(0xff, 126), + MX31_PIN_CSPI1_SS2 = IOMUX_PIN(0xff, 127), + MX31_PIN_CSPI1_SS1 = IOMUX_PIN(0xff, 128), + MX31_PIN_CSPI1_SS0 = IOMUX_PIN(0xff, 129), + MX31_PIN_CSPI1_MISO = IOMUX_PIN(0xff, 130), + MX31_PIN_CSPI1_MOSI = IOMUX_PIN(0xff, 131), + MX31_PIN_SFS6 = IOMUX_PIN(26, 132), + MX31_PIN_SCK6 = IOMUX_PIN(25, 133), + MX31_PIN_SRXD6 = IOMUX_PIN(24, 134), + MX31_PIN_STXD6 = IOMUX_PIN(23, 135), + MX31_PIN_SFS5 = IOMUX_PIN(0xff, 136), + MX31_PIN_SCK5 = IOMUX_PIN(0xff, 137), + MX31_PIN_SRXD5 = IOMUX_PIN(22, 138), + MX31_PIN_STXD5 = IOMUX_PIN(21, 139), + MX31_PIN_SFS4 = IOMUX_PIN(0xff, 140), + MX31_PIN_SCK4 = IOMUX_PIN(0xff, 141), + MX31_PIN_SRXD4 = IOMUX_PIN(20, 142), + MX31_PIN_STXD4 = IOMUX_PIN(19, 143), + MX31_PIN_SFS3 = IOMUX_PIN(0xff, 144), + MX31_PIN_SCK3 = IOMUX_PIN(0xff, 145), + MX31_PIN_SRXD3 = IOMUX_PIN(18, 146), + MX31_PIN_STXD3 = IOMUX_PIN(17, 147), + MX31_PIN_I2C_DAT = IOMUX_PIN(0xff, 148), + MX31_PIN_I2C_CLK = IOMUX_PIN(0xff, 149), + MX31_PIN_CSI_PIXCLK = IOMUX_PIN(83, 150), + MX31_PIN_CSI_HSYNC = IOMUX_PIN(82, 151), + MX31_PIN_CSI_VSYNC = IOMUX_PIN(81, 152), + MX31_PIN_CSI_MCLK = IOMUX_PIN(80, 153), + MX31_PIN_CSI_D15 = IOMUX_PIN(79, 154), + MX31_PIN_CSI_D14 = IOMUX_PIN(78, 155), + MX31_PIN_CSI_D13 = IOMUX_PIN(77, 156), + MX31_PIN_CSI_D12 = IOMUX_PIN(76, 157), + MX31_PIN_CSI_D11 = IOMUX_PIN(75, 158), + MX31_PIN_CSI_D10 = IOMUX_PIN(74, 159), + MX31_PIN_CSI_D9 = IOMUX_PIN(73, 160), + MX31_PIN_CSI_D8 = IOMUX_PIN(72, 161), + MX31_PIN_CSI_D7 = IOMUX_PIN(71, 162), + MX31_PIN_CSI_D6 = IOMUX_PIN(70, 163), + MX31_PIN_CSI_D5 = IOMUX_PIN(69, 164), + MX31_PIN_CSI_D4 = IOMUX_PIN(68, 165), + MX31_PIN_M_GRANT = IOMUX_PIN(0xff, 166), + MX31_PIN_M_REQUEST = IOMUX_PIN(0xff, 167), + MX31_PIN_PC_POE = IOMUX_PIN(0xff, 168), + MX31_PIN_PC_RW_B = IOMUX_PIN(0xff, 169), + MX31_PIN_IOIS16 = IOMUX_PIN(0xff, 170), + MX31_PIN_PC_RST = IOMUX_PIN(0xff, 171), + MX31_PIN_PC_BVD2 = IOMUX_PIN(0xff, 172), + MX31_PIN_PC_BVD1 = IOMUX_PIN(0xff, 173), + MX31_PIN_PC_VS2 = IOMUX_PIN(0xff, 174), + MX31_PIN_PC_VS1 = IOMUX_PIN(0xff, 175), + MX31_PIN_PC_PWRON = IOMUX_PIN(0xff, 176), + MX31_PIN_PC_READY = IOMUX_PIN(0xff, 177), + MX31_PIN_PC_WAIT_B = IOMUX_PIN(0xff, 178), + MX31_PIN_PC_CD2_B = IOMUX_PIN(0xff, 179), + MX31_PIN_PC_CD1_B = IOMUX_PIN(0xff, 180), + MX31_PIN_D0 = IOMUX_PIN(0xff, 181), + MX31_PIN_D1 = IOMUX_PIN(0xff, 182), + MX31_PIN_D2 = IOMUX_PIN(0xff, 183), + MX31_PIN_D3 = IOMUX_PIN(0xff, 184), + MX31_PIN_D4 = IOMUX_PIN(0xff, 185), + MX31_PIN_D5 = IOMUX_PIN(0xff, 186), + MX31_PIN_D6 = IOMUX_PIN(0xff, 187), + MX31_PIN_D7 = IOMUX_PIN(0xff, 188), + MX31_PIN_D8 = IOMUX_PIN(0xff, 189), + MX31_PIN_D9 = IOMUX_PIN(0xff, 190), + MX31_PIN_D10 = IOMUX_PIN(0xff, 191), + MX31_PIN_D11 = IOMUX_PIN(0xff, 192), + MX31_PIN_D12 = IOMUX_PIN(0xff, 193), + MX31_PIN_D13 = IOMUX_PIN(0xff, 194), + MX31_PIN_D14 = IOMUX_PIN(0xff, 195), + MX31_PIN_D15 = IOMUX_PIN(0xff, 196), + MX31_PIN_NFRB = IOMUX_PIN(16, 197), + MX31_PIN_NFCE_B = IOMUX_PIN(15, 198), + MX31_PIN_NFWP_B = IOMUX_PIN(14, 199), + MX31_PIN_NFCLE = IOMUX_PIN(13, 200), + MX31_PIN_NFALE = IOMUX_PIN(12, 201), + MX31_PIN_NFRE_B = IOMUX_PIN(11, 202), + MX31_PIN_NFWE_B = IOMUX_PIN(10, 203), + MX31_PIN_SDQS3 = IOMUX_PIN(0xff, 204), + MX31_PIN_SDQS2 = IOMUX_PIN(0xff, 205), + MX31_PIN_SDQS1 = IOMUX_PIN(0xff, 206), + MX31_PIN_SDQS0 = IOMUX_PIN(0xff, 207), + MX31_PIN_SDCLK_B = IOMUX_PIN(0xff, 208), + MX31_PIN_SDCLK = IOMUX_PIN(0xff, 209), + MX31_PIN_SDCKE1 = IOMUX_PIN(0xff, 210), + MX31_PIN_SDCKE0 = IOMUX_PIN(0xff, 211), + MX31_PIN_SDWE = IOMUX_PIN(0xff, 212), + MX31_PIN_CAS = IOMUX_PIN(0xff, 213), + MX31_PIN_RAS = IOMUX_PIN(0xff, 214), + MX31_PIN_RW = IOMUX_PIN(0xff, 215), + MX31_PIN_BCLK = IOMUX_PIN(0xff, 216), + MX31_PIN_LBA = IOMUX_PIN(0xff, 217), + MX31_PIN_ECB = IOMUX_PIN(0xff, 218), + MX31_PIN_CS5 = IOMUX_PIN(0xff, 219), + MX31_PIN_CS4 = IOMUX_PIN(0xff, 220), + MX31_PIN_CS3 = IOMUX_PIN(0xff, 221), + MX31_PIN_CS2 = IOMUX_PIN(0xff, 222), + MX31_PIN_CS1 = IOMUX_PIN(0xff, 223), + MX31_PIN_CS0 = IOMUX_PIN(0xff, 224), + MX31_PIN_OE = IOMUX_PIN(0xff, 225), + MX31_PIN_EB1 = IOMUX_PIN(0xff, 226), + MX31_PIN_EB0 = IOMUX_PIN(0xff, 227), + MX31_PIN_DQM3 = IOMUX_PIN(0xff, 228), + MX31_PIN_DQM2 = IOMUX_PIN(0xff, 229), + MX31_PIN_DQM1 = IOMUX_PIN(0xff, 230), + MX31_PIN_DQM0 = IOMUX_PIN(0xff, 231), + MX31_PIN_SD31 = IOMUX_PIN(0xff, 232), + MX31_PIN_SD30 = IOMUX_PIN(0xff, 233), + MX31_PIN_SD29 = IOMUX_PIN(0xff, 234), + MX31_PIN_SD28 = IOMUX_PIN(0xff, 235), + MX31_PIN_SD27 = IOMUX_PIN(0xff, 236), + MX31_PIN_SD26 = IOMUX_PIN(0xff, 237), + MX31_PIN_SD25 = IOMUX_PIN(0xff, 238), + MX31_PIN_SD24 = IOMUX_PIN(0xff, 239), + MX31_PIN_SD23 = IOMUX_PIN(0xff, 240), + MX31_PIN_SD22 = IOMUX_PIN(0xff, 241), + MX31_PIN_SD21 = IOMUX_PIN(0xff, 242), + MX31_PIN_SD20 = IOMUX_PIN(0xff, 243), + MX31_PIN_SD19 = IOMUX_PIN(0xff, 244), + MX31_PIN_SD18 = IOMUX_PIN(0xff, 245), + MX31_PIN_SD17 = IOMUX_PIN(0xff, 246), + MX31_PIN_SD16 = IOMUX_PIN(0xff, 247), + MX31_PIN_SD15 = IOMUX_PIN(0xff, 248), + MX31_PIN_SD14 = IOMUX_PIN(0xff, 249), + MX31_PIN_SD13 = IOMUX_PIN(0xff, 250), + MX31_PIN_SD12 = IOMUX_PIN(0xff, 251), + MX31_PIN_SD11 = IOMUX_PIN(0xff, 252), + MX31_PIN_SD10 = IOMUX_PIN(0xff, 253), + MX31_PIN_SD9 = IOMUX_PIN(0xff, 254), + MX31_PIN_SD8 = IOMUX_PIN(0xff, 255), + MX31_PIN_SD7 = IOMUX_PIN(0xff, 256), + MX31_PIN_SD6 = IOMUX_PIN(0xff, 257), + MX31_PIN_SD5 = IOMUX_PIN(0xff, 258), + MX31_PIN_SD4 = IOMUX_PIN(0xff, 259), + MX31_PIN_SD3 = IOMUX_PIN(0xff, 260), + MX31_PIN_SD2 = IOMUX_PIN(0xff, 261), + MX31_PIN_SD1 = IOMUX_PIN(0xff, 262), + MX31_PIN_SD0 = IOMUX_PIN(0xff, 263), + MX31_PIN_SDBA0 = IOMUX_PIN(0xff, 264), + MX31_PIN_SDBA1 = IOMUX_PIN(0xff, 265), + MX31_PIN_A25 = IOMUX_PIN(0xff, 266), + MX31_PIN_A24 = IOMUX_PIN(0xff, 267), + MX31_PIN_A23 = IOMUX_PIN(0xff, 268), + MX31_PIN_A22 = IOMUX_PIN(0xff, 269), + MX31_PIN_A21 = IOMUX_PIN(0xff, 270), + MX31_PIN_A20 = IOMUX_PIN(0xff, 271), + MX31_PIN_A19 = IOMUX_PIN(0xff, 272), + MX31_PIN_A18 = IOMUX_PIN(0xff, 273), + MX31_PIN_A17 = IOMUX_PIN(0xff, 274), + MX31_PIN_A16 = IOMUX_PIN(0xff, 275), + MX31_PIN_A14 = IOMUX_PIN(0xff, 276), + MX31_PIN_A15 = IOMUX_PIN(0xff, 277), + MX31_PIN_A13 = IOMUX_PIN(0xff, 278), + MX31_PIN_A12 = IOMUX_PIN(0xff, 279), + MX31_PIN_A11 = IOMUX_PIN(0xff, 280), + MX31_PIN_MA10 = IOMUX_PIN(0xff, 281), + MX31_PIN_A10 = IOMUX_PIN(0xff, 282), + MX31_PIN_A9 = IOMUX_PIN(0xff, 283), + MX31_PIN_A8 = IOMUX_PIN(0xff, 284), + MX31_PIN_A7 = IOMUX_PIN(0xff, 285), + MX31_PIN_A6 = IOMUX_PIN(0xff, 286), + MX31_PIN_A5 = IOMUX_PIN(0xff, 287), + MX31_PIN_A4 = IOMUX_PIN(0xff, 288), + MX31_PIN_A3 = IOMUX_PIN(0xff, 289), + MX31_PIN_A2 = IOMUX_PIN(0xff, 290), + MX31_PIN_A1 = IOMUX_PIN(0xff, 291), + MX31_PIN_A0 = IOMUX_PIN(0xff, 292), + MX31_PIN_VPG1 = IOMUX_PIN(0xff, 293), + MX31_PIN_VPG0 = IOMUX_PIN(0xff, 294), + MX31_PIN_DVFS1 = IOMUX_PIN(0xff, 295), + MX31_PIN_DVFS0 = IOMUX_PIN(0xff, 296), + MX31_PIN_VSTBY = IOMUX_PIN(0xff, 297), + MX31_PIN_POWER_FAIL = IOMUX_PIN(0xff, 298), + MX31_PIN_CKIL = IOMUX_PIN(0xff, 299), + MX31_PIN_BOOT_MODE4 = IOMUX_PIN(0xff, 300), + MX31_PIN_BOOT_MODE3 = IOMUX_PIN(0xff, 301), + MX31_PIN_BOOT_MODE2 = IOMUX_PIN(0xff, 302), + MX31_PIN_BOOT_MODE1 = IOMUX_PIN(0xff, 303), + MX31_PIN_BOOT_MODE0 = IOMUX_PIN(0xff, 304), + MX31_PIN_CLKO = IOMUX_PIN(0xff, 305), + MX31_PIN_POR_B = IOMUX_PIN(0xff, 306), + MX31_PIN_RESET_IN_B = IOMUX_PIN(0xff, 307), + MX31_PIN_CKIH = IOMUX_PIN(0xff, 308), + MX31_PIN_SIMPD0 = IOMUX_PIN(35, 309), + MX31_PIN_SRX0 = IOMUX_PIN(34, 310), + MX31_PIN_STX0 = IOMUX_PIN(33, 311), + MX31_PIN_SVEN0 = IOMUX_PIN(32, 312), + MX31_PIN_SRST0 = IOMUX_PIN(67, 313), + MX31_PIN_SCLK0 = IOMUX_PIN(66, 314), + MX31_PIN_GPIO3_1 = IOMUX_PIN(65, 315), + MX31_PIN_GPIO3_0 = IOMUX_PIN(64, 316), + MX31_PIN_GPIO1_6 = IOMUX_PIN(6, 317), + MX31_PIN_GPIO1_5 = IOMUX_PIN(5, 318), + MX31_PIN_GPIO1_4 = IOMUX_PIN(4, 319), + MX31_PIN_GPIO1_3 = IOMUX_PIN(3, 320), + MX31_PIN_GPIO1_2 = IOMUX_PIN(2, 321), + MX31_PIN_GPIO1_1 = IOMUX_PIN(1, 322), + MX31_PIN_GPIO1_0 = IOMUX_PIN(0, 323), + MX31_PIN_PWMO = IOMUX_PIN(9, 324), + MX31_PIN_WATCHDOG_RST = IOMUX_PIN(0xff, 325), + MX31_PIN_COMPARE = IOMUX_PIN(8, 326), + MX31_PIN_CAPTURE = IOMUX_PIN(7, 327), +}; /* Bit definitions for RCSR register in CCM */ #define CCM_RCSR_NF16B (1 << 31) @@ -194,6 +558,12 @@ struct gpio_regs { /* Register offsets based on IOMUXC_BASE */ /* 0x00 .. 0x7b */ +#define MUX_CTL_USBH2_DATA1 0x40 +#define MUX_CTL_USBH2_DIR 0x44 +#define MUX_CTL_USBH2_STP 0x45 +#define MUX_CTL_USBH2_NXT 0x46 +#define MUX_CTL_USBH2_DATA0 0x47 +#define MUX_CTL_USBH2_CLK 0x4B #define MUX_CTL_RTS1 0x7c #define MUX_CTL_CTS1 0x7d #define MUX_CTL_DTR_DCE1 0x7e @@ -214,6 +584,15 @@ struct gpio_regs { #define MUX_CTL_CSPI1_MISO 0x8d #define MUX_CTL_CSPI1_SS0 0x8e #define MUX_CTL_CSPI1_SS1 0x8f +#define MUX_CTL_STXD6 0x90 +#define MUX_CTL_SRXD6 0x91 +#define MUX_CTL_SCK6 0x92 +#define MUX_CTL_SFS6 0x93 + +#define MUX_CTL_STXD3 0x9C +#define MUX_CTL_SRXD3 0x9D +#define MUX_CTL_SCK3 0x9E +#define MUX_CTL_SFS3 0x9F #define MUX_CTL_NFC_WP 0xD0 #define MUX_CTL_NFC_CE 0xD1 @@ -224,6 +603,9 @@ struct gpio_regs { #define MUX_CTL_NFC_CLE 0xD7 +#define MUX_CTL_CAPTURE 0x150 +#define MUX_CTL_COMPARE 0x151 + /* * Helper macros for the MUX_[contact name]__[pin function] macros */ @@ -317,4 +699,33 @@ struct gpio_regs { #define IRAM_BASE_ADDR 0x1FFFC000 #define IRAM_SIZE (16 * 1024) +#define MX31_AIPS1_BASE_ADDR 0x43f00000 +#define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) + +/* USB portsc */ +/* values for portsc field */ +#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) +#define MXC_EHCI_FORCE_FS (1 << 24) +#define MXC_EHCI_UTMI_8BIT (0 << 28) +#define MXC_EHCI_UTMI_16BIT (1 << 28) +#define MXC_EHCI_SERIAL (1 << 29) +#define MXC_EHCI_MODE_UTMI (0 << 30) +#define MXC_EHCI_MODE_PHILIPS (1 << 30) +#define MXC_EHCI_MODE_ULPI (2 << 30) +#define MXC_EHCI_MODE_SERIAL (3 << 30) + +/* values for flags field */ +#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) +#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) +#define MXC_EHCI_INTERFACE_MASK (0xf) + +#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) +#define MXC_EHCI_TTL_ENABLED (1 << 6) + +#define MXC_EHCI_INTERNAL_PHY (1 << 7) +#define MXC_EHCI_IPPUE_DOWN (1 << 8) +#define MXC_EHCI_IPPUE_UP (1 << 9) + #endif /* __ASM_ARCH_MX31_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx51/asm-offsets.h b/arch/arm/include/asm/arch-mx5/asm-offsets.h index afd2728..afd2728 100644 --- a/arch/arm/include/asm/arch-mx51/asm-offsets.h +++ b/arch/arm/include/asm/arch-mx5/asm-offsets.h diff --git a/arch/arm/include/asm/arch-mx51/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 1f8a537..1f8a537 100644 --- a/arch/arm/include/asm/arch-mx51/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h diff --git a/arch/arm/include/asm/arch-mx51/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index 14aa231..14aa231 100644 --- a/arch/arm/include/asm/arch-mx51/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h diff --git a/arch/arm/include/asm/arch-mx51/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 3ddda40..3ddda40 100644 --- a/arch/arm/include/asm/arch-mx51/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h diff --git a/arch/arm/include/asm/arch-mx51/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h index a41c387..0d91a24 100644 --- a/arch/arm/include/asm/arch-mx51/iomux.h +++ b/arch/arm/include/asm/arch-mx5/iomux.h @@ -20,13 +20,13 @@ * MA 02111-1307 USA */ -#ifndef __MACH_MX51_IOMUX_H__ -#define __MACH_MX51_IOMUX_H__ +#ifndef __MACH_MX5_IOMUX_H__ +#define __MACH_MX5_IOMUX_H__ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/mx51_pins.h> +#include <asm/arch/mx5x_pins.h> typedef unsigned int iomux_pin_name_t; @@ -190,4 +190,4 @@ void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin); void mxc_iomux_set_input(iomux_input_select_t input, u32 config); -#endif /* __MACH_MX51_IOMUX_H__ */ +#endif /* __MACH_MX5_IOMUX_H__ */ diff --git a/arch/arm/include/asm/arch-mx51/mx51_pins.h b/arch/arm/include/asm/arch-mx5/mx5x_pins.h index b44ff25..a564fce 100644 --- a/arch/arm/include/asm/arch-mx51/mx51_pins.h +++ b/arch/arm/include/asm/arch-mx5/mx5x_pins.h @@ -20,8 +20,8 @@ * MA 02111-1307 USA */ -#ifndef __ASM_ARCH_MXC_MX51_PINS_H__ -#define __ASM_ARCH_MXC_MX51_PINS_H__ +#ifndef __ASM_ARCH_MX5_MX5X_PINS_H__ +#define __ASM_ARCH_MX5_MX5X_PINS_H__ #ifndef __ASSEMBLY__ @@ -415,4 +415,4 @@ enum iomux_pins { }; #endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_MXC_MX51_PINS_H__ */ +#endif /* __ASM_ARCH_MX5_MX5X_PINS_H__ */ diff --git a/arch/arm/include/asm/arch-mx51/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index f687503..f687503 100644 --- a/arch/arm/include/asm/arch-mx51/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index a78cf9f..f165949 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -128,6 +128,45 @@ enum { (MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \ (MICRON_TWTR_165 << 16)) +/* + * NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns + * ACTIMA + * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6 + * TDPL (Twr) = 15/6 = 2.5 -> 3 + * TRRD = 12/6 = 2 + * TRCD = 22.5/6 = 3.75 -> 4 + * TRP = 18/6 = 3 + * TRAS = 42/6 = 7 + * TRC = 60/6 = 10 + * TRFC = 140/6 = 23.3 -> 24 + * ACTIMB + * TWTR = 2 + * TCKE = 2 + * TXSR = 200/6 = 33.3 -> 34 + * TXP = 1.0 + 1.1 = 2.1 -> 3 + */ +#define NUMONYX_TDAL_165 6 +#define NUMONYX_TDPL_165 3 +#define NUMONYX_TRRD_165 2 +#define NUMONYX_TRCD_165 4 +#define NUMONYX_TRP_165 3 +#define NUMONYX_TRAS_165 7 +#define NUMONYX_TRC_165 10 +#define NUMONYX_TRFC_165 24 +#define NUMONYX_V_ACTIMA_165 ((NUMONYX_TRFC_165 << 27) | \ + (NUMONYX_TRC_165 << 22) | (NUMONYX_TRAS_165 << 18) | \ + (NUMONYX_TRP_165 << 15) | (NUMONYX_TRCD_165 << 12) | \ + (NUMONYX_TRRD_165 << 9) | (NUMONYX_TDPL_165 << 6) | \ + (NUMONYX_TDAL_165)) + +#define NUMONYX_TWTR_165 2 +#define NUMONYX_TCKE_165 2 +#define NUMONYX_TXP_165 3 +#define NUMONYX_XSR_165 34 +#define NUMONYX_V_ACTIMB_165 ((NUMONYX_TCKE_165 << 12) | \ + (NUMONYX_XSR_165 << 0) | (NUMONYX_TXP_165 << 8) | \ + (NUMONYX_TWTR_165 << 16)) + #ifdef CONFIG_OMAP3_INFINEON_DDR #define V_ACTIMA_165 INFINEON_V_ACTIMA_165 #define V_ACTIMB_165 INFINEON_V_ACTIMB_165 @@ -136,6 +175,10 @@ enum { #define V_ACTIMA_165 MICRON_V_ACTIMA_165 #define V_ACTIMB_165 MICRON_V_ACTIMB_165 #endif +#ifdef CONFIG_OMAP3_NUMONYX_DDR +#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165 +#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165 +#endif #if !defined(V_ACTIMA_165) || !defined(V_ACTIMB_165) #error "Please choose the right DDR type in config header" diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h index 43dd705..ba1c2ff 100644 --- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h @@ -102,12 +102,14 @@ typedef struct hsmmc { #define NBLK_STPCNT (0x0 << 16) #define DE_DISABLE (0x0 << 0) #define BCE_DISABLE (0x0 << 1) +#define BCE_ENABLE (0x1 << 1) #define ACEN_DISABLE (0x0 << 2) #define DDIR_OFFSET (4) #define DDIR_MASK (0x1 << 4) #define DDIR_WRITE (0x0 << 4) #define DDIR_READ (0x1 << 4) #define MSBS_SGLEBLK (0x0 << 5) +#define MSBS_MULTIBLK (0x1 << 5) #define RSP_TYPE_OFFSET (16) #define RSP_TYPE_MASK (0x3 << 16) #define RSP_TYPE_NORSP (0x0 << 16) @@ -130,6 +132,7 @@ typedef struct hsmmc { #define DATI_CMDDIS (0x1 << 1) #define DTW_1_BITMODE (0x0 << 1) #define DTW_4_BITMODE (0x1 << 1) +#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define SDBP_PWROFF (0x0 << 8) #define SDBP_PWRON (0x1 << 8) #define SDVS_1V8 (0x5 << 9) @@ -186,8 +189,15 @@ typedef struct { unsigned int size; unsigned int RCA; } mmc_card_data; +#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) +#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) + +/* Clock Configurations and Macros */ +#define MMC_CLOCK_REFERENCE 96 /* MHz */ #define mmc_reg_out(addr, mask, val)\ writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) +int omap_mmc_init(int dev_index); + #endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/arch-omap4/mmc_host_def.h b/arch/arm/include/asm/arch-omap4/mmc_host_def.h index e5d8b53..733d8ed 100644 --- a/arch/arm/include/asm/arch-omap4/mmc_host_def.h +++ b/arch/arm/include/asm/arch-omap4/mmc_host_def.h @@ -80,12 +80,14 @@ typedef struct hsmmc { #define NBLK_STPCNT (0x0 << 16) #define DE_DISABLE (0x0 << 0) #define BCE_DISABLE (0x0 << 1) +#define BCE_ENABLE (0x1 << 1) #define ACEN_DISABLE (0x0 << 2) #define DDIR_OFFSET (4) #define DDIR_MASK (0x1 << 4) #define DDIR_WRITE (0x0 << 4) #define DDIR_READ (0x1 << 4) #define MSBS_SGLEBLK (0x0 << 5) +#define MSBS_MULTIBLK (0x1 << 5) #define RSP_TYPE_OFFSET (16) #define RSP_TYPE_MASK (0x3 << 16) #define RSP_TYPE_NORSP (0x0 << 16) @@ -108,6 +110,7 @@ typedef struct hsmmc { #define DATI_CMDDIS (0x1 << 1) #define DTW_1_BITMODE (0x0 << 1) #define DTW_4_BITMODE (0x1 << 1) +#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define SDBP_PWROFF (0x0 << 8) #define SDBP_PWRON (0x1 << 8) #define SDVS_1V8 (0x5 << 9) @@ -164,8 +167,15 @@ typedef struct { unsigned int size; unsigned int RCA; } mmc_card_data; +#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) +#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) + +/* Clock Configurations and Macros */ +#define MMC_CLOCK_REFERENCE 96 /* MHz */ #define mmc_reg_out(addr, mask, val)\ writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) +int omap_mmc_init(int dev_index); + #endif /* MMC_HOST_DEF_H */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 8d3eb10..4124f0a 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -23,4 +23,7 @@ /* Relocation to SDRAM works on all ARM boards */ #define CONFIG_RELOC_FIXUP_WORKS + +#define CONFIG_LMB +#define CONFIG_SYS_BOOT_RAMDISK_HIGH #endif diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index e411d93..ffe261b 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -409,15 +409,6 @@ void start_armboot (void) enable_interrupts (); /* Perform network card initialisation if necessary */ -#ifdef CONFIG_DRIVER_TI_EMAC - /* XXX: this needs to be moved to board init */ -extern void davinci_eth_set_mac_addr (const u_int8_t *addr); - if (getenv ("ethaddr")) { - uchar enetaddr[6]; - eth_getenv_enetaddr("ethaddr", enetaddr); - davinci_eth_set_mac_addr(enetaddr); - } -#endif #if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96) /* XXX: this needs to be moved to board init */ @@ -780,6 +771,11 @@ void board_init_r (gd_t *id, ulong dest_addr) onenand_init(); #endif +#ifdef CONFIG_GENERIC_MMC + puts("MMC: "); + mmc_initialize(bd); +#endif + #ifdef CONFIG_HAS_DATAFLASH AT91F_DataflashInit(); dataflash_print_info(); @@ -822,16 +818,6 @@ void board_init_r (gd_t *id, ulong dest_addr) enable_interrupts (); /* Perform network card initialisation if necessary */ -#ifdef CONFIG_DRIVER_TI_EMAC - /* XXX: this needs to be moved to board init */ -extern void davinci_eth_set_mac_addr (const u_int8_t *addr); - if (getenv ("ethaddr")) { - uchar enetaddr[6]; - eth_getenv_enetaddr("ethaddr", enetaddr); - davinci_eth_set_mac_addr(enetaddr); - } -#endif - #if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96) /* XXX: this needs to be moved to board init */ if (getenv ("ethaddr")) { @@ -855,11 +841,6 @@ extern void davinci_eth_set_mac_addr (const u_int8_t *addr); board_late_init (); #endif -#ifdef CONFIG_GENERIC_MMC - puts ("MMC: "); - mmc_initialize (gd->bd); -#endif - #ifdef CONFIG_BITBANGMII bb_miiphy_init(); #endif diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 3101321..2e7b2e1 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -26,6 +26,9 @@ #include <image.h> #include <u-boot/zlib.h> #include <asm/byteorder.h> +#include <fdt.h> +#include <libfdt.h> +#include <fdt_support.h> DECLARE_GLOBAL_DATA_PTR; @@ -50,12 +53,52 @@ static void setup_end_tag (bd_t *bd); static struct tag *params; #endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */ -int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images) +static ulong get_sp(void); +#if defined(CONFIG_OF_LIBFDT) +static int bootm_linux_fdt(int machid, bootm_headers_t *images); +#endif + +void arch_lmb_reserve(struct lmb *lmb) +{ + ulong sp; + + /* + * Booting a (Linux) kernel image + * + * Allocate space for command line and board info - the + * address should be as high as possible within the reach of + * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused + * memory, which means far enough below the current stack + * pointer. + */ + sp = get_sp(); + debug("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 1K to be safe */ + sp -= 1024; + lmb_reserve(lmb, sp, + gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp); +} + +static void announce_and_cleanup(void) +{ + printf("\nStarting kernel ...\n\n"); + +#ifdef CONFIG_USB_DEVICE + { + extern void udc_disconnect(void); + udc_disconnect(); + } +#endif + cleanup_before_linux(); +} + +int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) { bd_t *bd = gd->bd; char *s; int machid = bd->bi_arch_number; - void (*theKernel)(int zero, int arch, uint params); + void (*kernel_entry)(int zero, int arch, uint params); #ifdef CONFIG_CMDLINE_TAG char *commandline = getenv ("bootargs"); @@ -64,8 +107,6 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) return 1; - theKernel = (void (*)(int, int, uint))images->ep; - s = getenv ("machid"); if (s) { machid = simple_strtoul (s, NULL, 16); @@ -74,8 +115,15 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima show_boot_progress (15); +#ifdef CONFIG_OF_LIBFDT + if (images->ft_len) + return bootm_linux_fdt(machid, images); +#endif + + kernel_entry = (void (*)(int, int, uint))images->ep; + debug ("## Transferring control to Linux (at address %08lx) ...\n", - (ulong) theKernel); + (ulong) kernel_entry); #if defined (CONFIG_SETUP_MEMORY_TAGS) || \ defined (CONFIG_CMDLINE_TAG) || \ @@ -99,27 +147,76 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima if (images->rd_start && images->rd_end) setup_initrd_tag (bd, images->rd_start, images->rd_end); #endif - setup_end_tag (bd); + setup_end_tag(bd); #endif - /* we assume that the kernel is in place */ - printf ("\nStarting kernel ...\n\n"); + announce_and_cleanup(); -#ifdef CONFIG_USB_DEVICE - { - extern void udc_disconnect (void); - udc_disconnect (); + kernel_entry(0, machid, bd->bi_boot_params); + /* does not return */ + + return 1; +} + +#if defined(CONFIG_OF_LIBFDT) +static int fixup_memory_node(void *blob) +{ + bd_t *bd = gd->bd; + int bank; + u64 start[CONFIG_NR_DRAM_BANKS]; + u64 size[CONFIG_NR_DRAM_BANKS]; + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start[bank] = bd->bi_dram[bank].start; + size[bank] = bd->bi_dram[bank].size; } -#endif - cleanup_before_linux (); + return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); +} + +static int bootm_linux_fdt(int machid, bootm_headers_t *images) +{ + ulong rd_len; + bd_t *bd = gd->bd; + char *s; + void (*kernel_entry)(int zero, int dt_machid, void *dtblob); + ulong bootmap_base = getenv_bootm_low(); + ulong of_size = images->ft_len; + char **of_flat_tree = &images->ft_addr; + ulong *initrd_start = &images->initrd_start; + ulong *initrd_end = &images->initrd_end; + struct lmb *lmb = &images->lmb; + int ret; + + kernel_entry = (void (*)(int, int, void *))images->ep; + + rd_len = images->rd_end - images->rd_start; + ret = boot_ramdisk_high(lmb, images->rd_start, rd_len, + initrd_start, initrd_end); + if (ret) + return ret; + + ret = boot_relocate_fdt(lmb, bootmap_base, of_flat_tree, &of_size); + if (ret) + return ret; - theKernel (0, machid, bd->bi_boot_params); + debug("## Transferring control to Linux (at address %08lx) ...\n", + (ulong) kernel_entry); + + fdt_chosen(*of_flat_tree, 1); + + fixup_memory_node(*of_flat_tree); + + fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1); + + announce_and_cleanup(); + + kernel_entry(0, machid, *of_flat_tree); /* does not return */ return 1; } - +#endif #if defined (CONFIG_SETUP_MEMORY_TAGS) || \ defined (CONFIG_CMDLINE_TAG) || \ @@ -239,4 +336,12 @@ static void setup_end_tag (bd_t *bd) params->hdr.size = 0; } +static ulong get_sp(void) +{ + ulong ret; + + asm("mov %0, sp" : "=r"(ret) : ); + return ret; +} + #endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */ diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c index 007f5ce..433d477 100644 --- a/arch/blackfin/cpu/initcode.c +++ b/arch/blackfin/cpu/initcode.c @@ -391,7 +391,9 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) /* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */ ADI_SYSCTRL_VALUES memory_settings; - uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT; + uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_LOCKCNT; + if (!ANOMALY_05000440) + actions |= SYSCTRL_PLLDIV; if (CONFIG_HAS_VR) { actions |= SYSCTRL_VRCTL; if (CONFIG_VR_CTL_VAL & FREQ_MASK) @@ -410,6 +412,8 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) serial_putc('e'); bfrom_SysControl(actions, &memory_settings, NULL); serial_putc('f'); + if (ANOMALY_05000440) + bfin_write_PLL_DIV(CONFIG_PLL_DIV_VAL); #if ANOMALY_05000432 bfin_write_SIC_IWR1(-1); #endif diff --git a/arch/blackfin/include/asm/mach-bf518/anomaly.h b/arch/blackfin/include/asm/mach-bf518/anomaly.h index d808b45..24918c5 100644 --- a/arch/blackfin/include/asm/mach-bf518/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf518/anomaly.h @@ -88,6 +88,8 @@ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) +/* IFLUSH sucks at life */ +#define ANOMALY_05000491 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000099 (0) diff --git a/arch/blackfin/include/asm/mach-bf527/anomaly.h b/arch/blackfin/include/asm/mach-bf527/anomaly.h index 9358afa..72a6369 100644 --- a/arch/blackfin/include/asm/mach-bf527/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h @@ -12,7 +12,7 @@ /* This file should be up to date with: * - Revision E, 03/15/2010; ADSP-BF526 Blackfin Processor Anomaly List - * - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List + * - Revision H, 04/29/2010; ADSP-BF527 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -220,6 +220,8 @@ #define ANOMALY_05000483 (1) /* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */ #define ANOMALY_05000485 (_ANOMALY_BF526_BF527(< 2, < 3)) +/* The CODEC Zero-Cross Detect Feature is not Functional */ +#define ANOMALY_05000487 (1) /* IFLUSH sucks at life */ #define ANOMALY_05000491 (1) diff --git a/arch/blackfin/include/asm/mach-bf533/anomaly.h b/arch/blackfin/include/asm/mach-bf533/anomaly.h index 78f8721..30e0eba 100644 --- a/arch/blackfin/include/asm/mach-bf533/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf533/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List + * - Revision F, 05/25/2010; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -206,6 +206,10 @@ #define ANOMALY_05000443 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) +/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */ +#define ANOMALY_05000471 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ @@ -357,6 +361,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf537/anomaly.h b/arch/blackfin/include/asm/mach-bf537/anomaly.h index 43df6af..d3a2966 100644 --- a/arch/blackfin/include/asm/mach-bf537/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf537/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List + * - Revision E, 05/25/2010; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -160,12 +160,16 @@ #define ANOMALY_05000443 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ #define ANOMALY_05000475 (1) /* TESTSET Instruction Cannot Be Interrupted */ #define ANOMALY_05000477 (1) +/* Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability */ +#define ANOMALY_05000480 (__SILICON_REVISION__ < 3) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) /* IFLUSH sucks at life */ @@ -211,6 +215,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf538/anomaly.h b/arch/blackfin/include/asm/mach-bf538/anomaly.h index e22d23c..4bc1f4a 100644 --- a/arch/blackfin/include/asm/mach-bf538/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf538/anomaly.h @@ -11,8 +11,8 @@ */ /* This file should be up to date with: - * - Revision H, 07/10/2009; ADSP-BF538/BF538F Blackfin Processor Anomaly List - * - Revision M, 07/10/2009; ADSP-BF539/BF539F Blackfin Processor Anomaly List + * - Revision I, 05/25/2010; ADSP-BF538/BF538F Blackfin Processor Anomaly List + * - Revision N, 05/25/2010; ADSP-BF539/BF539F Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -142,6 +142,8 @@ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) +/* IFLUSH sucks at life */ +#define ANOMALY_05000491 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000099 (0) @@ -184,6 +186,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf548/anomaly.h b/arch/blackfin/include/asm/mach-bf548/anomaly.h index 7bda09c..b9f4ecc 100644 --- a/arch/blackfin/include/asm/mach-bf548/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf548/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List + * - Revision J, 06/03/2010; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -110,8 +110,6 @@ #define ANOMALY_05000379 (1) /* 8-Bit NAND Flash Boot Mode Not Functional */ #define ANOMALY_05000382 (__SILICON_REVISION__ < 1) -/* Some ATAPI Modes Are Not Functional */ -#define ANOMALY_05000383 (1) /* Boot from OTP Memory Not Functional */ #define ANOMALY_05000385 (__SILICON_REVISION__ < 1) /* bfrom_SysControl() Firmware Routine Not Functional */ @@ -218,6 +216,8 @@ #define ANOMALY_05000481 (1) /* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */ #define ANOMALY_05000483 (1) +/* DDR Trim May Not Be Performed for Certain VLEV Values in OTP Page PBS00L */ +#define ANOMALY_05000484 (__SILICON_REVISION__ < 3) /* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */ #define ANOMALY_05000485 (__SILICON_REVISION__ >= 2) /* IFLUSH sucks at life */ @@ -272,6 +272,7 @@ #define ANOMALY_05000412 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000475 (0) #endif diff --git a/arch/blackfin/include/asm/mach-bf561/anomaly.h b/arch/blackfin/include/asm/mach-bf561/anomaly.h index 4c108c9..9313c27 100644 --- a/arch/blackfin/include/asm/mach-bf561/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf561/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List + * - Revision R, 05/25/2010; ADSP-BF561 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -286,12 +286,18 @@ #define ANOMALY_05000428 (__SILICON_REVISION__ > 3) /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ #define ANOMALY_05000443 (1) +/* SCKELOW Feature Is Not Functional */ +#define ANOMALY_05000458 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) +/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */ +#define ANOMALY_05000471 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ -#define ANOMALY_05000475 (__SILICON_REVISION__ < 4) +#define ANOMALY_05000475 (1) /* TESTSET Instruction Cannot Be Interrupted */ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ @@ -316,6 +322,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/i386/lib/board.c b/arch/i386/lib/board.c index 1129918..30cb9a2 100644 --- a/arch/i386/lib/board.c +++ b/arch/i386/lib/board.c @@ -221,8 +221,8 @@ void board_init_f (ulong gdp) re_end = (Elf32_Rel *)(rel_dyn_end + ((gd_t *)gdp)->load_off); do { - if (re_src->r_offset >= TEXT_BASE) - if (*(Elf32_Addr *)(re_src->r_offset - rel_offset) >= TEXT_BASE) + if (re_src->r_offset >= CONFIG_SYS_TEXT_BASE) + if (*(Elf32_Addr *)(re_src->r_offset - rel_offset) >= CONFIG_SYS_TEXT_BASE) *(Elf32_Addr *)(re_src->r_offset - rel_offset) -= rel_offset; } while (re_src++ < re_end); diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index 30428f1..ac71096 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -44,8 +44,8 @@ rte; #if defined(CONFIG_CF_SBF) -#define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) -#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) +#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) +#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) #endif .text @@ -138,7 +138,7 @@ vector192_255: asm_sbf_img_hdr: .long 0x00000000 /* checksum, not yet implemented */ .long 0x00020000 /* image length */ - .long TEXT_BASE /* image to be relocated at */ + .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */ asm_dram_init: move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 @@ -330,7 +330,7 @@ asm_dspi_rd_loop2: jsr asm_dspi_rd_status /* jump to memory and execute */ - move.l #(TEXT_BASE + 0x400), %a0 + move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0 move.l %a0, (%a1) jmp (%a0) @@ -364,7 +364,7 @@ _start: /* Set vector base register at the beginning of the Flash */ #if defined(CONFIG_CF_SBF) - move.l #TEXT_BASE, %d0 + move.l #CONFIG_SYS_TEXT_BASE, %d0 movec %d0, %VBR #else move.l #CONFIG_SYS_FLASH_BASE, %d0 diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index 9ef206a..d1f3d83 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -57,8 +57,8 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ -#if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) -.long _start - TEXT_BASE +#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) +.long _start - CONFIG_SYS_TEXT_BASE #else .long _START #endif @@ -106,7 +106,7 @@ _vectors: #if defined(CONFIG_SYS_INT_FLASH_BASE) && \ (defined(CONFIG_M5282) || defined(CONFIG_M5281)) - #if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) + #if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) .long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */ .long 0xFFFFFFFF /* all sectors protected */ .long 0x00000000 /* supervisor/User restriction */ @@ -150,7 +150,7 @@ _start: movec %d0, %RAMBAR1 #if defined(CONFIG_M5282) -#if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) +#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) /* Setup code in SRAM to initialize FLASHBAR, if start from internal Flash */ move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0 @@ -174,7 +174,7 @@ _after_flashbar_copy: /* Setup code to initialize FLASHBAR, if start from external Memory */ move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0 movec %d0, %FLASHBAR -#endif /* (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */ +#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */ #endif #endif @@ -182,7 +182,7 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) -#if defined(CONFIG_M5282) && (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) +#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) move.l #CONFIG_SYS_INT_FLASH_BASE, %d0 #else move.l #CONFIG_SYS_FLASH_BASE, %d0 @@ -297,7 +297,7 @@ clear_bss: /* set parameters for board_init_r */ move.l %a0,-(%sp) /* dest_addr */ move.l %d0,-(%sp) /* gd */ -#if defined(DEBUG) && (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \ +#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \ defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP) halt #endif diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index 738e4a7..8b69d1f 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -44,8 +44,8 @@ rte; #if defined(CONFIG_CF_SBF) -#define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) -#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) +#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) +#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR) #endif .text @@ -143,7 +143,7 @@ vector192_255: asm_sbf_img_hdr: .long 0x00000000 /* checksum, not yet implemented */ .long 0x00030000 /* image length */ - .long TEXT_BASE /* image to be relocated at */ + .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */ asm_dram_init: move.w #0x2700,%sr /* Mask off Interrupt */ @@ -358,7 +358,7 @@ asm_dspi_rd_loop2: jsr asm_dspi_rd_status /* jump to memory and execute */ - move.l #(TEXT_BASE + 0x400), %a0 + move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0 jmp (%a0) asm_dspi_wr_status: diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index 36438be..ec2cc16 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -22,5 +22,8 @@ #define _ASM_CONFIG_H_ #define CONFIG_LMB +#define CONFIG_SYS_BOOT_RAMDISK_HIGH +#define CONFIG_SYS_BOOT_GET_CMDLINE +#define CONFIG_SYS_BOOT_GET_KBD #endif diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 2e9a08d..98c248f 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -32,6 +32,22 @@ _start: mts rmsr, r0 /* disable cache */ addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ + + /* Find-out if u-boot is running on BIG/LITTLE endian platform + * There are some steps which is necessary to keep in mind: + * 1. Setup offset value to r6 + * 2. Store word offset value to address 0x0 + * 3. Load just byte from address 0x0 + * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest + * value that's why is on address 0x0 + * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3 + */ + addik r6, r0, 0x2 /* BIG/LITTLE endian offset */ + swi r6, r0, 0 + lbui r10, r0, 0 + swi r6, r0, 0x40 + swi r10, r0, 0x50 + /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ swi r6, r0, 0x0 /* reset address */ @@ -53,10 +69,10 @@ _start: shi r7, r0, 0x2 shi r6, r0, 0x6 /* - * Copy U-Boot code to TEXT_BASE + * Copy U-Boot code to CONFIG_SYS_TEXT_BASE * solve problem with sbrk_base */ -#if (CONFIG_SYS_RESET_ADDRESS != TEXT_BASE) +#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE) addi r4, r0, __end addi r5, r0, __text_start rsub r4, r5, r4 /* size = __end - __text_start */ @@ -75,26 +91,52 @@ _start: /* user_vector_exception */ addik r6, r0, _exception_handler sw r6, r1, r0 - lhu r7, r1, r0 - shi r7, r0, 0xa - shi r6, r0, 0xe + /* + * BIG ENDIAN memory map for user exception + * 0x8: 0xB000XXXX + * 0xC: 0xB808XXXX + * + * then it is necessary to count address for storing the most significant + * 16bits from _exception_handler address and copy it to + * 0xa address. Big endian use offset in r10=0 that's why is it just + * 0xa address. The same is done for the least significant 16 bits + * for 0xe address. + * + * LITTLE ENDIAN memory map for user exception + * 0x8: 0xXXXX00B0 + * 0xC: 0xXXXX08B8 + * + * Offset is for little endian setup to 0x2. rsubi instruction decrease + * address value to ensure that points to proper place which is + * 0x8 for the most significant 16 bits and + * 0xC for the least significant 16 bits + */ + lhu r7, r1, r10 + rsubi r8, r10, 0xa + sh r7, r0, r8 + rsubi r8, r10, 0xe + sh r6, r0, r8 #endif #ifdef CONFIG_SYS_INTC_0 /* interrupt_handler */ addik r6, r0, _interrupt_handler sw r6, r1, r0 - lhu r7, r1, r0 - shi r7, r0, 0x12 - shi r6, r0, 0x16 + lhu r7, r1, r10 + rsubi r8, r10, 0x12 + sh r7, r0, r8 + rsubi r8, r10, 0x16 + sh r6, r0, r8 #endif /* hardware exception */ addik r6, r0, _hw_exception_handler sw r6, r1, r0 - lhu r7, r1, r0 - shi r7, r0, 0x22 - shi r6, r0, 0x26 + lhu r7, r1, r10 + rsubi r8, r10, 0x22 + sh r7, r0, r8 + rsubi r8, r10, 0x26 + sh r6, r0, r8 /* enable instruction and data cache */ mfs r12, rmsr diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h index a4a75b7..b2757a4 100644 --- a/arch/microblaze/include/asm/byteorder.h +++ b/arch/microblaze/include/asm/byteorder.h @@ -50,6 +50,10 @@ static __inline__ __u16 ___arch__swab16 (__u16 half_word) #endif /* __GNUC__ */ +#ifdef __MICROBLAZEEL__ +#include <linux/byteorder/little_endian.h> +#else #include <linux/byteorder/big_endian.h> +#endif #endif /* __MICROBLAZE_BYTEORDER_H__ */ diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 3ff5c17..84267cd 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -31,6 +31,7 @@ #include <version.h> #include <watchdog.h> #include <stdio_dev.h> +#include <net.h> DECLARE_GLOBAL_DATA_PTR; @@ -42,6 +43,7 @@ extern int gpio_init (void); #ifdef CONFIG_SYS_INTC_0 extern int interrupts_init (void); #endif + #if defined(CONFIG_CMD_NET) extern int eth_init (bd_t * bis); #endif @@ -120,7 +122,7 @@ void board_init (void) puts ("SDRAM :\n"); printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF"); printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF"); - printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE); + printf ("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE); #if defined(CONFIG_CMD_FLASH) puts ("FLASH: "); @@ -165,8 +167,14 @@ void board_init (void) #if defined(CONFIG_CMD_NET) /* IP Address */ - bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); - eth_init (bd); + bd->bi_ip_addr = getenv_IPaddr("ipaddr"); + + printf("Net: "); + eth_initialize(gd->bd); + + uchar enetaddr[6]; + eth_getenv_enetaddr("ethaddr", enetaddr); + printf("MAC: %pM\n", enetaddr); #endif /* main_loop */ diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index 8e2c6d8..9f6d6d6 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -46,12 +46,9 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima char *of_flat_tree = NULL; #if defined(CONFIG_OF_LIBFDT) - ulong of_size = 0; - - /* find flattened device tree */ - ret = boot_get_fdt (flag, argc, argv, images, &of_flat_tree, &of_size); - if (ret) - return 1; + /* did generic code already find a device tree? */ + if (images->ft_len) + of_flat_tree = images->ft_addr; #endif theKernel = (void (*)(char *, ulong, ulong))images->ep; @@ -64,9 +61,8 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima show_boot_progress (15); - if (!(ulong) of_flat_tree) - of_flat_tree = (char *)simple_strtoul (argv[3], NULL, 16); - + if (!of_flat_tree && argc > 3) + of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16); #ifdef DEBUG printf ("## Transferring control to Linux (at address 0x%08lx) " \ "ramdisk 0x%08lx, FDT 0x%08lx...\n", diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c index 40a4d15..f32be52 100644 --- a/arch/nios2/lib/bootm.c +++ b/arch/nios2/lib/bootm.c @@ -36,11 +36,9 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima ulong initrd_end = images->rd_end; char *of_flat_tree = NULL; #if defined(CONFIG_OF_LIBFDT) - ulong of_size = 0; - - /* find flattened device tree */ - if (boot_get_fdt(flag, argc, argv, images, &of_flat_tree, &of_size)) - return 1; + /* did generic code already find a device tree? */ + if (images->ft_len) + of_flat_tree = images->ft_addr; #endif if (!of_flat_tree && argc > 3) of_flat_tree = (char *)simple_strtoul(argv[3], NULL, 16); diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S index a36af5a..573e6d0 100644 --- a/arch/powerpc/cpu/74xx_7xx/start.S +++ b/arch/powerpc/cpu/74xx_7xx/start.S @@ -42,6 +42,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #if !defined(CONFIG_DB64360) && \ !defined(CONFIG_DB64460) && \ @@ -94,17 +95,7 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ b boot_cold - sync - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - sync /* the boot code is located below the exception table */ @@ -188,7 +179,6 @@ _end_of_vectors: . = 0x2000 boot_cold: -boot_warm: /* disable everything */ li r0, 0 mtspr HID0, r0 @@ -288,14 +278,11 @@ in_flash: bl cpu_init_f sync - mr r3, r21 - - /* r3: BOOTFLAG */ /* run 1st part of board init code (from Flash) */ bl board_init_f sync - /* NOTREACHED */ + /* NOTREACHED - board_init_f() does not return */ .globl invalidate_bats invalidate_bats: @@ -722,10 +709,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: /* clear_bss: */ /* diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index d26b617..2265c8c 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -43,6 +43,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "MPC512X" @@ -100,7 +101,6 @@ version_string: .globl _start /* Start from here after reset/power on */ _start: - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ b boot_cold .globl _start_of_vectors @@ -260,8 +260,6 @@ in_flash: /* run low-level CPU init code (in Flash) */ bl cpu_init_f - /* r3: BOOTFLAG */ - mr r3, r21 /* run 1st part of board init code (in Flash) */ bl board_init_f @@ -615,10 +613,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S index 0af879e..da42557 100644 --- a/arch/powerpc/cpu/mpc5xx/start.S +++ b/arch/powerpc/cpu/mpc5xx/start.S @@ -43,6 +43,7 @@ #include <linux/config.h> #include <asm/processor.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -91,18 +92,6 @@ _start: li r4, CONFIG_SYS_ISB /* Set ISB bit */ or r3, r3, r4 mtspr 638, r3 - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x20 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: -boot_warm: /* Initialize machine status; enable machine check interrupt */ /*----------------------------------------------------------------------*/ @@ -188,10 +177,10 @@ in_flash: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (from Flash) */ + /* NOTREACHED - board_init_f() does not return */ + .globl _start_of_vectors _start_of_vectors: @@ -464,10 +453,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 8b9f09b..92858fc 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -38,6 +38,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -89,19 +90,6 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On */ - nop - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: -boot_warm: mfmsr r5 /* save msr contents */ /* Move CSBoot and adjust instruction pointer */ @@ -175,10 +163,10 @@ lowboot_reentry: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ + /* * Vector Table */ @@ -680,10 +668,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S index 3d79d8e..b5c160b 100644 --- a/arch/powerpc/cpu/mpc8220/start.S +++ b/arch/powerpc/cpu/mpc8220/start.S @@ -37,6 +37,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -88,19 +89,6 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On */ - nop - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: -boot_warm: mfmsr r5 /* save msr contents */ /* replace default MBAR base address from 0x80000000 @@ -144,10 +132,10 @@ boot_warm: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ + /* * Vector Table */ @@ -653,10 +641,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S index f3f595a..d10231e 100644 --- a/arch/powerpc/cpu/mpc824x/start.S +++ b/arch/powerpc/cpu/mpc824x/start.S @@ -49,6 +49,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -97,19 +98,6 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: -boot_warm: - /* Initialize machine status; enable machine check interrupt */ /*----------------------------------------------------------------------*/ li r3, MSR_KERNEL /* Set FP, ME, RI flags */ @@ -198,10 +186,10 @@ in_flash: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (from Flash) */ + /* NOTREACHED - board_init_f() does not return */ + .globl _start_of_vectors _start_of_vectors: @@ -595,10 +583,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index a435042..55c64ea 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -38,6 +38,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -161,18 +162,6 @@ _hrcw_table: .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/ - nop - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: #if defined(CONFIG_MPC8260ADS) && defined(CONFIG_SYS_DEFAULT_IMMR) lis r3, CONFIG_SYS_DEFAULT_IMMR@h nop @@ -185,7 +174,7 @@ boot_cold: stw r4, 0(r3) nop #endif /* CONFIG_MPC8260ADS && CONFIG_SYS_DEFAULT_IMMR */ -boot_warm: + mfmsr r5 /* save msr contents */ #if defined(CONFIG_COGENT) @@ -254,10 +243,10 @@ in_flash: bl init_debug /* set up debugging stuff */ #endif - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ + /* * Vector Table */ @@ -915,10 +904,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index c7d85a8..536604f 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -40,6 +40,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "MPC83XX" @@ -183,22 +184,9 @@ ppcDWload: .globl _start _start: /* time t 0 */ - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/ - nop - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - - -boot_cold: /* time t 3 */ lis r4, CONFIG_DEFAULT_IMMR@h nop -boot_warm: /* time t 5 */ + mfmsr r5 /* save msr contents */ /* 83xx manuals prescribe a specific sequence for updating IMMRBAR. */ @@ -302,11 +290,11 @@ in_flash: /* run low-level CPU init code (in Flash)*/ bl cpu_init_f - /* r3: BOOTFLAG */ - mr r3, r21 /* run 1st part of board init code (in Flash)*/ bl board_init_f + /* NOTREACHED - board_init_f() does not return */ + #ifndef CONFIG_NAND_SPL /* * Vector Table @@ -964,10 +952,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: #endif diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 3278b10..7e5e6b1 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -145,7 +145,7 @@ _start_e500: beq 2b /* Setup interrupt vectors */ - lis r1,TEXT_BASE@h + lis r1,CONFIG_SYS_TEXT_BASE@h mtspr IVPR,r1 li r1,0x0100 @@ -291,25 +291,25 @@ _start_e500: lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l - lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l /* The 85xx has the default boot window 0xff800000 - 0xffffffff */ lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #else /* - * create a temp mapping in AS=1 to the 1M TEXT_BASE space, the main - * image has been relocated to TEXT_BASE on the second stage. + * create a temp mapping in AS=1 to the 1M CONFIG_SYS_TEXT_BASE space, the main + * image has been relocated to CONFIG_SYS_TEXT_BASE on the second stage. */ lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@l - lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@l - lis r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h - ori r9,r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l + lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h + ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #endif mtspr MAS0,r6 @@ -432,6 +432,8 @@ _start_cont: bl board_init_f isync + /* NOTREACHED - board_init_f() does not return */ + #ifndef CONFIG_NAND_SPL . = EXC_OFF_SYS_RESET .globl _start_of_vectors @@ -1035,10 +1037,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index ed1e4ca..3817f19 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -40,6 +40,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -83,17 +84,7 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ b boot_cold - sync - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - sync /* the boot code is located below the exception table */ @@ -166,7 +157,6 @@ _end_of_vectors: . = 0x2000 boot_cold: -boot_warm: /* * NOTE: Only Cpu 0 will ever come here. Other cores go to an * address specified by the BPTR @@ -303,14 +293,12 @@ diag_done: #endif /* bl l2cache_enable */ - mr r3, r21 - /* r3: BOOTFLAG */ /* run 1st part of board init code (from Flash) */ bl board_init_f sync - /* NOTREACHED */ + /* NOTREACHED - board_init_f() does not return */ .globl invalidate_bats invalidate_bats: @@ -739,10 +727,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: /* clear_bss: */ /* @@ -861,8 +851,8 @@ setup_ccsrbar: stw r5, 0(r4) /* Store physical value of CCSR */ isync - lis r5, TEXT_BASE@h - ori r5,r5,TEXT_BASE@l + lis r5, CONFIG_SYS_TEXT_BASE@h + ori r5,r5,CONFIG_SYS_TEXT_BASE@l lwz r5, 0(r5) isync diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 7cf602f..4a8c5d9 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -50,6 +50,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/u-boot.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -96,18 +97,6 @@ version_string: _start: lis r3, CONFIG_SYS_IMMR@h /* position IMMR */ mtspr 638, r3 - li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ - b boot_cold - - . = EXC_OFF_SYS_RESET + 0x10 - - .globl _start_warm -_start_warm: - li r21, BOOTFLAG_WARM /* Software reboot */ - b boot_warm - -boot_cold: -boot_warm: /* Initialize machine status; enable machine check interrupt */ /*----------------------------------------------------------------------*/ @@ -202,10 +191,10 @@ in_flash: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ - mr r3, r21 - /* r3: BOOTFLAG */ bl board_init_f /* run 1st part of board init code (from Flash) */ + /* NOTREACHED - board_init_f() does not return */ + .globl _start_of_vectors _start_of_vectors: @@ -595,10 +584,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index c2d52bf..87caea1 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -261,6 +261,7 @@ GET_GOT bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f + /* NOTREACHED - board_init_f() does not return */ #endif #if defined(CONFIG_SYS_RAMBOOT) @@ -803,6 +804,7 @@ _start: bl cpu_init_f /* run low-level CPU init code (from Flash) */ bl board_init_f + /* NOTREACHED - board_init_f() does not return */ #endif #endif /* CONFIG_440 */ @@ -911,6 +913,7 @@ _start: GET_GOT /* initialize GOT access */ bl board_init_f /* run first part of init code (from Flash) */ + /* NOTREACHED - board_init_f() does not return */ #endif /* CONFIG_IOP480 */ @@ -1180,8 +1183,9 @@ _start: bl cpu_init_f /* run low-level CPU init code (from Flash) */ - /* NEVER RETURNS! */ bl board_init_f /* run first part of init code (from Flash) */ + /* NOTREACHED - board_init_f() does not return */ + #endif /* CONFIG_NAND_SPL */ #endif /* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */ @@ -1604,10 +1608,12 @@ in_ram: beq 4f 3: lwzu r4,4(r3) lwzux r0,r4,r11 + cmpwi r0,0 add r0,r0,r11 stw r10,0(r3) + beq- 5f stw r0,0(r4) - bdnz 3b +5: bdnz 3b 4: clear_bss: /* diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index d098657..a1942ca 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -22,6 +22,9 @@ #define _ASM_CONFIG_H_ #define CONFIG_LMB +#define CONFIG_SYS_BOOT_RAMDISK_HIGH +#define CONFIG_SYS_BOOT_GET_CMDLINE +#define CONFIG_SYS_BOOT_GET_KBD #ifndef CONFIG_MAX_MEM_MAPPED #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h index 7f9db8b..f763a54 100644 --- a/arch/powerpc/include/asm/immap_512x.h +++ b/arch/powerpc/include/asm/immap_512x.h @@ -1246,4 +1246,8 @@ static inline u32 get_pata_base (void) } #endif /* __ASSEMBLY__ */ +#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000 +#define CONFIG_SYS_MPC512x_USB_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET) + #endif /* __IMMAP_512x__ */ diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h index ea2d22d..b377705 100644 --- a/arch/powerpc/include/asm/u-boot.h +++ b/arch/powerpc/include/asm/u-boot.h @@ -62,7 +62,7 @@ typedef struct bd_info { unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */ unsigned long bi_vcofreq; /* VCO Freq, in MHz */ #endif - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ + unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ unsigned long bi_ip_addr; /* IP Address */ unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 2065b6d..cec7666 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -30,7 +30,7 @@ SOBJS-y += ppcstring.o SOBJS-y += ticks.o SOBJS-y += reloc.o -COBJS-y += bat_rw.o +COBJS-$(CONFIG_BAT_RW) += bat_rw.o COBJS-y += board.o COBJS-y += bootm.o COBJS-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount.o diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index bfdfa86..c0c7fd4 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -480,6 +480,7 @@ void board_init_f (ulong bootflag) */ addr_sp -= sizeof (bd_t); bd = (bd_t *) addr_sp; + memset(bd, 0, sizeof(bd_t)); gd->bd = bd; debug ("Reserving %zu Bytes for Board Info at: %08lx\n", sizeof (bd_t), addr_sp); @@ -512,9 +513,6 @@ void board_init_f (ulong bootflag) #ifdef CONFIG_SYS_SRAM_BASE bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */ bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */ -#else - bd->bi_sramstart = 0; - bd->bi_sramsize = 0; #endif #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ @@ -548,8 +546,6 @@ void board_init_f (ulong bootflag) } #endif - bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ - WATCHDOG_RESET (); bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ @@ -736,17 +732,10 @@ void board_init_r (gd_t *id, ulong dest_addr) # if defined(CONFIG_OXC) || defined(CONFIG_RMU) /* flash mapped at end of memory map */ - bd->bi_flashoffset = TEXT_BASE + flash_size; + bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size; # elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ -# else - bd->bi_flashoffset = 0; # endif -#else /* CONFIG_SYS_NO_FLASH */ - - bd->bi_flashsize = 0; - bd->bi_flashstart = 0; - bd->bi_flashoffset = 0; #endif /* !CONFIG_SYS_NO_FLASH */ WATCHDOG_RESET (); @@ -803,14 +792,8 @@ void board_init_r (gd_t *id, ulong dest_addr) if (s && ((*s == 'y') || (*s == 'Y'))) { bd->bi_iic_fast[0] = 1; bd->bi_iic_fast[1] = 1; - } else { - bd->bi_iic_fast[0] = 0; - bd->bi_iic_fast[1] = 0; } } -#else - bd->bi_iic_fast[0] = 0; - bd->bi_iic_fast[1] = 0; #endif /* CONFIG_I2CFAST */ #endif /* CONFIG_405GP, CONFIG_405EP */ #endif /* CONFIG_SYS_EXTBDINFO */ diff --git a/arch/sh/config.mk b/arch/sh/config.mk index 797bf4c..07ba68f 100644 --- a/arch/sh/config.mk +++ b/arch/sh/config.mk @@ -29,6 +29,6 @@ STANDALONE_LOAD_ADDR += -EB endif PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__ -PLATFORM_LDFLAGS += -e $(TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE) +PLATFORM_LDFLAGS += -e $(CONFIG_SYS_TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE) LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index c97e20c..a302fc2 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -89,7 +89,7 @@ static int sh_pci_init(void) static int sh_mem_env_init(void) { - mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE - + mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16); env_relocate(); jumptable_init(); diff --git a/arch/sparc/cpu/leon2/Makefile b/arch/sparc/cpu/leon2/Makefile index 7cc4420..91dc967 100644 --- a/arch/sparc/cpu/leon2/Makefile +++ b/arch/sparc/cpu/leon2/Makefile @@ -44,8 +44,9 @@ $(LIB): $(OBJS) include $(SRCTREE)/rules.mk $(START): $(START:.o=.S) - $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \ - -I$(TOPDIR)/include -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \ + $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ \ + -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) -I$(TOPDIR)/include \ + -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \ $(PLATFORM_CPPFLAGS) -Wall -Wstrict-prototypes \ -I$(TOPDIR)/board -c -o $(START) $(START:.o=.S) diff --git a/arch/sparc/cpu/leon2/prom.c b/arch/sparc/cpu/leon2/prom.c index 1a6c7f7..965a2fa 100644 --- a/arch/sparc/cpu/leon2/prom.c +++ b/arch/sparc/cpu/leon2/prom.c @@ -50,9 +50,9 @@ extern int __prom_start; #define PROM_SIZE_MASK (PROM_OFFS-1) #define __va(x) ( \ (void *)( ((unsigned long)(x))-PROM_OFFS+ \ - (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-TEXT_BASE ) \ + (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-CONFIG_SYS_TEXT_BASE ) \ ) -#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-TEXT_BASE)) +#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-CONFIG_SYS_TEXT_BASE)) struct property { char *name; diff --git a/arch/sparc/cpu/leon2/start.S b/arch/sparc/cpu/leon2/start.S index b1f1eb5..dd58262 100644 --- a/arch/sparc/cpu/leon2/start.S +++ b/arch/sparc/cpu/leon2/start.S @@ -455,7 +455,7 @@ _irq_entry: WRITE_PAUSE mov %l7, %o0 ! irq level set handler_irq, %o1 - set (CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o2 + set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2 add %o1, %o2, %o1 call %o1 add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr diff --git a/arch/sparc/cpu/leon3/Makefile b/arch/sparc/cpu/leon3/Makefile index 182543d..64c67f8 100644 --- a/arch/sparc/cpu/leon3/Makefile +++ b/arch/sparc/cpu/leon3/Makefile @@ -44,8 +44,9 @@ $(LIB): $(OBJS) include $(SRCTREE)/rules.mk $(START): $(START:.o=.S) - $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \ - -I$(TOPDIR)/include -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \ + $(CC) -D__ASSEMBLY__ $(DBGFLAGS) $(OPTFLAGS) -D__KERNEL__ \ + -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) -I$(TOPDIR)/include \ + -fno-builtin -ffreestanding -nostdinc -isystem $(gccincdir) -pipe \ $(PLATFORM_CPPFLAGS) -Wall -Wstrict-prototypes \ -I$(TOPDIR)/board -c -o $(START) $(START:.o=.S) diff --git a/arch/sparc/cpu/leon3/prom.c b/arch/sparc/cpu/leon3/prom.c index 18d2fb2..1bd28d4 100644 --- a/arch/sparc/cpu/leon3/prom.c +++ b/arch/sparc/cpu/leon3/prom.c @@ -54,9 +54,9 @@ extern int __prom_start; #define PROM_SIZE_MASK (PROM_OFFS-1) #define __va(x) ( \ (void *)( ((unsigned long)(x))-PROM_OFFS+ \ - (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-TEXT_BASE ) \ + (CONFIG_SYS_PROM_OFFSET-phys_base)+PAGE_OFFSET-CONFIG_SYS_TEXT_BASE ) \ ) -#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-TEXT_BASE)) +#define __phy(x) ((void *)(((unsigned long)(x))-PROM_OFFS+CONFIG_SYS_PROM_OFFSET-CONFIG_SYS_TEXT_BASE)) struct property { char *name; diff --git a/arch/sparc/cpu/leon3/start.S b/arch/sparc/cpu/leon3/start.S index bd634bd..5c0808a 100644 --- a/arch/sparc/cpu/leon3/start.S +++ b/arch/sparc/cpu/leon3/start.S @@ -369,8 +369,8 @@ snoop_detect: sethi %hi(0x00800000), %o0 lda [%g0] 2, %o1 and %o0, %o1, %o0 - sethi %hi(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o1 - st %o0, [%lo(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)+%o1] + sethi %hi(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o1 + st %o0, [%lo(leon3_snooping_avail+CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)+%o1] /* call relocate*/ nop @@ -410,7 +410,7 @@ _irq_entry: WRITE_PAUSE mov %l7, %o0 ! irq level set handler_irq, %o1 - set (CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE), %o2 + set (CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE), %o2 add %o1, %o2, %o1 call %o1 add %sp, SF_REGS_SZ, %o1 ! pt_regs ptr diff --git a/arch/sparc/include/asm/asmmacro.h b/arch/sparc/include/asm/asmmacro.h index aeb87ee..d2aa940 100644 --- a/arch/sparc/include/asm/asmmacro.h +++ b/arch/sparc/include/asm/asmmacro.h @@ -33,8 +33,8 @@ * c-code can be called. */ #define SAVE_ALL_HEAD \ - sethi %hi(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)), %l4; \ - jmpl %l4 + %lo(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)), %l6; + sethi %hi(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l4; \ + jmpl %l4 + %lo(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l6; #define SAVE_ALL \ SAVE_ALL_HEAD \ nop; diff --git a/arch/sparc/include/asm/config.h b/arch/sparc/include/asm/config.h index 36438be..6ddc349 100644 --- a/arch/sparc/include/asm/config.h +++ b/arch/sparc/include/asm/config.h @@ -22,5 +22,6 @@ #define _ASM_CONFIG_H_ #define CONFIG_LMB +#define CONFIG_SYS_BOOT_RAMDISK_HIGH #endif diff --git a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c index 1f76dd9..d64ad1b 100644 --- a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c +++ b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c @@ -43,7 +43,7 @@ unsigned long display_height; int checkboard (void) { puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n"); -#if (TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) +#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) puts (" Boot from Internal FLASH\n"); #endif diff --git a/board/BuS/EB+MCF-EV123/config.mk b/board/BuS/EB+MCF-EV123/config.mk index f03e396..50185ae 100644 --- a/board/BuS/EB+MCF-EV123/config.mk +++ b/board/BuS/EB+MCF-EV123/config.mk @@ -23,6 +23,6 @@ # sinclude $(OBJTREE)/board/$(BOARDDIR)/textbase.mk -ifndef TEXT_BASE -TEXT_BASE = 0xFE000000 +ifndef CONFIG_SYS_TEXT_BASE +CONFIG_SYS_TEXT_BASE = 0xFE000000 endif diff --git a/board/BuS/EB+MCF-EV123/textbase.mk b/board/BuS/EB+MCF-EV123/textbase.mk index ecde6ed..b97c034 100644 --- a/board/BuS/EB+MCF-EV123/textbase.mk +++ b/board/BuS/EB+MCF-EV123/textbase.mk @@ -1 +1 @@ -TEXT_BASE = 0xFFE00000 +CONFIG_SYS_TEXT_BASE = 0xFFE00000 diff --git a/board/BuS/eb_cpux9k2/config.mk b/board/BuS/eb_cpux9k2/config.mk index ff2cfd1..e554a45 100644 --- a/board/BuS/eb_cpux9k2/config.mk +++ b/board/BuS/eb_cpux9k2/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/LEOX/elpt860/config.mk b/board/LEOX/elpt860/config.mk deleted file mode 100644 index defc360..0000000 --- a/board/LEOX/elpt860/config.mk +++ /dev/null @@ -1,36 +0,0 @@ -####################################################################### -# -# Copyright (C) 2000, 2001, 2002, 2003 -# The LEOX team <team@leox.org>, http://www.leox.org -# -# LEOX.org is about the development of free hardware and software resources -# for system on chip. -# -# Description: U-Boot port on the LEOX's ELPT860 CPU board -# ~~~~~~~~~~~ -# -####################################################################### -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -####################################################################### - -# -# ELPT860 board -# - -TEXT_BASE = 0x02000000 -#TEXT_BASE = 0x00FB0000 diff --git a/board/LaCie/edminiv2/config.mk b/board/LaCie/edminiv2/config.mk index bf3581de..2ffd125 100644 --- a/board/LaCie/edminiv2/config.mk +++ b/board/LaCie/edminiv2/config.mk @@ -23,5 +23,6 @@ # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, # MA 02110-1301 USA # + # TEXT_BASE must equal the intended FLASH location of u-boot. -TEXT_BASE = 0xfff90000 +CONFIG_SYS_TEXT_BASE = 0xfff90000 diff --git a/board/Marvell/db64460/config.mk b/board/Marvell/db64460/config.mk deleted file mode 100644 index 5a434d9..0000000 --- a/board/Marvell/db64460/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# EVB64460 boards -# - -TEXT_BASE = 0xfff00000 diff --git a/board/Marvell/guruplug/config.mk b/board/Marvell/guruplug/config.mk index caa26b6..12d7737 100644 --- a/board/Marvell/guruplug/config.mk +++ b/board/Marvell/guruplug/config.mk @@ -22,6 +22,6 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x00600000 +CONFIG_SYS_TEXT_BASE = 0x00600000 KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk index 2bd9f79..761c2bb 100644 --- a/board/Marvell/mv88f6281gtw_ge/config.mk +++ b/board/Marvell/mv88f6281gtw_ge/config.mk @@ -22,7 +22,7 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x00600000 +CONFIG_SYS_TEXT_BASE = 0x00600000 # Kirkwood Boot Image configuration file KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/openrd_base/config.mk b/board/Marvell/openrd_base/config.mk index 8ae355e..5a49280 100644 --- a/board/Marvell/openrd_base/config.mk +++ b/board/Marvell/openrd_base/config.mk @@ -27,7 +27,7 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x00600000 +CONFIG_SYS_TEXT_BASE = 0x00600000 # Kirkwood Boot Image configuration file KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/rd6281a/config.mk b/board/Marvell/rd6281a/config.mk index 2bd9f79..761c2bb 100644 --- a/board/Marvell/rd6281a/config.mk +++ b/board/Marvell/rd6281a/config.mk @@ -22,7 +22,7 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x00600000 +CONFIG_SYS_TEXT_BASE = 0x00600000 # Kirkwood Boot Image configuration file KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/sheevaplug/config.mk b/board/Marvell/sheevaplug/config.mk index 2bd9f79..761c2bb 100644 --- a/board/Marvell/sheevaplug/config.mk +++ b/board/Marvell/sheevaplug/config.mk @@ -22,7 +22,7 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x00600000 +CONFIG_SYS_TEXT_BASE = 0x00600000 # Kirkwood Boot Image configuration file KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/RPXClassic/config.mk b/board/RPXClassic/config.mk deleted file mode 100644 index ae455e1..0000000 --- a/board/RPXClassic/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2001 -# Stäubli Faverges - <www.staubli.com> -# Pierre AUBERT p.aubert@staubli.com -# U-Boot port on RPXClassic LF (CLLF_BW31) board -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xff000000 diff --git a/board/RPXlite/config.mk b/board/RPXlite/config.mk deleted file mode 100644 index 6536b77..0000000 --- a/board/RPXlite/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RPXlite boards -# - -TEXT_BASE = 0xfff00000 diff --git a/board/RPXlite_dw/config.mk b/board/RPXlite_dw/config.mk deleted file mode 100644 index 7970910..0000000 --- a/board/RPXlite_dw/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# Sam Song, IEMC. SHU, samsongshu@yahoo.com.cn -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RPXlite dw boards : lite_dw -# - -TEXT_BASE = 0xff000000 diff --git a/board/RRvision/config.mk b/board/RRvision/config.mk deleted file mode 100644 index ab1c8d6..0000000 --- a/board/RRvision/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RedRock vision boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/a3000/config.mk b/board/a3000/config.mk deleted file mode 100644 index 798e032..0000000 --- a/board/a3000/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Artis A-3000 boards -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/logodl/Makefile b/board/a4m072/Makefile index 0795b6b..442e2d0 100644 --- a/board/logodl/Makefile +++ b/board/a4m072/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2000-2006 +# (C) Copyright 2003-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -25,15 +25,14 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := logodl.o flash.o -SOBJS := lowlevel_init.o +COBJS := $(BOARD).o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/a4m072/a4m072.c b/board/a4m072/a4m072.c new file mode 100644 index 0000000..ae7ccbb --- /dev/null +++ b/board/a4m072/a4m072.c @@ -0,0 +1,506 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * (C) Copyright 2010 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc5xxx.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <libfdt.h> +#include <netdev.h> +#include <led-display.h> +#include <linux/err.h> + +#include "mt46v32m16.h" + +#ifndef CONFIG_SYS_RAMBOOT +static void sdram_start (int hi_addr) +{ + long hi_addr_bit = hi_addr ? 0x01000000 : 0; + long control = SDRAM_CONTROL | hi_addr_bit; + + /* unlock mode register */ + out_be32((void *)MPC5XXX_SDRAM_CTRL, control | 0x80000000); + __asm__ volatile ("sync"); + + /* precharge all banks */ + out_be32((void *)MPC5XXX_SDRAM_CTRL, control | 0x80000002); + __asm__ volatile ("sync"); + +#if SDRAM_DDR + /* set mode register: extended mode */ + out_be32((void *)MPC5XXX_SDRAM_MODE, SDRAM_EMODE); + __asm__ volatile ("sync"); + + /* set mode register: reset DLL */ + out_be32((void *)MPC5XXX_SDRAM_MODE, SDRAM_MODE | 0x04000000); + __asm__ volatile ("sync"); +#endif + + /* precharge all banks */ + out_be32((void *)MPC5XXX_SDRAM_CTRL, control | 0x80000002); + __asm__ volatile ("sync"); + + /* auto refresh */ + out_be32((void *)MPC5XXX_SDRAM_CTRL, control | 0x80000004); + __asm__ volatile ("sync"); + + /* set mode register */ + out_be32((void *)MPC5XXX_SDRAM_MODE, SDRAM_MODE); + __asm__ volatile ("sync"); + + /* normal operation */ + out_be32((void *)MPC5XXX_SDRAM_CTRL, control); + __asm__ volatile ("sync"); +} +#endif + +/* + * ATTENTION: Although partially referenced initdram does NOT make real use + * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE + * is something else than 0x00000000. + */ + +phys_size_t initdram (int board_type) +{ + ulong dramsize = 0; + uint svr, pvr; + +#ifndef CONFIG_SYS_RAMBOOT + ulong test1, test2; + + /* setup SDRAM chip selects */ + out_be32((void *)MPC5XXX_SDRAM_CS0CFG, 0x0000001e); /* 2GB at 0x0 */ + out_be32((void *)MPC5XXX_SDRAM_CS1CFG, 0x80000000); /* disabled */ + __asm__ volatile ("sync"); + + /* setup config registers */ + out_be32((void *)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1); + out_be32((void *)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2); + __asm__ volatile ("sync"); + +#if SDRAM_DDR + /* set tap delay */ + out_be32((void *)MPC5XXX_CDM_PORCFG, SDRAM_TAPDELAY); + __asm__ volatile ("sync"); +#endif + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); + sdram_start(1); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else { + dramsize = test2; + } + + /* memory smaller than 1MB is impossible */ + if (dramsize < (1 << 20)) { + dramsize = 0; + } + + /* set SDRAM CS0 size according to the amount of RAM found */ + if (dramsize > 0) { + out_be32((void *)MPC5XXX_SDRAM_CS0CFG, + 0x13 + __builtin_ffs(dramsize >> 20) - 1); + } else { + out_be32((void *)MPC5XXX_SDRAM_CS0CFG, 0); /* disabled */ + } + +#else /* CONFIG_SYS_RAMBOOT */ + + /* retrieve size of memory connected to SDRAM CS0 */ + dramsize = in_be32((void *)MPC5XXX_SDRAM_CS0CFG) & 0xFF; + if (dramsize >= 0x13) { + dramsize = (1 << (dramsize - 0x13)) << 20; + } else { + dramsize = 0; + } + +#endif /* CONFIG_SYS_RAMBOOT */ + + /* + * On MPC5200B we need to set the special configuration delay in the + * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM + * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190: + * + * "The SDelay should be written to a value of 0x00000004. It is + * required to account for changes caused by normal wafer processing + * parameters." + */ + svr = get_svr(); + pvr = get_pvr(); + if ((SVR_MJREV(svr) >= 2) && + (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) { + + out_be32((void *)MPC5XXX_SDRAM_SDELAY, 0x04); + __asm__ volatile ("sync"); + } + + return dramsize; +} + +int checkboard (void) +{ + puts ("Board: A4M072\n"); + return 0; +} + +#ifdef CONFIG_PCI +static struct pci_controller hose; + +extern void pci_mpc5xxx_init(struct pci_controller *); + +void pci_init_board(void) +{ + pci_mpc5xxx_init(&hose); +} +#endif + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void +ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rv, num_if = 0; + + /* Initialize TSECs first */ + if ((rv = cpu_eth_init(bis)) >= 0) + num_if += rv; + else + printf("ERROR: failed to initialize FEC.\n"); + + if ((rv = pci_eth_init(bis)) >= 0) + num_if += rv; + else + printf("ERROR: failed to initialize PCI Ethernet.\n"); + + return num_if; +} +/* + * Miscellaneous late-boot configurations + * + * Initialize EEPROM write-protect GPIO pin. + */ +int misc_init_r(void) +{ +#if defined(CONFIG_SYS_EEPROM_WREN) + /* Enable GPIO pin */ + setbits_be32((void *)MPC5XXX_WU_GPIO_ENABLE, CONFIG_SYS_EEPROM_WP); + /* Set direction, output */ + setbits_be32((void *)MPC5XXX_WU_GPIO_DIR, CONFIG_SYS_EEPROM_WP); + /* De-assert write enable */ + setbits_be32((void *)MPC5XXX_WU_GPIO_DATA_O, CONFIG_SYS_EEPROM_WP); +#endif + return 0; +} +#if defined(CONFIG_SYS_EEPROM_WREN) +/* Input: <dev_addr> I2C address of EEPROM device to enable. + * <state> -1: deliver current state + * 0: disable write + * 1: enable write + * Returns: -1: wrong device address + * 0: dis-/en- able done + * 0/1: current state if <state> was -1. + */ +int eeprom_write_enable (unsigned dev_addr, int state) +{ + if (CONFIG_SYS_I2C_EEPROM_ADDR != dev_addr) { + return -1; + } else { + switch (state) { + case 1: + /* Enable write access */ + clrbits_be32((void *)MPC5XXX_WU_GPIO_DATA_O, CONFIG_SYS_EEPROM_WP); + state = 0; + break; + case 0: + /* Disable write access */ + setbits_be32((void *)MPC5XXX_WU_GPIO_DATA_O, CONFIG_SYS_EEPROM_WP); + state = 0; + break; + default: + /* Read current status back. */ + state = (0 == (in_be32((void *)MPC5XXX_WU_GPIO_DATA_O) & + CONFIG_SYS_EEPROM_WP)); + break; + } + } + return state; +} +#endif + +#ifdef CONFIG_CMD_DISPLAY +#define DISPLAY_BUF_SIZE 2 +static u8 display_buf[DISPLAY_BUF_SIZE]; +static u8 display_putc_pos; +static u8 display_out_pos; + +static u8 display_dot_enable; + +void display_set(int cmd) { + + if (cmd & DISPLAY_CLEAR) { + display_buf[0] = display_buf[1] = 0; + } + + if (cmd & DISPLAY_HOME) { + display_putc_pos = 0; + } + + if (cmd & DISPLAY_MARK) { + display_dot_enable = 1; + } else { + display_dot_enable = 0; + } +} + +#define SEG_A (1<<0) +#define SEG_B (1<<1) +#define SEG_C (1<<2) +#define SEG_D (1<<3) +#define SEG_E (1<<4) +#define SEG_F (1<<5) +#define SEG_G (1<<6) +#define SEG_P (1<<7) +#define SEG__ 0 + +/* + * +- A -+ + * | | + * F B + * | | + * +- G -+ + * | | + * E C + * | | + * +- D -+ P + * + * 0..9 index 0..9 + * A..Z index 10..35 + * - index 36 + * _ index 37 + */ + +#define SYMBOL_DASH (36) +#define SYMBOL_UNDERLINE (37) + +static u8 display_char2seg7_tbl[]= +{ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_E | SEG_F, /* 0 */ + SEG_B | SEG_C, /* 1 */ + SEG_A | SEG_B | SEG_D | SEG_E | SEG_G, /* 2 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_G, /* 3 */ + SEG_B | SEG_C | SEG_F | SEG_G, /* 4 */ + SEG_A | SEG_C | SEG_D | SEG_F | SEG_G, /* 5 */ + SEG_A | SEG_C | SEG_D | SEG_E | SEG_F | SEG_G, /* 6 */ + SEG_A | SEG_B | SEG_C, /* 7 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_E | SEG_F | SEG_G, /* 8 */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_F | SEG_G, /* 9 */ + SEG_A | SEG_B | SEG_C | SEG_E | SEG_F | SEG_G, /* A */ + SEG_C | SEG_D | SEG_E | SEG_F | SEG_G, /* b */ + SEG_A | SEG_D | SEG_E | SEG_F, /* C */ + SEG_B | SEG_C | SEG_D | SEG_E | SEG_G, /* d */ + SEG_A | SEG_D | SEG_E | SEG_F | SEG_G, /* E */ + SEG_A | SEG_E | SEG_F | SEG_G, /* F */ + SEG_A | SEG_B | SEG_C | SEG_D | SEG_F | SEG_G, /* g */ + SEG_B | SEG_C | SEG_E | SEG_F | SEG_G, /* H */ + SEG_E | SEG_F, /* I */ + SEG_B | SEG_C | SEG_D | SEG_E, /* J */ + SEG_A, /* K - special 1 */ + SEG_D | SEG_E | SEG_F, /* L */ + SEG_B, /* m - special 2 */ + SEG_C | SEG_E | SEG_G, /* n */ + SEG_C | SEG_D | SEG_E | SEG_G, /* o */ + SEG_A | SEG_B | SEG_E | SEG_F | SEG_G, /* P */ + SEG_A | SEG_B | SEG_C | SEG_F | SEG_G, /* q */ + SEG_E | SEG_G, /* r */ + SEG_A | SEG_C | SEG_D | SEG_F | SEG_G, /* S */ + SEG_D | SEG_E | SEG_F | SEG_G, /* t */ + SEG_B | SEG_C | SEG_D | SEG_E | SEG_F, /* U */ + SEG_C | SEG_D | SEG_E | SEG_F, /* V */ + SEG_C, /* w - special 3 */ + SEG_B | SEG_C | SEG_E | SEG_F | SEG_G, /* X */ + SEG_B | SEG_C | SEG_D | SEG_F | SEG_G, /* Y */ + SEG_A | SEG_B | SEG_D | SEG_E | SEG_G, /* Z */ + SEG_G, /* - */ + SEG_D /* _ */ +}; + +/* Convert char to the LED segments representation */ +static u8 display_char2seg7(char c) +{ + u8 val = 0; + + if (c >= '0' && c <= '9') + c -= '0'; + else if (c >= 'a' && c <= 'z') + c -= 'a' - 10; + else if (c >= 'A' && c <= 'Z') + c -= 'A' - 10; + else if (c == '-') + c = SYMBOL_DASH; + else if ((c == '_') || (c == '.')) + c = SYMBOL_UNDERLINE; + else + c = ' '; /* display unsupported symbols as space */ + + if (c != ' ') + val = display_char2seg7_tbl[(int)c]; + + /* Handle DP LED here */ + if (display_dot_enable) { + val |= SEG_P; + } + + return val; +} + +static inline int display_putc_nomark(char c) +{ + if (display_putc_pos >= DISPLAY_BUF_SIZE) + return -1; + + display_buf[display_putc_pos++] = display_char2seg7(c); + /* one-symbol message should be steady */ + if (display_putc_pos == 1) + display_buf[display_putc_pos] = display_char2seg7(c); + + return c; +} + +int display_putc(char c) +{ + /* Mark the codes from the "display" command with the DP LED */ + display_set(DISPLAY_MARK); + return display_putc_nomark(c); +} + +/* + * Flush current symbol to the LED display hardware + */ +static inline void display_flush(void) +{ + u32 val = display_buf[display_out_pos]; + + val |= (val << 8) | (val << 16) | (val << 24); + out_be32((void *)CONFIG_SYS_DISP_CHR_RAM, val); +} + +/* + * Output contents of the software display buffer to the LED display every 0.5s + */ +void board_show_activity(ulong timestamp) +{ + static ulong last; + static u8 once; + + if (!once || (timestamp - last >= (CONFIG_SYS_HZ / 2))) { + display_flush(); + display_out_pos ^= 1; + last = timestamp; + once = 1; + } +} + +/* + * Empty fake function + */ +void show_activity(int arg) +{ +} +#endif +#if defined (CONFIG_SHOW_BOOT_PROGRESS) +static int a4m072_status2code(int status, char *buf) +{ + char c = 0; + + if (((status > 0) && (status <= 8)) || + ((status >= 100) && (status <= 108)) || + ((status < 0) && (status >= -9)) || + (status == -100) || (status == -101) || + ((status <= -103) && (status >= -113))) { + c = '5'; + } else if (((status >= 9) && (status <= 14)) || + ((status >= 120) && (status <= 123)) || + ((status >= 125) && (status <= 129)) || + ((status >= -13) && (status <= -10)) || + (status == -120) || (status == -122) || + ((status <= -124) && (status >= -127)) || + (status == -129)) { + c = '8'; + } else if (status == 15) { + c = '9'; + } else if ((status <= -30) && (status >= -32)) { + c = 'A'; + } else if (((status <= -35) && (status >= -40)) || + ((status <= -42) && (status >= -51)) || + ((status <= -53) && (status >= -58)) || + (status == -64) || + ((status <= -80) && (status >= -83)) || + (status == -130) || (status == -140) || + (status == -150)) { + c = 'B'; + } + + if (c == 0) + return -EINVAL; + + buf[0] = (status < 0) ? '-' : c; + buf[1] = c; + + return 0; +} + +void show_boot_progress(int status) +{ + char buf[2]; + + if (a4m072_status2code(status, buf) < 0) + return; + + display_set(0); /* Clear DP Led */ + display_putc_nomark(buf[0]); + display_putc_nomark(buf[1]); + display_set(DISPLAY_HOME); + display_out_pos = 0; /* reset output position */ + + /* we want to flush status 15 now */ + if (status == 15) + display_flush(); +} +#endif diff --git a/board/matrix_vision/mvbc_p/config.mk b/board/a4m072/config.mk index c2c09f4..c6ba51d 100644 --- a/board/matrix_vision/mvbc_p/config.mk +++ b/board/a4m072/config.mk @@ -21,10 +21,19 @@ # MA 02111-1307 USA # +# +# a4m072 board: +# +# Valid values for TEXT_BASE is: +# +# 0xFE000000 boot low +# + sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp ifndef TEXT_BASE -TEXT_BASE = 0xFF800000 +## Standard: boot low +TEXT_BASE = 0xFE000000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/a4m072/mt46v32m16.h b/board/a4m072/mt46v32m16.h new file mode 100644 index 0000000..d7561fb --- /dev/null +++ b/board/a4m072/mt46v32m16.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 1 /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40010000 +#define SDRAM_CONTROL 0x704f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif diff --git a/board/actux1/config.mk b/board/actux1/config.mk index a0dbe0b..dd1d8d3 100644 --- a/board/actux1/config.mk +++ b/board/actux1/config.mk @@ -1,4 +1,4 @@ -TEXT_BASE = 0x00e00000 +CONFIG_SYS_TEXT_BASE = 0x00e00000 # include NPE ethernet driver BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a diff --git a/board/actux2/config.mk b/board/actux2/config.mk index a0dbe0b..dd1d8d3 100644 --- a/board/actux2/config.mk +++ b/board/actux2/config.mk @@ -1,4 +1,4 @@ -TEXT_BASE = 0x00e00000 +CONFIG_SYS_TEXT_BASE = 0x00e00000 # include NPE ethernet driver BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a diff --git a/board/actux3/config.mk b/board/actux3/config.mk index a0dbe0b..dd1d8d3 100644 --- a/board/actux3/config.mk +++ b/board/actux3/config.mk @@ -1,4 +1,4 @@ -TEXT_BASE = 0x00e00000 +CONFIG_SYS_TEXT_BASE = 0x00e00000 # include NPE ethernet driver BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a diff --git a/board/actux4/config.mk b/board/actux4/config.mk index f2b5fc9..09ae589 100644 --- a/board/actux4/config.mk +++ b/board/actux4/config.mk @@ -1,4 +1,4 @@ -TEXT_BASE = 0x00e00000 +CONFIG_SYS_TEXT_BASE = 0x00e00000 # include NPE ethernet driver BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a diff --git a/board/adder/config.mk b/board/adder/config.mk deleted file mode 100644 index 4691a69..0000000 --- a/board/adder/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (C) 2004 Arabella Software Ltd. -# Yuli Barcohen <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Analogue&Micro Adder boards family -# -TEXT_BASE = 0xFE000000 diff --git a/board/afeb9260/config.mk b/board/afeb9260/config.mk index 9ce161e..2077692 100644 --- a/board/afeb9260/config.mk +++ b/board/afeb9260/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/alaska/config.mk b/board/alaska/config.mk deleted file mode 100644 index 99d28a5..0000000 --- a/board/alaska/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2003-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# alaska board -# - -TEXT_BASE = 0xfff00000 -# TEXT_BASE = 0x00100000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/altera/nios2-generic/config.mk b/board/altera/nios2-generic/config.mk index d500133..95e75af 100644 --- a/board/altera/nios2-generic/config.mk +++ b/board/altera/nios2-generic/config.mk @@ -22,7 +22,7 @@ # # we get text_base from board config header, so do not use this -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include diff --git a/board/amcc/acadia/config.mk b/board/amcc/acadia/config.mk index 01db41c..2f2787f 100644 --- a/board/amcc/acadia/config.mk +++ b/board/amcc/acadia/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2007 +# (C) Copyright 2007-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -25,16 +25,13 @@ # AMCC 405EZ Reference Platform (Acadia) board # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFF80000 -endif - ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG endif -ifdef CONFIG_NAND_U_BOOT +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +else ifdef CONFIG_NAND_U_BOOT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds endif diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk index 72b6bc0..7ca16a0 100644 --- a/board/amcc/bamboo/config.mk +++ b/board/amcc/bamboo/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2002-2007 +# (C) Copyright 2002-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -21,12 +21,6 @@ # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) @@ -37,6 +31,9 @@ ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 endif -ifdef CONFIG_NAND_U_BOOT +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +else ifdef CONFIG_NAND_U_BOOT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds endif diff --git a/board/amcc/bluestone/config.mk b/board/amcc/bluestone/config.mk index e2194e4..d5d66eb 100644 --- a/board/amcc/bluestone/config.mk +++ b/board/amcc/bluestone/config.mk @@ -23,12 +23,6 @@ # Applied Micro APM821XX Evaluation board. # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/bubinga/config.mk b/board/amcc/bubinga/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/amcc/bubinga/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/amcc/canyonlands/config.mk b/board/amcc/canyonlands/config.mk index 3d6a608..abf2a26 100644 --- a/board/amcc/canyonlands/config.mk +++ b/board/amcc/canyonlands/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2008 +# (C) Copyright 2008-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,12 +24,6 @@ # AMCC 460EX/460GT Evaluation Board (Canyonlands) board # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) @@ -40,6 +34,9 @@ ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 endif -ifdef CONFIG_NAND_U_BOOT +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +else ifdef CONFIG_NAND_U_BOOT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds endif diff --git a/board/amcc/ebony/config.mk b/board/amcc/ebony/config.mk index 60d3bf4..9eac8b9 100644 --- a/board/amcc/ebony/config.mk +++ b/board/amcc/ebony/config.mk @@ -21,18 +21,6 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFFC0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/katmai/config.mk b/board/amcc/katmai/config.mk index ef0cf96..f5dfbaf 100644 --- a/board/amcc/katmai/config.mk +++ b/board/amcc/katmai/config.mk @@ -25,8 +25,6 @@ # AMCC 440SPe Evaluation (Katmai) board # -TEXT_BASE = 0xFFFA0000 - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/kilauea/config.mk b/board/amcc/kilauea/config.mk index b3d3f22..4ae3ea9 100644 --- a/board/amcc/kilauea/config.mk +++ b/board/amcc/kilauea/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2007 +# (C) Copyright 2007-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -21,16 +21,13 @@ # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif - ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG endif -ifdef CONFIG_NAND_U_BOOT +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +else ifdef CONFIG_NAND_U_BOOT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds endif diff --git a/board/amcc/luan/config.mk b/board/amcc/luan/config.mk index 5e4182d..9eac8b9 100644 --- a/board/amcc/luan/config.mk +++ b/board/amcc/luan/config.mk @@ -21,18 +21,6 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0x00001000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0xFBD00000 -else -TEXT_BASE = 0xFFFB0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/makalu/config.mk b/board/amcc/makalu/config.mk deleted file mode 100644 index a46b197..0000000 --- a/board/amcc/makalu/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFA0000 diff --git a/board/amcc/ocotea/config.mk b/board/amcc/ocotea/config.mk index b62e776..75634ad 100644 --- a/board/amcc/ocotea/config.mk +++ b/board/amcc/ocotea/config.mk @@ -25,14 +25,6 @@ # AMCC 440GX Reference Platform (Ocotea) board # -#TEXT_BASE = 0xFFFE0000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFFC0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/redwood/config.mk b/board/amcc/redwood/config.mk index 381f2b2..f10d812 100644 --- a/board/amcc/redwood/config.mk +++ b/board/amcc/redwood/config.mk @@ -25,12 +25,6 @@ # AMCC 460SX Reference Platform (redwood) board # -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xfffb0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/sequoia/config.mk b/board/amcc/sequoia/config.mk index c8e2dff..73efe72 100644 --- a/board/amcc/sequoia/config.mk +++ b/board/amcc/sequoia/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2002 +# (C) Copyright 2002-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,12 +24,6 @@ # AMCC 440EPx Reference Platform (Sequoia) board # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) @@ -40,6 +34,9 @@ ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 endif -ifdef CONFIG_NAND_U_BOOT +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +else ifdef CONFIG_NAND_U_BOOT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds endif diff --git a/board/amcc/taihu/config.mk b/board/amcc/taihu/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/amcc/taihu/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/amcc/taishan/config.mk b/board/amcc/taishan/config.mk index ee5eb1b..3d18a38 100644 --- a/board/amcc/taishan/config.mk +++ b/board/amcc/taishan/config.mk @@ -25,14 +25,6 @@ # AMCC 440GX Reference Platform (Taishan) board # -#TEXT_BASE = 0xFFFE0000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFFC0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/walnut/config.mk b/board/amcc/walnut/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/amcc/walnut/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/amcc/yosemite/config.mk b/board/amcc/yosemite/config.mk index df5466e..9eac8b9 100644 --- a/board/amcc/yosemite/config.mk +++ b/board/amcc/yosemite/config.mk @@ -21,18 +21,6 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0x00001000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0xFBD00000 -else -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/amcc/yucca/config.mk b/board/amcc/yucca/config.mk index 3ce3cc1..179df64 100644 --- a/board/amcc/yucca/config.mk +++ b/board/amcc/yucca/config.mk @@ -26,9 +26,9 @@ # ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 +CONFIG_SYS_TEXT_BASE = 0x07FD0000 else -TEXT_BASE = 0xfffb0000 +CONFIG_SYS_TEXT_BASE = 0xfffb0000 endif PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/board/amirix/ap1000/config.mk b/board/amirix/ap1000/config.mk index 09c6efa..2d075b6 100644 --- a/board/amirix/ap1000/config.mk +++ b/board/amirix/ap1000/config.mk @@ -21,10 +21,5 @@ # MA 02111-1307 USA # -# Start at bottom of RAM, but at an aliased address so that it looks -# like it's not in RAM. This is a bit of voodoo to allow it to be -# run from RAM instead of Flash. -TEXT_BASE = 0x08000000 - # Use board specific linker script LDSCRIPT := $(SRCTREE)/board/amirix/ap1000/u-boot.lds diff --git a/board/apollon/config.mk b/board/apollon/config.mk index 2b464e7..66005d4 100644 --- a/board/apollon/config.mk +++ b/board/apollon/config.mk @@ -13,13 +13,13 @@ # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x83e80000 +CONFIG_SYS_TEXT_BASE = 0x83e80000 # Used with full SRAM boot. # This is either with a GP system or a signed boot image. # easiest, and safest way to go if you can. -#TEXT_BASE = 0x40270000 +#CONFIG_SYS_TEXT_BASE = 0x40270000 # Handy to get symbols to debug ROM version. -#TEXT_BASE = 0x0 -#TEXT_BASE = 0x08000000 +#CONFIG_SYS_TEXT_BASE = 0x0 +#CONFIG_SYS_TEXT_BASE = 0x08000000 diff --git a/board/apollon/lowlevel_init.S b/board/apollon/lowlevel_init.S index 64550f6..f066fe4 100644 --- a/board/apollon/lowlevel_init.S +++ b/board/apollon/lowlevel_init.S @@ -46,7 +46,7 @@ #define SDRAM_BASE_ADDRESS 0x80008000 _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/armadillo/config.mk b/board/armadillo/config.mk index 23c432f..ecb8b74 100644 --- a/board/armadillo/config.mk +++ b/board/armadillo/config.mk @@ -26,4 +26,4 @@ # #address where u-boot will be relocated -TEXT_BASE = 0xc0f80000 +CONFIG_SYS_TEXT_BASE = 0xc0f80000 diff --git a/board/armltd/integrator/config.mk b/board/armltd/integrator/config.mk index 25b79b3..8b57af1 100644 --- a/board/armltd/integrator/config.mk +++ b/board/armltd/integrator/config.mk @@ -2,4 +2,4 @@ # image should be loaded at 0x01000000 # -TEXT_BASE = 0x01000000 +CONFIG_SYS_TEXT_BASE = 0x01000000 diff --git a/board/armltd/versatile/config.mk b/board/armltd/versatile/config.mk index 25b79b3..8b57af1 100644 --- a/board/armltd/versatile/config.mk +++ b/board/armltd/versatile/config.mk @@ -2,4 +2,4 @@ # image should be loaded at 0x01000000 # -TEXT_BASE = 0x01000000 +CONFIG_SYS_TEXT_BASE = 0x01000000 diff --git a/board/assabet/config.mk b/board/assabet/config.mk index 74cb419..d9866a0 100644 --- a/board/assabet/config.mk +++ b/board/assabet/config.mk @@ -4,4 +4,4 @@ # The Intel Assabet 1 bank of 32 MiB SDRAM # -TEXT_BASE = 0xc1f00000 +CONFIG_SYS_TEXT_BASE = 0xc1f00000 diff --git a/board/astro/mcf5373l/config.mk b/board/astro/mcf5373l/config.mk index 6316a30..ad63dd1 100644 --- a/board/astro/mcf5373l/config.mk +++ b/board/astro/mcf5373l/config.mk @@ -22,6 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = $(CONFIG_TEXT_BASE) - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) diff --git a/board/atc/config.mk b/board/atc/config.mk index dd854e7..ebd758c 100644 --- a/board/atc/config.mk +++ b/board/atc/config.mk @@ -25,14 +25,4 @@ # ATC boards # -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_atc.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# - -TEXT_BASE := 0xFF000000 - -# RAM version -#TEXT_BASE := 0x100000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/atmel/at91cap9adk/config.mk b/board/atmel/at91cap9adk/config.mk index e241aee..797da0e 100644 --- a/board/atmel/at91cap9adk/config.mk +++ b/board/atmel/at91cap9adk/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x73000000 +CONFIG_SYS_TEXT_BASE = 0x73000000 diff --git a/board/atmel/at91rm9200dk/config.mk b/board/atmel/at91rm9200dk/config.mk index 9ce161e..2077692 100644 --- a/board/atmel/at91rm9200dk/config.mk +++ b/board/atmel/at91rm9200dk/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/atmel/at91rm9200ek/config.mk b/board/atmel/at91rm9200ek/config.mk index 9ce161e..2077692 100644 --- a/board/atmel/at91rm9200ek/config.mk +++ b/board/atmel/at91rm9200ek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/atmel/at91sam9260ek/config.mk b/board/atmel/at91sam9260ek/config.mk index ff2cfd1..e554a45 100644 --- a/board/atmel/at91sam9260ek/config.mk +++ b/board/atmel/at91sam9260ek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9261ek/config.mk b/board/atmel/at91sam9261ek/config.mk index ff2cfd1..e554a45 100644 --- a/board/atmel/at91sam9261ek/config.mk +++ b/board/atmel/at91sam9261ek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9263ek/config.mk b/board/atmel/at91sam9263ek/config.mk index ff2cfd1..e554a45 100644 --- a/board/atmel/at91sam9263ek/config.mk +++ b/board/atmel/at91sam9263ek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9m10g45ek/config.mk b/board/atmel/at91sam9m10g45ek/config.mk index 7fe9d03..9d3c5ae 100644 --- a/board/atmel/at91sam9m10g45ek/config.mk +++ b/board/atmel/at91sam9m10g45ek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x73f00000 +CONFIG_SYS_TEXT_BASE = 0x73f00000 diff --git a/board/atmel/at91sam9rlek/config.mk b/board/atmel/at91sam9rlek/config.mk index ff2cfd1..e554a45 100644 --- a/board/atmel/at91sam9rlek/config.mk +++ b/board/atmel/at91sam9rlek/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/atngw100/config.mk b/board/atmel/atngw100/config.mk index 9a794e5..ea76d05 100644 --- a/board/atmel/atngw100/config.mk +++ b/board/atmel/atngw100/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_LDFLAGS += --gc-sections diff --git a/board/atmel/atstk1000/config.mk b/board/atmel/atstk1000/config.mk index 40e55fe..8c03b77 100644 --- a/board/atmel/atstk1000/config.mk +++ b/board/atmel/atstk1000/config.mk @@ -1,4 +1,4 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_LDFLAGS += --gc-sections -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 LDSCRIPT = $(src)board/atmel/atstk1000/u-boot.lds diff --git a/board/atum8548/config.mk b/board/atum8548/config.mk deleted file mode 100644 index a13f52d..0000000 --- a/board/atum8548/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright 2004, 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# atum8548 board -# TEXT_BASE = 0xfff80000 -# TEXT_BASE = 0xfffff000 -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/avnet/fx12mm/config.mk b/board/avnet/fx12mm/config.mk index f5a6039..78dde62 100644 --- a/board/avnet/fx12mm/config.mk +++ b/board/avnet/fx12mm/config.mk @@ -23,4 +23,7 @@ # # -sinclude $(SRCTREE)/board/xilinx/ppc405-generic/config.mk +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +endif diff --git a/board/avnet/v5fx30teval/config.mk b/board/avnet/v5fx30teval/config.mk index 51448ce..78dde62 100644 --- a/board/avnet/v5fx30teval/config.mk +++ b/board/avnet/v5fx30teval/config.mk @@ -23,4 +23,7 @@ # # -sinclude $(SRCTREE)/board/xilinx/ppc440-generic/config.mk +ifdef CONFIG_SYS_LDSCRIPT +# need to strip off double quotes +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +endif diff --git a/board/barco/config.mk b/board/barco/config.mk deleted file mode 100644 index f950c07..0000000 --- a/board/barco/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Barco Hydra/SCN boards -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/bc3450/config.mk b/board/bc3450/config.mk deleted file mode 100644 index 47e9955..0000000 --- a/board/bc3450/config.mk +++ /dev/null @@ -1,41 +0,0 @@ -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# BC3450 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFC000000 boot low (standard configuration with room for max 64 MByte -# Flash ROM) -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot low -TEXT_BASE = 0xFC000000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/bct-brettl2/config.mk b/board/bct-brettl2/config.mk index dfd9456..0c02d44 100644 --- a/board/bct-brettl2/config.mk +++ b/board/bct-brettl2/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf536-0.3 diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk index 30b92a3..9a54dbf 100644 --- a/board/bf518f-ezbrd/config.mk +++ b/board/bf518f-ezbrd/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf518-0.0 diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk index aaf4541..46c09ea 100644 --- a/board/bf526-ezbrd/config.mk +++ b/board/bf526-ezbrd/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf526-0.0 diff --git a/board/bf527-ad7160-eval/config.mk b/board/bf527-ad7160-eval/config.mk index 9784810..a6c272a 100644 --- a/board/bf527-ad7160-eval/config.mk +++ b/board/bf527-ad7160-eval/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf527-0.2 diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk index 78eebff..790fe99 100644 --- a/board/bf527-ezkit/config.mk +++ b/board/bf527-ezkit/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf527-0.0 diff --git a/board/bf527-ezkit/video.c b/board/bf527-ezkit/video.c index 87e7658..ca5e9b0 100644 --- a/board/bf527-ezkit/video.c +++ b/board/bf527-ezkit/video.c @@ -24,7 +24,7 @@ #define LCD_Y_RES 240 /* Vertical Resolution */ #define DMA_BUS_SIZE 16 -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 /* lq035q1 */ +#ifdef CONFIG_BF527_EZKIT_REV_2_1 /* lq035q1 */ #if !defined(CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI) && \ !defined(CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI) @@ -125,7 +125,7 @@ #define PPI_PACK_EN 0x80 #define PPI_POLS_1 0x8000 -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 static struct spi_slave *slave; static int lq035q1_control(unsigned char reg, unsigned short value) { @@ -305,7 +305,7 @@ void EnableTIMER12(void) int video_init(void *dst) { -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 lq035q1_control(LQ035_SHUT_CTL, LQ035_ON); lq035q1_control(LQ035_DRIVER_OUTPUT_CTL, (CONFIG_LQ035Q1_LCD_MODE & LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT); @@ -318,7 +318,7 @@ int video_init(void *dst) Init_PPI(); EnablePPI(); -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 EnableTIMER12(); #else /* Frame sync 2 (VS) needs to start at least one PPI clk earlier */ @@ -388,7 +388,7 @@ void video_stop(void) DisableDMA(); DisableTIMER0(); DisableTIMER1(); -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 lq035q1_control(LQ035_SHUT_CTL, LQ035_SHUT); #endif } diff --git a/board/bf527-sdp/config.mk b/board/bf527-sdp/config.mk index 744e7a5..7cb935a 100644 --- a/board/bf527-sdp/config.mk +++ b/board/bf527-sdp/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf527-0.2 diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk index 60ec6b6..a0d1749 100644 --- a/board/bf533-ezkit/config.mk +++ b/board/bf533-ezkit/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf533-0.3 diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk index 60ec6b6..a0d1749 100644 --- a/board/bf533-stamp/config.mk +++ b/board/bf533-stamp/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf533-0.3 diff --git a/board/bf537-minotaur/config.mk b/board/bf537-minotaur/config.mk index 59e9a9c..de02635 100644 --- a/board/bf537-minotaur/config.mk +++ b/board/bf537-minotaur/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/bf537-pnav/config.mk b/board/bf537-pnav/config.mk index ce8ef3b..e29d87f 100644 --- a/board/bf537-pnav/config.mk +++ b/board/bf537-pnav/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/bf537-srv1/config.mk b/board/bf537-srv1/config.mk index 59e9a9c..de02635 100644 --- a/board/bf537-srv1/config.mk +++ b/board/bf537-srv1/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk index 3bac0ad..6694f06 100644 --- a/board/bf537-stamp/config.mk +++ b/board/bf537-stamp/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk index 170a2d5..4ab1397 100644 --- a/board/bf538f-ezkit/config.mk +++ b/board/bf538f-ezkit/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf538-0.4 diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk index ec3c28e..9aa1761 100644 --- a/board/bf548-ezkit/config.mk +++ b/board/bf548-ezkit/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf548-0.0 diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk index 221de65..5c88114 100644 --- a/board/bf561-acvilon/config.mk +++ b/board/bf561-acvilon/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf561-0.5 diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk index ff19190..19cdefc 100644 --- a/board/bf561-ezkit/config.mk +++ b/board/bf561-ezkit/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf561-0.3 diff --git a/board/blackstamp/config.mk b/board/blackstamp/config.mk index 5035cb9..0ca3c90 100644 --- a/board/blackstamp/config.mk +++ b/board/blackstamp/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf532-0.5 diff --git a/board/blackvme/config.mk b/board/blackvme/config.mk index 8d0fe39..4d6e0ba 100644 --- a/board/blackvme/config.mk +++ b/board/blackvme/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf561-0.5 diff --git a/board/bmw/config.mk b/board/bmw/config.mk index f991549..a1a44e5 100644 --- a/board/bmw/config.mk +++ b/board/bmw/config.mk @@ -22,11 +22,9 @@ # # -# CU824 board +# BMW board # -TEXT_BASE = 0xFFF00000 # NOTE: The flags below affect how the BCM570x driver is compiled PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\ - -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\ - -DTEXT_BASE=$(TEXT_BASE) + -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256 diff --git a/board/c2mon/config.mk b/board/c2mon/config.mk deleted file mode 100644 index c2d21e2..0000000 --- a/board/c2mon/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TTTech C2MON boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/calao/sbc35_a9g20/config.mk b/board/calao/sbc35_a9g20/config.mk index ff2cfd1..e554a45 100644 --- a/board/calao/sbc35_a9g20/config.mk +++ b/board/calao/sbc35_a9g20/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/calao/tny_a9260/config.mk b/board/calao/tny_a9260/config.mk index ff2cfd1..e554a45 100644 --- a/board/calao/tny_a9260/config.mk +++ b/board/calao/tny_a9260/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/canmb/config.mk b/board/canmb/config.mk deleted file mode 100644 index a163b34..0000000 --- a/board/canmb/config.mk +++ /dev/null @@ -1,39 +0,0 @@ -# -# (C) Copyright 2005 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2003 -# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# CANMB board -# -# allowed and functional TEXT_BASE values: -# -# 0xfe000000 low boot at 0x00000100 (default board setting) -# 0x00100000 RAM load and test -# - -TEXT_BASE = 0xFE000000 -#TEXT_BASE = 0x00100000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/cerf250/config.mk b/board/cerf250/config.mk index 1a86cc9..c2d46b2 100644 --- a/board/cerf250/config.mk +++ b/board/cerf250/config.mk @@ -2,4 +2,4 @@ # Cerf board with PXA250 cpu # # -TEXT_BASE = 0xa3080000 +CONFIG_SYS_TEXT_BASE = 0xa3080000 diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk index 78eebff..790fe99 100644 --- a/board/cm-bf527/config.mk +++ b/board/cm-bf527/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf527-0.0 diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk index 60ec6b6..a0d1749 100644 --- a/board/cm-bf533/config.mk +++ b/board/cm-bf533/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf533-0.3 diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk index 1281da4..c5d45c7 100644 --- a/board/cm-bf537e/config.mk +++ b/board/cm-bf537e/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/cm-bf537u/config.mk b/board/cm-bf537u/config.mk index 1281da4..c5d45c7 100644 --- a/board/cm-bf537u/config.mk +++ b/board/cm-bf537u/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk index bce60e5..da6aa52 100644 --- a/board/cm-bf548/config.mk +++ b/board/cm-bf548/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf548-0.0 diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk index ff19190..19cdefc 100644 --- a/board/cm-bf561/config.mk +++ b/board/cm-bf561/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf561-0.3 diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk index 74eaeb0..0d5923b 100644 --- a/board/cm4008/config.mk +++ b/board/cm4008/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x00f00000 +CONFIG_SYS_TEXT_BASE = 0x00f00000 diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk index 74eaeb0..0d5923b 100644 --- a/board/cm41xx/config.mk +++ b/board/cm41xx/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x00f00000 +CONFIG_SYS_TEXT_BASE = 0x00f00000 diff --git a/board/cm5200/config.mk b/board/cm5200/config.mk deleted file mode 100644 index 7f06139..0000000 --- a/board/cm5200/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xfc000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/cmc_pu2/config.mk b/board/cmc_pu2/config.mk index 7116eea..cdb8a5f 100644 --- a/board/cmc_pu2/config.mk +++ b/board/cmc_pu2/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x20F00000 +CONFIG_SYS_TEXT_BASE = 0x20F00000 ## For testing: load at 0x20100000 and "go" at 0x201000A4 -#TEXT_BASE = 0x20100000 +#CONFIG_SYS_TEXT_BASE = 0x20100000 diff --git a/board/cmi/config.mk b/board/cmi/config.mk index 564f638..2685d4f 100644 --- a/board/cmi/config.mk +++ b/board/cmi/config.mk @@ -22,10 +22,7 @@ # # -# EPQ Board Configuration +# CMI Board Configuration # -# Boot from flash at location 0x00000000 -TEXT_BASE = 0x02000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/cobra5272/config.mk b/board/cobra5272/config.mk index ccb2cf7..5b8c608 100644 --- a/board/cobra5272/config.mk +++ b/board/cobra5272/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/cogent/README b/board/cogent/README index 31ca187..4343f73 100644 --- a/board/cogent/README +++ b/board/cogent/README @@ -87,11 +87,11 @@ want the serial console on motherboard serial port A or on one of the 8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly (NONE means use Cogent motherboard serial port A). -Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be +Then edit the file "cogent/config.mk". Firstly, set CONFIG_SYS_TEXT_BASE to be the base address of the EPROM for the CPU module. This should be the same as the value selected for CONFIG_SYS_MONITOR_BASE in "include/config_cogent_*.h" (in fact, I have made this automatic via -the -DTEXT_BASE=... option in CPPFLAGS). +the -CONFIG_SYS_TEXT_BASE=... option in CPPFLAGS). Finally, set the values of the make variables $(CMA_MB) and $(CMA_IOMS). diff --git a/board/cogent/config.mk b/board/cogent/config.mk index 35a5ed3..78730db 100644 --- a/board/cogent/config.mk +++ b/board/cogent/config.mk @@ -25,9 +25,6 @@ # Cogent Modular Architecture # -# Boot EPROM location -TEXT_BASE = 0xfff00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) LDSCRIPT := $(SRCTREE)/board/cogent/u-boot.lds diff --git a/board/colibri_pxa270/config.mk b/board/colibri_pxa270/config.mk index 1d650ac..0f10662 100644 --- a/board/colibri_pxa270/config.mk +++ b/board/colibri_pxa270/config.mk @@ -1 +1 @@ -TEXT_BASE = 0xa1000000 +CONFIG_SYS_TEXT_BASE = 0xa1000000 diff --git a/board/cpc45/config.mk b/board/cpc45/config.mk index bf9d9de..0f8d665 100644 --- a/board/cpc45/config.mk +++ b/board/cpc45/config.mk @@ -25,12 +25,4 @@ # CPC45 board # - -ifeq ($(CONFIG_BOOT_ROM),y) - TEXT_BASE := 0xFFF00000 - PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM -else - TEXT_BASE := 0xFFF00000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/cpu86/config.mk b/board/cpu86/config.mk index 5fe0ca0..379017e 100644 --- a/board/cpu86/config.mk +++ b/board/cpu86/config.mk @@ -25,16 +25,4 @@ # CPU86 boards # -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_CPU86.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# - -ifeq ($(CONFIG_BOOT_ROM),y) - TEXT_BASE := 0xFF800000 - PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM -else - TEXT_BASE := 0xFF000000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/cpu87/config.mk b/board/cpu87/config.mk index 6a694a4..42f7f95 100644 --- a/board/cpu87/config.mk +++ b/board/cpu87/config.mk @@ -25,16 +25,4 @@ # CPU87 board # -# This should be equal to the CONFIG_SYS_FLASH_BASE define in configs/cpu87.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# - -ifeq ($(CONFIG_BOOT_ROM),y) - TEXT_BASE := 0xFF800000 - PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM -else - TEXT_BASE := 0xFF000000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/cradle/config.mk b/board/cradle/config.mk index aa40388..6656bdd 100644 --- a/board/cradle/config.mk +++ b/board/cradle/config.mk @@ -1,2 +1,2 @@ -TEXT_BASE = 0xa0f80000 -#TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0xa0f80000 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/cray/L1/config.mk b/board/cray/L1/config.mk deleted file mode 100644 index b69fe8e..0000000 --- a/board/cray/L1/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# Note: I make an "image" from U-Boot itself, which prefixes 0x40 bytes of -# header info, hence start address is thus shifted. -TEXT_BASE = 0xFFFD0040 diff --git a/board/csb226/config.mk b/board/csb226/config.mk index 2354392..9e46555 100644 --- a/board/csb226/config.mk +++ b/board/csb226/config.mk @@ -7,9 +7,9 @@ # # This is the address where U-Boot lives in flash: -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0 # FIXME: armboot does only work correctly when being compiled # for the addresses _after_ relocation to RAM!! Otherwhise the # .bss segment is assumed in flash... -TEXT_BASE = 0xa1fe0000 +CONFIG_SYS_TEXT_BASE = 0xa1fe0000 diff --git a/board/csb226/lowlevel_init.S b/board/csb226/lowlevel_init.S index 9892430..55169be 100644 --- a/board/csb226/lowlevel_init.S +++ b/board/csb226/lowlevel_init.S @@ -39,7 +39,7 @@ DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE .endm _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE /* diff --git a/board/csb272/config.mk b/board/csb272/config.mk index 4672f08..a3cd040 100644 --- a/board/csb272/config.mk +++ b/board/csb272/config.mk @@ -29,8 +29,3 @@ # LDFLAGS += $(LINKER_UNDEFS) - -TEXT_BASE := 0xFFFC0000 -#TEXT_BASE := 0x00100000 - -PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS) diff --git a/board/csb472/config.mk b/board/csb472/config.mk index 04aefd1..90a9cba 100644 --- a/board/csb472/config.mk +++ b/board/csb472/config.mk @@ -29,8 +29,3 @@ # LDFLAGS += $(LINKER_UNDEFS) - -TEXT_BASE := 0xFFFC0000 -#TEXT_BASE := 0x00100000 - -PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS) diff --git a/board/csb637/config.mk b/board/csb637/config.mk index 4c6f631..e2cc8a6 100644 --- a/board/csb637/config.mk +++ b/board/csb637/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23fc0000 +CONFIG_SYS_TEXT_BASE = 0x23fc0000 diff --git a/board/cu824/config.mk b/board/cu824/config.mk deleted file mode 100644 index 18673e1..0000000 --- a/board/cu824/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# CU824 board -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/dave/B2/config.mk b/board/dave/B2/config.mk index 5216622..f7b686a 100644 --- a/board/dave/B2/config.mk +++ b/board/dave/B2/config.mk @@ -25,6 +25,6 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x0C100000 +CONFIG_SYS_TEXT_BASE = 0x0C100000 PLATFORM_CPPFLAGS += -Uarm diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk deleted file mode 100644 index 9083aac..0000000 --- a/board/dave/PPChameleonEVB/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000, 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# Reserve 256 kB for Monitor -#TEXT_BASE = 0xFFFC0000 - -# Reserve 320 kB for Monitor -TEXT_BASE = 0xFFFB0000 diff --git a/board/davedenx/aria/config.mk b/board/davedenx/aria/config.mk deleted file mode 100644 index 838a018..0000000 --- a/board/davedenx/aria/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2009 Wolfgang Denk <wd@denx.de> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/davedenx/qong/Makefile b/board/davedenx/qong/Makefile index 93e1985..ada6e03 100644 --- a/board/davedenx/qong/Makefile +++ b/board/davedenx/qong/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := qong.o +COBJS := qong.o fpga.o SOBJS := lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davedenx/qong/config.mk b/board/davedenx/qong/config.mk index 39c1203..ea1c1b0 100644 --- a/board/davedenx/qong/config.mk +++ b/board/davedenx/qong/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0xa0000000 +CONFIG_SYS_TEXT_BASE = 0xa0000000 # PLATFORM_CPPFLAGS += -DDEBUG diff --git a/board/davedenx/qong/fpga.c b/board/davedenx/qong/fpga.c new file mode 100644 index 0000000..f865eb4 --- /dev/null +++ b/board/davedenx/qong/fpga.c @@ -0,0 +1,95 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/mx31.h> +#include <asm/arch/mx31-regs.h> +#include <mxc_gpio.h> +#include <fpga.h> +#include <lattice.h> +#include "qong_fpga.h" + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_FPGA) + +static void qong_jtag_init(void) +{ + return; +} + +static void qong_fpga_jtag_set_tdi(int value) +{ + mxc_gpio_set(QONG_FPGA_TDI_PIN, value); +} + +static void qong_fpga_jtag_set_tms(int value) +{ + mxc_gpio_set(QONG_FPGA_TMS_PIN, value); +} + +static void qong_fpga_jtag_set_tck(int value) +{ + mxc_gpio_set(QONG_FPGA_TCK_PIN, value); +} + +static int qong_fpga_jtag_get_tdo(void) +{ + return mxc_gpio_get(QONG_FPGA_TDO_PIN); +} + +lattice_board_specific_func qong_fpga_fns = { + qong_jtag_init, + qong_fpga_jtag_set_tdi, + qong_fpga_jtag_set_tms, + qong_fpga_jtag_set_tck, + qong_fpga_jtag_get_tdo +}; + +Lattice_desc qong_fpga[CONFIG_FPGA_COUNT] = { + { + Lattice_XP2, + lattice_jtag_mode, + 356519, + (void *) &qong_fpga_fns, + NULL, + 0, + "lfxp2_5e_ftbga256" + }, +}; + +int qong_fpga_init(void) +{ + int i; + + fpga_init(); + + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + fpga_add(fpga_lattice, &qong_fpga[i]); + } + return 0; +} + +#endif + diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 9abc29c..8a81cfc 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -25,6 +25,7 @@ #include <netdev.h> #include <asm/arch/mx31.h> #include <asm/arch/mx31-regs.h> +#include <asm/io.h> #include <nand.h> #include <fsl_pmic.h> #include <mxc_gpio.h> @@ -73,6 +74,15 @@ int board_early_init_f (void) /* set interrupt pin as input */ mxc_gpio_direction(QONG_FPGA_IRQ_PIN, MXC_GPIO_DIRECTION_IN); + /* FPGA JTAG Interface */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS6, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK6, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CAPTURE, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_COMPARE, MUX_CTL_GPIO)); + mxc_gpio_direction(QONG_FPGA_TCK_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TMS_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TDI_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TDO_PIN, MXC_GPIO_DIRECTION_IN); #endif /* setup pins for UART1 */ @@ -88,6 +98,38 @@ int board_early_init_f (void) mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); + /* Setup pins for USB2 Host */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_CLK, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DIR, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_NXT, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_STP, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA0, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA1, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD3, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD3, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK3, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS3, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD6, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD6, MUX_CTL_FUNC)); + +#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ + PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + + mx31_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG); + mx31_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG); + mx31_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG); + mx31_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG); + mx31_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */ + mx31_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */ + mx31_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */ + mx31_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */ + mx31_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */ + mx31_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */ + mx31_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */ + mx31_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */ + + writel(readl((IOMUXC_BASE + 0x8)) | (1 << 11), IOMUXC_BASE + 0x8); + return 0; } @@ -146,6 +188,8 @@ int board_init (void) gd->bd->bi_arch_number = MACH_TYPE_QONG; gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */ + qong_fpga_init(); + return 0; } diff --git a/board/davedenx/qong/qong_fpga.h b/board/davedenx/qong/qong_fpga.h index 4e11f5a..4e79ac2 100644 --- a/board/davedenx/qong/qong_fpga.h +++ b/board/davedenx/qong/qong_fpga.h @@ -24,7 +24,6 @@ #ifndef QONG_FPGA_H #define QONG_FPGA_H -#ifdef CONFIG_QONG_FPGA #define QONG_FPGA_CTRL_BASE CONFIG_FPGA_BASE #define QONG_FPGA_CTRL_VERSION (QONG_FPGA_CTRL_BASE + 0x00000000) #define QONG_FPGA_PERIPH_SIZE (1 << 24) @@ -35,6 +34,6 @@ #define QONG_FPGA_TDO_PIN 7 #define QONG_FPGA_RST_PIN 48 #define QONG_FPGA_IRQ_PIN 40 -#endif +int qong_fpga_init(void); #endif /* QONG_FPGA_H */ diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 86a875e..b60a46e 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -85,45 +85,22 @@ err: return 0; } -/* If there is a MAC address in the environment, and if it is not identical to - * the MAC address in the EEPROM, then a warning is printed and the MAC address - * from the environment is used. - * +/* * If there is no MAC address in the environment, then it will be initialized * (silently) from the value in the EEPROM. */ -void dv_configure_mac_address(uint8_t *rom_enetaddr) +void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) { - int i; - u_int8_t env_enetaddr[6]; - char *tmp = getenv("ethaddr"); - char *end; - - /* Read Ethernet MAC address from the U-Boot environment. - * If it is not defined, env_enetaddr[] will be cleared. */ - for (i = 0; i < 6; i++) { - env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; - if (tmp) - tmp = (*end) ? end+1 : end; - } - - /* Check if EEPROM and U-Boot environment MAC addresses match. */ - if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && - memcmp(env_enetaddr, rom_enetaddr, 6) != 0) { - printf("Warning: MAC addresses don't match:\n"); - printf(" EEPROM MAC address: %pM\n", rom_enetaddr); - printf(" \"ethaddr\" value: %pM\n", env_enetaddr) ; - debug("### Using MAC address from environment\n"); - } - if (!tmp) { - char ethaddr[20]; + uint8_t env_enetaddr[6]; + eth_getenv_enetaddr_by_index(0, env_enetaddr); + if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) { /* There is no MAC address in the environment, so we initialize * it from the value in the EEPROM. */ - sprintf(ethaddr, "%pM", rom_enetaddr) ; - debug("### Setting environment from EEPROM MAC address = \"%s\"\n", - ethaddr); - setenv("ethaddr", ethaddr); + debug("### Setting environment from EEPROM MAC address = " + "\"%pM\"\n", + env_enetaddr); + eth_setenv_enetaddr("ethaddr", rom_enetaddr); } } diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h index 329c369..a6ac3b9 100644 --- a/board/davinci/common/misc.h +++ b/board/davinci/common/misc.h @@ -46,7 +46,7 @@ struct pinmux_resource { } int dvevm_read_mac_address(uint8_t *buf); -void dv_configure_mac_address(uint8_t *rom_enetaddr); +void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr); int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins); int davinci_configure_pin_mux_items(const struct pinmux_resource *item, int n_items); diff --git a/board/davinci/da8xxevm/config.mk b/board/davinci/da8xxevm/config.mk index 6da29a9..e176f7d 100644 --- a/board/davinci/da8xxevm/config.mk +++ b/board/davinci/da8xxevm/config.mk @@ -40,4 +40,4 @@ #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0xC1080000 +CONFIG_SYS_TEXT_BASE = 0xC1080000 diff --git a/board/davinci/da8xxevm/da830evm.c b/board/davinci/da8xxevm/da830evm.c index 6baa860..8a9f988 100644 --- a/board/davinci/da8xxevm/da830evm.c +++ b/board/davinci/da8xxevm/da830evm.c @@ -196,19 +196,17 @@ int board_eth_init(bd_t *bis) { u_int8_t mac_addr[6]; u_int8_t switch_start_cmd[2] = { 0x01, 0x23 }; + struct eth_device *dev; /* Read Ethernet MAC address from EEPROM */ if (dvevm_read_mac_address(mac_addr)) /* set address env if not already set */ - dv_configure_mac_address(mac_addr); + davinci_sync_env_enetaddr(mac_addr); /* read the address back from env */ if (!eth_getenv_enetaddr("ethaddr", mac_addr)) return -1; - /* provide the resulting addr to the driver */ - davinci_eth_set_mac_addr(mac_addr); - /* enable the Ethernet switch in the 3 port PHY */ if (i2c_write(PHY_SW_I2C_ADDR, 0, 0, switch_start_cmd, sizeof(switch_start_cmd))) { @@ -222,6 +220,12 @@ int board_eth_init(bd_t *bis) return -1; } + dev = eth_get_dev(); + + /* provide the resulting addr to the driver */ + memcpy(dev->enetaddr, mac_addr, 6); + dev->write_hwaddr(dev); + return 0; } #endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index eeb456c..c8c5e1b 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -23,7 +23,11 @@ #include <common.h> #include <i2c.h> +#include <net.h> +#include <netdev.h> #include <asm/arch/hardware.h> +#include <asm/arch/emif_defs.h> +#include <asm/arch/emac_defs.h> #include <asm/io.h> #include "../common/misc.h" #include "common.h" @@ -48,18 +52,62 @@ static const struct pinmux_config uart_pins[] = { { pinmux(4), 2, 5 } }; +#ifdef CONFIG_DRIVER_TI_EMAC +static const struct pinmux_config emac_pins[] = { + { pinmux(2), 8, 1 }, + { pinmux(2), 8, 2 }, + { pinmux(2), 8, 3 }, + { pinmux(2), 8, 4 }, + { pinmux(2), 8, 5 }, + { pinmux(2), 8, 6 }, + { pinmux(2), 8, 7 }, + { pinmux(3), 8, 0 }, + { pinmux(3), 8, 1 }, + { pinmux(3), 8, 2 }, + { pinmux(3), 8, 3 }, + { pinmux(3), 8, 4 }, + { pinmux(3), 8, 5 }, + { pinmux(3), 8, 6 }, + { pinmux(3), 8, 7 }, + { pinmux(4), 8, 0 }, + { pinmux(4), 8, 1 } +}; +#endif /* CONFIG_DRIVER_TI_EMAC */ + /* I2C pin muxer settings */ static const struct pinmux_config i2c_pins[] = { { pinmux(4), 2, 2 }, { pinmux(4), 2, 3 } }; +#ifdef CONFIG_NAND_DAVINCI +const struct pinmux_config nand_pins[] = { + { pinmux(7), 1, 1 }, + { pinmux(7), 1, 2 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 } +}; +#endif + static const struct pinmux_resource pinmuxes[] = { #ifdef CONFIG_SPI_FLASH PINMUX_ITEM(spi1_pins), #endif PINMUX_ITEM(uart_pins), PINMUX_ITEM(i2c_pins), +#ifdef CONFIG_NAND_DAVINCI + PINMUX_ITEM(nand_pins), +#endif }; static const struct lpsc_resource lpsc[] = { @@ -76,6 +124,23 @@ int board_init(void) irq_init(); #endif + +#ifdef CONFIG_NAND_DAVINCI + /* + * NAND CS setup - cycle counts based on da850evm NAND timings in the + * Linux kernel @ 25MHz EMIFA + */ + writel((DAVINCI_ABCR_WSETUP(0) | + DAVINCI_ABCR_WSTROBE(0) | + DAVINCI_ABCR_WHOLD(0) | + DAVINCI_ABCR_RSETUP(0) | + DAVINCI_ABCR_RSTROBE(1) | + DAVINCI_ABCR_RHOLD(0) | + DAVINCI_ABCR_TA(0) | + DAVINCI_ABCR_ASIZE_8BIT), + &davinci_emif_regs->ab2cr); /* CS3 */ +#endif + /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; @@ -102,6 +167,14 @@ int board_init(void) if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) return 1; +#ifdef CONFIG_DRIVER_TI_EMAC + if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) + return 1; + /* set cfgchip3 to select MII */ + writel(readl(&davinci_syscfg_regs->cfgchip3) & ~(1 << 8), + &davinci_syscfg_regs->cfgchip3); +#endif /* CONFIG_DRIVER_TI_EMAC */ + /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), @@ -109,3 +182,19 @@ int board_init(void) return 0; } + +#ifdef CONFIG_DRIVER_TI_EMAC + +/* + * Initializes on-board ethernet controllers. + */ +int board_eth_init(bd_t *bis) +{ + if (!davinci_emac_initialize()) { + printf("Error: Ethernet init failed!\n"); + return -1; + } + + return 0; +} +#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/board/davinci/dm355evm/config.mk b/board/davinci/dm355evm/config.mk index c4e6e07..9a06300 100644 --- a/board/davinci/dm355evm/config.mk +++ b/board/davinci/dm355evm/config.mk @@ -8,4 +8,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/dm355leopard/config.mk b/board/davinci/dm355leopard/config.mk index d67df02..28ff3f3 100644 --- a/board/davinci/dm355leopard/config.mk +++ b/board/davinci/dm355leopard/config.mk @@ -3,4 +3,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/dm365evm/config.mk b/board/davinci/dm365evm/config.mk index 86472ff..7b1e900 100644 --- a/board/davinci/dm365evm/config.mk +++ b/board/davinci/dm365evm/config.mk @@ -8,4 +8,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/dm365evm/dm365evm.c b/board/davinci/dm365evm/dm365evm.c index 290eb99..85dbe2a 100644 --- a/board/davinci/dm365evm/dm365evm.c +++ b/board/davinci/dm365evm/dm365evm.c @@ -68,7 +68,7 @@ int board_eth_init(bd_t *bis) /* Read Ethernet MAC address from EEPROM */ if (dvevm_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); + davinci_sync_env_enetaddr(eeprom_enetaddr); davinci_emac_initialize(); diff --git a/board/davinci/dm6467evm/config.mk b/board/davinci/dm6467evm/config.mk index ca801c2..3751043 100644 --- a/board/davinci/dm6467evm/config.mk +++ b/board/davinci/dm6467evm/config.mk @@ -1,2 +1,2 @@ #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/dvevm/config.mk b/board/davinci/dvevm/config.mk index c24ced7..ed80707 100644 --- a/board/davinci/dvevm/config.mk +++ b/board/davinci/dvevm/config.mk @@ -36,4 +36,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c index 98937a9..073c21a 100644 --- a/board/davinci/dvevm/dvevm.c +++ b/board/davinci/dvevm/dvevm.c @@ -71,7 +71,7 @@ int misc_init_r(void) /* Read Ethernet MAC address from EEPROM if available. */ if (dvevm_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); + davinci_sync_env_enetaddr(eeprom_enetaddr); i2c_read(0x39, 0x00, 1, &video_mode, 1); diff --git a/board/davinci/schmoogie/config.mk b/board/davinci/schmoogie/config.mk index c24ced7..ed80707 100644 --- a/board/davinci/schmoogie/config.mk +++ b/board/davinci/schmoogie/config.mk @@ -36,4 +36,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/schmoogie/schmoogie.c b/board/davinci/schmoogie/schmoogie.c index 19c9580..80a0f9f 100644 --- a/board/davinci/schmoogie/schmoogie.c +++ b/board/davinci/schmoogie/schmoogie.c @@ -107,12 +107,12 @@ int misc_init_r(void) /* Set serial number from UID chip */ if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) { printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); - forceenv("serial#", "FAILED"); + setenv("serial#", "FAILED"); } else { if (buf[0] != 0x70) { /* Device Family Code */ printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); - forceenv("serial#", "FAILED"); + setenv("serial#", "FAILED"); } } /* Now check CRC */ @@ -122,12 +122,12 @@ int misc_init_r(void) if (tmp[0] != 0) { printf("\nUID @ 0x%02x - BAD CRC!!!\n", CONFIG_SYS_UID_ADDR); - forceenv("serial#", "FAILED"); + setenv("serial#", "FAILED"); } else { /* CRC OK, set "serial" env variable */ sprintf((char *)&tmp[0], "%02x%02x%02x%02x%02x%02x", buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]); - forceenv("serial#", (char *)&tmp[0]); + setenv("serial#", (char *)&tmp[0]); } return(0); diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk index 31a1c9e..4fe9007 100644 --- a/board/davinci/sffsdr/config.mk +++ b/board/davinci/sffsdr/config.mk @@ -20,4 +20,4 @@ # # we load ourself to 8400'0000 to provide at least 32MB spacing # between us and the Integrity kernel image -TEXT_BASE = 0x84000000 +CONFIG_SYS_TEXT_BASE = 0x84000000 diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c index c24b9e1..657cf2b 100644 --- a/board/davinci/sffsdr/sffsdr.c +++ b/board/davinci/sffsdr/sffsdr.c @@ -141,7 +141,7 @@ int misc_init_r(void) /* Read Ethernet MAC address from EEPROM if available. */ if (sffsdr_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); + davinci_sync_env_enetaddr(eeprom_enetaddr); return(0); } diff --git a/board/davinci/sonata/config.mk b/board/davinci/sonata/config.mk index c24ced7..ed80707 100644 --- a/board/davinci/sonata/config.mk +++ b/board/davinci/sonata/config.mk @@ -36,4 +36,4 @@ # #Provide at least 16MB spacing between us and the Linux Kernel image -TEXT_BASE = 0x81080000 +CONFIG_SYS_TEXT_BASE = 0x81080000 diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c index 817970a..1dc42c4 100644 --- a/board/davinci/sonata/sonata.c +++ b/board/davinci/sonata/sonata.c @@ -70,7 +70,7 @@ int misc_init_r(void) /* Read Ethernet MAC address from EEPROM if available. */ if (dvevm_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); + davinci_sync_env_enetaddr(eeprom_enetaddr); return(0); } diff --git a/board/dbau1x00/README b/board/dbau1x00/README index b37ff36..b1e9494 100644 --- a/board/dbau1x00/README +++ b/board/dbau1x00/README @@ -26,7 +26,7 @@ boot loader delivered with board. NOTE! When you switch between the two boot flashes, the base addresses will be swapped. -Have this in mind when you compile u-boot. TEXT_BASE has +Have this in mind when you compile u-boot. CONFIG_SYS_TEXT_BASE has to match the address where u-boot is located when you actually launch. diff --git a/board/dbau1x00/config.mk b/board/dbau1x00/config.mk index 39eb60a..3516b42 100644 --- a/board/dbau1x00/config.mk +++ b/board/dbau1x00/config.mk @@ -26,7 +26,7 @@ # # ROM version -TEXT_BASE = 0xbfc00000 +CONFIG_SYS_TEXT_BASE = 0xbfc00000 # RAM version -#TEXT_BASE = 0x80100000 +#CONFIG_SYS_TEXT_BASE = 0x80100000 diff --git a/board/delta/config.mk b/board/delta/config.mk index 3fe406c..8b24044 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x83008000 +CONFIG_SYS_TEXT_BASE = 0x83008000 diff --git a/board/digsy_mtc/config.mk b/board/digsy_mtc/config.mk deleted file mode 100644 index e2f14b0..0000000 --- a/board/digsy_mtc/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# Author: Grzegorz Bernacki, Semihalf, gjb@semihalf.com -# - -# -# digsyMTC board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFE000000 boot low -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/dnp1110/config.mk b/board/dnp1110/config.mk index 4f6af46..ccf8277 100644 --- a/board/dnp1110/config.mk +++ b/board/dnp1110/config.mk @@ -14,4 +14,4 @@ # we load ourself to c1f8'0000, the upper 1 MB of the first (only) bank # -TEXT_BASE = 0xc1f80000 +CONFIG_SYS_TEXT_BASE = 0xc1f80000 diff --git a/board/eNET/config.mk b/board/eNET/config.mk index 63a58fd..c4242ad 100644 --- a/board/eNET/config.mk +++ b/board/eNET/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x06000000 +CONFIG_SYS_TEXT_BASE = 0x06000000 CFLAGS_common/dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing PLATFORM_RELFLAGS += -fvisibility=hidden PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm diff --git a/board/eXalion/config.mk b/board/eXalion/config.mk deleted file mode 100644 index b3f65eb..0000000 --- a/board/eXalion/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Sandpoint boards -# - -#TEXT_BASE = 0x00090000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/earthlcd/favr-32-ezkit/config.mk b/board/earthlcd/favr-32-ezkit/config.mk index 5c919cd..f8bc88d 100644 --- a/board/earthlcd/favr-32-ezkit/config.mk +++ b/board/earthlcd/favr-32-ezkit/config.mk @@ -1,4 +1,4 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_LDFLAGS += --gc-sections -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 LDSCRIPT = $(src)board/earthlcd/favr-32-ezkit/u-boot.lds diff --git a/board/edb93xx/config.mk b/board/edb93xx/config.mk index b627869..fab59ef 100644 --- a/board/edb93xx/config.mk +++ b/board/edb93xx/config.mk @@ -1,33 +1,33 @@ LDSCRIPT := $(SRCTREE)/arch/arm/cpu/arm920t/ep93xx/u-boot.lds ifdef CONFIG_EDB9301 -TEXT_BASE = 0x05700000 +CONFIG_SYS_TEXT_BASE = 0x05700000 endif ifdef CONFIG_EDB9302 -TEXT_BASE = 0x05700000 +CONFIG_SYS_TEXT_BASE = 0x05700000 endif ifdef CONFIG_EDB9302A -TEXT_BASE = 0xc5700000 +CONFIG_SYS_TEXT_BASE = 0xc5700000 endif ifdef CONFIG_EDB9307 -TEXT_BASE = 0x01f00000 +CONFIG_SYS_TEXT_BASE = 0x01f00000 endif ifdef CONFIG_EDB9307A -TEXT_BASE = 0xc1f00000 +CONFIG_SYS_TEXT_BASE = 0xc1f00000 endif ifdef CONFIG_EDB9312 -TEXT_BASE = 0x01f00000 +CONFIG_SYS_TEXT_BASE = 0x01f00000 endif ifdef CONFIG_EDB9315 -TEXT_BASE = 0x01f00000 +CONFIG_SYS_TEXT_BASE = 0x01f00000 endif ifdef CONFIG_EDB9315A -TEXT_BASE = 0xc1f00000 +CONFIG_SYS_TEXT_BASE = 0xc1f00000 endif diff --git a/board/eltec/bab7xx/config.mk b/board/eltec/bab7xx/config.mk deleted file mode 100644 index aa463c5..0000000 --- a/board/eltec/bab7xx/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/eltec/elppc/config.mk b/board/eltec/elppc/config.mk deleted file mode 100644 index aa463c5..0000000 --- a/board/eltec/elppc/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/eltec/mhpc/config.mk b/board/eltec/mhpc/config.mk deleted file mode 100644 index 03934de..0000000 --- a/board/eltec/mhpc/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MHPC boards -# - -TEXT_BASE = 0xfe000000 -/*TEXT_BASE = 0x00200000 */ diff --git a/board/emk/top5200/config.mk b/board/emk/top5200/config.mk deleted file mode 100644 index 84131fe..0000000 --- a/board/emk/top5200/config.mk +++ /dev/null @@ -1,41 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2003 -# Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TOP5200 board, on optional MINI5200 and EVAL5200 boards -# -# allowed and functional TEXT_BASE values: -# -# 0xff000000 low boot at 0x00000100 (default board setting) -# 0xfff00000 high boot at 0xfff00100 (board needs modification) -# 0x00100000 RAM load and test -# - -TEXT_BASE = 0xff000000 -#TEXT_BASE = 0xfff00000 -#TEXT_BASE = 0x00100000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/emk/top860/config.mk b/board/emk/top860/config.mk deleted file mode 100644 index 7b940cb..0000000 --- a/board/emk/top860/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TOP860 board -# - -TEXT_BASE = 0x80000000 diff --git a/board/ep7312/config.mk b/board/ep7312/config.mk index 0ae16a2..bdd08b8 100644 --- a/board/ep7312/config.mk +++ b/board/ep7312/config.mk @@ -25,4 +25,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xc0f80000 +CONFIG_SYS_TEXT_BASE = 0xc0f80000 diff --git a/board/ep8248/config.mk b/board/ep8248/config.mk deleted file mode 100644 index eda523b..0000000 --- a/board/ep8248/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# EP82xx series boards by Embedded Planet -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/ep8260/config.mk b/board/ep8260/config.mk index 1225830..ee4b5ea 100644 --- a/board/ep8260/config.mk +++ b/board/ep8260/config.mk @@ -25,12 +25,4 @@ # EP8260 boards # -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_ep8260.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# -#TEXT_BASE = 0x00100000 -#TEXT_BASE = 0xFF000000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/ep82xxm/config.mk b/board/ep82xxm/config.mk deleted file mode 100644 index da039e2..0000000 --- a/board/ep82xxm/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# EP82xxM series boards by Embedded Planet - -TEXT_BASE = 0xFFF00000 diff --git a/board/ep88x/config.mk b/board/ep88x/config.mk deleted file mode 100644 index 72b326c..0000000 --- a/board/ep88x/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (C) 2005 Arabella Software Ltd. -# Yuli Barcohen <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Embedded Planet EP88x boards -# -TEXT_BASE = 0xFC000000 diff --git a/board/eric/config.mk b/board/eric/config.mk deleted file mode 100644 index dd0b412..0000000 --- a/board/eric/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFF80000 -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/adciop/config.mk b/board/esd/adciop/config.mk deleted file mode 100644 index 747f29f..0000000 --- a/board/esd/adciop/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -# FLASH: -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 - -# SDRAM: -#TEXT_BASE = 0x00FE0000 diff --git a/board/esd/apc405/config.mk b/board/esd/apc405/config.mk deleted file mode 100644 index 11faad2..0000000 --- a/board/esd/apc405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ABG405 boards -# - -TEXT_BASE = 0xFFF80000 diff --git a/board/esd/ar405/config.mk b/board/esd/ar405/config.mk deleted file mode 100644 index da7c107..0000000 --- a/board/esd/ar405/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -TEXT_BASE = 0xFFFA0000 diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk deleted file mode 100644 index 1d743a9..0000000 --- a/board/esd/ash405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ASH405 boards -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/canbt/config.mk b/board/esd/canbt/config.mk deleted file mode 100644 index ae855dc..0000000 --- a/board/esd/canbt/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk deleted file mode 100644 index 8e48bcd..0000000 --- a/board/esd/cms700/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -TEXT_BASE = 0xFFFC8000 diff --git a/board/esd/cpci2dp/config.mk b/board/esd/cpci2dp/config.mk deleted file mode 100644 index 2da4c9f..0000000 --- a/board/esd/cpci2dp/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd CPCI2DP board -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/esd/cpci405/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/cpci5200/config.mk b/board/esd/cpci5200/config.mk deleted file mode 100644 index 170779d..0000000 --- a/board/esd/cpci5200/config.mk +++ /dev/null @@ -1,44 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IceCube board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFF000000 boot low for 16 MiB boards -# 0xFF800000 boot low for 8 MiB boards -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/esd/cpci750/config.mk b/board/esd/cpci750/config.mk deleted file mode 100644 index 7795dfa..0000000 --- a/board/esd/cpci750/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2004 -# Reinhard Arlt <reinhard.arlt@esd-electronics.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# cpci750 board -# - -TEXT_BASE = 0xfff00000 diff --git a/board/esd/cpciiser4/config.mk b/board/esd/cpciiser4/config.mk deleted file mode 100644 index 58574cb..0000000 --- a/board/esd/cpciiser4/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd CPCIISER4 boards -# - -#TEXT_BASE = 0xFFFE0000 -#TEXT_BASE = 0xFFFD0000 -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/dasa_sim/config.mk b/board/esd/dasa_sim/config.mk index 4fe3774..a92d9a9 100644 --- a/board/esd/dasa_sim/config.mk +++ b/board/esd/dasa_sim/config.mk @@ -20,7 +20,6 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -TEXT_BASE = 0xFFFC0000 # Use board specific linker script LDSCRIPT := $(SRCTREE)/board/esd/dasa_sim/u-boot.lds diff --git a/board/esd/dp405/config.mk b/board/esd/dp405/config.mk deleted file mode 100644 index 9b1a8be..0000000 --- a/board/esd/dp405/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFD0000 diff --git a/board/esd/du405/config.mk b/board/esd/du405/config.mk deleted file mode 100644 index d091d96..0000000 --- a/board/esd/du405/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd CPCIISER4 boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 -#TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/du440/config.mk b/board/esd/du440/config.mk index 91e65ec..24f74e1 100644 --- a/board/esd/du440/config.mk +++ b/board/esd/du440/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2002 +# (C) Copyright 2002-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -20,11 +20,6 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk deleted file mode 100644 index 7129ad5..0000000 --- a/board/esd/hh405/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd VOH405 boards -# - -#TEXT_BASE = 0xFFF00000 -TEXT_BASE = 0xFFF80000 -#TEXT_BASE = 0xFFFC0000 -#TEXT_BASE = 0x00FC0000 diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk deleted file mode 100644 index a6d31aa..0000000 --- a/board/esd/hub405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd HUB405 boards -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/mecp5123/config.mk b/board/esd/mecp5123/config.mk deleted file mode 100644 index 838a018..0000000 --- a/board/esd/mecp5123/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2009 Wolfgang Denk <wd@denx.de> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/esd/mecp5200/config.mk b/board/esd/mecp5200/config.mk deleted file mode 100644 index 170779d..0000000 --- a/board/esd/mecp5200/config.mk +++ /dev/null @@ -1,44 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IceCube board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFF000000 boot low for 16 MiB boards -# 0xFF800000 boot low for 8 MiB boards -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk index 9ce161e..2077692 100644 --- a/board/esd/meesc/config.mk +++ b/board/esd/meesc/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/esd/ocrtc/config.mk b/board/esd/ocrtc/config.mk deleted file mode 100644 index f123319..0000000 --- a/board/esd/ocrtc/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 diff --git a/board/esd/otc570/config.mk b/board/esd/otc570/config.mk index ff2cfd1..e554a45 100644 --- a/board/esd/otc570/config.mk +++ b/board/esd/otc570/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/esd/pci405/config.mk b/board/esd/pci405/config.mk deleted file mode 100644 index 83f07fe..0000000 --- a/board/esd/pci405/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 diff --git a/board/esd/pf5200/config.mk b/board/esd/pf5200/config.mk deleted file mode 100644 index 170779d..0000000 --- a/board/esd/pf5200/config.mk +++ /dev/null @@ -1,44 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IceCube board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFF000000 boot low for 16 MiB boards -# 0xFF800000 boot low for 8 MiB boards -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk deleted file mode 100644 index 0a4dbaa..0000000 --- a/board/esd/plu405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd PLU405 boards -# - -TEXT_BASE = 0xFFF80000 diff --git a/board/esd/pmc405/config.mk b/board/esd/pmc405/config.mk deleted file mode 100644 index 5a3fc4b..0000000 --- a/board/esd/pmc405/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF80000 diff --git a/board/esd/pmc405de/config.mk b/board/esd/pmc405de/config.mk deleted file mode 100644 index ae855dc..0000000 --- a/board/esd/pmc405de/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/pmc440/config.mk b/board/esd/pmc440/config.mk index 6e9f735..24f74e1 100644 --- a/board/esd/pmc440/config.mk +++ b/board/esd/pmc440/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2002 +# (C) Copyright 2002-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -20,11 +20,6 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFF90000 -endif PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/board/esd/tasreg/config.mk b/board/esd/tasreg/config.mk index 69fd8b6..7ee4777 100644 --- a/board/esd/tasreg/config.mk +++ b/board/esd/tasreg/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffc00000 +CONFIG_SYS_TEXT_BASE = 0xffc00000 diff --git a/board/esd/vme8349/config.mk b/board/esd/vme8349/config.mk deleted file mode 100644 index 1ae26ca..0000000 --- a/board/esd/vme8349/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# VME8349E -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk deleted file mode 100644 index 219a4eb..0000000 --- a/board/esd/voh405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd VOH405 boards -# - -TEXT_BASE = 0xFFF80000 diff --git a/board/esd/vom405/config.mk b/board/esd/vom405/config.mk deleted file mode 100644 index 8e48bcd..0000000 --- a/board/esd/vom405/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -TEXT_BASE = 0xFFFC8000 diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk deleted file mode 100644 index 1d743a9..0000000 --- a/board/esd/wuh405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ASH405 boards -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/espt/config.mk b/board/espt/config.mk index 006b432..21b51de 100644 --- a/board/espt/config.mk +++ b/board/espt/config.mk @@ -1,9 +1,9 @@ # # board/espt/config.mk # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/esteem192e/config.mk b/board/esteem192e/config.mk deleted file mode 100644 index 9d6080b..0000000 --- a/board/esteem192e/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TQM8xxL boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/etin/debris/config.mk b/board/etin/debris/config.mk deleted file mode 100644 index 64debf5..0000000 --- a/board/etin/debris/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Sangmoon, Etin Systems, dogoil@etinsys.com. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Debris boards -# - -#TEXT_BASE = 0x00090000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/etin/kvme080/config.mk b/board/etin/kvme080/config.mk deleted file mode 100644 index 45abdc0..0000000 --- a/board/etin/kvme080/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2005 -# Sangmoon, Etin Systems, dogoil@etinsys.com. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# KVME080 board -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/etx094/config.mk b/board/etx094/config.mk deleted file mode 100644 index 655c2db..0000000 --- a/board/etx094/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# ETX_094 Boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/eukrea/cpu9260/config.mk b/board/eukrea/cpu9260/config.mk index 9ce161e..2077692 100644 --- a/board/eukrea/cpu9260/config.mk +++ b/board/eukrea/cpu9260/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/eukrea/cpuat91/config.mk b/board/eukrea/cpuat91/config.mk index ef8dda0..463f46b 100644 --- a/board/eukrea/cpuat91/config.mk +++ b/board/eukrea/cpuat91/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21F00000 +CONFIG_SYS_TEXT_BASE = 0x21F00000 diff --git a/board/evb4510/config.mk b/board/evb4510/config.mk index 4d1a019..140c989 100644 --- a/board/evb4510/config.mk +++ b/board/evb4510/config.mk @@ -24,4 +24,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x007d0000 +CONFIG_SYS_TEXT_BASE = 0x007d0000 diff --git a/board/evb64260/config.mk b/board/evb64260/config.mk deleted file mode 100644 index 0646a3e..0000000 --- a/board/evb64260/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# EVB64260 boards -# - -TEXT_BASE = 0xfff00000 diff --git a/board/fads/config.mk b/board/fads/config.mk deleted file mode 100644 index 6106090..0000000 --- a/board/fads/config.mk +++ /dev/null @@ -1,34 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Motorola old MPC821/860ADS, MPC8xxFADS, new MPC866ADS, and -# MPC885ADS boards -# - -TEXT_BASE = 0xFE000000 -PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/fads -HOSTCFLAGS += -I$(TOPDIR)/board/fads -HOST_ENVIRO_CFLAGS += -I$(TOPDIR)/board/fads diff --git a/board/fads/fads.h b/board/fads/fads.h index 4ab4b26..38abc70 100644 --- a/board/fads/fads.h +++ b/board/fads/fads.h @@ -205,7 +205,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */ #ifdef CONFIG_BZIP2 @@ -351,14 +351,6 @@ #define CONFIG_SYS_OR1_PRELIM 0xFFFF8110 /* 64Kbyte address space */ #define CONFIG_SYS_BR1_PRELIM ((BCSR_ADDR) | BR_V) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define BCSR0 ((uint) (BCSR_ADDR + 0x00)) diff --git a/board/faraday/a320evb/config.mk b/board/faraday/a320evb/config.mk index aa25b98..b751d0d 100644 --- a/board/faraday/a320evb/config.mk +++ b/board/faraday/a320evb/config.mk @@ -32,4 +32,4 @@ # # download area is 1200'0000 -TEXT_BASE = 0x13f80000 +CONFIG_SYS_TEXT_BASE = 0x13f80000 diff --git a/board/flagadm/config.mk b/board/flagadm/config.mk deleted file mode 100644 index 9c72c79..0000000 --- a/board/flagadm/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TQM8xxL boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/freescale/corenet_ds/config.mk b/board/freescale/corenet_ds/config.mk index 72db24e..15bbf20 100644 --- a/board/freescale/corenet_ds/config.mk +++ b/board/freescale/corenet_ds/config.mk @@ -23,8 +23,5 @@ # # P4080DS board # -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif RESET_VECTOR_ADDRESS = 0xeffffffc diff --git a/board/freescale/m5208evbe/config.mk b/board/freescale/m5208evbe/config.mk index ce014ed..21dece4 100644 --- a/board/freescale/m5208evbe/config.mk +++ b/board/freescale/m5208evbe/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/freescale/m52277evb/config.mk b/board/freescale/m52277evb/config.mk index b42fcc9..4ed60f2 100644 --- a/board/freescale/m52277evb/config.mk +++ b/board/freescale/m52277evb/config.mk @@ -24,4 +24,4 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) diff --git a/board/freescale/m5235evb/config.mk b/board/freescale/m5235evb/config.mk index ada38dd..2a4381a 100644 --- a/board/freescale/m5235evb/config.mk +++ b/board/freescale/m5235evb/config.mk @@ -22,7 +22,7 @@ # MA 02111-1307 USA # -/*TEXT_BASE = 0xFFC00000*/ +/*CONFIG_SYS_TEXT_BASE = 0xFFC00000*/ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
\ No newline at end of file +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) diff --git a/board/freescale/m5249evb/config.mk b/board/freescale/m5249evb/config.mk index ccb2cf7..5b8c608 100644 --- a/board/freescale/m5249evb/config.mk +++ b/board/freescale/m5249evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/freescale/m5253demo/config.mk b/board/freescale/m5253demo/config.mk index fa66b75..93fce15 100644 --- a/board/freescale/m5253demo/config.mk +++ b/board/freescale/m5253demo/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xFF800000 +CONFIG_SYS_TEXT_BASE = 0xFF800000 diff --git a/board/freescale/m5253evbe/config.mk b/board/freescale/m5253evbe/config.mk index ccb2cf7..5b8c608 100644 --- a/board/freescale/m5253evbe/config.mk +++ b/board/freescale/m5253evbe/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/freescale/m5271evb/config.mk b/board/freescale/m5271evb/config.mk index 9a7af7c..cf6d375 100644 --- a/board/freescale/m5271evb/config.mk +++ b/board/freescale/m5271evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/freescale/m5272c3/config.mk b/board/freescale/m5272c3/config.mk index ccb2cf7..5b8c608 100644 --- a/board/freescale/m5272c3/config.mk +++ b/board/freescale/m5272c3/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/freescale/m5275evb/config.mk b/board/freescale/m5275evb/config.mk index ccb2cf7..5b8c608 100644 --- a/board/freescale/m5275evb/config.mk +++ b/board/freescale/m5275evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xffe00000 +CONFIG_SYS_TEXT_BASE = 0xffe00000 diff --git a/board/freescale/m5282evb/config.mk b/board/freescale/m5282evb/config.mk index 0aa2361..882f93a 100644 --- a/board/freescale/m5282evb/config.mk +++ b/board/freescale/m5282evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xFFE00000 +CONFIG_SYS_TEXT_BASE = 0xFFE00000 diff --git a/board/freescale/m53017evb/config.mk b/board/freescale/m53017evb/config.mk index ce014ed..21dece4 100644 --- a/board/freescale/m53017evb/config.mk +++ b/board/freescale/m53017evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/freescale/m5329evb/config.mk b/board/freescale/m5329evb/config.mk index ce014ed..21dece4 100644 --- a/board/freescale/m5329evb/config.mk +++ b/board/freescale/m5329evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/freescale/m5373evb/config.mk b/board/freescale/m5373evb/config.mk index ce014ed..21dece4 100644 --- a/board/freescale/m5373evb/config.mk +++ b/board/freescale/m5373evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/freescale/m54451evb/config.mk b/board/freescale/m54451evb/config.mk index b42fcc9..4ed60f2 100644 --- a/board/freescale/m54451evb/config.mk +++ b/board/freescale/m54451evb/config.mk @@ -24,4 +24,4 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk index b42fcc9..4ed60f2 100644 --- a/board/freescale/m54455evb/config.mk +++ b/board/freescale/m54455evb/config.mk @@ -24,4 +24,4 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) diff --git a/board/freescale/m547xevb/config.mk b/board/freescale/m547xevb/config.mk index fa66b75..93fce15 100644 --- a/board/freescale/m547xevb/config.mk +++ b/board/freescale/m547xevb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xFF800000 +CONFIG_SYS_TEXT_BASE = 0xFF800000 diff --git a/board/freescale/m548xevb/config.mk b/board/freescale/m548xevb/config.mk index fa66b75..93fce15 100644 --- a/board/freescale/m548xevb/config.mk +++ b/board/freescale/m548xevb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xFF800000 +CONFIG_SYS_TEXT_BASE = 0xFF800000 diff --git a/board/freescale/mpc5121ads/config.mk b/board/freescale/mpc5121ads/config.mk deleted file mode 100644 index 14998f4..0000000 --- a/board/freescale/mpc5121ads/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# (C) Copyright 2007 DENX Software Engineering -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index a84644d..b356a47 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -53,7 +53,9 @@ DECLARE_GLOBAL_DATA_PTR; #define SCCR2_CLOCKS_EN (CLOCK_SCCR2_DIU_EN | \ CLOCK_SCCR2_I2C_EN | \ CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_SPDIF_EN) + CLOCK_SCCR2_SPDIF_EN | \ + CLOCK_SCCR2_USB1_EN | \ + CLOCK_SCCR2_USB2_EN) void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip); @@ -102,7 +104,7 @@ int board_early_init_f(void) * write commands in order to establish the device ID. */ -#ifdef CONFIG_ADS5121_REV2 +#ifdef CONFIG_MPC5121ADS_REV2 out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1); #else if (in_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) { @@ -329,7 +331,7 @@ int checkboard (void) volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 spridr = in_be32(&im->sysconf.spridr); - printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", + printf ("Board: MPC5121ADS rev. 0x%04x (CPLD rev. 0x%02x)\n", brd_rev, cpld_rev); /* initialize function mux & slew rate IO inter alia on IO Pins */ diff --git a/board/freescale/mpc7448hpc2/config.mk b/board/freescale/mpc7448hpc2/config.mk index 2e58858..84a46e3 100644 --- a/board/freescale/mpc7448hpc2/config.mk +++ b/board/freescale/mpc7448hpc2/config.mk @@ -20,9 +20,4 @@ # MA 02111-1307 USA # -# Flash address -TEXT_BASE = 0xFF000000 -# RAM address -#TEXT_BASE = 0x00400000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -maltivec -mabi=altivec -msoft-float +PLATFORM_CPPFLAGS += -maltivec -mabi=altivec -msoft-float diff --git a/board/freescale/mpc8260ads/config.mk b/board/freescale/mpc8260ads/config.mk deleted file mode 100644 index e99e181..0000000 --- a/board/freescale/mpc8260ads/config.mk +++ /dev/null @@ -1,37 +0,0 @@ -# -# (C) Copyright 2001-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com -# -# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -endif diff --git a/board/freescale/mpc8266ads/config.mk b/board/freescale/mpc8266ads/config.mk deleted file mode 100644 index ecc2a7d..0000000 --- a/board/freescale/mpc8266ads/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Stuart Hughes, Lineo Inc, stuarth@lineo.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8260ads board -# - -TEXT_BASE = 0xfe000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/freescale/mpc8308rdb/config.mk b/board/freescale/mpc8308rdb/config.mk deleted file mode 100644 index f768264..0000000 --- a/board/freescale/mpc8308rdb/config.mk +++ /dev/null @@ -1 +0,0 @@ -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8313erdb/config.mk b/board/freescale/mpc8313erdb/config.mk deleted file mode 100644 index fd72a14..0000000 --- a/board/freescale/mpc8313erdb/config.mk +++ /dev/null @@ -1,7 +0,0 @@ -ifndef NAND_SPL -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -endif - -ifndef TEXT_BASE -TEXT_BASE = 0xFE000000 -endif diff --git a/board/freescale/mpc8315erdb/config.mk b/board/freescale/mpc8315erdb/config.mk deleted file mode 100644 index bf972fb..0000000 --- a/board/freescale/mpc8315erdb/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -ifndef NAND_SPL -ifeq ($(CONFIG_MK_NAND), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -endif -endif - -ifndef TEXT_BASE -TEXT_BASE = 0xFE000000 -endif diff --git a/board/freescale/mpc8323erdb/config.mk b/board/freescale/mpc8323erdb/config.mk deleted file mode 100644 index fe0d37d..0000000 --- a/board/freescale/mpc8323erdb/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8323ERDB -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc832xemds/config.mk b/board/freescale/mpc832xemds/config.mk deleted file mode 100644 index 6c3eca7..0000000 --- a/board/freescale/mpc832xemds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC832XEMDS -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc832xemds/pci.c b/board/freescale/mpc832xemds/pci.c index 5c7901d..8cab771 100644 --- a/board/freescale/mpc832xemds/pci.c +++ b/board/freescale/mpc832xemds/pci.c @@ -68,9 +68,6 @@ static struct pci_region pci2_regions[] = { }; #endif -DECLARE_GLOBAL_DATA_PTR; - - void pci_init_board(void) #ifdef CONFIG_PCISLAVE { @@ -124,10 +121,10 @@ void pci_init_board(void) /* initialize the PCA9555PW IO expander on the PIB board */ pib_init(); -#if defined(PCI_66M) +#if defined(CONFIG_PCI_66M) clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2; printf("PCI clock is 66MHz\n"); -#elif defined(PCI_33M) +#elif defined(CONFIG_PCI_33M) clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 | OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR; printf("PCI clock is 33MHz\n"); diff --git a/board/freescale/mpc8349emds/config.mk b/board/freescale/mpc8349emds/config.mk deleted file mode 100644 index edf64d1..0000000 --- a/board/freescale/mpc8349emds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8349EMDS -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8349itx/config.mk b/board/freescale/mpc8349itx/config.mk deleted file mode 100644 index 61b6a90..0000000 --- a/board/freescale/mpc8349itx/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# Copyright (C) Freescale Semiconductor, Inc. 2006. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8349E-mITX and MPC8349E-mITX-GP -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFEF00000 -endif diff --git a/board/freescale/mpc8360emds/config.mk b/board/freescale/mpc8360emds/config.mk deleted file mode 100644 index 9ace886..0000000 --- a/board/freescale/mpc8360emds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8360EMDS -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8360emds/pci.c b/board/freescale/mpc8360emds/pci.c index c3a8663..5466a08 100644 --- a/board/freescale/mpc8360emds/pci.c +++ b/board/freescale/mpc8360emds/pci.c @@ -122,10 +122,10 @@ void pci_init_board(void) /* initialize the PCA9555PW IO expander on the PIB board */ pib_init(); -#if defined(PCI_66M) +#if defined(CONFIG_PCI_66M) clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2; printf("PCI clock is 66MHz\n"); -#elif defined(PCI_33M) +#elif defined(CONFIG_PCI_33M) clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 | OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR; printf("PCI clock is 33MHz\n"); diff --git a/board/freescale/mpc8360erdk/config.mk b/board/freescale/mpc8360erdk/config.mk deleted file mode 100644 index 87dd746..0000000 --- a/board/freescale/mpc8360erdk/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC8360ERDK -# - -TEXT_BASE = 0xFF800000 diff --git a/board/freescale/mpc8360erdk/mpc8360erdk.c b/board/freescale/mpc8360erdk/mpc8360erdk.c index a6530d1..2baa11a 100644 --- a/board/freescale/mpc8360erdk/mpc8360erdk.c +++ b/board/freescale/mpc8360erdk/mpc8360erdk.c @@ -326,7 +326,7 @@ void pci_init_board(void) volatile law83xx_t *pci_law = immr->sysconf.pcilaw; struct pci_region *reg[] = { pci_regions, }; -#if defined(PCI_33M) +#if defined(CONFIG_PCI_33M) clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 | OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR; printf("PCI clock is 33MHz\n"); diff --git a/board/freescale/mpc837xemds/config.mk b/board/freescale/mpc837xemds/config.mk deleted file mode 100644 index 63c5fc3..0000000 --- a/board/freescale/mpc837xemds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC837xEMDS -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c index 77c5bda..edb3ff0 100644 --- a/board/freescale/mpc837xemds/pci.c +++ b/board/freescale/mpc837xemds/pci.c @@ -138,7 +138,7 @@ skip_pci: out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB); - mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg, 0); + mpc83xx_pcie_init(pex2 ? 1 : 2, pcie_reg); } void ft_pcie_fixup(void *blob, bd_t *bd) diff --git a/board/freescale/mpc837xerdb/config.mk b/board/freescale/mpc837xerdb/config.mk deleted file mode 100644 index 5675f81..0000000 --- a/board/freescale/mpc837xerdb/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MPC837xERDB -# - -TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk index 3f5447a..b7deb4a 100644 --- a/board/freescale/mpc8536ds/config.mk +++ b/board/freescale/mpc8536ds/config.mk @@ -24,26 +24,19 @@ # mpc8536ds board # ifndef NAND_SPL -ifeq ($(CONFIG_MK_NAND), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_NAND), y) LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif -ifeq ($(CONFIG_MK_SDCARD), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_SDCARD), y) RESET_VECTOR_ADDRESS = 0xf8fffffc endif -ifeq ($(CONFIG_MK_SPIFLASH), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_SPIFLASH), y) RESET_VECTOR_ADDRESS = 0xf8fffffc endif -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif - ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc endif diff --git a/board/freescale/mpc8540ads/config.mk b/board/freescale/mpc8540ads/config.mk deleted file mode 100644 index 7ae5e61..0000000 --- a/board/freescale/mpc8540ads/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8540ads board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xfff80000 diff --git a/board/freescale/mpc8541cds/config.mk b/board/freescale/mpc8541cds/config.mk deleted file mode 100644 index e7a0b34..0000000 --- a/board/freescale/mpc8541cds/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright 2004 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8541cds board -# -TEXT_BASE = 0xfff80000 diff --git a/board/freescale/mpc8544ds/config.mk b/board/freescale/mpc8544ds/config.mk deleted file mode 100644 index a09dac1..0000000 --- a/board/freescale/mpc8544ds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright 2007 Freescale Semiconductor, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8544ds board -# -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/freescale/mpc8548cds/config.mk b/board/freescale/mpc8548cds/config.mk deleted file mode 100644 index 81c8737..0000000 --- a/board/freescale/mpc8548cds/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright 2004, 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8548cds board -# -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/freescale/mpc8555cds/config.mk b/board/freescale/mpc8555cds/config.mk deleted file mode 100644 index 798be39..0000000 --- a/board/freescale/mpc8555cds/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright 2004 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8555cds board -# -TEXT_BASE = 0xfff80000 diff --git a/board/freescale/mpc8560ads/config.mk b/board/freescale/mpc8560ads/config.mk deleted file mode 100644 index 37dc7a1..0000000 --- a/board/freescale/mpc8560ads/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,2003 Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8560ads board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xfff80000 diff --git a/board/freescale/mpc8568mds/config.mk b/board/freescale/mpc8568mds/config.mk deleted file mode 100644 index ed4b101..0000000 --- a/board/freescale/mpc8568mds/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# Copyright 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8568mds board -# -TEXT_BASE = 0xfff80000 diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk index 86f138c..54b2eb1 100644 --- a/board/freescale/mpc8569mds/config.mk +++ b/board/freescale/mpc8569mds/config.mk @@ -24,12 +24,7 @@ # mpc8569mds board # ifndef NAND_SPL -ifeq ($(CONFIG_MK_NAND), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_NAND), y) LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif - -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/freescale/mpc8572ds/config.mk b/board/freescale/mpc8572ds/config.mk index 67394c9..5413921 100644 --- a/board/freescale/mpc8572ds/config.mk +++ b/board/freescale/mpc8572ds/config.mk @@ -23,8 +23,4 @@ # # mpc8572ds board # -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif - RESET_VECTOR_ADDRESS = 0xeffffffc diff --git a/board/freescale/mpc8610hpcd/config.mk b/board/freescale/mpc8610hpcd/config.mk deleted file mode 100644 index 798f60a..0000000 --- a/board/freescale/mpc8610hpcd/config.mk +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xfff00000 diff --git a/board/freescale/mpc8641hpcn/config.mk b/board/freescale/mpc8641hpcn/config.mk deleted file mode 100644 index 3315d25..0000000 --- a/board/freescale/mpc8641hpcn/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Jeff Brown -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mpc8641hpcn board -# default CCSRBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xeff00000 diff --git a/board/freescale/mx31ads/config.mk b/board/freescale/mx31ads/config.mk index 7ec0fe2..2303f30 100644 --- a/board/freescale/mx31ads/config.mk +++ b/board/freescale/mx31ads/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x87f00000 +CONFIG_SYS_TEXT_BASE = 0x87f00000 LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk index dcaa09f..de2c642 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1,5 +1,5 @@ ifdef CONFIG_NAND_SPL -TEXT_BASE = 0x87ec0000 +CONFIG_SYS_TEXT_BASE = 0x87ec0000 else -TEXT_BASE = 0x87f00000 +CONFIG_SYS_TEXT_BASE = 0x87f00000 endif diff --git a/board/freescale/mx51evk/config.mk b/board/freescale/mx51evk/config.mk index af70ec2..716fca9 100644 --- a/board/freescale/mx51evk/config.mk +++ b/board/freescale/mx51evk/config.mk @@ -21,5 +21,6 @@ # LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds -TEXT_BASE = 0x97800000 +CONFIG_SYS_TEXT_BASE = 0x97800000 IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg +ALL += $(obj)u-boot.imx diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 84386e6..c8d7d39 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -23,7 +23,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/mx51_pins.h> +#include <asm/arch/mx5x_pins.h> #include <asm/arch/iomux.h> #include <asm/errno.h> #include <asm/arch/sys_proto.h> diff --git a/board/freescale/p1022ds/config.mk b/board/freescale/p1022ds/config.mk index 4581d20..a953fdd 100644 --- a/board/freescale/p1022ds/config.mk +++ b/board/freescale/p1022ds/config.mk @@ -7,8 +7,4 @@ # any later version. # -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif - RESET_VECTOR_ADDRESS = 0xeffffffc diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 1f9f7b6..eececaa 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -25,26 +25,19 @@ # ifndef NAND_SPL -ifeq ($(CONFIG_MK_NAND), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_NAND), y) LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif -ifeq ($(CONFIG_MK_SDCARD), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_SDCARD), y) RESET_VECTOR_ADDRESS = 0xf8fffffc endif -ifeq ($(CONFIG_MK_SPIFLASH), y) -TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +ifeq ($(CONFIG_SPIFLASH), y) RESET_VECTOR_ADDRESS = 0xf8fffffc endif -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif - ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc endif diff --git a/board/freescale/p2020ds/config.mk b/board/freescale/p2020ds/config.mk index 4fcd69c..f5c07e5 100644 --- a/board/freescale/p2020ds/config.mk +++ b/board/freescale/p2020ds/config.mk @@ -23,8 +23,4 @@ # # p2020ds board # -ifndef TEXT_BASE -TEXT_BASE = 0xeff80000 -endif - RESET_VECTOR_ADDRESS = 0xeffffffc diff --git a/board/funkwerk/vovpn-gw/config.mk b/board/funkwerk/vovpn-gw/config.mk deleted file mode 100644 index e59b483..0000000 --- a/board/funkwerk/vovpn-gw/config.mk +++ /dev/null @@ -1,21 +0,0 @@ -# (C) Copyright 2004 -# Elmeg Communications Systems GmbH, Juergen Selent (j.selent@elmeg.de) -# -# Support for the Elmeg VoVPN Gateway Module -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA - -TEXT_BASE = 0xfff00000 diff --git a/board/g2000/config.mk b/board/g2000/config.mk deleted file mode 100644 index 25b2105..0000000 --- a/board/g2000/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd PLU405 boards -# - -TEXT_BASE = 0xFFFC0000 -#TEXT_BASE = 0x00FC0000 diff --git a/board/gaisler/gr_cpci_ax2000/config.mk b/board/gaisler/gr_cpci_ax2000/config.mk index 6c4d56b..e8df9a3 100644 --- a/board/gaisler/gr_cpci_ax2000/config.mk +++ b/board/gaisler/gr_cpci_ax2000/config.mk @@ -26,12 +26,13 @@ # # U-BOOT IN FLASH -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 # U-BOOT IN RAM or SDRAM with -nosram flag set when starting GRMON -#TEXT_BASE = 0x40000000 +#CONFIG_SYS_TEXT_BASE = 0x40000000 # U-BOOT IN SDRAM -#TEXT_BASE = 0x60000000 +#CONFIG_SYS_TEXT_BASE = 0x60000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -I$(TOPDIR)/board diff --git a/board/gaisler/gr_ep2s60/config.mk b/board/gaisler/gr_ep2s60/config.mk index 2ee0957..ce82469 100644 --- a/board/gaisler/gr_ep2s60/config.mk +++ b/board/gaisler/gr_ep2s60/config.mk @@ -27,9 +27,10 @@ # # U-BOOT IN FLASH -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 # U-BOOT IN SDRAM -#TEXT_BASE = 0x40000000 +#CONFIG_SYS_TEXT_BASE = 0x40000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -I$(TOPDIR)/board diff --git a/board/gaisler/gr_xc3s_1500/config.mk b/board/gaisler/gr_xc3s_1500/config.mk index 35cbc1b..c60ef7b 100644 --- a/board/gaisler/gr_xc3s_1500/config.mk +++ b/board/gaisler/gr_xc3s_1500/config.mk @@ -26,9 +26,10 @@ # # U-BOOT IN FLASH -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 # U-BOOT IN RAM -#TEXT_BASE = 0x40000000 +#CONFIG_SYS_TEXT_BASE = 0x40000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -I$(TOPDIR)/board diff --git a/board/gaisler/grsim/config.mk b/board/gaisler/grsim/config.mk index 81cd415..c2e8268 100644 --- a/board/gaisler/grsim/config.mk +++ b/board/gaisler/grsim/config.mk @@ -26,9 +26,10 @@ # # U-BOOT IN FLASH -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 # U-BOOT IN RAM -#TEXT_BASE = 0x40000000 +#CONFIG_SYS_TEXT_BASE = 0x40000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -I$(TOPDIR)/board diff --git a/board/gaisler/grsim_leon2/config.mk b/board/gaisler/grsim_leon2/config.mk index 65eba1b..4d88691 100644 --- a/board/gaisler/grsim_leon2/config.mk +++ b/board/gaisler/grsim_leon2/config.mk @@ -26,9 +26,10 @@ # # RUN U-BOOT FROM PROM -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 # RUN U-BOOT FROM RAM -#TEXT_BASE = 0x40000000 +#CONFIG_SYS_TEXT_BASE = 0x40000000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +PLATFORM_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -I$(TOPDIR)/board diff --git a/board/gcplus/config.mk b/board/gcplus/config.mk index 57326b8..a9bd3ff 100644 --- a/board/gcplus/config.mk +++ b/board/gcplus/config.mk @@ -10,4 +10,4 @@ # bootp;tftp;bootm, repeat, etc.,. # -TEXT_BASE = 0xc8f00000 +CONFIG_SYS_TEXT_BASE = 0xc8f00000 diff --git a/board/gdsys/dlvision/config.mk b/board/gdsys/dlvision/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/gdsys/dlvision/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/gdsys/gdppc440etx/config.mk b/board/gdsys/gdppc440etx/config.mk index 045f3e9..5b9543c 100644 --- a/board/gdsys/gdppc440etx/config.mk +++ b/board/gdsys/gdppc440etx/config.mk @@ -25,14 +25,6 @@ # G&D 440EP/GR ETX-Module # -#TEXT_BASE = 0x00001000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0xFBD00000 -else -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/gdsys/intip/config.mk b/board/gdsys/intip/config.mk index 56e397d..3923e01 100644 --- a/board/gdsys/intip/config.mk +++ b/board/gdsys/intip/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2008 +# (C) Copyright 2008-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,12 +24,6 @@ # G&D CompactCenter # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/gdsys/neo/config.mk b/board/gdsys/neo/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/gdsys/neo/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/gen860t/config.mk b/board/gen860t/config.mk deleted file mode 100644 index 7acd904..0000000 --- a/board/gen860t/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# FLASH base address for GEN860T board -# - -TEXT_BASE = 0x40000000 diff --git a/board/genietv/config.mk b/board/genietv/config.mk index 69ab21f..7e24fcc 100644 --- a/board/genietv/config.mk +++ b/board/genietv/config.mk @@ -21,5 +21,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x00000000 OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data diff --git a/board/gth2/config.mk b/board/gth2/config.mk index 2bc1338..c905049 100644 --- a/board/gth2/config.mk +++ b/board/gth2/config.mk @@ -26,16 +26,16 @@ # ifeq ($(TBASE),0) -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 else ifeq ($(TBASE),1) -TEXT_BASE = 0xbfc10070 +CONFIG_SYS_TEXT_BASE = 0xbfc10070 else ifeq ($(TBASE),2) -TEXT_BASE = 0xbfc30070 +CONFIG_SYS_TEXT_BASE = 0xbfc30070 else ## Only to make ordinary make work -TEXT_BASE = 0x90000000 +CONFIG_SYS_TEXT_BASE = 0x90000000 endif endif endif diff --git a/board/gw8260/config.mk b/board/gw8260/config.mk deleted file mode 100644 index ca0540d..0000000 --- a/board/gw8260/config.mk +++ /dev/null @@ -1,34 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MBX8xx boards -# - -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/hermes/config.mk b/board/hermes/config.mk deleted file mode 100644 index 008165f..0000000 --- a/board/hermes/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Multidata HERMES-PRO ISDN Routers -# - -TEXT_BASE = 0xFE000000 diff --git a/board/hidden_dragon/config.mk b/board/hidden_dragon/config.mk deleted file mode 100644 index 5c36d05..0000000 --- a/board/hidden_dragon/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000-2005 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Hidden Dragon boards -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/hymod/config.mk b/board/hymod/config.mk index 2df321f..ae766bc 100644 --- a/board/hymod/config.mk +++ b/board/hymod/config.mk @@ -25,8 +25,6 @@ # HYMOD boards # -TEXT_BASE = 0x40000000 - PLATFORM_CPPFLAGS += -I$(TOPDIR) OBJCFLAGS = --remove-section=.ppcenv diff --git a/board/ibf-dsp561/config.mk b/board/ibf-dsp561/config.mk index 1fec4d0..80b527c 100644 --- a/board/ibf-dsp561/config.mk +++ b/board/ibf-dsp561/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf561-0.5 diff --git a/board/icecube/config.mk b/board/icecube/config.mk deleted file mode 100644 index 170779d..0000000 --- a/board/icecube/config.mk +++ /dev/null @@ -1,44 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IceCube board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFF000000 boot low for 16 MiB boards -# 0xFF800000 boot low for 8 MiB boards -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/icu862/config.mk b/board/icu862/config.mk index 315e70d..9bfbc85 100644 --- a/board/icu862/config.mk +++ b/board/icu862/config.mk @@ -25,5 +25,4 @@ # ICU862 boards # -TEXT_BASE = 0x40F00000 OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data diff --git a/board/idmr/config.mk b/board/idmr/config.mk index f7c2258..95b0f9e 100644 --- a/board/idmr/config.mk +++ b/board/idmr/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xff800000 +CONFIG_SYS_TEXT_BASE = 0xff800000 diff --git a/board/ids8247/config.mk b/board/ids8247/config.mk index 2a7f3dd..c39beb8 100644 --- a/board/ids8247/config.mk +++ b/board/ids8247/config.mk @@ -24,11 +24,4 @@ # # IDS 8247 Board # - -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_IDS8247.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# -TEXT_BASE = 0xfff00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/impa7/config.mk b/board/impa7/config.mk index 417d6a8..15e7f04 100644 --- a/board/impa7/config.mk +++ b/board/impa7/config.mk @@ -25,4 +25,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xc1780000 +CONFIG_SYS_TEXT_BASE = 0xc1780000 diff --git a/board/imx31_phycore/config.mk b/board/imx31_phycore/config.mk index d34dc02..0131edf 100644 --- a/board/imx31_phycore/config.mk +++ b/board/imx31_phycore/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x87f00000 +CONFIG_SYS_TEXT_BASE = 0x87f00000 diff --git a/board/incaip/config.mk b/board/incaip/config.mk index 0cecc01..7ef5a66 100644 --- a/board/incaip/config.mk +++ b/board/incaip/config.mk @@ -26,7 +26,7 @@ # # ROM version -TEXT_BASE = 0xB0000000 +CONFIG_SYS_TEXT_BASE = 0xB0000000 # RAM version -#TEXT_BASE = 0x80100000 +#CONFIG_SYS_TEXT_BASE = 0x80100000 diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk index 9f6fb3b..a42d124 100644 --- a/board/inka4x0/config.mk +++ b/board/inka4x0/config.mk @@ -24,19 +24,4 @@ # # INKA 4X0 board: # -# Valid values for TEXT_BASE are: -# -# 0xFFE00000 boot low -# -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot low -TEXT_BASE = 0xFFE00000 -## For testing: boot from RAM -#TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/innokom/config.mk b/board/innokom/config.mk index 2354392..9e46555 100644 --- a/board/innokom/config.mk +++ b/board/innokom/config.mk @@ -7,9 +7,9 @@ # # This is the address where U-Boot lives in flash: -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0 # FIXME: armboot does only work correctly when being compiled # for the addresses _after_ relocation to RAM!! Otherwhise the # .bss segment is assumed in flash... -TEXT_BASE = 0xa1fe0000 +CONFIG_SYS_TEXT_BASE = 0xa1fe0000 diff --git a/board/innokom/lowlevel_init.S b/board/innokom/lowlevel_init.S index 9892430..55169be 100644 --- a/board/innokom/lowlevel_init.S +++ b/board/innokom/lowlevel_init.S @@ -39,7 +39,7 @@ DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE .endm _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE /* diff --git a/board/ip04/config.mk b/board/ip04/config.mk index 683101b..fc818fb 100644 --- a/board/ip04/config.mk +++ b/board/ip04/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf532-0.5 diff --git a/board/ip860/config.mk b/board/ip860/config.mk deleted file mode 100644 index ea3b873..0000000 --- a/board/ip860/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MicroSys IP860 VMEBus Systems -# - -TEXT_BASE = 0x10000000 diff --git a/board/ipek01/config.mk b/board/ipek01/config.mk deleted file mode 100644 index c8ecb29..0000000 --- a/board/ipek01/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2003-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IPEK01 board -# - -TEXT_BASE = 0xfc000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/iphase4539/config.mk b/board/iphase4539/config.mk deleted file mode 100644 index 632c1d2..0000000 --- a/board/iphase4539/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# iphase4539 board -# - -TEXT_BASE = 0xffb00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/siemens/IAD210/config.mk b/board/isee/igep0020/Makefile index c30abcb..2f11879 100644 --- a/board/siemens/IAD210/config.mk +++ b/board/isee/igep0020/Makefile @@ -1,8 +1,4 @@ # -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# # (C) Copyright 2000, 2001, 2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # @@ -25,9 +21,29 @@ # MA 02111-1307 USA # -# -# iad210 boards -# +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := igep0020.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend -TEXT_BASE = 0x08000000 -/*TEXT_BASE = 0x00200000 */ +######################################################################### diff --git a/board/pdm360ng/config.mk b/board/isee/igep0020/config.mk index c3b07dd..b8812f9 100644 --- a/board/pdm360ng/config.mk +++ b/board/isee/igep0020/config.mk @@ -1,6 +1,9 @@ # # (C) Copyright 2009 -# Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com +# ISEE 2007 SL, <www.iseebcn.com> +# +# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments # # See file CREDITS for list of people who contributed to this # project. @@ -20,5 +23,11 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # +# Physical Address: +# 8000'0000 (bank0) +# A000/0000 (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) -TEXT_BASE = 0xF0000000 +# For use with external or internal boots. +TEXT_BASE = 0x80008000 diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c new file mode 100644 index 0000000..3f7eda1 --- /dev/null +++ b/board/isee/igep0020/igep0020.c @@ -0,0 +1,129 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <netdev.h> +#include <twl4030.h> +#include <asm/io.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-types.h> +#include "igep0020.h" + +/* GPMC definitions for LAN9221 chips */ +static const u32 gpmc_lan_config[] = { + NET_LAN9221_GPMC_CONFIG1, + NET_LAN9221_GPMC_CONFIG2, + NET_LAN9221_GPMC_CONFIG3, + NET_LAN9221_GPMC_CONFIG4, + NET_LAN9221_GPMC_CONFIG5, + NET_LAN9221_GPMC_CONFIG6, +}; + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_IGEP0020; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/* + * Routine: setup_net_chip + * Description: Setting up the configuration GPMC registers specific to the + * Ethernet hardware. + */ +#if defined(CONFIG_CMD_NET) +static void setup_net_chip(void) +{ + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; + + enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000, + GPMC_SIZE_16M); + + /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ + writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); + /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); + /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ + writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, + &ctrl_base->gpmc_nadv_ale); + + /* Make GPIO 64 as output pin and send a magic pulse through it */ + if (!omap_request_gpio(64)) { + omap_set_gpio_direction(64, 0); + omap_set_gpio_dataout(64, 1); + udelay(1); + omap_set_gpio_dataout(64, 0); + udelay(1); + omap_set_gpio_dataout(64, 1); + } +} +#endif + +/* + * Routine: misc_init_r + * Description: Configure board specific parts + */ +int misc_init_r(void) +{ + twl4030_power_init(); + +#if defined(CONFIG_CMD_NET) + setup_net_chip(); +#endif + + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_DEFAULT(); +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h new file mode 100644 index 0000000..c08d758 --- /dev/null +++ b/board/isee/igep0020/igep0020.h @@ -0,0 +1,156 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _IGEP0020_H_ +#define _IGEP0020_H_ + +const omap3_sysinfo sysinfo = { + DDR_STACKED, + "IGEP v2 board", + "ONENAND", +}; + +/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */ +#define NET_LAN9221_GPMC_CONFIG1 0x00001000 +#define NET_LAN9221_GPMC_CONFIG2 0x00080701 +#define NET_LAN9221_GPMC_CONFIG3 0x00020201 +#define NET_LAN9221_GPMC_CONFIG4 0x08030703 +#define NET_LAN9221_GPMC_CONFIG5 0x00060908 +#define NET_LAN9221_GPMC_CONFIG6 0x87030000 +#define NET_LAN9221_GPMC_CONFIG7 0x00000f6c + +static void setup_net_chip(void); + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_DEFAULT()\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /* GPMC_nCS1 */\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /* GPIO_nCS2 */\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPIO_nCS3 */\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /* GPMC_nCS4 */\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /* GPMC_nCS5 */\ + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTU | EN | M0)) /* GPMC_nCS6 */\ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE */\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE */\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /* GPMC_nWP */\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /* GPMC_WAIT0 */\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /* GPIO_64-ETH_NRST */\ + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /* MMC1_CLK */\ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /* MMC1_CMD */\ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /* MMC1_DAT0 */\ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /* I2C1_SDA */\ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /* I2C4_SCL */\ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /* I2C4_SDA */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /* SYS_32K */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /* GPIO_2 */\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /* GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /* GPIO_4 */\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /* GPIO_5 */\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /* GPIO_6 */\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\ + MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */ +#endif diff --git a/board/galaxy5200/config.mk b/board/isee/igep0030/Makefile index c6398b2..cfc0411 100644 --- a/board/galaxy5200/config.mk +++ b/board/isee/igep0030/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2003 +# (C) Copyright 2000, 2001, 2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -21,25 +21,29 @@ # MA 02111-1307 USA # -# -# galaxy5200 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFE000000 boot low -# 0x00100000 boot from RAM (for testing only) does not work -# +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := igep0030.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend -sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp +######################################################################### -ifdef CONFIG_galaxy5200_LOWBOOT -TEXT_BASE = 0xFE000000 -endif +# defines $(obj).depend target +include $(SRCTREE)/rules.mk -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -endif +sinclude $(obj).depend -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +######################################################################### diff --git a/board/Marvell/db64360/config.mk b/board/isee/igep0030/config.mk index 0e42b48..35865e0 100644 --- a/board/Marvell/db64360/config.mk +++ b/board/isee/igep0030/config.mk @@ -1,6 +1,9 @@ # -# (C) Copyright 2001 -# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. +# (C) Copyright 2009 +# ISEE 2007 SL, <www.iseebcn.com> +# +# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu +# see http://www.ti.com/ for more information on Texas Instruments # # See file CREDITS for list of people who contributed to this # project. @@ -20,9 +23,12 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # +# Physical Address: +# 8000'0000 (bank0) +# A000/0000 (bank1) +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) -# -# EVB64360 boards -# +# For use with external or internal boots. +TEXT_BASE = 0x80008000 -TEXT_BASE = 0xfff00000 diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c new file mode 100644 index 0000000..9244259 --- /dev/null +++ b/board/isee/igep0030/igep0030.c @@ -0,0 +1,71 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <twl4030.h> +#include <asm/io.h> +#include <asm/arch/mem.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-types.h> +#include "igep0030.h" + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_IGEP0030; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/* + * Routine: misc_init_r + * Description: Configure board specific parts + */ +int misc_init_r(void) +{ + twl4030_power_init(); + + dieid_num_r(); + + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_DEFAULT(); +} diff --git a/board/isee/igep0030/igep0030.h b/board/isee/igep0030/igep0030.h new file mode 100644 index 0000000..b7ce5aa --- /dev/null +++ b/board/isee/igep0030/igep0030.h @@ -0,0 +1,147 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _IGEP0030_H_ +#define _IGEP0030_H_ + +const omap3_sysinfo sysinfo = { + DDR_STACKED, + "OMAP3 IGEP module", + "ONENAND", +}; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ + +#define MUX_DEFAULT()\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /* GPMC_nCS1 */\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /* GPIO_nCS2 */\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPIO_nCS3 */\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /* GPMC_nCS4 */\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /* GPMC_nCS5 */\ + MUX_VAL(CP(GPMC_NCS6), (IDIS | PTU | EN | M0)) /* GPMC_nCS6 */\ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE*/\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE*/\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /* GPMC_nWP */\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /* GPMC_WAIT0 */\ + MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /* MMC1_CLK */\ + MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /* MMC1_CMD */\ + MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /* MMC1_DAT0 */\ + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /* MMC1_DAT1 */\ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /* MMC1_DAT2 */\ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /* MMC1_DAT3 */\ + MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /* UART1_TX */\ + MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /* UART1_RX */\ + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /* UART3_TX */\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /* UART3_RX */\ + MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /* I2C1_SCL */\ + MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /* I2C1_SDA */\ + MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /* I2C4_SCL */\ + MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /* I2C4_SDA */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /* SYS_32K */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /* GPIO_2 */\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /* GPIO_3 */\ + MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /* GPIO_4 */\ + MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /* GPIO_5 */\ + MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /* GPIO_6 */\ + MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /* GPIO_7 */\ + MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /* GPIO_8 */\ + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /* SDRC_CKE0 */\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */ +#endif diff --git a/board/ispan/config.mk b/board/ispan/config.mk deleted file mode 100644 index 4600dbb..0000000 --- a/board/ispan/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright (C) 2004 Arabella Software Ltd. -# Yuli Barcohen <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Interphase iSPAN Communications Controllers -# -#TEXT_BASE = 0xFF800000 -#TEXT_BASE = 0xFFBA0000 -TEXT_BASE = 0xFE7A0000 diff --git a/board/ivm/config.mk b/board/ivm/config.mk deleted file mode 100644 index 37e7185..0000000 --- a/board/ivm/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# IVM boards -# - -TEXT_BASE = 0xFF000000 diff --git a/board/ixdp425/config.mk b/board/ixdp425/config.mk index ecff8d7..509c894 100644 --- a/board/ixdp425/config.mk +++ b/board/ixdp425/config.mk @@ -1,2 +1,2 @@ # -TEXT_BASE = 0x00f80000 +CONFIG_SYS_TEXT_BASE = 0x00f80000 diff --git a/board/jse/config.mk b/board/jse/config.mk deleted file mode 100644 index 03ec085..0000000 --- a/board/jse/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2003 Picture Elements, Inc. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Picture Elements, Inc. JSE boards -# - -TEXT_BASE = 0xFFF80000 diff --git a/board/jupiter/config.mk b/board/jupiter/config.mk deleted file mode 100644 index 5f4da96..0000000 --- a/board/jupiter/config.mk +++ /dev/null @@ -1,41 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Jupiter board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -#PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -DDEBUG -I$(TOPDIR)/board diff --git a/board/karo/tx25/config.mk b/board/karo/tx25/config.mk index 8be6466..18b2883 100644 --- a/board/karo/tx25/config.mk +++ b/board/karo/tx25/config.mk @@ -1,5 +1,5 @@ ifdef CONFIG_NAND_SPL -TEXT_BASE = 0x810c0000 +CONFIG_SYS_TEXT_BASE = 0x810c0000 else -TEXT_BASE = 0x81200000 +CONFIG_SYS_TEXT_BASE = 0x81200000 endif diff --git a/board/kb9202/config.mk b/board/kb9202/config.mk index 9ce161e..2077692 100644 --- a/board/kb9202/config.mk +++ b/board/kb9202/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/keymile/km8xx/config.mk b/board/keymile/km8xx/config.mk deleted file mode 100644 index 8625cea..0000000 --- a/board/keymile/km8xx/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# mgsvud boards -# - -TEXT_BASE = 0xf0000000 diff --git a/board/keymile/km_arm/config.mk b/board/keymile/km_arm/config.mk index b9e81b2..df4828c 100644 --- a/board/keymile/km_arm/config.mk +++ b/board/keymile/km_arm/config.mk @@ -22,7 +22,7 @@ # MA 02110-1301 USA # -TEXT_BASE = 0x004000000 +CONFIG_SYS_TEXT_BASE = 0x004000000 # Kirkwood Boot Image configuration file KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/keymile/kmeter1/config.mk b/board/keymile/kmeter1/config.mk deleted file mode 100644 index 20f298b..0000000 --- a/board/keymile/kmeter1/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2008 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xF0000000 diff --git a/board/keymile/mgcoge/config.mk b/board/keymile/mgcoge/config.mk deleted file mode 100644 index 143bc9f..0000000 --- a/board/keymile/mgcoge/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFE000000 diff --git a/board/korat/config.mk b/board/korat/config.mk index 73180db..63e84dc 100644 --- a/board/korat/config.mk +++ b/board/korat/config.mk @@ -38,10 +38,6 @@ ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8CFF0000 endif -ifeq ($(perm),1) -PLATFORM_CPPFLAGS += -DCONFIG_KORAT_PERMANENT -TEXT_BASE = 0xFFFA0000 -else -TEXT_BASE = 0xF7F60000 +ifndef CONFIG_KORAT_PERMANENT LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-F7FC.lds endif diff --git a/board/kup/kup4k/config.mk b/board/kup/kup4k/config.mk deleted file mode 100644 index 22e30b2..0000000 --- a/board/kup/kup4k/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# KUP4K board -# - -TEXT_BASE = 0x40000000 diff --git a/board/kup/kup4x/config.mk b/board/kup/kup4x/config.mk deleted file mode 100644 index 61d4e09..0000000 --- a/board/kup/kup4x/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# KUP4X board -# - -TEXT_BASE = 0x40000000 diff --git a/board/lantec/config.mk b/board/lantec/config.mk deleted file mode 100644 index 05ea3b9..0000000 --- a/board/lantec/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Lantec board (based on TQM8xxL config). -# - -TEXT_BASE = 0x40000000 diff --git a/board/lart/config.mk b/board/lart/config.mk index 3033c4f..b6b5e4d 100644 --- a/board/lart/config.mk +++ b/board/lart/config.mk @@ -20,4 +20,4 @@ # -TEXT_BASE = 0xc1780000 +CONFIG_SYS_TEXT_BASE = 0xc1780000 diff --git a/board/linkstation/config.mk b/board/linkstation/config.mk deleted file mode 100644 index d048290..0000000 --- a/board/linkstation/config.mk +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2001-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# LinkStation/LinkStation-HG: -# -# Valid values for TEXT_BASE are: -# -# Standard configuration - all models -# 0xFFF00000 boot from flash -# -# Test configuration (boot from RAM using uloader.o) -# LinkStation HD-HLAN and KuroBox Standard -# 0x03F00000 boot from RAM -# LinkStation HD-HGLAN and KuroBox HG -# 0x07F00000 boot from RAM -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -# For flash image - all models -TEXT_BASE = 0xFFF00000 -# For RAM image -# HLAN and LAN -#TEXT_BASE = 0x03F00000 -# HGLAN and HGTL -#TEXT_BASE = 0x07F00000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/logicpd/am3517evm/config.mk b/board/logicpd/am3517evm/config.mk index f7a35ce..102d32b 100644 --- a/board/logicpd/am3517evm/config.mk +++ b/board/logicpd/am3517evm/config.mk @@ -27,4 +27,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/logicpd/imx27lite/config.mk b/board/logicpd/imx27lite/config.mk index af1c82b..018d920 100644 --- a/board/logicpd/imx27lite/config.mk +++ b/board/logicpd/imx27lite/config.mk @@ -1,4 +1,5 @@ -# with relocation TEXT_BASE can be anything, and making it 0 +# with relocation CONFIG_SYS_TEXT_BASE can be anything, and making it 0 # makes relative and absolute relocation fixups interchangeable. -#TEXT_BASE = 0 -TEXT_BASE = 0xc0000000 +#CONFIG_SYS_TEXT_BASE = 0 + +CONFIG_SYS_TEXT_BASE = 0xc0000000 diff --git a/board/logicpd/imx31_litekit/config.mk b/board/logicpd/imx31_litekit/config.mk index d34dc02..a7887ba 100644 --- a/board/logicpd/imx31_litekit/config.mk +++ b/board/logicpd/imx31_litekit/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x87f00000 +CONFIG_SYS_TEXT_BASE = 0xa0000000 diff --git a/board/logicpd/imx31_litekit/imx31_litekit.c b/board/logicpd/imx31_litekit/imx31_litekit.c index 2ac622d..a07ba0e 100644 --- a/board/logicpd/imx31_litekit/imx31_litekit.c +++ b/board/logicpd/imx31_litekit/imx31_litekit.c @@ -31,12 +31,18 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->ram_size = PHYS_SDRAM_1_SIZE; return 0; } +void +dram_init_banksize (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +} + int board_init (void) { __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */ diff --git a/board/logicpd/zoom1/config.mk b/board/logicpd/zoom1/config.mk index 7347497..39a94dc 100644 --- a/board/logicpd/zoom1/config.mk +++ b/board/logicpd/zoom1/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/logicpd/zoom2/config.mk b/board/logicpd/zoom2/config.mk index 33f394b..8a8adc7 100644 --- a/board/logicpd/zoom2/config.mk +++ b/board/logicpd/zoom2/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/logodl/config.mk b/board/logodl/config.mk deleted file mode 100644 index 76c382d..0000000 --- a/board/logodl/config.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -# Linux-Kernel is expected to be at c000'8000, entry c000'8000 -# -# we load ourself to c170'0000, the upper 1 MB of second bank -# -# download areas is c800'0000 -# - -#TEXT_BASE = 0 - -# FIXME: armboot does only work correctly when being compiled -# # for the addresses _after_ relocation to RAM!! Otherwhise the -# # .bss segment is assumed in flash... -# -TEXT_BASE = 0x083E0000 diff --git a/board/logodl/flash.c b/board/logodl/flash.c deleted file mode 100644 index 593943f..0000000 --- a/board/logodl/flash.c +++ /dev/null @@ -1,829 +0,0 @@ -/* - * (C) 2000 Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * (C) 2003 August Hoeraendl, Logotronic GmbH - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#undef CONFIG_FLASH_16BIT - -#include <common.h> - -#define FLASH_BANK_SIZE 0x1000000 -#define MAIN_SECT_SIZE 0x20000 /* 2x64k = 128k per sector */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it - * has nothing to do with the flash chip being 8-bit or 16-bit. - */ -#ifdef CONFIG_FLASH_16BIT -typedef unsigned short FLASH_PORT_WIDTH; -typedef volatile unsigned short FLASH_PORT_WIDTHV; - -#define FLASH_ID_MASK 0xFFFF -#else -typedef unsigned long FLASH_PORT_WIDTH; -typedef volatile unsigned long FLASH_PORT_WIDTHV; - -#define FLASH_ID_MASK 0xFFFFFFFF -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define ORMASK(size) ((-size) & OR_AM_MSK) - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size(FPWV *addr, flash_info_t *info); -static void flash_reset(flash_info_t *info); -static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data); -static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data); -#define write_word(in, de, da) write_word_amd(in, de, da) -static void flash_get_offsets(ulong base, flash_info_t *info); -#ifdef CONFIG_SYS_FLASH_PROTECTION -static void flash_sync_real_protect(flash_info_t *info); -#endif - -/*----------------------------------------------------------------------- - * flash_init() - * - * sets up flash_info and returns size of FLASH (bytes) - */ -ulong flash_init(void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - { - ulong flashbase = 0; - flash_info[i].flash_id = - (FLASH_MAN_AMD & FLASH_VENDMASK) | - (FLASH_AM640U & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - switch (i) - { - case 0: - flashbase = PHYS_FLASH_1; - break; - case 1: - flashbase = PHYS_FLASH_2; - break; - default: - panic("configured too many flash banks!\n"); - break; - } - for (j = 0; j < flash_info[i].sector_count; j++) - { - flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + _bss_start - _armboot_start, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_reset(flash_info_t *info) -{ - FPWV *base = (FPWV *)(info->start[0]); - - /* Put FLASH back in read mode */ - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) - *base = (FPW)0x00FF00FF; /* Intel Read Mode */ - else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) - *base = (FPW)0x00F000F0; /* AMD Read Mode */ -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - - /* set up sector start address table */ - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL - && (info->flash_id & FLASH_BTYPE)) { - int bootsect_size; /* number of bytes/boot sector */ - int sect_size; /* number of bytes/regular sector */ - - bootsect_size = 0x00002000 * (sizeof(FPW)/2); - sect_size = 0x00010000 * (sizeof(FPW)/2); - - /* set sector offsets for bottom boot block type */ - for (i = 0; i < 8; ++i) { - info->start[i] = base + (i * bootsect_size); - } - for (i = 8; i < info->sector_count; i++) { - info->start[i] = base + ((i - 7) * sect_size); - } - } - else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD - && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) { - - int sect_size; /* number of bytes/sector */ - - sect_size = 0x00010000 * (sizeof(FPW)/2); - - /* set up sector start address table (uniform sector type) */ - for( i = 0; i < info->sector_count; i++ ) - info->start[i] = base + (i * sect_size); - } -} - -/*----------------------------------------------------------------------- - */ - -void flash_print_info (flash_info_t *info) -{ - int i; - uchar *boottype; - uchar *bootletter; - uchar *fmt; - uchar botbootletter[] = "B"; - uchar topbootletter[] = "T"; - uchar botboottype[] = "bottom boot sector"; - uchar topboottype[] = "top boot sector"; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_SST: printf ("SST "); break; - case FLASH_MAN_STM: printf ("STM "); break; - case FLASH_MAN_INTEL: printf ("INTEL "); break; - default: printf ("Unknown Vendor "); break; - } - - /* check for top or bottom boot, if it applies */ - if (info->flash_id & FLASH_BTYPE) { - boottype = botboottype; - bootletter = botbootletter; - } - else { - boottype = topboottype; - bootletter = topbootletter; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM640U: - fmt = "29LV641D (64 Mbit, uniform sectors)\n"; - break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: - fmt = "28F800C3%s (8 Mbit, %s)\n"; - break; - case FLASH_INTEL800B: - case FLASH_INTEL800T: - fmt = "28F800B3%s (8 Mbit, %s)\n"; - break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: - fmt = "28F160C3%s (16 Mbit, %s)\n"; - break; - case FLASH_INTEL160B: - case FLASH_INTEL160T: - fmt = "28F160B3%s (16 Mbit, %s)\n"; - break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: - fmt = "28F320C3%s (32 Mbit, %s)\n"; - break; - case FLASH_INTEL320B: - case FLASH_INTEL320T: - fmt = "28F320B3%s (32 Mbit, %s)\n"; - break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: - fmt = "28F640C3%s (64 Mbit, %s)\n"; - break; - case FLASH_INTEL640B: - case FLASH_INTEL640T: - fmt = "28F640B3%s (64 Mbit, %s)\n"; - break; - default: - fmt = "Unknown Chip Type\n"; - break; - } - - printf (fmt, bootletter, boottype); - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, - info->sector_count); - - printf (" Sector Start Addresses:"); - - for (i=0; i<info->sector_count; ++i) { - if ((i % 5) == 0) { - printf ("\n "); - } - - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf ("\n"); -} - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ - -ulong flash_get_size (FPWV *addr, flash_info_t *info) -{ - /* Write auto select command: read Manufacturer ID */ - - /* Write auto select command sequence and test FLASH answer */ - addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */ - addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */ - addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */ - - /* The manufacturer codes are only 1 byte, so just use 1 byte. - * This works for any bus width and any FLASH device width. - */ - switch (addr[0] & 0xff) { - - case (uchar)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - - case (uchar)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; - } - - /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ - if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) { - - case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */ - info->flash_id += FLASH_AM640U; - info->sector_count = 128; - info->size = 0x00800000 * (sizeof(FPW)/2); - break; /* => 8 or 16 MB */ - - case (FPW)INTEL_ID_28F800C3B: - info->flash_id += FLASH_28F800C3B; - info->sector_count = 23; - info->size = 0x00100000 * (sizeof(FPW)/2); - break; /* => 1 or 2 MB */ - - case (FPW)INTEL_ID_28F800B3B: - info->flash_id += FLASH_INTEL800B; - info->sector_count = 23; - info->size = 0x00100000 * (sizeof(FPW)/2); - break; /* => 1 or 2 MB */ - - case (FPW)INTEL_ID_28F160C3B: - info->flash_id += FLASH_28F160C3B; - info->sector_count = 39; - info->size = 0x00200000 * (sizeof(FPW)/2); - break; /* => 2 or 4 MB */ - - case (FPW)INTEL_ID_28F160B3B: - info->flash_id += FLASH_INTEL160B; - info->sector_count = 39; - info->size = 0x00200000 * (sizeof(FPW)/2); - break; /* => 2 or 4 MB */ - - case (FPW)INTEL_ID_28F320C3B: - info->flash_id += FLASH_28F320C3B; - info->sector_count = 71; - info->size = 0x00400000 * (sizeof(FPW)/2); - break; /* => 4 or 8 MB */ - - case (FPW)INTEL_ID_28F320B3B: - info->flash_id += FLASH_INTEL320B; - info->sector_count = 71; - info->size = 0x00400000 * (sizeof(FPW)/2); - break; /* => 4 or 8 MB */ - - case (FPW)INTEL_ID_28F640C3B: - info->flash_id += FLASH_28F640C3B; - info->sector_count = 135; - info->size = 0x00800000 * (sizeof(FPW)/2); - break; /* => 8 or 16 MB */ - - case (FPW)INTEL_ID_28F640B3B: - info->flash_id += FLASH_INTEL640B; - info->sector_count = 135; - info->size = 0x00800000 * (sizeof(FPW)/2); - break; /* => 8 or 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* => no or unknown flash */ - } - - flash_get_offsets((ulong)addr, info); - - /* Put FLASH back in read mode */ - flash_reset(info); - - return (info->size); -} - -#ifdef CONFIG_SYS_FLASH_PROTECTION -/*----------------------------------------------------------------------- - */ - -static void flash_sync_real_protect(flash_info_t *info) -{ - FPWV *addr = (FPWV *)(info->start[0]); - FPWV *sect; - int i; - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F800C3B: - case FLASH_28F800C3T: - case FLASH_28F160C3B: - case FLASH_28F160C3T: - case FLASH_28F320C3B: - case FLASH_28F320C3T: - case FLASH_28F640C3B: - case FLASH_28F640C3T: - /* check for protected sectors */ - *addr = (FPW)0x00900090; - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02. - * D0 = 1 for each device if protected. - * If at least one device is protected the sector is marked - * protected, but mixed protected and unprotected devices - * within a sector should never happen. - */ - sect = (FPWV *)(info->start[i]); - info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0; - } - - /* Put FLASH back in read mode */ - flash_reset(info); - break; - - case FLASH_AM640U: - default: - /* no hardware protect that we support */ - break; - } -} -#endif - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - FPWV *addr; - int flag, prot, sect; - int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; - ulong start, now, last; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_INTEL800B: - case FLASH_INTEL160B: - case FLASH_INTEL320B: - case FLASH_INTEL640B: - case FLASH_28F800C3B: - case FLASH_28F160C3B: - case FLASH_28F320C3B: - case FLASH_28F640C3B: - case FLASH_AM640U: - break; - case FLASH_UNKNOWN: - default: - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - start = get_timer(0); - last = start; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && rcode == 0; sect++) { - - if (info->protect[sect] != 0) /* protected, skip it */ - continue; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr = (FPWV *)(info->start[sect]); - if (intel) { - *addr = (FPW)0x00500050; /* clear status register */ - *addr = (FPW)0x00200020; /* erase setup */ - *addr = (FPW)0x00D000D0; /* erase confirm */ - } - else { - /* must be AMD style if not Intel */ - FPWV *base; /* first address in bank */ - - base = (FPWV *)(info->start[0]); - base[0x0555] = (FPW)0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW)0x00550055; /* unlock */ - base[0x0555] = (FPW)0x00800080; /* erase mode */ - base[0x0555] = (FPW)0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW)0x00550055; /* unlock */ - *addr = (FPW)0x00300030; /* erase sector */ - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 50us for AMD, 80us for Intel. - * Let's wait 1 ms. - */ - udelay (1000); - - while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - - if (intel) { - /* suspend erase */ - *addr = (FPW)0x00B000B0; - } - - flash_reset(info); /* reset to read mode */ - rcode = 1; /* failed */ - break; - } - - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } - } - - flash_reset(info); /* reset to read mode */ - } - - printf (" done\n"); - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int bad_write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ - int bytes; /* number of bytes to program in current word */ - int left; /* number of bytes left to program */ - int i, res; - - for (left = cnt, res = 0; - left > 0 && res == 0; - addr += sizeof(data), left -= sizeof(data) - bytes) { - - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); - - /* combine source and destination data so can program - * an entire word of 16 or 32 bits - */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) - data += *((uchar *)addr + i); - else - data += *src++; - } - - /* write one word to the flash */ - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - res = write_word_amd(info, (FPWV *)addr, data); - break; - case FLASH_MAN_INTEL: - res = write_word_intel(info, (FPWV *)addr, data); - break; - default: - /* unknown flash type, error! */ - printf ("missing or unknown FLASH type\n"); - res = 1; /* not really a timeout, but gives error */ - break; - } - } - - return (res); -} - -/** - * write_buf: - Copy memory to flash. - * - * @param info: - * @param src: source of copy transaction - * @param addr: where to copy to - * @param cnt: number of bytes to copy - * - * @return error code - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int l; - int i, rc; - - wp = (addr & ~1); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); - } - for (; i<2 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt==0 && i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* - * handle word aligned part - */ - while (cnt >= 2) { - /* data = *((vushort*)src); */ - data = *((FPW*)src); - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - src += sizeof(FPW); - wp += sizeof(FPW); - cnt -= sizeof(FPW); - } - - if (cnt == 0) return ERR_OK; - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); - } - - return write_word(info, wp, data); -} - - -/*----------------------------------------------------------------------- - * Write a word to Flash for AMD FLASH - * A word is 16 or 32 bits, whichever the bus width of the flash bank - * (not an individual chip) is. - * - * returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) -{ - ulong start; - int flag; - int res = 0; /* result, assume success */ - FPWV *base; /* first address in flash bank */ - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - - base = (FPWV *)(info->start[0]); - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - base[0x0555] = (FPW)0x00AA00AA; /* unlock */ - base[0x02AA] = (FPW)0x00550055; /* unlock */ - base[0x0555] = (FPW)0x00A000A0; /* selects program mode */ - - *dest = data; /* start programming the data */ - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer (0); - - /* data polling for D7 */ - while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *dest = (FPW)0x00F000F0; /* reset bank */ - res = 1; - } - } - - return (res); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash for Intel FLASH - * A word is 16 or 32 bits, whichever the bus width of the flash bank - * (not an individual chip) is. - * - * returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data) -{ - ulong start; - int flag; - int res = 0; /* result, assume success */ - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - *dest = (FPW)0x00500050; /* clear status register */ - *dest = (FPW)0x00FF00FF; /* make sure in read mode */ - *dest = (FPW)0x00400040; /* program setup */ - - *dest = data; /* start programming the data */ - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer (0); - - while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *dest = (FPW)0x00B000B0; /* Suspend program */ - res = 1; - } - } - - if (res == 0 && (*dest & (FPW)0x00100010)) - res = 1; /* write failed, time out error is close enough */ - - *dest = (FPW)0x00500050; /* clear status register */ - *dest = (FPW)0x00FF00FF; /* make sure in read mode */ - - return (res); -} - -#ifdef CONFIG_SYS_FLASH_PROTECTION -/*----------------------------------------------------------------------- - */ -int flash_real_protect (flash_info_t * info, long sector, int prot) -{ - int rcode = 0; /* assume success */ - FPWV *addr; /* address of sector */ - FPW value; - - addr = (FPWV *) (info->start[sector]); - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F800C3B: - case FLASH_28F800C3T: - case FLASH_28F160C3B: - case FLASH_28F160C3T: - case FLASH_28F320C3B: - case FLASH_28F320C3T: - case FLASH_28F640C3B: - case FLASH_28F640C3T: - flash_reset (info); /* make sure in read mode */ - *addr = (FPW) 0x00600060L; /* lock command setup */ - if (prot) - *addr = (FPW) 0x00010001L; /* lock sector */ - else - *addr = (FPW) 0x00D000D0L; /* unlock sector */ - flash_reset (info); /* reset to read mode */ - - /* now see if it really is locked/unlocked as requested */ - *addr = (FPW) 0x00900090; - /* read sector protection at sector address, (A7 .. A0) = 0x02. - * D0 = 1 for each device if protected. - * If at least one device is protected the sector is marked - * protected, but return failure. Mixed protected and - * unprotected devices within a sector should never happen. - */ - value = addr[2] & (FPW) 0x00010001; - if (value == 0) - info->protect[sector] = 0; - else if (value == (FPW) 0x00010001) - info->protect[sector] = 1; - else { - /* error, mixed protected and unprotected */ - rcode = 1; - info->protect[sector] = 1; - } - if (info->protect[sector] != prot) - rcode = 1; /* failed to protect/unprotect as requested */ - - /* reload all protection bits from hardware for now */ - flash_sync_real_protect (info); - break; - - case FLASH_AM640U: - default: - /* no hardware protect that we support */ - info->protect[sector] = prot; - break; - } - - return rcode; -} -#endif diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c deleted file mode 100644 index 2562ecc..0000000 --- a/board/logodl/logodl.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * (C) 2002 Kyle Harris <kharris@nexus-tech.net>, Nexus Technologies, Inc. - * (C) 2002 Marius Groeger <mgroeger@sysgo.de>, Sysgo GmbH - * (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <asm/arch/pxa-regs.h> - -DECLARE_GLOBAL_DATA_PTR; - -/** - * board_init: - setup some data structures - * - * @return: 0 in case of success - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - gd->bd->bi_arch_number = MACH_TYPE_LOGODL; - gd->bd->bi_boot_params = 0x08000100; - gd->bd->bi_baudrate = CONFIG_BAUDRATE; - - (*((volatile short*)0x14800000)) = 0xff; /* power on eth0 */ - (*((volatile short*)0x14000000)) = 0xff; /* power on uart */ - - return 0; -} - - -/** - * dram_init: - setup dynamic RAM - * - * @return: 0 in case of success - */ - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - - -/** - * logodl_set_led: - switch LEDs on or off - * - * @param led: LED to switch (0,1) - * @param state: switch on (1) or off (0) - */ - -void logodl_set_led(int led, int state) -{ - switch(led) { - - case 0: - if (state==1) { - CONFIG_SYS_LED_A_CR = CONFIG_SYS_LED_A_BIT; - } else if (state==0) { - CONFIG_SYS_LED_A_SR = CONFIG_SYS_LED_A_BIT; - } - break; - - case 1: - if (state==1) { - CONFIG_SYS_LED_B_CR = CONFIG_SYS_LED_B_BIT; - } else if (state==0) { - CONFIG_SYS_LED_B_SR = CONFIG_SYS_LED_B_BIT; - } - break; - } - - return; -} - - -/** - * show_boot_progress: - indicate state of the boot process - * - * @param status: Status number - see README for details. - * - * The LOGOTRONIC does only have 2 LEDs, so we switch them on at the most - * important states (1, 5, 15). - */ - -void show_boot_progress (int status) -{ - if (status < -32) status = -1; /* let things compatible */ - /* - switch(status) { - case 1: logodl_set_led(0,1); break; - case 5: logodl_set_led(1,1); break; - case 15: logodl_set_led(2,1); break; - } - */ - logodl_set_led(0, (status & 1)==1); - logodl_set_led(1, (status & 2)==2); - - return; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - return rc; -} -#endif diff --git a/board/logodl/lowlevel_init.S b/board/logodl/lowlevel_init.S deleted file mode 100644 index 9892430..0000000 --- a/board/logodl/lowlevel_init.S +++ /dev/null @@ -1,437 +0,0 @@ -/* - * Most of this taken from Redboot hal_platform_setup.h with cleanup - * - * NOTE: I haven't clean this up considerably, just enough to get it - * running. See hal_platform_setup.h for the source. See - * board/cradle/lowlevel_init.S for another PXA250 setup that is - * much cleaner. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> -#include <asm/arch/pxa-regs.h> - -DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE - -/* wait for coprocessor write complete */ - .macro CPWAIT reg - mrc p15,0,\reg,c2,c0,0 - mov \reg,\reg - sub pc,pc,#4 - .endm - -_TEXT_BASE: - .word TEXT_BASE - - -/* - * Memory setup - */ - -.globl lowlevel_init -lowlevel_init: - - mov r10, lr - - /* Set up GPIO pins first ----------------------------------------- */ - - ldr r0, =GPSR0 - ldr r1, =CONFIG_SYS_GPSR0_VAL - str r1, [r0] - - ldr r0, =GPSR1 - ldr r1, =CONFIG_SYS_GPSR1_VAL - str r1, [r0] - - ldr r0, =GPSR2 - ldr r1, =CONFIG_SYS_GPSR2_VAL - str r1, [r0] - - ldr r0, =GPCR0 - ldr r1, =CONFIG_SYS_GPCR0_VAL - str r1, [r0] - - ldr r0, =GPCR1 - ldr r1, =CONFIG_SYS_GPCR1_VAL - str r1, [r0] - - ldr r0, =GPCR2 - ldr r1, =CONFIG_SYS_GPCR2_VAL - str r1, [r0] - - ldr r0, =GPDR0 - ldr r1, =CONFIG_SYS_GPDR0_VAL - str r1, [r0] - - ldr r0, =GPDR1 - ldr r1, =CONFIG_SYS_GPDR1_VAL - str r1, [r0] - - ldr r0, =GPDR2 - ldr r1, =CONFIG_SYS_GPDR2_VAL - str r1, [r0] - - ldr r0, =GAFR0_L - ldr r1, =CONFIG_SYS_GAFR0_L_VAL - str r1, [r0] - - ldr r0, =GAFR0_U - ldr r1, =CONFIG_SYS_GAFR0_U_VAL - str r1, [r0] - - ldr r0, =GAFR1_L - ldr r1, =CONFIG_SYS_GAFR1_L_VAL - str r1, [r0] - - ldr r0, =GAFR1_U - ldr r1, =CONFIG_SYS_GAFR1_U_VAL - str r1, [r0] - - ldr r0, =GAFR2_L - ldr r1, =CONFIG_SYS_GAFR2_L_VAL - str r1, [r0] - - ldr r0, =GAFR2_U - ldr r1, =CONFIG_SYS_GAFR2_U_VAL - str r1, [r0] - - ldr r0, =PSSR /* enable GPIO pins */ - ldr r1, =CONFIG_SYS_PSSR_VAL - str r1, [r0] - -/* ldr r3, =MSC1 / low - bank 2 Lubbock Registers / SRAM */ -/* ldr r2, =CONFIG_SYS_MSC1_VAL / high - bank 3 Ethernet Controller */ -/* str r2, [r3] / need to set MSC1 before trying to write to the HEX LEDs */ -/* ldr r2, [r3] / need to read it back to make sure the value latches (see MSC section of manual) */ -/* */ -/* ldr r1, =LED_BLANK */ -/* mov r0, #0xFF */ -/* str r0, [r1] / turn on hex leds */ -/* */ -/*loop: */ -/* */ -/* ldr r0, =0xB0070001 */ -/* ldr r1, =_LED */ -/* str r0, [r1] / hex display */ - - - /* ---------------------------------------------------------------- */ - /* Enable memory interface */ - /* */ - /* The sequence below is based on the recommended init steps */ - /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ - /* Chapter 10. */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 1: Wait for at least 200 microsedonds to allow internal */ - /* clocks to settle. Only necessary after hard reset... */ - /* FIXME: can be optimized later */ - /* ---------------------------------------------------------------- */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - -mem_init: - - ldr r1, =MEMC_BASE /* get memory controller base addr. */ - - /* ---------------------------------------------------------------- */ - /* Step 2a: Initialize Asynchronous static memory controller */ - /* ---------------------------------------------------------------- */ - - /* MSC registers: timing, bus width, mem type */ - - /* MSC0: nCS(0,1) */ - ldr r2, =CONFIG_SYS_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ - /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CONFIG_SYS_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] - - /* MSC2: nCS(4,5) */ - ldr r2, =CONFIG_SYS_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2b: Initialize Card Interface */ - /* ---------------------------------------------------------------- */ - - /* MECR: Memory Expansion Card Register */ - ldr r2, =CONFIG_SYS_MECR_VAL - str r2, [r1, #MECR_OFFSET] - ldr r2, [r1, #MECR_OFFSET] - - /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CONFIG_SYS_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] - ldr r2, [r1, #MCMEM0_OFFSET] - - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CONFIG_SYS_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] - ldr r2, [r1, #MCMEM1_OFFSET] - - /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CONFIG_SYS_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] - ldr r2, [r1, #MCATT0_OFFSET] - - /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CONFIG_SYS_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] - ldr r2, [r1, #MCATT1_OFFSET] - - /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CONFIG_SYS_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] - ldr r2, [r1, #MCIO0_OFFSET] - - /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CONFIG_SYS_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] - ldr r2, [r1, #MCIO1_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ - - /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ - adr r3, mem_init /* r0 <- current position of code */ - ldr r2, =mem_init - cmp r3, r2 /* skip init if in place */ - beq initirqs - - - /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ - - /* Before accessing MDREFR we need a valid DRI field, so we set */ - /* this to power on defaults + DRI field. */ - - ldr r3, =CONFIG_SYS_MDREFR_VAL - ldr r2, =0xFFF - and r3, r3, r2 - ldr r4, =0x03ca4000 - orr r4, r4, r3 - - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - - /* ---------------------------------------------------------------- */ - /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* ---------------------------------------------------------------- */ - - /* Initialize SXCNFG register. Assert the enable bits */ - - /* Write SXMRS to cause an MRS command to all enabled banks of */ - /* synchronous static memory. Note that SXLCR need not be written */ - /* at this time. */ - - /* FIXME: we use async mode for now */ - - - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ - - /* Step 4a: assert MDREFR:K?RUN and configure */ - /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ - - ldr r4, =CONFIG_SYS_MDREFR_VAL - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Step 4b: de-assert MDREFR:SLFRSH. */ - - bic r4, r4, #(MDREFR_SLFRSH) - - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - - /* Step 4c: assert MDREFR:E1PIN and E0PIO */ - - orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) - - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - - /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ - /* configure but not enable each SDRAM partition pair. */ - - ldr r4, =CONFIG_SYS_MDCNFG_VAL - bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] - - - /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ - /* 100..200 µsec. */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - - - /* Step 4f: Trigger a number (usually 8) refresh cycles by */ - /* attempting non-burst read or write accesses to disabled */ - /* SDRAM, as commonly specified in the power up sequence */ - /* documented in SDRAM data sheets. The address(es) used */ - /* for this purpose must not be cacheable. */ - - /* There should 9 writes, since the first write doesn't */ - /* trigger a refresh cycle on PXA250. See Intel PXA250 and */ - /* PXA210 Processors Specification Update, */ - /* Jan 2003, Errata #116, page 30. */ - - - ldr r3, =CONFIG_SYS_DRAM_BASE - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - - /* Step 4g: Write MDCNFG with enable bits asserted */ - /* (MDCNFG:DEx set to 1). */ - - ldr r3, [r1, #MDCNFG_OFFSET] - orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1) - str r3, [r1, #MDCNFG_OFFSET] - - /* Step 4h: Write MDMRS. */ - - ldr r2, =CONFIG_SYS_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] - - - /* We are finished with Intel's memory controller initialisation */ - - /* ---------------------------------------------------------------- */ - /* Disable (mask) all interrupts at interrupt controller */ - /* ---------------------------------------------------------------- */ - -initirqs: - - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] - - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] - - - /* ---------------------------------------------------------------- */ - /* Clock initialisation */ - /* ---------------------------------------------------------------- */ - -initclks: - - /* Disable the peripheral clocks, and set the core clock frequency */ - /* (hard-coding at 398.12MHz for now). */ - - /* Turn Off ALL on-chip peripheral clocks for re-configuration */ - /* Note: See label 'ENABLECLKS' for the re-enabling */ - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] - - - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] - - /* enable the 32Khz oscillator for RTC and PowerManager */ -/* - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] -*/ - /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ - /* has settled. */ -60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b - - /* ---------------------------------------------------------------- */ - /* */ - /* ---------------------------------------------------------------- */ - - /* Save SDRAM size */ - ldr r1, =DRAM_SIZE - str r8, [r1] - - /* Interrupt init: Mask all interrupts */ - ldr r0, =ICMR /* enable no sources */ - mov r1, #0 - str r1, [r0] - - /* FIXME */ - -#ifndef DEBUG - /*Disable software and data breakpoints */ - mov r0,#0 - mcr p15,0,r0,c14,c8,0 /* ibcr0 */ - mcr p15,0,r0,c14,c9,0 /* ibcr1 */ - mcr p15,0,r0,c14,c4,0 /* dbcon */ - - /*Enable all debug functionality */ - mov r0,#0x80000000 - mcr p14,0,r0,c10,c0,0 /* dcsr */ -#endif - - /* ---------------------------------------------------------------- */ - /* End lowlevel_init */ - /* ---------------------------------------------------------------- */ - -endlowlevel_init: - - mov pc, lr diff --git a/board/lpc2292sodimm/config.mk b/board/lpc2292sodimm/config.mk index b28f418..4891792 100644 --- a/board/lpc2292sodimm/config.mk +++ b/board/lpc2292sodimm/config.mk @@ -26,5 +26,5 @@ # #address where u-boot will be relocated -#TEXT_BASE = 0x0 -TEXT_BASE = 0x81500000 +#CONFIG_SYS_TEXT_BASE = 0x0 +CONFIG_SYS_TEXT_BASE = 0x81500000 diff --git a/board/lpc2292sodimm/lowlevel_init.S b/board/lpc2292sodimm/lowlevel_init.S index 4e8eb89..f579a1a 100644 --- a/board/lpc2292sodimm/lowlevel_init.S +++ b/board/lpc2292sodimm/lowlevel_init.S @@ -29,7 +29,7 @@ #define BCFG1_VALUE 0x10001C61 _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE MEMMAP_ADR: .word MEMMAP BCFG0_ADR: diff --git a/board/lpd7a40x/config.mk b/board/lpd7a40x/config.mk index bc03874..003e707 100644 --- a/board/lpd7a40x/config.mk +++ b/board/lpd7a40x/config.mk @@ -34,5 +34,5 @@ # download area is 0xc0f00000 # -TEXT_BASE = 0xc1fc0000 -#TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0xc1fc0000 +#CONFIG_SYS_TEXT_BASE = 0x00000000 diff --git a/board/lpd7a40x/lowlevel_init.S b/board/lpd7a40x/lowlevel_init.S index 780b931..de34fc6 100644 --- a/board/lpd7a40x/lowlevel_init.S +++ b/board/lpd7a40x/lowlevel_init.S @@ -129,7 +129,7 @@ #define DO_MEM_READ 2 _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/lubbock/config.mk b/board/lubbock/config.mk index 55c8b27..f30f695 100644 --- a/board/lubbock/config.mk +++ b/board/lubbock/config.mk @@ -1,3 +1,3 @@ -#TEXT_BASE = 0xa1700000 -TEXT_BASE = 0xa3080000 -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0xa1700000 +CONFIG_SYS_TEXT_BASE = 0xa3080000 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/lwmon/config.mk b/board/lwmon/config.mk deleted file mode 100644 index dfa952a..0000000 --- a/board/lwmon/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# LWE Monitorcontroller Litronic LCD IV boards -# - -TEXT_BASE = 0x40000000 -#TEXT_BASE = 0x41000000 diff --git a/board/lwmon5/config.mk b/board/lwmon5/config.mk index 3c6d041..648fa3d 100644 --- a/board/lwmon5/config.mk +++ b/board/lwmon5/config.mk @@ -24,10 +24,6 @@ # lwmon5 (440EPx) # -ifndef TEXT_BASE -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/m501sk/config.mk b/board/m501sk/config.mk index 9ce161e..2077692 100644 --- a/board/m501sk/config.mk +++ b/board/m501sk/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x21f00000 +CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/manroland/hmi1001/config.mk b/board/manroland/hmi1001/config.mk index 8ccf33e..54dc1c4 100644 --- a/board/manroland/hmi1001/config.mk +++ b/board/manroland/hmi1001/config.mk @@ -21,22 +21,4 @@ # MA 02111-1307 USA # -# -# INKA 4X0 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFE00000 boot high -# -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -#TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/manroland/mucmc52/config.mk b/board/manroland/mucmc52/config.mk deleted file mode 100644 index 6850728..0000000 --- a/board/manroland/mucmc52/config.mk +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2008 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MUCMC52 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFE00000 boot high -# -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -#TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot.lds diff --git a/board/manroland/uc100/config.mk b/board/manroland/uc100/config.mk deleted file mode 100644 index a65a8ba..0000000 --- a/board/manroland/uc100/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# UC100 boards -# - -#TEXT_BASE = 0x40000000 -TEXT_BASE = 0x40700000 diff --git a/board/manroland/uc101/config.mk b/board/manroland/uc101/config.mk index 8ccf33e..54dc1c4 100644 --- a/board/manroland/uc101/config.mk +++ b/board/manroland/uc101/config.mk @@ -21,22 +21,4 @@ # MA 02111-1307 USA # -# -# INKA 4X0 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFE00000 boot high -# -# 0x00100000 boot from RAM (for testing only) -# - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -#TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/matrix_vision/mvblm7/config.mk b/board/matrix_vision/mvblm7/config.mk deleted file mode 100644 index d48fc31..0000000 --- a/board/matrix_vision/mvblm7/config.mk +++ /dev/null @@ -1,25 +0,0 @@ -# -# Copyright (C) Freescale Semiconductor, Inc. 2006. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -TEXT_BASE = 0xFFF00000 diff --git a/board/matrix_vision/mvsmr/config.mk b/board/matrix_vision/mvsmr/config.mk index b1da812..d5308d9 100644 --- a/board/matrix_vision/mvsmr/config.mk +++ b/board/matrix_vision/mvsmr/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2003 +# (C) Copyright 2003-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -21,11 +21,4 @@ # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFF800000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board LDSCRIPT := $(SRCTREE)/board/matrix_vision/mvsmr/u-boot.lds diff --git a/board/mbx8xx/config.mk b/board/mbx8xx/config.mk deleted file mode 100644 index d5e8ed2..0000000 --- a/board/mbx8xx/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MBX8xx boards -# - -TEXT_BASE = 0xfe000000 -/*TEXT_BASE = 0x00200000 */ diff --git a/board/mcc200/config.mk b/board/mcc200/config.mk deleted file mode 100644 index d0f9289..0000000 --- a/board/mcc200/config.mk +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2003-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MCC200, PRS200 boards: -# -# Valid values for TEXT_BASE are: -# -# 0xFC000000 boot low (standard configuration) -# 0xFFF00000 boot high -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot low -TEXT_BASE = 0xFC000000 -## Boot high -# TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/micronas/vct/config.mk b/board/micronas/vct/config.mk index 2a71dad..ae7c58f 100644 --- a/board/micronas/vct/config.mk +++ b/board/micronas/vct/config.mk @@ -26,6 +26,6 @@ sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp -ifndef TEXT_BASE -TEXT_BASE = 0x87000000 +ifndef CONFIG_SYS_TEXT_BASE +CONFIG_SYS_TEXT_BASE = 0x87000000 endif diff --git a/board/mimc/mimc200/config.mk b/board/mimc/mimc200/config.mk index 9a794e5..ea76d05 100644 --- a/board/mimc/mimc200/config.mk +++ b/board/mimc/mimc200/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_LDFLAGS += --gc-sections diff --git a/board/miromico/hammerhead/config.mk b/board/miromico/hammerhead/config.mk index 9a794e5..ea76d05 100644 --- a/board/miromico/hammerhead/config.mk +++ b/board/miromico/hammerhead/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections PLATFORM_LDFLAGS += --gc-sections diff --git a/board/ml2/config.mk b/board/ml2/config.mk index 5e0bdae..06ba43f 100644 --- a/board/ml2/config.mk +++ b/board/ml2/config.mk @@ -21,12 +21,5 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0x18000000 - # Use board specific linker script LDSCRIPT := $(SRCTREE)/board/ml2/u-boot.lds diff --git a/board/modnet50/config.mk b/board/modnet50/config.mk index 49d4836..4e4d305 100644 --- a/board/modnet50/config.mk +++ b/board/modnet50/config.mk @@ -25,5 +25,5 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x00f00000 +CONFIG_SYS_TEXT_BASE = 0x00f00000 #CROSS_COMPILE = arm-elf- diff --git a/board/modnet50/lowlevel_init.S b/board/modnet50/lowlevel_init.S index c98c155..52ef2a8 100644 --- a/board/modnet50/lowlevel_init.S +++ b/board/modnet50/lowlevel_init.S @@ -55,7 +55,7 @@ lowlevel_init: #if defined(CONFIG_MODNET50) - ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - TEXT_BASE) + ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - CONFIG_SYS_TEXT_BASE) _jump_to_high: /* diff --git a/board/mosaixtech/icon/config.mk b/board/mosaixtech/icon/config.mk index b2748ce..bce3514 100644 --- a/board/mosaixtech/icon/config.mk +++ b/board/mosaixtech/icon/config.mk @@ -21,8 +21,6 @@ # MA 02111-1307 USA # -TEXT_BASE = 0xFFFA0000 - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/motionpro/config.mk b/board/motionpro/config.mk deleted file mode 100644 index e7934d2..0000000 --- a/board/motionpro/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2006-2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Promess Motion-PRO -# - -TEXT_BASE = 0xfff00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/mousse/config.mk b/board/mousse/config.mk index 933e6b3..a69215b 100644 --- a/board/mousse/config.mk +++ b/board/mousse/config.mk @@ -24,7 +24,4 @@ # # MOUSSE boards # -TEXT_BASE = 0xFFF00000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) - LDSCRIPT := $(SRCTREE)/board/mousse/u-boot.lds diff --git a/board/mp2usb/config.mk b/board/mp2usb/config.mk index e299bfd..948e4ff 100644 --- a/board/mp2usb/config.mk +++ b/board/mp2usb/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0x27F00000 +CONFIG_SYS_TEXT_BASE = 0x27F00000 ## For testing: load at 0x20100000 and "go" at 0x201000A4 -#TEXT_BASE = 0x20100000 +#CONFIG_SYS_TEXT_BASE = 0x20100000 diff --git a/board/mpc8308_p1m/config.mk b/board/mpc8308_p1m/config.mk deleted file mode 100644 index 183d3e8..0000000 --- a/board/mpc8308_p1m/config.mk +++ /dev/null @@ -1,3 +0,0 @@ -ifndef TEXT_BASE -TEXT_BASE = 0xFC000000 -endif diff --git a/board/mpc8540eval/config.mk b/board/mpc8540eval/config.mk deleted file mode 100644 index 20b8681..0000000 --- a/board/mpc8540eval/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# gda8540 board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -#TEXT_BASE = 0x1000000 -TEXT_BASE = 0xfff80000 diff --git a/board/mpl/mip405/config.mk b/board/mpl/mip405/config.mk deleted file mode 100644 index 0f8d153..0000000 --- a/board/mpl/mip405/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFF80000 diff --git a/board/mpl/pati/config.mk b/board/mpl/pati/config.mk index b8a0985..ce56195 100644 --- a/board/mpl/pati/config.mk +++ b/board/mpl/pati/config.mk @@ -21,11 +21,4 @@ # MA 02111-1307 USA # -# -# EPQ Board Configuration -# - -# Boot from flash at location 0x00000000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/mpl/pip405/config.mk b/board/mpl/pip405/config.mk deleted file mode 100644 index 0f8d153..0000000 --- a/board/mpl/pip405/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFF80000 diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk index 1fa09c9..e345913 100644 --- a/board/mpl/vcma9/config.mk +++ b/board/mpl/vcma9/config.mk @@ -20,5 +20,5 @@ # -#TEXT_BASE = 0x30F80000 -TEXT_BASE = 0x33F80000 +#CONFIG_SYS_TEXT_BASE = 0x30F80000 +CONFIG_SYS_TEXT_BASE = 0x33F80000 diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S index e3af073..062e868 100644 --- a/board/mpl/vcma9/lowlevel_init.S +++ b/board/mpl/vcma9/lowlevel_init.S @@ -128,7 +128,7 @@ /**************************************/ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/mpr2/config.mk b/board/mpr2/config.mk index 6d41d97..4a4bca1 100644 --- a/board/mpr2/config.mk +++ b/board/mpr2/config.mk @@ -29,9 +29,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/ms7720se/config.mk b/board/ms7720se/config.mk index cad8d3a..d2944a6 100644 --- a/board/ms7720se/config.mk +++ b/board/ms7720se/config.mk @@ -26,9 +26,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/ms7722se/config.mk b/board/ms7722se/config.mk index 4797d6f..3f1606b 100644 --- a/board/ms7722se/config.mk +++ b/board/ms7722se/config.mk @@ -23,9 +23,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/ms7750se/config.mk b/board/ms7750se/config.mk index 1eed580..ba4d155 100644 --- a/board/ms7750se/config.mk +++ b/board/ms7750se/config.mk @@ -20,4 +20,4 @@ # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/muas3001/config.mk b/board/muas3001/config.mk deleted file mode 100644 index cdd0ec9..0000000 --- a/board/muas3001/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2008 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFF000000 diff --git a/board/munices/config.mk b/board/munices/config.mk deleted file mode 100644 index 1b573bc..0000000 --- a/board/munices/config.mk +++ /dev/null @@ -1,38 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MUNICes board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFF00000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/musenki/config.mk b/board/musenki/config.mk deleted file mode 100644 index 18673e1..0000000 --- a/board/musenki/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# CU824 board -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/mvblue/config.mk b/board/mvblue/config.mk deleted file mode 100644 index 6e0ce4e..0000000 --- a/board/mvblue/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2001-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/mx1ads/config.mk b/board/mx1ads/config.mk index f6ac40d..2bc5b15 100644 --- a/board/mx1ads/config.mk +++ b/board/mx1ads/config.mk @@ -22,4 +22,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA -TEXT_BASE = 0x08400000 +CONFIG_SYS_TEXT_BASE = 0x08400000 diff --git a/board/mx1ads/lowlevel_init.S b/board/mx1ads/lowlevel_init.S index 6967fb2..a7400b3 100644 --- a/board/mx1ads/lowlevel_init.S +++ b/board/mx1ads/lowlevel_init.S @@ -31,7 +31,7 @@ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/mx1fs2/config.mk b/board/mx1fs2/config.mk index 59ab542..eb4d046 100644 --- a/board/mx1fs2/config.mk +++ b/board/mx1fs2/config.mk @@ -1,10 +1,10 @@ # # This config file is used for compilation of IMX sources # -# You might change location of U-Boot in memory by setting right TEXT_BASE. +# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE. # This allows for example having one copy located at the end of ram and stored # in flash device and later on while developing use other location to test # the code in RAM device only. # -TEXT_BASE = 0x08f00000 +CONFIG_SYS_TEXT_BASE = 0x08f00000 diff --git a/board/nc650/config.mk b/board/nc650/config.mk deleted file mode 100644 index 9d9b892..0000000 --- a/board/nc650/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2006, 2007 Detlev Zundel, dzu@denx.de -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# NC650 board -# - -TEXT_BASE = 0x40700000 diff --git a/board/netphone/config.mk b/board/netphone/config.mk deleted file mode 100644 index 8497ebc..0000000 --- a/board/netphone/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# netVia Boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/netstal/hcu4/config.mk b/board/netstal/hcu4/config.mk index 580f18c..fd3e889 100644 --- a/board/netstal/hcu4/config.mk +++ b/board/netstal/hcu4/config.mk @@ -20,9 +20,6 @@ # # Netstal Maschinen AG: HCU4 boards # - -TEXT_BASE = 0xFFFB0000 - ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG -g endif diff --git a/board/netstal/hcu5/config.mk b/board/netstal/hcu5/config.mk index 51ddb76..f641d54 100644 --- a/board/netstal/hcu5/config.mk +++ b/board/netstal/hcu5/config.mk @@ -20,9 +20,6 @@ # # Netstal Maschinen AG: HCU5 boards # - -TEXT_BASE = 0xFFFB0000 - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/netstal/mcu25/config.mk b/board/netstal/mcu25/config.mk index f0f2ea1..61dc091 100644 --- a/board/netstal/mcu25/config.mk +++ b/board/netstal/mcu25/config.mk @@ -20,8 +20,6 @@ # # Netstal Maschinen AG: MCU25 board # -TEXT_BASE = 0xFFFB0000 - ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG -g endif diff --git a/board/netstar/config.mk b/board/netstar/config.mk index 8b73e97..9e1446e 100644 --- a/board/netstar/config.mk +++ b/board/netstar/config.mk @@ -3,9 +3,9 @@ # entry 1000'8000 (mem base + reserved) # # We load ourself to internal RAM at 2001'2000 -# Check map file when changing TEXT_BASE. +# Check map file when changing CONFIG_SYS_TEXT_BASE. # Everything has fit into 192kB internal SRAM! # -# XXX TEXT_BASE = 0x20012000 -TEXT_BASE = 0x13FC0000 +# XXX CONFIG_SYS_TEXT_BASE = 0x20012000 +CONFIG_SYS_TEXT_BASE = 0x13FC0000 diff --git a/board/netstar/setup.S b/board/netstar/setup.S index 3c2d467..72e1811 100644 --- a/board/netstar/setup.S +++ b/board/netstar/setup.S @@ -27,7 +27,7 @@ #include <version.h> _TEXT_BASE: - .word TEXT_BASE /* SDRAM load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */ OMAP5910_LPG1_BASE: .word 0xfffbd000 OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800 diff --git a/board/netta/config.mk b/board/netta/config.mk deleted file mode 100644 index 8497ebc..0000000 --- a/board/netta/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# netVia Boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/netta2/config.mk b/board/netta2/config.mk deleted file mode 100644 index 8497ebc..0000000 --- a/board/netta2/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# netVia Boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/netvia/config.mk b/board/netvia/config.mk deleted file mode 100644 index 9dddaad..0000000 --- a/board/netvia/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# netVia Boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/ns9750dev/config.mk b/board/ns9750dev/config.mk index 6a22cee..e5d8702 100644 --- a/board/ns9750dev/config.mk +++ b/board/ns9750dev/config.mk @@ -13,4 +13,4 @@ # -TEXT_BASE = 0x00780000 +CONFIG_SYS_TEXT_BASE = 0x00780000 diff --git a/board/ns9750dev/lowlevel_init.S b/board/ns9750dev/lowlevel_init.S index 3a09786..ba5ff81 100644 --- a/board/ns9750dev/lowlevel_init.S +++ b/board/ns9750dev/lowlevel_init.S @@ -68,7 +68,7 @@ .endm _TEXT_BASE: - .word TEXT_BASE @ sdram load addr from config.mk + .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config.mk _PHYS_FLASH: .word PHYS_FLASH_1 @ real flash address (without mirroring) _CAS_LATENCY: diff --git a/board/nx823/config.mk b/board/nx823/config.mk deleted file mode 100644 index 3b3ea1e..0000000 --- a/board/nx823/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Nexus boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/o2dnt/config.mk b/board/o2dnt/config.mk deleted file mode 100644 index b873376..0000000 --- a/board/o2dnt/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# (C) Copyright 2005 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# boot low for 16 MiB boards -TEXT_BASE = 0xFF000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/overo/config.mk b/board/overo/config.mk index d372fd9..e7c471c 100644 --- a/board/overo/config.mk +++ b/board/overo/config.mk @@ -25,5 +25,4 @@ # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 # (mem base + reserved) -# For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/overo/overo.c b/board/overo/overo.c index 1b67f1f..9c92693 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -32,6 +32,7 @@ #include <netdev.h> #include <twl4030.h> #include <asm/io.h> +#include <asm/arch/mmc_host_def.h> #include <asm/arch/mux.h> #include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> @@ -225,3 +226,11 @@ int board_eth_init(bd_t *bis) #endif return rc; } + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0); + return 0; +} +#endif diff --git a/board/oxc/config.mk b/board/oxc/config.mk deleted file mode 100644 index 7a5bcfc..0000000 --- a/board/oxc/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# OXC boards -# - -#TEXT_BASE = 0x00090000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/pandora/config.mk b/board/pandora/config.mk index 6b1f69a..0fab80c 100644 --- a/board/pandora/config.mk +++ b/board/pandora/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/pb1x00/README b/board/pb1x00/README index b37ff36..b1e9494 100644 --- a/board/pb1x00/README +++ b/board/pb1x00/README @@ -26,7 +26,7 @@ boot loader delivered with board. NOTE! When you switch between the two boot flashes, the base addresses will be swapped. -Have this in mind when you compile u-boot. TEXT_BASE has +Have this in mind when you compile u-boot. CONFIG_SYS_TEXT_BASE has to match the address where u-boot is located when you actually launch. diff --git a/board/pb1x00/config.mk b/board/pb1x00/config.mk index 396a045..6f3dc08 100644 --- a/board/pb1x00/config.mk +++ b/board/pb1x00/config.mk @@ -26,7 +26,7 @@ # # ROM version -#TEXT_BASE = 0xbfc00000 +#CONFIG_SYS_TEXT_BASE = 0xbfc00000 # SDRAM version -TEXT_BASE = 0x83800000 +CONFIG_SYS_TEXT_BASE = 0x83800000 diff --git a/board/pcippc2/config.mk b/board/pcippc2/config.mk deleted file mode 100644 index 92d37c9..0000000 --- a/board/pcippc2/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# PCIPPC-2 boards -# - -TEXT_BASE = 0xfff00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/pcs440ep/config.mk b/board/pcs440ep/config.mk index 0844e98..23631c5 100644 --- a/board/pcs440ep/config.mk +++ b/board/pcs440ep/config.mk @@ -28,14 +28,6 @@ # Check the U-Boot Image with a SHA1 checksum ALL += $(obj)u-boot.sha1 -#TEXT_BASE = 0x00001000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0xFBD00000 -else -TEXT_BASE = 0xFFFA0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c index e8714e3..2082ad4 100644 --- a/board/pdm360ng/pdm360ng.c +++ b/board/pdm360ng/pdm360ng.c @@ -515,6 +515,46 @@ struct node_info nodes[] = { }; #endif +#if defined(CONFIG_VIDEO) +/* + * EDID block has been generated using Phoenix EDID Designer 1.3. + * This tool creates a text file containing: + * + * EDID BYTES: + * 0x 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F + * ------------------------------------------------ + * 00 | 00 FF FF FF FF FF FF 00 42 C9 34 12 01 00 00 00 + * 10 | 0A 0C 01 03 80 98 5B 78 CA 7E 50 A0 58 4E 96 25 + * 20 | 1E 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 + * 30 | 01 01 01 01 01 01 80 0C 20 00 31 E0 2D 10 2A 80 + * 40 | 12 08 30 E4 10 00 00 18 00 00 00 FD 00 38 3C 1F + * 50 | 3C 04 0A 20 20 20 20 20 20 20 00 00 00 FF 00 50 + * 60 | 4D 30 37 30 57 4C 33 0A 0A 0A 0A 0A 00 00 00 FF + * 70 | 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D4 + * + * Then this data has been manually converted to the char + * array below. + */ +static unsigned char edid_buf[128] = { + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, + 0x42, 0xC9, 0x34, 0x12, 0x01, 0x00, 0x00, 0x00, + 0x0A, 0x0C, 0x01, 0x03, 0x80, 0x98, 0x5B, 0x78, + 0xCA, 0x7E, 0x50, 0xA0, 0x58, 0x4E, 0x96, 0x25, + 0x1E, 0x50, 0x54, 0x00, 0x00, 0x00, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x80, 0x0C, + 0x20, 0x00, 0x31, 0xE0, 0x2D, 0x10, 0x2A, 0x80, + 0x12, 0x08, 0x30, 0xE4, 0x10, 0x00, 0x00, 0x18, + 0x00, 0x00, 0x00, 0xFD, 0x00, 0x38, 0x3C, 0x1F, + 0x3C, 0x04, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, + 0x20, 0x20, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x50, + 0x4D, 0x30, 0x37, 0x30, 0x57, 0x4C, 0x33, 0x0A, + 0x0A, 0x0A, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, + 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x00, 0xD4, +}; +#endif + void ft_board_setup(void *blob, bd_t *bd) { u32 val[8]; @@ -525,6 +565,9 @@ void ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_FDT_FIXUP_PARTITIONS fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); #endif +#if defined(CONFIG_VIDEO) + fdt_add_edid(blob, "fsl,mpc5121-diu", edid_buf); +#endif /* Fixup NOR FLASH mapping */ val[i++] = 0; /* chip select number */ diff --git a/board/phytec/pcm030/config.mk b/board/phytec/pcm030/config.mk deleted file mode 100644 index 92fecc6..0000000 --- a/board/phytec/pcm030/config.mk +++ /dev/null @@ -1,41 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# phyCORE-MPC5200B tiny board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFF000000 boot low -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/pleb2/config.mk b/board/pleb2/config.mk index 6958a63..079f58e 100644 --- a/board/pleb2/config.mk +++ b/board/pleb2/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE = 0xa1F80000 -#TEXT_BASE = 0xa3080000 -#TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0xa1F80000 +#CONFIG_SYS_TEXT_BASE = 0xa3080000 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/pm520/config.mk b/board/pm520/config.mk deleted file mode 100644 index ad689f3..0000000 --- a/board/pm520/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2003-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# PM520 board -# - -TEXT_BASE = 0xfff00000 -# TEXT_BASE = 0x00100000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/pm826/config.mk b/board/pm826/config.mk index 48ac299..1da57e0 100644 --- a/board/pm826/config.mk +++ b/board/pm826/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2001-2004 +# (C) Copyright 2001-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,14 +24,4 @@ # # MicroSys PM826 board: # - - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot 64-bit flash -TEXT_BASE = 0xFF000000 - -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/pm828/config.mk b/board/pm828/config.mk index 6288431..625632f 100644 --- a/board/pm828/config.mk +++ b/board/pm828/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2003-2004 +# (C) Copyright 2003-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,14 +24,4 @@ # # MicroSys PM828 board: # - - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot 64-bit flash -TEXT_BASE = 0x40000000 - -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/pm854/config.mk b/board/pm854/config.mk deleted file mode 100644 index 0b28f4e..0000000 --- a/board/pm854/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# pm854 board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xfff80000 diff --git a/board/pm856/config.mk b/board/pm856/config.mk deleted file mode 100644 index 8229305..0000000 --- a/board/pm856/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,2003 Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# PM856 board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xfff80000 diff --git a/board/pn62/config.mk b/board/pn62/config.mk deleted file mode 100644 index a2b6f05..0000000 --- a/board/pn62/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# PN62 boards -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/ppmc7xx/config.mk b/board/ppmc7xx/config.mk index b5b46dc..ca574c4 100644 --- a/board/ppmc7xx/config.mk +++ b/board/ppmc7xx/config.mk @@ -23,6 +23,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA -TEXT_BASE = 0xFFF00000 TEXT_END = 0xFFF40000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/ppmc7xx/ppmc7xx.c b/board/ppmc7xx/ppmc7xx.c index 0cad897..5e7427f 100644 --- a/board/ppmc7xx/ppmc7xx.c +++ b/board/ppmc7xx/ppmc7xx.c @@ -19,8 +19,7 @@ /* Function prototypes */ -extern void unlock_ram_in_cache( void ); -extern void _start_warm(void); +extern void _start(void); /* @@ -97,8 +96,8 @@ void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] ) icache_disable(); dcache_disable(); - /* Jump to warm start (in RAM) */ - _start_warm(); + /* Jump to cold reset point (in RAM) */ + _start(); /* Should never get here */ while(1); diff --git a/board/ppmc8260/config.mk b/board/ppmc8260/config.mk index d06fcea..f0298fe 100644 --- a/board/ppmc8260/config.mk +++ b/board/ppmc8260/config.mk @@ -29,6 +29,4 @@ # MBX8xx boards # -TEXT_BASE = 0xfe000000 TEXT_END = 0xfe080000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/prodrive/alpr/config.mk b/board/prodrive/alpr/config.mk index b62e776..7be81f3 100644 --- a/board/prodrive/alpr/config.mk +++ b/board/prodrive/alpr/config.mk @@ -21,18 +21,6 @@ # MA 02111-1307 USA # -# -# AMCC 440GX Reference Platform (Ocotea) board -# - -#TEXT_BASE = 0xFFFE0000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFFC0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/prodrive/p3mx/config.mk b/board/prodrive/p3mx/config.mk deleted file mode 100644 index 35bf1c1..0000000 --- a/board/prodrive/p3mx/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2002-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# p3mx boards (P3M750 & P3M7448) -# - -TEXT_BASE = 0xfff00000 diff --git a/board/prodrive/p3p440/config.mk b/board/prodrive/p3p440/config.mk index 60d3bf4..9eac8b9 100644 --- a/board/prodrive/p3p440/config.mk +++ b/board/prodrive/p3p440/config.mk @@ -21,18 +21,6 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 - -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFFC0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/prodrive/pdnb3/config.mk b/board/prodrive/pdnb3/config.mk index 51dee86..817541f 100644 --- a/board/prodrive/pdnb3/config.mk +++ b/board/prodrive/pdnb3/config.mk @@ -1,2 +1,2 @@ # -TEXT_BASE = 0x01f00000 +CONFIG_SYS_TEXT_BASE = 0x01f00000 diff --git a/board/psyent/pci5441/config.mk b/board/psyent/pci5441/config.mk index d72bcee..863a4cb 100644 --- a/board/psyent/pci5441/config.mk +++ b/board/psyent/pci5441/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x018e0000 +CONFIG_SYS_TEXT_BASE = 0x018e0000 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include diff --git a/board/psyent/pk1c20/config.mk b/board/psyent/pk1c20/config.mk index d65780d..3913a24 100644 --- a/board/psyent/pk1c20/config.mk +++ b/board/psyent/pk1c20/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x01fc0000 +CONFIG_SYS_TEXT_BASE = 0x01fc0000 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include diff --git a/board/purple/config.mk b/board/purple/config.mk index ea478ed..404c3fb 100644 --- a/board/purple/config.mk +++ b/board/purple/config.mk @@ -26,7 +26,7 @@ # # ROM version -TEXT_BASE = 0xB0000000 +CONFIG_SYS_TEXT_BASE = 0xB0000000 # RAM version -#TEXT_BASE = 0x80100000 +#CONFIG_SYS_TEXT_BASE = 0x80100000 diff --git a/board/purple/purple.c b/board/purple/purple.c index 54bef65..4e9e700 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -222,10 +222,10 @@ static void programLoad(void) FUNCPTR absEntry; ulong *src,*dst; - src = (ulong *)(TEXT_BASE + 0x428); + src = (ulong *)(CONFIG_SYS_TEXT_BASE + 0x428); dst = (ulong *)0xbf0081d0; - absEntry = (FUNCPTR)(TEXT_BASE + 0x400); + absEntry = (FUNCPTR)(CONFIG_SYS_TEXT_BASE + 0x400); absEntry(src,dst,0x6); src = (ulong *)((ulong)copydwords & 0xfffffff8); diff --git a/board/pxa255_idp/config.mk b/board/pxa255_idp/config.mk index 55c8b27..f30f695 100644 --- a/board/pxa255_idp/config.mk +++ b/board/pxa255_idp/config.mk @@ -1,3 +1,3 @@ -#TEXT_BASE = 0xa1700000 -TEXT_BASE = 0xa3080000 -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0xa1700000 +CONFIG_SYS_TEXT_BASE = 0xa3080000 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/qemu-mips/config.mk b/board/qemu-mips/config.mk index 4d4078a..27cd34a 100644 --- a/board/qemu-mips/config.mk +++ b/board/qemu-mips/config.mk @@ -4,7 +4,7 @@ # # ROM version -TEXT_BASE = 0xbfc00000 +CONFIG_SYS_TEXT_BASE = 0xbfc00000 # RAM version -#TEXT_BASE = 0x80001000 +#CONFIG_SYS_TEXT_BASE = 0x80001000 diff --git a/board/quad100hd/config.mk b/board/quad100hd/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/quad100hd/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/quantum/config.mk b/board/quantum/config.mk deleted file mode 100644 index 7cb374e..0000000 --- a/board/quantum/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RMU boards -# - -TEXT_BASE = 0xfff00000 diff --git a/board/r360mpi/config.mk b/board/r360mpi/config.mk deleted file mode 100644 index 9d6080b..0000000 --- a/board/r360mpi/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TQM8xxL boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/rattler/config.mk b/board/rattler/config.mk deleted file mode 100644 index 5fca8c7..0000000 --- a/board/rattler/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001-2005 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Rattler series boards by Analogue & Micro -# - -TEXT_BASE = 0xFE000000 diff --git a/board/rbc823/config.mk b/board/rbc823/config.mk deleted file mode 100644 index 199ea3c..0000000 --- a/board/rbc823/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RBC823 boards -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/renesas/MigoR/config.mk b/board/renesas/MigoR/config.mk index 2c5085a..ffe954c 100644 --- a/board/renesas/MigoR/config.mk +++ b/board/renesas/MigoR/config.mk @@ -23,9 +23,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/renesas/ap325rxa/config.mk b/board/renesas/ap325rxa/config.mk index b52a5e5..f572afd 100644 --- a/board/renesas/ap325rxa/config.mk +++ b/board/renesas/ap325rxa/config.mk @@ -18,9 +18,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 diff --git a/board/renesas/r2dplus/config.mk b/board/renesas/r2dplus/config.mk index 1ec7dcc..55163b9 100644 --- a/board/renesas/r2dplus/config.mk +++ b/board/renesas/r2dplus/config.mk @@ -20,4 +20,4 @@ # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x0FFC0000 +CONFIG_SYS_TEXT_BASE = 0x0FFC0000 diff --git a/board/renesas/r7780mp/config.mk b/board/renesas/r7780mp/config.mk index 6a045a1..70ee3fd 100644 --- a/board/renesas/r7780mp/config.mk +++ b/board/renesas/r7780mp/config.mk @@ -19,9 +19,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x0FFC0000 +CONFIG_SYS_TEXT_BASE = 0x0FFC0000 diff --git a/board/renesas/rsk7203/config.mk b/board/renesas/rsk7203/config.mk index 61aa51f..5b533f6 100644 --- a/board/renesas/rsk7203/config.mk +++ b/board/renesas/rsk7203/config.mk @@ -20,9 +20,9 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x0C7C0000 +CONFIG_SYS_TEXT_BASE = 0x0C7C0000 diff --git a/board/renesas/sh7763rdp/config.mk b/board/renesas/sh7763rdp/config.mk index c52dbfd..54c1a5b 100644 --- a/board/renesas/sh7763rdp/config.mk +++ b/board/renesas/sh7763rdp/config.mk @@ -1,11 +1,11 @@ # # board/sh7763rdp/config.mk # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # -TEXT_BASE = 0x8FFC0000 +CONFIG_SYS_TEXT_BASE = 0x8FFC0000 # PLATFORM_CPPFLAGS += -DCONFIG_MULTIBOOT diff --git a/board/renesas/sh7785lcr/config.mk b/board/renesas/sh7785lcr/config.mk index 66d35cb..1a9038c 100644 --- a/board/renesas/sh7785lcr/config.mk +++ b/board/renesas/sh7785lcr/config.mk @@ -18,12 +18,12 @@ # MA 02111-1307 USA # -# TEXT_BASE refers to image _after_ relocation. +# CONFIG_SYS_TEXT_BASE refers to image _after_ relocation. # # NOTE: Must match value used in u-boot.lds (in this directory). # sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -ifndef TEXT_BASE -TEXT_BASE = 0x0ff80000 +ifndef CONFIG_SYS_TEXT_BASE +CONFIG_SYS_TEXT_BASE = 0x0ff80000 endif diff --git a/board/rmu/config.mk b/board/rmu/config.mk deleted file mode 100644 index 7cb374e..0000000 --- a/board/rmu/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# RMU boards -# - -TEXT_BASE = 0xfff00000 diff --git a/board/ronetix/pm9261/config.mk b/board/ronetix/pm9261/config.mk index 7185419..975522a 100644 --- a/board/ronetix/pm9261/config.mk +++ b/board/ronetix/pm9261/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000
\ No newline at end of file +CONFIG_SYS_TEXT_BASE = 0x23f00000
\ No newline at end of file diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk index ff2cfd1..e554a45 100644 --- a/board/ronetix/pm9263/config.mk +++ b/board/ronetix/pm9263/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x23f00000 +CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/ronetix/pm9g45/config.mk b/board/ronetix/pm9g45/config.mk index 7fe9d03..9d3c5ae 100644 --- a/board/ronetix/pm9g45/config.mk +++ b/board/ronetix/pm9g45/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x73f00000 +CONFIG_SYS_TEXT_BASE = 0x73f00000 diff --git a/board/rpxsuper/config.mk b/board/rpxsuper/config.mk deleted file mode 100644 index 4b8c5d3..0000000 --- a/board/rpxsuper/config.mk +++ /dev/null @@ -1,34 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MBX8xx boards -# - -TEXT_BASE = 0x80F00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/rsdproto/config.mk b/board/rsdproto/config.mk index 35c3d8c..9617f08 100644 --- a/board/rsdproto/config.mk +++ b/board/rsdproto/config.mk @@ -25,11 +25,4 @@ # MA 02111-1307 USA # -# -# MBX8xx boards -# - -TEXT_BASE = 0xff000000 -/*TEXT_BASE = 0x00200000 */ - LDSCRIPT := $(SRCTREE)/board/rsdproto/u-boot.lds diff --git a/board/sacsng/config.mk b/board/sacsng/config.mk deleted file mode 100644 index 220b218..0000000 --- a/board/sacsng/config.mk +++ /dev/null @@ -1,34 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# 82xx boards -# - -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/samsung/goni/config.mk b/board/samsung/goni/config.mk index 0e9dd45..e4581ca 100644 --- a/board/samsung/goni/config.mk +++ b/board/samsung/goni/config.mk @@ -31,4 +31,4 @@ # 0x30000000 to 0x35000000 (80MiB) # 0x40000000 to 0x50000000 (256MiB) # -TEXT_BASE = 0x34800000 +CONFIG_SYS_TEXT_BASE = 0x34800000 diff --git a/board/samsung/goni/lowlevel_init.S b/board/samsung/goni/lowlevel_init.S index 62737ab..30a5835 100644 --- a/board/samsung/goni/lowlevel_init.S +++ b/board/samsung/goni/lowlevel_init.S @@ -39,7 +39,7 @@ */ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/samsung/smdk2400/config.mk b/board/samsung/smdk2400/config.mk index 4e019e3..4c27dc3 100644 --- a/board/samsung/smdk2400/config.mk +++ b/board/samsung/smdk2400/config.mk @@ -22,4 +22,4 @@ # -TEXT_BASE = 0x0CF80000 +CONFIG_SYS_TEXT_BASE = 0x0CF80000 diff --git a/board/samsung/smdk2400/lowlevel_init.S b/board/samsung/smdk2400/lowlevel_init.S index 9c808c0..c275c07 100644 --- a/board/samsung/smdk2400/lowlevel_init.S +++ b/board/samsung/smdk2400/lowlevel_init.S @@ -123,7 +123,7 @@ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/samsung/smdk2410/config.mk b/board/samsung/smdk2410/config.mk index 3642b0a..c8d1b1f 100644 --- a/board/samsung/smdk2410/config.mk +++ b/board/samsung/smdk2410/config.mk @@ -22,4 +22,4 @@ # -TEXT_BASE = 0x33F80000 +CONFIG_SYS_TEXT_BASE = 0x33F80000 diff --git a/board/samsung/smdk2410/lowlevel_init.S b/board/samsung/smdk2410/lowlevel_init.S index ab6afdd..a2bf570 100644 --- a/board/samsung/smdk2410/lowlevel_init.S +++ b/board/samsung/smdk2410/lowlevel_init.S @@ -127,7 +127,7 @@ /**************************************/ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk index 4ab1d7e..90cbcf2 100644 --- a/board/samsung/smdk6400/config.mk +++ b/board/samsung/smdk6400/config.mk @@ -24,9 +24,9 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp ifndef CONFIG_NAND_SPL -TEXT_BASE = $(RAM_TEXT) +CONFIG_SYS_TEXT_BASE = $(RAM_TEXT) else -TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0 endif LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 30d8878..f7ce176 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -45,7 +45,7 @@ #endif _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/samsung/smdkc100/config.mk b/board/samsung/smdkc100/config.mk index ebab420..3a08bb1 100644 --- a/board/samsung/smdkc100/config.mk +++ b/board/samsung/smdkc100/config.mk @@ -13,4 +13,4 @@ # 0x30000000 to 0x35000000 (80MiB) # 0x40000000 to 0x48000000 (128MiB) # -TEXT_BASE = 0x34800000 +CONFIG_SYS_TEXT_BASE = 0x34800000 diff --git a/board/samsung/smdkc100/lowlevel_init.S b/board/samsung/smdkc100/lowlevel_init.S index 30d0d06..6d18835 100644 --- a/board/samsung/smdkc100/lowlevel_init.S +++ b/board/samsung/smdkc100/lowlevel_init.S @@ -34,7 +34,7 @@ */ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/sandburst/karef/config.mk b/board/sandburst/karef/config.mk index f2f94c5..85fccd8 100644 --- a/board/sandburst/karef/config.mk +++ b/board/sandburst/karef/config.mk @@ -26,12 +26,6 @@ # Travis B. Sawyer # -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/sandburst/metrobox/config.mk b/board/sandburst/metrobox/config.mk index 565e826..8407381 100644 --- a/board/sandburst/metrobox/config.mk +++ b/board/sandburst/metrobox/config.mk @@ -21,12 +21,6 @@ # MA 02111-1307 USA # -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/sandpoint/config.mk b/board/sandpoint/config.mk deleted file mode 100644 index b3f65eb..0000000 --- a/board/sandpoint/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Sandpoint boards -# - -#TEXT_BASE = 0x00090000 -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/sbc2410x/config.mk b/board/sbc2410x/config.mk index dc59d08..bc01a2d 100644 --- a/board/sbc2410x/config.mk +++ b/board/sbc2410x/config.mk @@ -20,4 +20,4 @@ # # download area is 3300'0000 -TEXT_BASE = 0x33F80000 +CONFIG_SYS_TEXT_BASE = 0x33F80000 diff --git a/board/sbc2410x/lowlevel_init.S b/board/sbc2410x/lowlevel_init.S index 3df63cd..3de9166 100644 --- a/board/sbc2410x/lowlevel_init.S +++ b/board/sbc2410x/lowlevel_init.S @@ -123,7 +123,7 @@ /**************************************/ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/sbc405/config.mk b/board/sbc405/config.mk deleted file mode 100644 index bd57217..0000000 --- a/board/sbc405/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000, 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Wind River sbc405 boards -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/sbc8240/config.mk b/board/sbc8240/config.mk deleted file mode 100644 index 1e97960..0000000 --- a/board/sbc8240/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# sbc8240 board -# - -TEXT_BASE = 0xFFF00000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/sbc8260/config.mk b/board/sbc8260/config.mk deleted file mode 100644 index 1f18260..0000000 --- a/board/sbc8260/config.mk +++ /dev/null @@ -1,34 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MBX8xx boards -# - -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/sbc8349/config.mk b/board/sbc8349/config.mk deleted file mode 100644 index eacb27e..0000000 --- a/board/sbc8349/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) 2006 Wind River Systems, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# SBC8349E -# - -TEXT_BASE = 0xFF800000 diff --git a/board/sbc8548/config.mk b/board/sbc8548/config.mk deleted file mode 100644 index b2013d6..0000000 --- a/board/sbc8548/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# Copyright 2004, 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# sbc8548 board -# -ifndef TEXT_BASE -TEXT_BASE = 0xfffa0000 -endif diff --git a/board/sbc8560/config.mk b/board/sbc8560/config.mk deleted file mode 100644 index 995dada..0000000 --- a/board/sbc8560/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,2003 Motorola Inc. -# -# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>. -# Added support for Wind River SBC8560 board -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# -# based on mpc8560ads board -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 256K -# -TEXT_BASE = 0xfffc0000 diff --git a/board/sbc8641d/config.mk b/board/sbc8641d/config.mk deleted file mode 100644 index d1456b9..0000000 --- a/board/sbc8641d/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Jeff Brown -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# sbc8641 board -# default CCSRBAR is at 0xff700000 -# -TEXT_BASE = 0xfff00000 diff --git a/board/sc3/config.mk b/board/sc3/config.mk deleted file mode 100644 index a46b197..0000000 --- a/board/sc3/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFA0000 diff --git a/board/scb9328/config.mk b/board/scb9328/config.mk index 8d1d79a..7c5e067 100644 --- a/board/scb9328/config.mk +++ b/board/scb9328/config.mk @@ -1,10 +1,10 @@ # # This config file is used for compilation of scb93328 sources # -# You might change location of U-Boot in memory by setting right TEXT_BASE. +# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE. # This allows for example having one copy located at the end of ram and stored # in flash device and later on while developing use other location to test # the code in RAM device only. # -TEXT_BASE = 0x08f00000 +CONFIG_SYS_TEXT_BASE = 0x08f00000 diff --git a/board/shannon/config.mk b/board/shannon/config.mk index ca45733..6afa2d3 100644 --- a/board/shannon/config.mk +++ b/board/shannon/config.mk @@ -20,4 +20,4 @@ # -TEXT_BASE = 0xd8380000 +CONFIG_SYS_TEXT_BASE = 0xd8380000 diff --git a/board/sheldon/simpc8313/config.mk b/board/sheldon/simpc8313/config.mk index ce1c0d8..d1b4e2e 100644 --- a/board/sheldon/simpc8313/config.mk +++ b/board/sheldon/simpc8313/config.mk @@ -1,11 +1,3 @@ -ifndef NAND_SPL -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -endif - -ifndef TEXT_BASE -TEXT_BASE = 0x00100000 -endif - ifdef CONFIG_NAND_LP PAD_TO = 0xFFF20000 else diff --git a/board/siemens/SCM/config.mk b/board/siemens/SCM/config.mk index 5d0898b..4065843 100644 --- a/board/siemens/SCM/config.mk +++ b/board/siemens/SCM/config.mk @@ -24,11 +24,4 @@ # # Siemens SCM boards # - -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_SCM.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/siemens/SMN42/config.mk b/board/siemens/SMN42/config.mk index b28f418..4891792 100644 --- a/board/siemens/SMN42/config.mk +++ b/board/siemens/SMN42/config.mk @@ -26,5 +26,5 @@ # #address where u-boot will be relocated -#TEXT_BASE = 0x0 -TEXT_BASE = 0x81500000 +#CONFIG_SYS_TEXT_BASE = 0x0 +CONFIG_SYS_TEXT_BASE = 0x81500000 diff --git a/board/siemens/SMN42/lowlevel_init.S b/board/siemens/SMN42/lowlevel_init.S index f13d9b9..44e209b 100644 --- a/board/siemens/SMN42/lowlevel_init.S +++ b/board/siemens/SMN42/lowlevel_init.S @@ -38,7 +38,7 @@ #define IO0_VALUE 0x4000C _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE MEMMAP_ADR: .word MEMMAP BCFG0_ADR: diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk deleted file mode 100644 index 0cd8f44..0000000 --- a/board/sixnet/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# SIXNET boards -# - -TEXT_BASE = 0xF8000000 diff --git a/board/snmc/qs850/config.mk b/board/snmc/qs850/config.mk deleted file mode 100644 index 905f692..0000000 --- a/board/snmc/qs850/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2002-2003 -# Simple Network Magic Corporation, dnevil@snmc.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# QS850 -# Start address of Bootloader in Flash -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/snmc/qs860t/config.mk b/board/snmc/qs860t/config.mk deleted file mode 100644 index f6ab260..0000000 --- a/board/snmc/qs860t/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2002 -# Simple Network Magic Corporation, dnevil@snmc.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# QS860T -# Start address of 512K Socketed Flash -# - -TEXT_BASE = 0xFFF00000 diff --git a/board/socrates/config.mk b/board/socrates/config.mk deleted file mode 100644 index 7ea37b5..0000000 --- a/board/socrates/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# -# Modified by Sergei Poselenov -# (C) Copyright 2008, Emcraft Systems. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# socrates board -# default CCARBAR is at 0xff700000 -# -TEXT_BASE = 0xfff80000 diff --git a/board/sorcery/config.mk b/board/sorcery/config.mk deleted file mode 100644 index 25de0b5..0000000 --- a/board/sorcery/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2003-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# sorcery board -# - -TEXT_BASE = 0xfff00000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/spc1920/config.mk b/board/spc1920/config.mk deleted file mode 100644 index 8dacc17..0000000 --- a/board/spc1920/config.mk +++ /dev/null @@ -1,35 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Motorola old MPC821/860ADS, MPC8xxFADS, new MPC866ADS, and -# MPC885ADS boards -# - -#TEXT_BASE = 0xFE000000 -TEXT_BASE = 0xFFF00000 -PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/spc1920 -HOSTCFLAGS += -I$(TOPDIR)/board/spc1920 -HOST_ENVIRO_CFLAGS += -I$(TOPDIR)/board/spc1920 diff --git a/board/spd8xx/config.mk b/board/spd8xx/config.mk deleted file mode 100644 index e1e0192..0000000 --- a/board/spd8xx/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# Ulrich Lutz, Speech Design GmbH, ulutz@datalab.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# SPD823TS boards -# - -TEXT_BASE = 0xFF000000 diff --git a/board/spear/spear300/config.mk b/board/spear/spear300/config.mk index 35646f2..11da2c3 100644 --- a/board/spear/spear300/config.mk +++ b/board/spear/spear300/config.mk @@ -23,7 +23,7 @@ ######################################################################### -TEXT_BASE = 0x00700000 +CONFIG_SYS_TEXT_BASE = 0x00700000 ALL += $(obj)u-boot.img diff --git a/board/spear/spear310/config.mk b/board/spear/spear310/config.mk index cba8436..2b59c39 100644 --- a/board/spear/spear310/config.mk +++ b/board/spear/spear310/config.mk @@ -23,7 +23,7 @@ ######################################################################### -TEXT_BASE = 0x00700000 +CONFIG_SYS_TEXT_BASE = 0x00700000 ALL += $(obj)u-boot.img diff --git a/board/spear/spear320/config.mk b/board/spear/spear320/config.mk index cba8436..2b59c39 100644 --- a/board/spear/spear320/config.mk +++ b/board/spear/spear320/config.mk @@ -23,7 +23,7 @@ ######################################################################### -TEXT_BASE = 0x00700000 +CONFIG_SYS_TEXT_BASE = 0x00700000 ALL += $(obj)u-boot.img diff --git a/board/spear/spear600/config.mk b/board/spear/spear600/config.mk index 35646f2..11da2c3 100644 --- a/board/spear/spear600/config.mk +++ b/board/spear/spear600/config.mk @@ -23,7 +23,7 @@ ######################################################################### -TEXT_BASE = 0x00700000 +CONFIG_SYS_TEXT_BASE = 0x00700000 ALL += $(obj)u-boot.img diff --git a/board/st/nhk8815/config.mk b/board/st/nhk8815/config.mk index 590393b..1789717 100644 --- a/board/st/nhk8815/config.mk +++ b/board/st/nhk8815/config.mk @@ -23,4 +23,4 @@ # image should be loaded at 0x01000000 # -TEXT_BASE = 0x03F80000 +CONFIG_SYS_TEXT_BASE = 0x03F80000 diff --git a/board/stx/stxgp3/config.mk b/board/stx/stxgp3/config.mk deleted file mode 100644 index 47e44aa..0000000 --- a/board/stx/stxgp3/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,2003 Motorola Inc. -# -# Copied from ADS85xx for STx GP3 - Dan Malek -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# -TEXT_BASE = 0xfff80000 diff --git a/board/stx/stxssa/config.mk b/board/stx/stxssa/config.mk deleted file mode 100644 index 57fe5d6..0000000 --- a/board/stx/stxssa/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,2003 Motorola Inc. -# -# Copied from ADS85xx for STx GP3 - Dan Malek -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# default CCARBAR is at 0xff700000 -# assume U-Boot is less than 0.5MB -# U-Boot is less than 256K, so push -# it further up into the flash -# -TEXT_BASE = 0xFFFC0000 diff --git a/board/stx/stxxtc/config.mk b/board/stx/stxxtc/config.mk deleted file mode 100644 index f5dc034..0000000 --- a/board/stx/stxxtc/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# STx XTc -# - -TEXT_BASE = 0x40F00000 diff --git a/board/svm_sc8xx/config.mk b/board/svm_sc8xx/config.mk deleted file mode 100644 index 4bec9cb..0000000 --- a/board/svm_sc8xx/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0x40000000 diff --git a/board/sx1/config.mk b/board/sx1/config.mk index 4902e82..441bea2 100644 --- a/board/sx1/config.mk +++ b/board/sx1/config.mk @@ -16,4 +16,4 @@ # # -TEXT_BASE = 0x11080000 +CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/sx1/lowlevel_init.S b/board/sx1/lowlevel_init.S index bdf812e..c1a811a 100644 --- a/board/sx1/lowlevel_init.S +++ b/board/sx1/lowlevel_init.S @@ -37,7 +37,7 @@ _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/syteco/jadecpu/config.mk b/board/syteco/jadecpu/config.mk index 91994b0..617603d 100644 --- a/board/syteco/jadecpu/config.mk +++ b/board/syteco/jadecpu/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x10000000 +CONFIG_SYS_TEXT_BASE = 0x10000000 diff --git a/board/t3corp/config.mk b/board/t3corp/config.mk index 616aa19..e893fee 100644 --- a/board/t3corp/config.mk +++ b/board/t3corp/config.mk @@ -22,12 +22,6 @@ # # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFA0000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/tb0229/config.mk b/board/tb0229/config.mk index 9a50850..017511d 100644 --- a/board/tb0229/config.mk +++ b/board/tb0229/config.mk @@ -24,7 +24,7 @@ # # ROM version -TEXT_BASE = 0xBFC00000 +CONFIG_SYS_TEXT_BASE = 0xBFC00000 # RAM version -#TEXT_BASE = 0x80400000 +#CONFIG_SYS_TEXT_BASE = 0x80400000 diff --git a/board/tcm-bf518/config.mk b/board/tcm-bf518/config.mk index 30b92a3..9a54dbf 100644 --- a/board/tcm-bf518/config.mk +++ b/board/tcm-bf518/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf518-0.0 diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk index 1281da4..c5d45c7 100644 --- a/board/tcm-bf537/config.mk +++ b/board/tcm-bf537/config.mk @@ -24,7 +24,7 @@ # # This is not actually used for Blackfin boards so do not change it -#TEXT_BASE = do-not-use-me +#CONFIG_SYS_TEXT_BASE = do-not-use-me CONFIG_BFIN_CPU = bf537-0.2 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 4647908..c5d6679 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -32,6 +32,7 @@ #include <common.h> #include <twl4030.h> #include <asm/io.h> +#include <asm/arch/mmc_host_def.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> #include <asm/arch/gpio.h> @@ -169,3 +170,11 @@ void set_muxconf_regs(void) { MUX_BEAGLE(); } + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0); + return 0; +} +#endif diff --git a/board/ti/beagle/config.mk b/board/ti/beagle/config.mk index 6fb10e3..cf055db 100644 --- a/board/ti/beagle/config.mk +++ b/board/ti/beagle/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80008000 +CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/ti/evm/config.mk b/board/ti/evm/config.mk index 4d873eb..b92d3b0 100644 --- a/board/ti/evm/config.mk +++ b/board/ti/evm/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/ti/omap1510inn/config.mk b/board/ti/omap1510inn/config.mk index 9cd7424..67fe0bd 100644 --- a/board/ti/omap1510inn/config.mk +++ b/board/ti/omap1510inn/config.mk @@ -22,4 +22,4 @@ # -TEXT_BASE = 0x11080000 +CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/ti/omap1510inn/lowlevel_init.S b/board/ti/omap1510inn/lowlevel_init.S index 1c68e5b..0e01841 100644 --- a/board/ti/omap1510inn/lowlevel_init.S +++ b/board/ti/omap1510inn/lowlevel_init.S @@ -37,7 +37,7 @@ _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/ti/omap1610inn/config.mk b/board/ti/omap1610inn/config.mk index 1c5b7b5..ee0aa0a 100644 --- a/board/ti/omap1610inn/config.mk +++ b/board/ti/omap1610inn/config.mk @@ -23,4 +23,4 @@ # -TEXT_BASE = 0x11080000 +CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/ti/omap1610inn/lowlevel_init.S b/board/ti/omap1610inn/lowlevel_init.S index e4ed9f3..b376ba5 100644 --- a/board/ti/omap1610inn/lowlevel_init.S +++ b/board/ti/omap1610inn/lowlevel_init.S @@ -35,7 +35,7 @@ _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/ti/omap2420h4/config.mk b/board/ti/omap2420h4/config.mk index 3edcde0..ca5ebdf 100644 --- a/board/ti/omap2420h4/config.mk +++ b/board/ti/omap2420h4/config.mk @@ -14,15 +14,15 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 # Used with full SRAM boot. # This is either with a GP system or a signed boot image. # easiest, and safest way to go if you can. -#TEXT_BASE = 0x40270000 +#CONFIG_SYS_TEXT_BASE = 0x40270000 # Handy to get symbols to debug ROM version. -#TEXT_BASE = 0x0 -#TEXT_BASE = 0x08000000 -#TEXT_BASE = 0x04000000 +#CONFIG_SYS_TEXT_BASE = 0x0 +#CONFIG_SYS_TEXT_BASE = 0x08000000 +#CONFIG_SYS_TEXT_BASE = 0x04000000 diff --git a/board/ti/omap2420h4/lowlevel_init.S b/board/ti/omap2420h4/lowlevel_init.S index 9752fc4..731c552 100644 --- a/board/ti/omap2420h4/lowlevel_init.S +++ b/board/ti/omap2420h4/lowlevel_init.S @@ -31,7 +31,7 @@ #include <asm/arch/clocks.h> _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ /************************************************************************** * cpy_clk_code: relocates clock code into SRAM where its safer to execute diff --git a/board/ti/omap5912osk/config.mk b/board/ti/omap5912osk/config.mk index 5362a4f..0ed7d8a 100644 --- a/board/ti/omap5912osk/config.mk +++ b/board/ti/omap5912osk/config.mk @@ -27,4 +27,4 @@ # -TEXT_BASE = 0x11080000 +CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/ti/omap5912osk/lowlevel_init.S b/board/ti/omap5912osk/lowlevel_init.S index 7bfdb26..e60161e 100644 --- a/board/ti/omap5912osk/lowlevel_init.S +++ b/board/ti/omap5912osk/lowlevel_init.S @@ -36,7 +36,7 @@ _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/ti/omap730p2/config.mk b/board/ti/omap730p2/config.mk index 6940320..8618820 100644 --- a/board/ti/omap730p2/config.mk +++ b/board/ti/omap730p2/config.mk @@ -22,4 +22,4 @@ # # -TEXT_BASE = 0x11080000 +CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/ti/omap730p2/lowlevel_init.S b/board/ti/omap730p2/lowlevel_init.S index d4e97a5..6c574f1 100644 --- a/board/ti/omap730p2/lowlevel_init.S +++ b/board/ti/omap730p2/lowlevel_init.S @@ -41,7 +41,7 @@ #endif _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/board/ti/panda/config.mk b/board/ti/panda/config.mk index 7382263..33901a7 100644 --- a/board/ti/panda/config.mk +++ b/board/ti/panda/config.mk @@ -28,5 +28,4 @@ # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 # (mem base + reserved) -# Let's place u-boot 1MB before the end of SDRAM. -TEXT_BASE = 0x9ff00000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 1b8153b..78e1910 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -23,6 +23,7 @@ */ #include <common.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/mmc_host_def.h> #include "panda.h" @@ -87,3 +88,11 @@ void set_muxconf_regs(void) sizeof(wkup_padconf_array) / sizeof(struct pad_conf_entry)); } + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0); + return 0; +} +#endif diff --git a/board/ti/sdp3430/config.mk b/board/ti/sdp3430/config.mk index 18e4761..2ca03dd 100644 --- a/board/ti/sdp3430/config.mk +++ b/board/ti/sdp3430/config.mk @@ -30,4 +30,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/ti/sdp4430/config.mk b/board/ti/sdp4430/config.mk index 7382263..33901a7 100644 --- a/board/ti/sdp4430/config.mk +++ b/board/ti/sdp4430/config.mk @@ -28,5 +28,4 @@ # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 # (mem base + reserved) -# Let's place u-boot 1MB before the end of SDRAM. -TEXT_BASE = 0x9ff00000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 7039bd5..01d5ce4 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -24,6 +24,7 @@ */ #include <common.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/mmc_host_def.h> #include "sdp.h" @@ -88,3 +89,12 @@ void set_muxconf_regs(void) sizeof(wkup_padconf_array) / sizeof(struct pad_conf_entry)); } + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(0); + omap_mmc_init(1); + return 0; +} +#endif diff --git a/board/ti/tnetv107xevm/config.mk b/board/ti/tnetv107xevm/config.mk index d24d49a..79b8304 100644 --- a/board/ti/tnetv107xevm/config.mk +++ b/board/ti/tnetv107xevm/config.mk @@ -17,4 +17,4 @@ # Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. # -TEXT_BASE = 0x83FC0000 +CONFIG_SYS_TEXT_BASE = 0x83FC0000 diff --git a/board/timll/devkit8000/config.mk b/board/timll/devkit8000/config.mk index 6bfcef7..cb2cf8f 100644 --- a/board/timll/devkit8000/config.mk +++ b/board/timll/devkit8000/config.mk @@ -32,4 +32,4 @@ # (mem base + reserved) # For use with external or internal boots. -TEXT_BASE = 0x80e80000 +CONFIG_SYS_TEXT_BASE = 0x80e80000 diff --git a/board/total5200/config.mk b/board/total5200/config.mk deleted file mode 100644 index e7ac93d..0000000 --- a/board/total5200/config.mk +++ /dev/null @@ -1,43 +0,0 @@ -# -# (C) Copyright 2003-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Total5200 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFFF00000 boot high (standard configuration) -# 0xFE000000 boot low -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot high -TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/tqc/tqm5200/config.mk b/board/tqc/tqm5200/config.mk deleted file mode 100644 index d72dfe7..0000000 --- a/board/tqc/tqm5200/config.mk +++ /dev/null @@ -1,46 +0,0 @@ -# -# (C) Copyright 2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TQM5200 board: -# -# Valid values for TEXT_BASE are: -# -# 0xFC000000 boot low (standard configuration with room for max 64 MByte -# Flash ROM) -# 0xFFF00000 boot high (for a backup copy of U-Boot) -# 0x00100000 boot from RAM (for testing only) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -## Standard: boot low -TEXT_BASE = 0xFC000000 -## For a backup copy of U-Boot at the end of flash: boot high -# TEXT_BASE = 0xFFF00000 -## For testing: boot from RAM -# TEXT_BASE = 0x00100000 -endif - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/tqc/tqm8260/config.mk b/board/tqc/tqm8260/config.mk index 3ecfc48..f266321 100644 --- a/board/tqc/tqm8260/config.mk +++ b/board/tqc/tqm8260/config.mk @@ -24,11 +24,4 @@ # # TQM8260 boards # - -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_TQM8260.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/tqc/tqm8272/config.mk b/board/tqc/tqm8272/config.mk index 05c5f0c..60a048f 100644 --- a/board/tqc/tqm8272/config.mk +++ b/board/tqc/tqm8272/config.mk @@ -24,11 +24,4 @@ # # TQM8272 boards # - -# This should be equal to the CONFIG_SYS_FLASH_BASE define in config_TQM8260.h -# for the "final" configuration, with U-Boot in flash, or the address -# in RAM where U-Boot is loaded at for debugging. -# -TEXT_BASE = 0x40000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) +PLATFORM_CPPFLAGS += -I$(TOPDIR) diff --git a/board/tqc/tqm834x/config.mk b/board/tqc/tqm834x/config.mk deleted file mode 100644 index f172c4e..0000000 --- a/board/tqc/tqm834x/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# Copyright 2004 Freescale Semiconductor, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0x80000000 diff --git a/board/tqc/tqm85xx/config.mk b/board/tqc/tqm85xx/config.mk deleted file mode 100644 index 37b7b23..0000000 --- a/board/tqc/tqm85xx/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# Copyright 2004 Freescale Semiconductor. -# Modified by Xianghua Xiao, X.Xiao@motorola.com -# (C) Copyright 2002,Motorola Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# tqm85xx board -# -ifeq ($(CONFIG_TQM8548_BE),y) -TEXT_BASE = 0xfff80000 -else -TEXT_BASE = 0xfffc0000 -endif diff --git a/board/tqc/tqm8xx/config.mk b/board/tqc/tqm8xx/config.mk deleted file mode 100644 index 9d6080b..0000000 --- a/board/tqc/tqm8xx/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# TQM8xxL boards -# - -TEXT_BASE = 0x40000000 diff --git a/board/trab/config.mk b/board/trab/config.mk index 88f3beb..a349b8c 100644 --- a/board/trab/config.mk +++ b/board/trab/config.mk @@ -21,8 +21,8 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -ifndef TEXT_BASE -TEXT_BASE = 0x0DF40000 +ifndef CONFIG_SYS_TEXT_BASE +CONFIG_SYS_TEXT_BASE = 0x0DF40000 endif LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/trab/lowlevel_init.S b/board/trab/lowlevel_init.S index 9a00944..3cef414 100644 --- a/board/trab/lowlevel_init.S +++ b/board/trab/lowlevel_init.S @@ -138,7 +138,7 @@ _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE .globl lowlevel_init lowlevel_init: diff --git a/board/trizepsiv/config.mk b/board/trizepsiv/config.mk index 4486f6b..f04eb74 100644 --- a/board/trizepsiv/config.mk +++ b/board/trizepsiv/config.mk @@ -1,3 +1,3 @@ -TEXT_BASE =0xa1f00000 +CONFIG_SYS_TEXT_BASE =0xa1f00000 # 0xa1700000 -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index c991ee2..ce4cb78 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -26,7 +26,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/mx51_pins.h> +#include <asm/arch/mx5x_pins.h> #include <asm/arch/crm_regs.h> #include <asm/arch/iomux.h> #include <mxc_gpio.h> diff --git a/board/utx8245/config.mk b/board/utx8245/config.mk deleted file mode 100644 index a33faa7..0000000 --- a/board/utx8245/config.mk +++ /dev/null @@ -1,33 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2002 -# Gregory E. Allen, gallen@arlut.utexas.edu -# Matthew E. Karger, karger@arlut.utexas.edu -# Applied Research Laboratories, The University of Texas at Austin -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# UTX8245 boards -# -TEXT_BASE = 0xFFF00000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/v37/config.mk b/board/v37/config.mk deleted file mode 100644 index 50cac97..0000000 --- a/board/v37/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# (C) Copyright 2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Marel V37 boards -# -TEXT_BASE = 0x40000000 diff --git a/board/v38b/config.mk b/board/v38b/config.mk deleted file mode 100644 index bc55fc7..0000000 --- a/board/v38b/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2003-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# MarelV38B board -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -TEXT_BASE = 0xFF000000 - -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/ve8313/config.mk b/board/ve8313/config.mk deleted file mode 100644 index 02dd33e..0000000 --- a/board/ve8313/config.mk +++ /dev/null @@ -1,7 +0,0 @@ -ifndef NAND_SPL -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp -endif - -ifndef TEXT_BASE -TEXT_BASE = 0xfe000000 -endif diff --git a/board/voiceblue/config.mk b/board/voiceblue/config.mk index 2cfc56a..412b57d 100644 --- a/board/voiceblue/config.mk +++ b/board/voiceblue/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x13FD0000 +CONFIG_SYS_TEXT_BASE = 0x13FD0000 diff --git a/board/voiceblue/setup.S b/board/voiceblue/setup.S index cc50e8c..6dddd6b 100644 --- a/board/voiceblue/setup.S +++ b/board/voiceblue/setup.S @@ -26,7 +26,7 @@ #include <version.h> _TEXT_BASE: - .word TEXT_BASE /* SDRAM load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* SDRAM load addr from config.mk */ OMAP5910_LPG1_BASE: .word 0xfffbd000 OMAP5910_TIPB_SWITCHES_BASE: .word 0xfffbc800 diff --git a/board/vpac270/config.mk b/board/vpac270/config.mk index 1d650ac..0f10662 100644 --- a/board/vpac270/config.mk +++ b/board/vpac270/config.mk @@ -1 +1 @@ -TEXT_BASE = 0xa1000000 +CONFIG_SYS_TEXT_BASE = 0xa1000000 diff --git a/board/w7o/config.mk b/board/w7o/config.mk deleted file mode 100644 index bc341ca..0000000 --- a/board/w7o/config.mk +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2001 -# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Wave 7 Optics boards -# - -#TEXT_BASE = 0xFFF80000 -TEXT_BASE = 0xFFFC0000 - -#PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARD) diff --git a/board/wepep250/config.mk b/board/wepep250/config.mk index 8701581..60cbc24 100644 --- a/board/wepep250/config.mk +++ b/board/wepep250/config.mk @@ -1,11 +1,11 @@ # # This is config used for compilation of WEP EP250 sources # -# You might change location of U-Boot in memory by setting right TEXT_BASE. +# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE. # This allows for example having one copy located at the end of ram and stored # in flash device and later on while developing use other location to test # the code in RAM device only. # -TEXT_BASE = 0xa1fe0000 -#TEXT_BASE = 0xa1001000 +CONFIG_SYS_TEXT_BASE = 0xa1fe0000 +#CONFIG_SYS_TEXT_BASE = 0xa1001000 diff --git a/board/westel/amx860/config.mk b/board/westel/amx860/config.mk index d0ee4a2..b71db6a 100644 --- a/board/westel/amx860/config.mk +++ b/board/westel/amx860/config.mk @@ -21,6 +21,4 @@ # MA 02111-1307 USA # -#TEXT_BASE = 0xFE000000 -TEXT_BASE = 0x40000000 OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data diff --git a/board/xaeniax/config.mk b/board/xaeniax/config.mk index 45079a0..c639752 100644 --- a/board/xaeniax/config.mk +++ b/board/xaeniax/config.mk @@ -1,2 +1,2 @@ -TEXT_BASE = 0xa3FB0000 -#TEXT_BASE = 0 +CONFIG_SYS_TEXT_BASE = 0xa3FB0000 +#CONFIG_SYS_TEXT_BASE = 0 diff --git a/board/xes/xpedite1000/config.mk b/board/xes/xpedite1000/config.mk index 33dfbf1..b648bc6 100644 --- a/board/xes/xpedite1000/config.mk +++ b/board/xes/xpedite1000/config.mk @@ -25,12 +25,6 @@ # XES XPedite1000 PPC440GX # -ifeq ($(ramsym),1) -TEXT_BASE = 0x07FD0000 -else -TEXT_BASE = 0xFFF80000 -endif - PLATFORM_CPPFLAGS += -DCONFIG_440=1 ifeq ($(debug),1) diff --git a/board/xes/xpedite5170/config.mk b/board/xes/xpedite5170/config.mk deleted file mode 100644 index 1abae97..0000000 --- a/board/xes/xpedite5170/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright 2009 Extreme Engineering Solutions, Inc. -# Copyright 2007-2008 Freescale Semiconductor, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# XPedite5170 -# -TEXT_BASE = 0xfff00000 diff --git a/board/xes/xpedite5200/config.mk b/board/xes/xpedite5200/config.mk deleted file mode 100644 index 0761579..0000000 --- a/board/xes/xpedite5200/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright 2008 Extreme Engineering Solutions, Inc. -# Copyright 2004, 2007 Freescale Semiconductor. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# xpedite5200 board -# -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/xes/xpedite5370/config.mk b/board/xes/xpedite5370/config.mk deleted file mode 100644 index 995def8..0000000 --- a/board/xes/xpedite5370/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# Copyright 2008 Extreme Engineering Solutions, Inc. -# Copyright 2007-2008 Freescale Semiconductor, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# xpedite5370 board -# -ifndef TEXT_BASE -TEXT_BASE = 0xfff80000 -endif diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk index c75daaf..f8d7e26 100644 --- a/board/xilinx/microblaze-generic/config.mk +++ b/board/xilinx/microblaze-generic/config.mk @@ -25,7 +25,7 @@ # Version: Xilinx EDK 6.3 EDK_Gmm.12.3 # -TEXT_BASE = 0x29000000 +CONFIG_SYS_TEXT_BASE = 0x29000000 PLATFORM_CPPFLAGS += -mno-xl-soft-mul PLATFORM_CPPFLAGS += -mno-xl-soft-div diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 838f131..744384c 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -27,6 +27,7 @@ #include <common.h> #include <config.h> +#include <netdev.h> #include <asm/microblaze_intc.h> #include <asm/asm.h> @@ -66,3 +67,15 @@ int fsl_init2 (void) { return 0; } #endif + +int board_eth_init(bd_t *bis) +{ + /* + * This board either has PCI NICs or uses the CPU's TSECs + * pci_eth_init() will return 0 if no NICs found, so in that case + * returning -1 will force cpu_eth_init() to be called. + */ +#ifdef CONFIG_XILINX_EMACLITE + return xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR); +#endif +} diff --git a/board/xilinx/ml507/config.mk b/board/xilinx/ml507/config.mk index 51448ce..4df1d9c 100644 --- a/board/xilinx/ml507/config.mk +++ b/board/xilinx/ml507/config.mk @@ -1,26 +1,4 @@ -# -# (C) Copyright 2008 -# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es -# Work supported by Qtechnology http://www.qtec.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# - -sinclude $(SRCTREE)/board/xilinx/ppc440-generic/config.mk +# need to strip off double quotes +ifneq ($(CONFIG_SYS_LDSCRIPT),) +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +endif diff --git a/board/xilinx/ppc405-generic/config.mk b/board/xilinx/ppc405-generic/config.mk index 6d76755..4df1d9c 100644 --- a/board/xilinx/ppc405-generic/config.mk +++ b/board/xilinx/ppc405-generic/config.mk @@ -1,25 +1,4 @@ -# -# (C) Copyright 2008 -# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es -# Work supported by Qtechnology http://www.qtec.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp +# need to strip off double quotes +ifneq ($(CONFIG_SYS_LDSCRIPT),) +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +endif diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds index 2543c9b..a7539fd 100644 --- a/board/xilinx/ppc405-generic/u-boot-ram.lds +++ b/board/xilinx/ppc405-generic/u-boot-ram.lds @@ -124,7 +124,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds index 65d0e4d..074f3c2 100644 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ b/board/xilinx/ppc405-generic/u-boot-rom.lds @@ -134,7 +134,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/board/xilinx/ppc440-generic/config.mk b/board/xilinx/ppc440-generic/config.mk index 6d76755..4df1d9c 100644 --- a/board/xilinx/ppc440-generic/config.mk +++ b/board/xilinx/ppc440-generic/config.mk @@ -1,25 +1,4 @@ -# -# (C) Copyright 2008 -# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es -# Work supported by Qtechnology http://www.qtec.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp +# need to strip off double quotes +ifneq ($(CONFIG_SYS_LDSCRIPT),) +LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) +endif diff --git a/board/xilinx/ppc440-generic/u-boot-ram.lds b/board/xilinx/ppc440-generic/u-boot-ram.lds index 94f6faf..203f062 100644 --- a/board/xilinx/ppc440-generic/u-boot-ram.lds +++ b/board/xilinx/ppc440-generic/u-boot-ram.lds @@ -125,7 +125,7 @@ SECTIONS . = ALIGN(4); } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds index b8f8bed..b67617d 100644 --- a/board/xilinx/ppc440-generic/u-boot-rom.lds +++ b/board/xilinx/ppc440-generic/u-boot-rom.lds @@ -135,7 +135,7 @@ SECTIONS . = ALIGN(4); } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/board/xm250/config.mk b/board/xm250/config.mk index 8ce0c48..a3fa0e5 100644 --- a/board/xm250/config.mk +++ b/board/xm250/config.mk @@ -27,9 +27,9 @@ # This is the address where U-Boot lives in flash: -#TEXT_BASE = 0 +#CONFIG_SYS_TEXT_BASE = 0 # FIXME: armboot does only work correctly when being compiled # for the addresses _after_ relocation to RAM!! Otherwhise the # .bss segment is assumed in flash... -TEXT_BASE = 0xA3F80000 +CONFIG_SYS_TEXT_BASE = 0xA3F80000 diff --git a/board/xsengine/config.mk b/board/xsengine/config.mk index 148c519..821bb3b 100644 --- a/board/xsengine/config.mk +++ b/board/xsengine/config.mk @@ -1 +1 @@ -TEXT_BASE = 0xA3F80000 +CONFIG_SYS_TEXT_BASE = 0xA3F80000 diff --git a/board/zeus/config.mk b/board/zeus/config.mk deleted file mode 100644 index 1bdf5e4..0000000 --- a/board/zeus/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0xFFFC0000 diff --git a/board/zipitz2/config.mk b/board/zipitz2/config.mk index 1d650ac..0f10662 100644 --- a/board/zipitz2/config.mk +++ b/board/zipitz2/config.mk @@ -1 +1 @@ -TEXT_BASE = 0xa1000000 +CONFIG_SYS_TEXT_BASE = 0xa1000000 diff --git a/board/zpc1900/config.mk b/board/zpc1900/config.mk deleted file mode 100644 index 3e53b2b..0000000 --- a/board/zpc1900/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Modified by, Yuli Barcohen, Arabella Software Ltd. <yuli@arabellasw.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# ZPC.1900 board -# - -TEXT_BASE = 0xFE000000 diff --git a/board/zylonite/config.mk b/board/zylonite/config.mk index 09b0f71..954f46e 100644 --- a/board/zylonite/config.mk +++ b/board/zylonite/config.mk @@ -1,4 +1,4 @@ -#TEXT_BASE = 0x0 -#TEXT_BASE = 0xa1700000 -#TEXT_BASE = 0xa3080000 -TEXT_BASE = 0xa3008000 +#CONFIG_SYS_TEXT_BASE = 0x0 +#CONFIG_SYS_TEXT_BASE = 0xa1700000 +#CONFIG_SYS_TEXT_BASE = 0xa3080000 +CONFIG_SYS_TEXT_BASE = 0xa3008000 @@ -17,8 +17,8 @@ # # :.,$! sort -f -k2,2 -k3,3 -k6,6 -k5,5 -k1,1 # -# Target ARCH CPU Board name Vendor SoC -########################################################################### +# Target ARCH CPU Board name Vendor SoC Options +############################################################################################### qong arm arm1136 - davedenx mx31 mx31ads arm arm1136 - freescale mx31 @@ -43,23 +43,21 @@ meesc arm arm926ejs - esd at91 otc570 arm arm926ejs - esd at91 pm9261 arm arm926ejs - ronetix at91 pm9263 arm arm926ejs - ronetix at91 -jadecpu arm arm926ejs jadecpu syteco mb86r0x suen3 arm arm926ejs km_arm keymile kirkwood rd6281a arm arm926ejs - Marvell kirkwood -mx51evk arm armv7 mx51evk freescale mx51 -vision2 arm armv7 vision2 ttcontrol mx51 +jadecpu arm arm926ejs jadecpu syteco mb86r0x +mx51evk arm armv7 mx51evk freescale mx5 +vision2 arm armv7 vision2 ttcontrol mx5 actux1 arm ixp actux2 arm ixp actux3 arm ixp actux4 arm ixp ixdp425 arm ixp cerf250 arm pxa -colibri_pxa270 arm pxa cradle arm pxa csb226 arm pxa delta arm pxa innokom arm pxa -logodl arm pxa lubbock arm pxa pleb2 arm pxa xaeniax arm pxa @@ -72,6 +70,7 @@ gcplus arm sa1100 lart arm sa1100 shannon arm sa1100 mimc200 avr32 at32ap - mimc at32ap700x +ip04 blackfin blackfin eNET i386 i386 - - sc520 idmr m68k mcf52x2 TASREG m68k mcf52x2 tasreg esd @@ -82,6 +81,8 @@ tb0229 mips mips PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent P3G4 powerpc 74xx_7xx evb64260 +PCIPPC2 powerpc 74xx_7xx pcippc2 +PCIPPC6 powerpc 74xx_7xx pcippc2 ppmc7xx powerpc 74xx_7xx ZUMA powerpc 74xx_7xx evb64260 BAB7xx powerpc 74xx_7xx bab7xx eltec @@ -89,27 +90,50 @@ ELPPC powerpc 74xx_7xx elppc eltec CPCI750 powerpc 74xx_7xx cpci750 esd DB64360 powerpc 74xx_7xx db64360 Marvell DB64460 powerpc 74xx_7xx db64460 Marvell +p3m7448 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M7448 +p3m750 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M750 aria powerpc mpc512x - davedenx PATI powerpc mpc5xx pati mpl +a4m072 powerpc mpc5xxx a4m072 BC3450 powerpc mpc5xxx bc3450 canmb powerpc mpc5xxx cm5200 powerpc mpc5xxx -hmi1001 powerpc mpc5xxx - manroland inka4x0 powerpc mpc5xxx ipek01 powerpc mpc5xxx jupiter powerpc mpc5xxx -mucmc52 powerpc mpc5xxx - manroland munices powerpc mpc5xxx o2dnt powerpc mpc5xxx -uc101 powerpc mpc5xxx - manroland +PM520 powerpc mpc5xxx pm520 v38b powerpc mpc5xxx pf5200 powerpc mpc5xxx - esd +hmi1001 powerpc mpc5xxx - manroland +mucmc52 powerpc mpc5xxx - manroland +uc101 powerpc mpc5xxx - manroland +MVSMR powerpc mpc5xxx mvsmr matrix_vision aev powerpc mpc5xxx tqm5200 tqc +TB5200 powerpc mpc5xxx tqm5200 tqc +lite5200b powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B +lite5200b_PM powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM +mcc200 powerpc mpc5xxx mcc200 - - mcc200 +mcc200_COM12 powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12 +mcc200_highboot powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000 +mcc200_SDRAM powerpc mpc5xxx mcc200 - - mcc200:MCC200_SDRAM +prs200 powerpc mpc5xxx mcc200 - - mcc200:PRS200,MCC200_SDRAM +prs200_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200 +prs200_highboot powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM +TOP5200 powerpc mpc5xxx top5200 emk - TOP5200:TOP5200 +pcm030 powerpc mpc5xxx pcm030 phytec - pcm030 +cam5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B +fo300 powerpc mpc5xxx tqm5200 tqc - TQM5200:FO300 +MiniFAP powerpc mpc5xxx tqm5200 tqc - TQM5200:MINIFAP +TQM5200 powerpc mpc5xxx tqm5200 tqc - TQM5200: +MVBC_P powerpc mpc5xxx mvbc_p matrix_vision - MVBC_P:MVBC_P sorcery powerpc mpc8220 A3000 powerpc mpc824x a3000 barco powerpc mpc824x BMW powerpc mpc824x bmw CU824 powerpc mpc824x cu824 +eXalion powerpc mpc824x eXalion MOUSSE powerpc mpc824x mousse MUSENKI powerpc mpc824x musenki MVBLUE powerpc mpc824x mvblue @@ -119,34 +143,67 @@ sbc8240 powerpc mpc824x utx8245 powerpc mpc824x debris powerpc mpc824x - etin kvme080 powerpc mpc824x - etin +CPC45 powerpc mpc824x cpc45 - - CPC45 atc powerpc mpc8260 +ep8248 powerpc mpc8260 ep8248 ep8260 powerpc mpc8260 ep82xxm powerpc mpc8260 gw8260 powerpc mpc8260 hymod powerpc mpc8260 IDS8247 powerpc mpc8260 ids8247 +ISPAN powerpc mpc8260 ispan sacsng powerpc mpc8260 sbc8260 powerpc mpc8260 ZPC1900 powerpc mpc8260 zpc1900 mgcoge powerpc mpc8260 - keymile SCM powerpc mpc8260 - siemens TQM8272 powerpc mpc8260 tqm8272 tqc +CPU86 powerpc mpc8260 cpu86 - - CPU86 +CPU87 powerpc mpc8260 cpu87 - - CPU87 +PM825 powerpc mpc8260 pm826 - - PM826:PCI,SYS_TEXT_BASE=0xFF000000 +PM826 powerpc mpc8260 pm826 - - PM826:SYS_TEXT_BASE=0xFF000000 +PM828 powerpc mpc8260 pm828 - - PM828 +ep8248E powerpc mpc8260 ep8248 - - ep8248 +Rattler powerpc mpc8260 rattler - - Rattler +PQ2FADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS ve8313 powerpc mpc83xx ve8313 kmeter1 powerpc mpc83xx kmeter1 keymile MVBLM7 powerpc mpc83xx mvblm7 matrix_vision TQM834x powerpc mpc83xx tqm834x tqc +sbc8349 powerpc mpc83xx sbc8349 - - sbc8349 +caddy2 powerpc mpc83xx vme8349 esd - vme8349:CADDY2 +vme8349 powerpc mpc83xx vme8349 esd - vme8349 PM854 powerpc mpc85xx pm854 PM856 powerpc mpc85xx pm856 +P1022DS powerpc mpc85xx p1022ds freescale +P2020DS powerpc mpc85xx p2020ds freescale stxgp3 powerpc mpc85xx stxgp3 stx +P4080DS powerpc mpc85xx corenet_ds freescale +sbc8540 powerpc mpc85xx sbc8560 - - SBC8540 +sbc8548 powerpc mpc85xx sbc8548 - - sbc8548 +sbc8560 powerpc mpc85xx sbc8560 - - sbc8560 +stxssa powerpc mpc85xx stxssa stx - stxssa +TQM8540 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8540,TQM8540=y,HOSTNAME=tqm8540,BOARDNAME="TQM8540" +TQM8541 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8541,TQM8541=y,HOSTNAME=tqm8541,BOARDNAME="TQM8541" +TQM8548 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548" +TQM8555 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8555,TQM8555=y,HOSTNAME=tqm8555,BOARDNAME="TQM8555" +TQM8560 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8560,TQM8560=y,HOSTNAME=tqm8560,BOARDNAME="TQM8560" +Adder powerpc mpc8xx adder +ADS860 powerpc mpc8xx fads c2mon powerpc mpc8xx EP88x powerpc mpc8xx ep88x ETX094 powerpc mpc8xx etx094 +FADS823 powerpc mpc8xx fads FLAGADM powerpc mpc8xx flagadm +GEN860T powerpc mpc8xx gen860t GENIETV powerpc mpc8xx genietv hermes powerpc mpc8xx +ICU862 powerpc mpc8xx icu862 IP860 powerpc mpc8xx ip860 LANTEC powerpc mpc8xx lantec lwmon powerpc mpc8xx +MBX powerpc mpc8xx mbx8xx +MBX860T powerpc mpc8xx mbx8xx NX823 powerpc mpc8xx nx823 quantum powerpc mpc8xx R360MPI powerpc mpc8xx r360mpi @@ -154,7 +211,7 @@ RBC823 powerpc mpc8xx rbc823 rmu powerpc mpc8xx RPXlite powerpc mpc8xx spc1920 powerpc mpc8xx -uc100 powerpc mpc8xx - manroland +v37 powerpc mpc8xx MHPC powerpc mpc8xx mhpc eltec TOP860 powerpc mpc8xx top860 emk kmsupx4 powerpc mpc8xx km8xx keymile @@ -162,13 +219,39 @@ mgsuvd powerpc mpc8xx km8xx keymile KUP4K powerpc mpc8xx kup4k kup KUP4X powerpc mpc8xx kup4x kup ELPT860 powerpc mpc8xx elpt860 LEOX +uc100 powerpc mpc8xx - manroland IAD210 powerpc mpc8xx - siemens QS823 powerpc mpc8xx qs850 snmc QS850 powerpc mpc8xx qs850 snmc QS860T powerpc mpc8xx qs860t snmc stxxtc powerpc mpc8xx stxxtc stx +FPS850L powerpc mpc8xx tqm8xx tqc +FPS860L powerpc mpc8xx tqm8xx tqc +NSCU powerpc mpc8xx tqm8xx tqc SM850 powerpc mpc8xx tqm8xx tqc +TK885D powerpc mpc8xx tqm8xx tqc +TQM823L powerpc mpc8xx tqm8xx tqc +TQM823M powerpc mpc8xx tqm8xx tqc +TQM850L powerpc mpc8xx tqm8xx tqc +TQM850M powerpc mpc8xx tqm8xx tqc +TQM855L powerpc mpc8xx tqm8xx tqc +TQM855M powerpc mpc8xx tqm8xx tqc +TQM860L powerpc mpc8xx tqm8xx tqc +TQM860M powerpc mpc8xx tqm8xx tqc +TQM862L powerpc mpc8xx tqm8xx tqc +TQM862M powerpc mpc8xx tqm8xx tqc +TQM866M powerpc mpc8xx tqm8xx tqc +TQM885D powerpc mpc8xx tqm8xx tqc AMX860 powerpc mpc8xx amx860 westel +AdderII powerpc mpc8xx adder - - Adder:MPC852T +CP850 powerpc mpc8xx nc650 - - NC650:CP850=1,IDS852_REV2=1 +IVML24 powerpc mpc8xx ivm - - IVML24:IVML24_16M +IVMS8 powerpc mpc8xx ivm - - IVMS8:IVMS8_16M +NETTA powerpc mpc8xx netta - - NETTA +NETTA2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=1 +NETVIA powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=1 +TTTech powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ104V7DS01 +wtk powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ065T9DR51U csb272 powerpc ppc4xx csb472 powerpc ppc4xx ERIC powerpc ppc4xx eric @@ -180,10 +263,11 @@ ML2 powerpc ppc4xx ml2 sbc405 powerpc ppc4xx sc3 powerpc ppc4xx t3corp powerpc ppc4xx +W7OLMC powerpc ppc4xx w7o +W7OLMG powerpc ppc4xx w7o zeus powerpc ppc4xx acadia powerpc ppc4xx - amcc bamboo powerpc ppc4xx - amcc -bluestone powerpc ppc4xx - amcc bubinga powerpc ppc4xx - amcc ebony powerpc ppc4xx - amcc katmai powerpc ppc4xx - amcc @@ -193,6 +277,7 @@ ocotea powerpc ppc4xx - amcc redwood powerpc ppc4xx - amcc taihu powerpc ppc4xx - amcc taishan powerpc ppc4xx - amcc +walnut powerpc ppc4xx walnut amcc yucca powerpc ppc4xx - amcc AP1000 powerpc ppc4xx ap1000 amirix CRAYL1 powerpc ppc4xx L1 cray @@ -203,11 +288,13 @@ ASH405 powerpc ppc4xx ash405 esd CANBT powerpc ppc4xx canbt esd CMS700 powerpc ppc4xx cms700 esd CPCI2DP powerpc ppc4xx cpci2dp esd +CPCI405 powerpc ppc4xx cpci405 esd DP405 powerpc ppc4xx dp405 esd DU405 powerpc ppc4xx du405 esd DU440 powerpc ppc4xx du440 esd HH405 powerpc ppc4xx hh405 esd HUB405 powerpc ppc4xx hub405 esd +OCRTC powerpc ppc4xx ocrtc esd PCI405 powerpc ppc4xx pci405 esd PLU405 powerpc ppc4xx plu405 esd PMC405 powerpc ppc4xx pmc405 esd @@ -219,10 +306,36 @@ neo powerpc ppc4xx - gdsys icon powerpc ppc4xx - mosaixtech MIP405 powerpc ppc4xx mip405 mpl PIP405 powerpc ppc4xx pip405 mpl +hcu4 powerpc ppc4xx hcu4 netstal +hcu5 powerpc ppc4xx hcu5 netstal +mcu25 powerpc ppc4xx mcu25 netstal alpr powerpc ppc4xx - prodrive p3p440 powerpc ppc4xx - prodrive KAREF powerpc ppc4xx karef sandburst +acadia_nand powerpc ppc4xx acadia amcc - acadia:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +bamboo_nand powerpc ppc4xx bamboo amcc - bamboo:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +haleakala_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +kilauea powerpc ppc4xx kilauea amcc - kilauea:KILAUEA +kilauea_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +rainier powerpc ppc4xx sequoia amcc - sequoia:RAINIER +rainier_nand powerpc ppc4xx sequoia amcc - sequoia:RAINIER,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +rainier_ramboot powerpc ppc4xx sequoia amcc - sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds +sequoia powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA +sequoia_nand powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +sequoia_ramboot powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds +fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds +fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xFFCB0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds +intip powerpc ppc4xx intip gdsys - intip:INTIB +MIP405T powerpc ppc4xx mip405 mpl - MIP405:MIP405T +ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds +ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds +arches powerpc ppc4xx canyonlands amcc - canyonlands:ARCHES +glacier powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER +glacier_nand powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds grsim sparc leon3 - gaisler +PM825_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 +PM826_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 imx31_litekit arm arm1136 - logicpd mx31 omap2420h4 arm arm1136 - ti omap24xx tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x @@ -260,15 +373,18 @@ omap3_zoom2 arm armv7 zoom2 logicpd omap3 omap3_beagle arm armv7 beagle ti omap3 omap3_evm arm armv7 evm ti omap3 omap3_sdp3430 arm armv7 sdp3430 ti omap3 -omap4_panda arm armv7 panda ti omap4 -omap4_sdp4430 arm armv7 sdp4430 ti omap4 +igep0020 arm armv7 igep0020 isee omap3 +igep0030 arm armv7 igep0030 isee omap3 am3517_evm arm armv7 am3517evm logicpd omap3 devkit8000 arm armv7 devkit8000 timll omap3 +omap4_panda arm armv7 panda ti omap4 +omap4_sdp4430 arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx ixdpg425 arm ixp lpd7a400 arm lh7a40x lpd7a40x lpd7a404 arm lh7a40x lpd7a40x +colibri_pxa270 arm pxa pxa255_idp arm pxa wepep250 arm pxa xsengine arm pxa @@ -283,7 +399,6 @@ hammerhead avr32 at32ap - miromico at32ap700x bct-brettl2 blackfin blackfin bf518f-ezbrd blackfin blackfin bf526-ezbrd blackfin blackfin -bf527-ad7160-eval blackfin blackfin bf527-ezkit blackfin blackfin bf527-sdp blackfin blackfin bf533-ezkit blackfin blackfin @@ -305,7 +420,6 @@ cm-bf537u blackfin blackfin cm-bf548 blackfin blackfin cm-bf561 blackfin blackfin ibf-dsp561 blackfin blackfin -ip04 blackfin blackfin tcm-bf518 blackfin blackfin tcm-bf537 blackfin blackfin M5208EVBE m68k mcf52x2 m5208evbe freescale @@ -316,47 +430,204 @@ M5271EVB m68k mcf52x2 m5271evb freescale M5275EVB m68k mcf52x2 m5275evb freescale M5282EVB m68k mcf52x2 m5282evb freescale M53017EVB m68k mcf52x2 m53017evb freescale -microblaze-generic microblaze microblaze microblaze-generic xilinx mpc7448hpc2 powerpc 74xx_7xx mpc7448hpc2 freescale +EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260 +EVB64260_750CX powerpc 74xx_7xx evb64260 - - EVB64260 pdm360ng powerpc mpc512x mecp5123 powerpc mpc512x - esd +mpc5121ads powerpc mpc512x mpc5121ads freescale +mpc5121ads_rev2 powerpc mpc512x mpc5121ads freescale - mpc5121ads:MPC5121ADS_REV2 cmi_mpc5xx powerpc mpc5xx cmi +digsy_mtc powerpc mpc5xxx digsy_mtc motionpro powerpc mpc5xxx cpci5200 powerpc mpc5xxx - esd mecp5200 powerpc mpc5xxx - esd +icecube_5200 powerpc mpc5xxx icecube - - IceCube +icecube_5200_DDR powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR +icecube_5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000 +icecube_5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000 +Lite5200 powerpc mpc5xxx icecube - - IceCube +lite5200b_LOWBOOT powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000 +Lite5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000 +Lite5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000 +mcc200_COM12_highboot powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000 +mcc200_COM12_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,MCC200_SDRAM +mcc200_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM +PM520_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR +PM520_ROMBOOT powerpc mpc5xxx pm520 - - PM520:BOOT_ROM +prs200_highboot_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000 +EVAL5200 powerpc mpc5xxx top5200 emk - TOP5200:EVAL5200 +MINI5200 powerpc mpc5xxx top5200 emk - TOP5200:MINI5200 +pcm030_LOWBOOT powerpc mpc5xxx pcm030 phytec - pcm030:SYS_TEXT_BASE=0xFF000000 +cam5200_niosflash powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH +TB5200_B powerpc mpc5xxx tqm5200 tqc - TB5200:TQM5200_B +TQM5200S powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S +TQM5200S_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000 +TQM5200_B powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B +TQM5200_B_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000 +TQM5200_STK100 powerpc mpc5xxx tqm5200 tqc - TQM5200:STK52XX_REV100 +galaxy5200 powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200 +Total5200 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1 +Total5200_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000 +Total5200_Rev2 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2 +Total5200_Rev2_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000 Alaska8220 powerpc mpc8220 alaska Yukon8220 powerpc mpc8220 alaska HIDDEN_DRAGON powerpc mpc824x hidden_dragon +Sandpoint8240 powerpc mpc824x sandpoint +Sandpoint8245 powerpc mpc824x sandpoint +CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM +cogent_mpc8260 powerpc mpc8260 cogent IPHASE4539 powerpc mpc8260 iphase4539 +muas3001 powerpc mpc8260 muas3001 ppmc8260 powerpc mpc8260 RPXsuper powerpc mpc8260 rpxsuper rsdproto powerpc mpc8260 MPC8266ADS powerpc mpc8260 mpc8266ads freescale -mpc8308_p1m powerpc mpc83xx +CPU86_ROMBOOT powerpc mpc8260 cpu86 - - CPU86:BOOT_ROM +CPU87_ROMBOOT powerpc mpc8260 cpu87 - - CPU87:BOOT_ROM +ISPAN_REVB powerpc mpc8260 ispan - - ISPAN:SYS_REV_B +PM825_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000 +PM825_ROMBOOT powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 +PM826_BIGFLASH powerpc mpc8260 pm826 - - PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000 +PM826_ROMBOOT powerpc mpc8260 pm826 - - PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 +PM828_PCI powerpc mpc8260 pm828 - - PM828:PCI +PM828_ROMBOOT powerpc mpc8260 pm828 - - PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 +Rattler8248 powerpc mpc8260 rattler - - Rattler:MPC8248 +TQM8255_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8255,300MHz +TQM8260_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz +TQM8260_AB powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x +TQM8260_AC powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x +TQM8260_AD powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x +TQM8260_AE powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,266MHz +TQM8260_AF powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x +TQM8260_AG powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz +TQM8260_AH powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x +TQM8260_AI powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x +TQM8265_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8265,300MHz,BUSMODE_60x +muas3001_dev powerpc mpc8260 muas3001 - - muas3001:MUAS_DEV_BOARD +MPC8260ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS +MPC8272ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS +PQ2FADS-VR powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 +PQ2FADS-ZU powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS +PQ2FADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 +VoVPN-GW_100MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_100MHz +VoVPN-GW_66MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_66MHz MPC8308RDB powerpc mpc83xx mpc8308rdb freescale MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale MPC8349EMDS powerpc mpc83xx mpc8349emds freescale MPC837XERDB powerpc mpc83xx mpc837xerdb freescale +sbc8349_PCI_33 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_33M +sbc8349_PCI_66 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_66M +SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_LP +SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_SP +MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ +MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ +MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB +MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS: +MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 +MPC8349ITX powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX +MPC8349ITXGP powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000 +MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS: +MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 +MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK +MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ +MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK +MPC837XEMDS powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS ATUM8548 powerpc mpc85xx atum8548 socrates powerpc mpc85xx socrates MPC8540ADS powerpc mpc85xx mpc8540ads freescale MPC8544DS powerpc mpc85xx mpc8544ds freescale MPC8560ADS powerpc mpc85xx mpc8560ads freescale MPC8568MDS powerpc mpc85xx mpc8568mds freescale -P4080DS powerpc mpc85xx corenet_ds freescale XPEDITE5200 powerpc mpc85xx xpedite5200 xes XPEDITE5370 powerpc mpc85xx xpedite5370 xes -P1022DS powerpc mpc85xx p1022ds freescale +sbc8540_33 powerpc mpc85xx sbc8560 - - SBC8540 +sbc8540_66 powerpc mpc85xx sbc8560 - - SBC8540 +sbc8548_PCI_33 powerpc mpc85xx sbc8548 - - sbc8548:PCI,33 +sbc8548_PCI_66 powerpc mpc85xx sbc8548 - - sbc8548:PCI,66 +sbc8560_33 powerpc mpc85xx sbc8560 - - sbc8560 +sbc8560_66 powerpc mpc85xx sbc8560 - - sbc8560 +stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M +TQM8548_AG powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_AG=y,HOSTNAME=tqm8485,BOARDNAME="TQM8548_AG" +TQM8548_BE powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_BE=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548_BE" +MPC8540EVAL powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M +MPC8540EVAL_33 powerpc mpc85xx mpc8540eval - - MPC8540EVAL +MPC8540EVAL_66 powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M +P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT +MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS +MPC8536DS_36BIT powerpc mpc85xx mpc8536ds freescale - MPC8536DS:36BIT +MPC8536DS_NAND powerpc mpc85xx mpc8536ds freescale - MPC8536DS:NAND +MPC8541CDS powerpc mpc85xx mpc8541cds freescale - MPC8541CDS +MPC8548CDS powerpc mpc85xx mpc8548cds freescale - MPC8548CDS +MPC8555CDS powerpc mpc85xx mpc8555cds freescale - MPC8555CDS +MPC8569MDS powerpc mpc85xx mpc8569mds freescale - MPC8569MDS +MPC8569MDS_ATM powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:ATM +MPC8569MDS_NAND powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:NAND +MPC8572DS powerpc mpc85xx mpc8572ds freescale - MPC8572DS +MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT +P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011 +P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,NAND +P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SDCARD +P1020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB +P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND +P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD +P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010 +P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,NAND +P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SDCARD +P2020DS_DDR2 powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,DDR2 +P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020 +P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,NAND +P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SDCARD sbc8641d powerpc mpc86xx MPC8610HPCD powerpc mpc86xx mpc8610hpcd freescale XPEDITE5170 powerpc mpc86xx xpedite5170 xes +MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN cogent_mpc8xx powerpc mpc8xx cogent ESTEEM192E powerpc mpc8xx esteem192e +FADS850SAR powerpc mpc8xx fads +FADS860T powerpc mpc8xx fads +MPC86xADS powerpc mpc8xx fads +MPC885ADS powerpc mpc8xx fads RPXClassic powerpc mpc8xx RRvision powerpc mpc8xx +SPD823TS powerpc mpc8xx spd8xx svm_sc8xx powerpc mpc8xx +SXNI855T powerpc mpc8xx sixnet +virtlab2 powerpc mpc8xx tqm8xx tqc +Adder87x powerpc mpc8xx adder - - Adder +AdderUSB powerpc mpc8xx adder - - Adder +GEN860T_SC powerpc mpc8xx gen860t - - GEN860T:SC +ICU862_100MHz powerpc mpc8xx icu862 - - ICU862:100MHz +IVML24_128 powerpc mpc8xx ivm - - IVML24:IVML24_32M +IVML24_256 powerpc mpc8xx ivm - - IVML24:IVML24_64M +IVMS8_128 powerpc mpc8xx ivm - - IVMS8:IVMS8_32M +IVMS8_256 powerpc mpc8xx ivm - - IVMS8:IVMS8_64M +NC650_Rev1 powerpc mpc8xx nc650 - - NC650:IDS852_REV2=1 +NC650_Rev2 powerpc mpc8xx nc650 - - NC650:IDS852_REV1=1 +NETTA2_V2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=2 +NETTA_6412 powerpc mpc8xx netta - - NETTA:NETTA_6412=1 +NETTA_ISDN powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1 +NETTA_ISDN_6412 powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1 +NETTA_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_SWAPHOOK=1 +NETVIA_V2 powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=2 +TQM823L_LCD powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,NEC_NL6448BC20 +NETPHONE powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=1 +NETPHONE_V2 powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=2 +RPXlite_DW powerpc mpc8xx RPXlite_dw - - RPXlite_DW +RPXlite_DW_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz +RPXlite_DW_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20 +RPXlite_DW_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20 +RPXlite_DW_NVRAM powerpc mpc8xx RPXlite_dw - - RPXlite_DW:ENV_IS_IN_NVRAM +RPXlite_DW_NVRAM_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM +RPXlite_DW_NVRAM_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM +RPXlite_DW_NVRAM_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM +RRvision_LCD powerpc mpc8xx RRvision - - RRvision:LCD,SHARP_LQ104V7DS01 pcs440ep powerpc ppc4xx quad100hd powerpc ppc4xx +CPCI4052 powerpc ppc4xx cpci405 esd +CPCI405AB powerpc ppc4xx cpci405 esd +CPCI405DT powerpc ppc4xx cpci405 esd dlvision powerpc ppc4xx - gdsys gdppc440etx powerpc ppc4xx - gdsys CPCIISER4 powerpc ppc4xx cpciiser4 esd @@ -364,12 +635,88 @@ DASA_SIM powerpc ppc4xx dasa_sim esd PMC405DE powerpc ppc4xx pmc405de esd METROBOX powerpc ppc4xx metrobox sandburst XPEDITE1000 powerpc ppc4xx xpedite1000 xes +korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT +haleakala powerpc ppc4xx kilauea amcc - kilauea:HALEAKALA +sycamore powerpc ppc4xx walnut amcc - walnut +devconcenter powerpc ppc4xx intip gdsys - intip:DEVCONCENTER +canyonlands powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS +yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE +yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE +CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1 +CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 +CATcenter_33 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 +xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds +xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds +mpc8308_p1m powerpc mpc83xx +bluestone powerpc ppc4xx - amcc grsim_leon2 sparc leon2 - gaisler gr_cpci_ax2000 sparc leon3 - gaisler gr_ep2s60 sparc leon3 - gaisler gr_xc3s_1500 sparc leon3 - gaisler +icecube_5200_DDR_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR +MPC832XEMDS_SLAVE powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCISLAVE +MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE +microblaze-generic microblaze microblaze microblaze-generic xilinx +digsy_mtc_LOWBOOT powerpc mpc5xxx digsy_mtc - - digsy_mtc:SYS_TEXT_BASE=0xFF000000 +digsy_mtc_RAMBOOT powerpc mpc5xxx digsy_mtc - - digsy_mtc:SYS_TEXT_BASE=0x00100000 +PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave +PM520_ROMBOOT_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR,BOOT_ROM +galaxy5200_LOWBOOT powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200_LOWBOOT +icecube_5200_DDR_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR +mcc200_COM12_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM +linkstation_HGLAN powerpc mpc824x linkstation - - linkstation:HGLAN=1 +PM828_ROMBOOT_PCI powerpc mpc8260 pm828 - - PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 +MPC8260ADS_33MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000 +MPC8260ADS_33MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000 +MPC8260ADS_40MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000 +MPC8260ADS_40MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000 +MPC8260ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000 +MPC8272ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000 +PQ2FADS-VR_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 +PQ2FADS-ZU_66MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 +PQ2FADS-ZU_66MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 +PQ2FADS-ZU_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 +MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT=y,SYS_TEXT_BASE=0x00100000 +MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT=y,SYS_TEXT_BASE=0x00100000 +MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND +MPC832XEMDS_HOST_33 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1 +MPC832XEMDS_HOST_66 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1 +MPC8349ITX_LOWBOOT powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000 +MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1 +MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1 +MPC837XEMDS_HOST powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS:PCI +sbc8548_PCI_33_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,33,PCIE +sbc8548_PCI_66_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,66,PCIE +MPC8540EVAL_33_slave powerpc mpc85xx mpc8540eval - - MPC8540EVAL:PCI_SLAVE +MPC8540EVAL_66_slave powerpc mpc85xx mpc8540eval - - MPC8540EVAL:SYSCLK_66M,PCI_SLAVE +MPC8536DS_SDCARD powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SDCARD +MPC8536DS_SPIFLASH powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SPIFLASH +MPC8541CDS_legacy powerpc mpc85xx mpc8541cds freescale - MPC8541CDS:LEGACY +MPC8548CDS_legacy powerpc mpc85xx mpc8548cds freescale - MPC8548CDS:LEGACY +MPC8555CDS_legacy powerpc mpc85xx mpc8555cds freescale - MPC8555CDS:LEGACY +P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SPIFLASH +P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020,SPIFLASH +P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SPIFLASH +P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SPIFLASH +MPC8641HPCN_36BIT powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN:PHYS_64BIT +NETTA_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1 +NETTA_ISDN_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1 +NETTA_ISDN_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1 +canyonlands_nand powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS,NAND_U_BOOT=y,SYS_TEXT_BASE=0x01000000 +v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xFF1C0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds +PPChameleonEVB_BA_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25 +PPChameleonEVB_BA_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33 +PPChameleonEVB_HI_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25 +PPChameleonEVB_HI_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33 +PPChameleonEVB_ME_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 +PPChameleonEVB_ME_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 +xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds +xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds davinci_dm355evm arm arm926ejs dm355evm davinci davinci davinci_dm365evm arm arm926ejs dm365evm davinci davinci davinci_dm6467evm arm arm926ejs dm6467evm davinci davinci davinci_schmoogie arm arm926ejs schmoogie davinci davinci davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci +bf527-ad7160-eval blackfin blackfin +# Target ARCH CPU Board name Vendor SoC Options +############################################################################################### diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index db59e6f..ce3c77c 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -308,7 +308,6 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] } #if defined(CONFIG_OF_LIBFDT) -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) /* find flattened device tree */ ret = boot_get_fdt (flag, argc, argv, &images, &images.ft_addr, &images.ft_len); @@ -319,7 +318,6 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[] set_working_fdt_addr(images.ft_addr); #endif -#endif } images.os.start = (ulong)os_hdr; @@ -474,7 +472,7 @@ static int bootm_start_standalone(ulong iflag, int argc, char * const argv[]) static cmd_tbl_t cmd_bootm_sub[] = { U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""), U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""), -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) +#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, "", ""), #endif #ifdef CONFIG_OF_LIBFDT @@ -530,7 +528,7 @@ int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv lmb_reserve(&images.lmb, images.os.load, (load_end - images.os.load)); break; -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) +#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH case BOOTM_STATE_RAMDISK: { ulong rd_len = images.rd_end - images.rd_start; diff --git a/common/cmd_display.c b/common/cmd_display.c index 6c11aa6..d5d5d8c 100644 --- a/common/cmd_display.c +++ b/common/cmd_display.c @@ -23,40 +23,32 @@ #include <common.h> #include <command.h> +#include <led-display.h> #undef DEBUG_DISP -#define DISP_SIZE 8 -#define CWORD_CLEAR 0x80 -#define CLEAR_DELAY (110 * 2) - int do_display (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i; - int pos; /* Clear display */ - *((volatile char*)(CONFIG_SYS_DISP_CWORD)) = CWORD_CLEAR; - udelay(1000 * CLEAR_DELAY); + display_set(DISPLAY_CLEAR | DISPLAY_HOME); if (argc < 2) return (0); - for (pos = 0, i = 1; i < argc && pos < DISP_SIZE; i++) { - char *p = argv[i], c; + for (i = 1; i < argc; i++) { + char *p = argv[i]; - if (i > 1) { - *((volatile uchar *) (CONFIG_SYS_DISP_CHR_RAM + pos++)) = ' '; -#ifdef DEBUG_DISP - putc(' '); -#endif + if (i > 1) { /* Insert a space between strings */ + display_putc(' '); } - while ((c = *p++) != '\0' && pos < DISP_SIZE) { - *((volatile uchar *) (CONFIG_SYS_DISP_CHR_RAM + pos++)) = c; + while ((*p)) { #ifdef DEBUG_DISP - putc(c); + putc(*p); #endif + display_putc(*p++); } } diff --git a/common/cmd_flash.c b/common/cmd_flash.c index 2a02eb9..4493948 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -31,7 +31,7 @@ #include <dataflash.h> #endif -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) #include <jffs2/jffs2.h> /* partition handling routines */ @@ -327,7 +327,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) flash_info_t *info; ulong bank, addr_first, addr_last; int n, sect_first, sect_last; -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) struct mtd_device *dev; struct part_info *part; u8 dev_type, dev_num, pnum; @@ -357,7 +357,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return rcode; } -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) /* erase <part-id> - erase partition */ if ((argc == 2) && (mtd_id_parse(argv[1], NULL, &dev_type, &dev_num) == 0)) { mtdparts_init(); @@ -463,7 +463,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #if !defined(CONFIG_SYS_NO_FLASH) || defined(CONFIG_HAS_DATAFLASH) ulong addr_first, addr_last; #endif -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) struct mtd_device *dev; struct part_info *part; u8 dev_type, dev_num, pnum; @@ -553,7 +553,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return rcode; } -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) /* protect on/off <part-id> */ if ((argc == 3) && (mtd_id_parse(argv[2], NULL, &dev_type, &dev_num) == 0)) { mtdparts_init(); @@ -681,7 +681,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last) /**************************************************/ -#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_CMD_MTDPARTS) +#if defined(CONFIG_CMD_MTDPARTS) # define TMP_ERASE "erase <part-id>\n - erase partition\n" # define TMP_PROT_ON "protect on <part-id>\n - protect partition\n" # define TMP_PROT_OFF "protect off <part-id>\n - make partition writable\n" diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 44834ea..f7a442a 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -337,6 +337,10 @@ int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ngood++; addr1 += size; addr2 += size; + + /* reset watchdog from time to time */ + if ((count % (64 << 10)) == 0) + WATCHDOG_RESET(); } printf("Total of %ld %s%s were the same\n", @@ -447,6 +451,10 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) *((u_char *)dest) = *((u_char *)addr); addr += size; dest += size; + + /* reset watchdog from time to time */ + if ((count % (64 << 10)) == 0) + WATCHDOG_RESET(); } return 0; } diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c index ceec5a9..5481c88 100644 --- a/common/cmd_mtdparts.c +++ b/common/cmd_mtdparts.c @@ -15,6 +15,9 @@ * Parsing routines are based on driver/mtd/cmdline.c from the linux 2.4 * kernel tree. * + * (C) Copyright 2008 + * Harald Welte, OpenMoko, Inc., Harald Welte <laforge@openmoko.org> + * * $Id: cmdlinepart.c,v 1.17 2004/11/26 11:18:47 lavinen Exp $ * Copyright 2002 SYSGO Real-Time Solutions GmbH * @@ -286,6 +289,29 @@ static void current_save(void) index_partitions(); } + +/** + * Produce a mtd_info given a type and num. + * + * @param type mtd type + * @param num mtd number + * @param mtd a pointer to an mtd_info instance (output) + * @return 0 if device is valid, 1 otherwise + */ +static int get_mtd_info(u8 type, u8 num, struct mtd_info **mtd) +{ + char mtd_dev[16]; + + sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(type), num); + *mtd = get_mtd_device_nm(mtd_dev); + if (IS_ERR(*mtd)) { + printf("Device %s not found!\n", mtd_dev); + return 1; + } + + return 0; +} + /** * Performs sanity check for supplied flash partition. * Table of existing MTD flash devices is searched and partition device @@ -297,17 +323,12 @@ static void current_save(void) */ static int part_validate_eraseblock(struct mtdids *id, struct part_info *part) { - struct mtd_info *mtd; - char mtd_dev[16]; + struct mtd_info *mtd = NULL; int i, j; ulong start; - sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(id->type), id->num); - mtd = get_mtd_device_nm(mtd_dev); - if (IS_ERR(mtd)) { - printf("Partition %s not found on device %s!\n", part->name, mtd_dev); + if (get_mtd_info(id->type, id->num, &mtd)) return 1; - } part->sector_size = mtd->erasesize; @@ -684,20 +705,17 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i /** * Check device number to be within valid range for given device type. * - * @param dev device to validate + * @param type mtd type + * @param num mtd number + * @param size a pointer to the size of the mtd device (output) * @return 0 if device is valid, 1 otherwise */ int mtd_device_validate(u8 type, u8 num, u32 *size) { - struct mtd_info *mtd; - char mtd_dev[16]; + struct mtd_info *mtd = NULL; - sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(type), num); - mtd = get_mtd_device_nm(mtd_dev); - if (IS_ERR(mtd)) { - printf("Device %s not found!\n", mtd_dev); + if (get_mtd_info(type, num, &mtd)) return 1; - } *size = mtd->size; @@ -1200,38 +1218,93 @@ static int generate_mtdparts_save(char *buf, u32 buflen) return ret; } +#if defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) /** - * Format and print out a partition list for each device from global device - * list. + * Get the net size (w/o bad blocks) of the given partition. + * + * @param mtd the mtd info + * @param part the partition + * @return the calculated net size of this partition */ -static void list_partitions(void) +static uint64_t net_part_size(struct mtd_info *mtd, struct part_info *part) +{ + uint64_t i, net_size = 0; + + if (!mtd->block_isbad) + return part->size; + + for (i = 0; i < part->size; i += mtd->erasesize) { + if (!mtd->block_isbad(mtd, part->offset + i)) + net_size += mtd->erasesize; + } + + return net_size; +} +#endif + +static void print_partition_table(void) { struct list_head *dentry, *pentry; struct part_info *part; struct mtd_device *dev; int part_num; - debug("\n---list_partitions---\n"); list_for_each(dentry, &devices) { dev = list_entry(dentry, struct mtd_device, link); + /* list partitions for given device */ + part_num = 0; +#if defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) + struct mtd_info *mtd; + + if (get_mtd_info(dev->id->type, dev->id->num, &mtd)) + return; + + printf("\ndevice %s%d <%s>, # parts = %d\n", + MTD_DEV_TYPE(dev->id->type), dev->id->num, + dev->id->mtd_id, dev->num_parts); + printf(" #: name\t\tsize\t\tnet size\toffset\t\tmask_flags\n"); + + list_for_each(pentry, &dev->parts) { + u32 net_size; + char *size_note; + + part = list_entry(pentry, struct part_info, link); + net_size = net_part_size(mtd, part); + size_note = part->size == net_size ? " " : " (!)"; + printf("%2d: %-20s0x%08x\t0x%08x%s\t0x%08x\t%d\n", + part_num, part->name, part->size, + net_size, size_note, part->offset, + part->mask_flags); +#else /* !defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) */ printf("\ndevice %s%d <%s>, # parts = %d\n", MTD_DEV_TYPE(dev->id->type), dev->id->num, dev->id->mtd_id, dev->num_parts); printf(" #: name\t\tsize\t\toffset\t\tmask_flags\n"); - /* list partitions for given device */ - part_num = 0; list_for_each(pentry, &dev->parts) { part = list_entry(pentry, struct part_info, link); printf("%2d: %-20s0x%08x\t0x%08x\t%d\n", part_num, part->name, part->size, part->offset, part->mask_flags); - +#endif /* defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) */ part_num++; } } + if (list_empty(&devices)) printf("no partitions defined\n"); +} + +/** + * Format and print out a partition list for each device from global device + * list. + */ +static void list_partitions(void) +{ + struct part_info *part; + + debug("\n---list_partitions---\n"); + print_partition_table(); /* current_mtd_dev is not NULL only when we have non empty device list */ if (current_mtd_dev) { @@ -1355,6 +1428,101 @@ static int delete_partition(const char *id) return 1; } +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) +/** + * Increase the size of the given partition so that it's net size is at least + * as large as the size member and such that the next partition would start on a + * good block if it were adjacent to this partition. + * + * @param mtd the mtd device + * @param part the partition + * @param next_offset pointer to the offset of the next partition after this + * partition's size has been modified (output) + */ +static void spread_partition(struct mtd_info *mtd, struct part_info *part, + uint64_t *next_offset) +{ + uint64_t net_size, padding_size = 0; + int truncated; + + mtd_get_len_incl_bad(mtd, part->offset, part->size, &net_size, + &truncated); + + /* + * Absorb bad blocks immediately following this + * partition also into the partition, such that + * the next partition starts with a good block. + */ + if (!truncated) { + mtd_get_len_incl_bad(mtd, part->offset + net_size, + mtd->erasesize, &padding_size, &truncated); + if (truncated) + padding_size = 0; + else + padding_size -= mtd->erasesize; + } + + if (truncated) { + printf("truncated partition %s to %lld bytes\n", part->name, + (uint64_t) net_size + padding_size); + } + + part->size = net_size + padding_size; + *next_offset = part->offset + part->size; +} + +/** + * Adjust all of the partition sizes, such that all partitions are at least + * as big as their mtdparts environment variable sizes and they each start + * on a good block. + * + * @return 0 on success, 1 otherwise + */ +static int spread_partitions(void) +{ + struct list_head *dentry, *pentry; + struct mtd_device *dev; + struct part_info *part; + struct mtd_info *mtd; + int part_num; + uint64_t cur_offs; + + list_for_each(dentry, &devices) { + dev = list_entry(dentry, struct mtd_device, link); + + if (get_mtd_info(dev->id->type, dev->id->num, &mtd)) + return 1; + + part_num = 0; + cur_offs = 0; + list_for_each(pentry, &dev->parts) { + part = list_entry(pentry, struct part_info, link); + + debug("spread_partitions: device = %s%d, partition %d =" + " (%s) 0x%08x@0x%08x\n", + MTD_DEV_TYPE(dev->id->type), dev->id->num, + part_num, part->name, part->size, + part->offset); + + if (cur_offs > part->offset) + part->offset = cur_offs; + + spread_partition(mtd, part, &cur_offs); + + part_num++; + } + } + + index_partitions(); + + if (generate_mtdparts_save(last_parts, MTDPARTS_MAXLEN) != 0) { + printf("generated mtdparts too long, reseting to null\n"); + return 1; + } + return 0; +} +#endif /* CONFIG_CMD_MTDPARTS_SPREAD */ + /** * Accept character string describing mtd partitions and call device_parse() * for each entry. Add created devices to the global devices list. @@ -1782,9 +1950,13 @@ int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } /* mtdparts add <mtd-dev> <size>[@<offset>] <name> [ro] */ - if (((argc == 5) || (argc == 6)) && (strcmp(argv[1], "add") == 0)) { + if (((argc == 5) || (argc == 6)) && (strncmp(argv[1], "add", 3) == 0)) { #define PART_ADD_DESC_MAXLEN 64 char tmpbuf[PART_ADD_DESC_MAXLEN]; +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) + struct mtd_info *mtd; + uint64_t next_offset; +#endif u8 type, num, len; struct mtd_device *dev; struct mtd_device *dev_tmp; @@ -1819,15 +1991,25 @@ int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) debug("+ %s\t%d\t%s\n", MTD_DEV_TYPE(dev->id->type), dev->id->num, dev->id->mtd_id); - if ((dev_tmp = device_find(dev->id->type, dev->id->num)) == NULL) { + p = list_entry(dev->parts.next, struct part_info, link); + +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) + if (get_mtd_info(dev->id->type, dev->id->num, &mtd)) + return 1; + + if (!strcmp(&argv[1][3], ".spread")) { + spread_partition(mtd, p, &next_offset); + debug("increased %s to %d bytes\n", p->name, p->size); + } +#endif + + dev_tmp = device_find(dev->id->type, dev->id->num); + if (dev_tmp == NULL) { device_add(dev); - } else { + } else if (part_add(dev_tmp, p) != 0) { /* merge new partition with existing ones*/ - p = list_entry(dev->parts.next, struct part_info, link); - if (part_add(dev_tmp, p) != 0) { - device_del(dev); - return 1; - } + device_del(dev); + return 1; } if (generate_mtdparts_save(last_parts, MTDPARTS_MAXLEN) != 0) { @@ -1845,6 +2027,11 @@ int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return delete_partition(argv[2]); } +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) + if ((argc == 2) && (strcmp(argv[1], "spread") == 0)) + return spread_partitions(); +#endif /* CONFIG_CMD_MTDPARTS_SPREAD */ + return cmd_usage(cmdtp); } @@ -1867,8 +2054,20 @@ U_BOOT_CMD( " - delete partition (e.g. part-id = nand0,1)\n" "mtdparts add <mtd-dev> <size>[@<offset>] [<name>] [ro]\n" " - add partition\n" +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) + "mtdparts add.spread <mtd-dev> <size>[@<offset>] [<name>] [ro]\n" + " - add partition, padding size by skipping bad blocks\n" +#endif "mtdparts default\n" - " - reset partition table to defaults\n\n" + " - reset partition table to defaults\n" +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) + "mtdparts spread\n" + " - adjust the sizes of the partitions so they are\n" + " at least as big as the mtdparts variable specifies\n" + " and they each start on a good block\n\n" +#else + "\n" +#endif /* CONFIG_CMD_MTDPARTS_SPREAD */ "-----\n\n" "this command uses three environment variables:\n\n" "'partition' - keeps current partition identifier\n\n" diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 3f1d077..634d036 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -10,6 +10,13 @@ * (C) Copyright 2006-2007 OpenMoko, Inc. * Added 16-bit nand support * (C) 2004 Texas Instruments + * + * Copyright 2010 Freescale Semiconductor + * The portions of this file whose copyright is held by Freescale and which + * are not considered a derived work of GPL v2-only code may be distributed + * and/or modified under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. */ #include <common.h> @@ -30,10 +37,16 @@ int find_dev_and_part(const char *id, struct mtd_device **dev, u8 *part_num, struct part_info **part); #endif -static int nand_dump(nand_info_t *nand, ulong off, int only_oob) +static int nand_dump(nand_info_t *nand, ulong off, int only_oob, int repeat) { int i; u_char *datbuf, *oobbuf, *p; + static loff_t last; + + if (repeat) + off = last + nand->writesize; + + last = off; datbuf = malloc(nand->writesize + nand->oobsize); oobbuf = malloc(nand->oobsize); @@ -85,74 +98,132 @@ static int nand_dump(nand_info_t *nand, ulong off, int only_oob) /* ------------------------------------------------------------------------- */ -static inline int str2long(char *p, ulong *num) +static int set_dev(int dev) +{ + if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || + !nand_info[dev].name) { + puts("No such device\n"); + return -1; + } + + if (nand_curr_device == dev) + return 0; + + printf("Device %d: %s", dev, nand_info[dev].name); + puts("... is now current device\n"); + nand_curr_device = dev; + +#ifdef CONFIG_SYS_NAND_SELECT_DEVICE + board_nand_select_device(nand_info[dev].priv, dev); +#endif + + return 0; +} + +static inline int str2off(const char *p, loff_t *num) +{ + char *endptr; + + *num = simple_strtoull(p, &endptr, 16); + return *p != '\0' && *endptr == '\0'; +} + +static inline int str2long(const char *p, ulong *num) { char *endptr; *num = simple_strtoul(p, &endptr, 16); - return (*p != '\0' && *endptr == '\0') ? 1 : 0; + return *p != '\0' && *endptr == '\0'; } -static int -arg_off_size(int argc, char * const argv[], nand_info_t *nand, ulong *off, size_t *size) +static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size) { - int idx = nand_curr_device; -#if defined(CONFIG_CMD_MTDPARTS) +#ifdef CONFIG_CMD_MTDPARTS struct mtd_device *dev; struct part_info *part; u8 pnum; + int ret; - if (argc >= 1 && !(str2long(argv[0], off))) { - if ((mtdparts_init() == 0) && - (find_dev_and_part(argv[0], &dev, &pnum, &part) == 0)) { - if (dev->id->type != MTD_DEV_TYPE_NAND) { - puts("not a NAND device\n"); - return -1; - } - *off = part->offset; - if (argc >= 2) { - if (!(str2long(argv[1], (ulong *)size))) { - printf("'%s' is not a number\n", argv[1]); - return -1; - } - if (*size > part->size) - *size = part->size; - } else { - *size = part->size; - } - idx = dev->id->num; - *nand = nand_info[idx]; - goto out; - } + ret = mtdparts_init(); + if (ret) + return ret; + + ret = find_dev_and_part(partname, &dev, &pnum, &part); + if (ret) + return ret; + + if (dev->id->type != MTD_DEV_TYPE_NAND) { + puts("not a NAND device\n"); + return -1; } + + *off = part->offset; + *size = part->size; + *idx = dev->id->num; + + ret = set_dev(*idx); + if (ret) + return ret; + + return 0; +#else + puts("offset is not a number\n"); + return -1; #endif +} - if (argc >= 1) { - if (!(str2long(argv[0], off))) { - printf("'%s' is not a number\n", argv[0]); - return -1; - } - } else { +static int arg_off(const char *arg, int *idx, loff_t *off, loff_t *maxsize) +{ + if (!str2off(arg, off)) + return get_part(arg, idx, off, maxsize); + + if (*off >= nand_info[*idx].size) { + puts("Offset exceeds device limit\n"); + return -1; + } + + *maxsize = nand_info[*idx].size - *off; + return 0; +} + +static int arg_off_size(int argc, char *const argv[], int *idx, + loff_t *off, loff_t *size) +{ + int ret; + loff_t maxsize; + + if (argc == 0) { *off = 0; + *size = nand_info[*idx].size; + goto print; } - if (argc >= 2) { - if (!(str2long(argv[1], (ulong *)size))) { - printf("'%s' is not a number\n", argv[1]); - return -1; - } - } else { - *size = nand->size - *off; + ret = arg_off(argv[0], idx, off, &maxsize); + if (ret) + return ret; + + if (argc == 1) { + *size = maxsize; + goto print; } -#if defined(CONFIG_CMD_MTDPARTS) -out: -#endif - printf("device %d ", idx); - if (*size == nand->size) + if (!str2off(argv[1], size)) { + printf("'%s' is not a number\n", argv[1]); + return -1; + } + + if (*size > maxsize) { + puts("Size exceeds partition or device limit\n"); + return -1; + } + +print: + printf("device %d ", *idx); + if (*size == nand_info[*idx].size) puts("whole chip\n"); else - printf("offset 0x%lx, size 0x%zx\n", *off, *size); + printf("offset 0x%llx, size 0x%llx\n", + (unsigned long long)*off, (unsigned long long)*size); return 0; } @@ -200,14 +271,20 @@ static void do_nand_status(nand_info_t *nand) #ifdef CONFIG_ENV_OFFSET_OOB unsigned long nand_env_oob_offset; -int do_nand_env_oob(cmd_tbl_t *cmdtp, nand_info_t *nand, - int argc, char * const argv[]) +int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[]) { int ret; uint32_t oob_buf[ENV_OFFSET_SIZE/sizeof(uint32_t)]; - + nand_info_t *nand = &nand_info[0]; char *cmd = argv[1]; + if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !nand->name) { + puts("no devices available\n"); + return 1; + } + + set_dev(0); + if (!strcmp(cmd, "get")) { ret = get_nand_env_oob(nand, &nand_env_oob_offset); if (ret) @@ -215,16 +292,21 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, nand_info_t *nand, printf("0x%08lx\n", nand_env_oob_offset); } else if (!strcmp(cmd, "set")) { - ulong addr; - size_t dummy_size; + loff_t addr; + loff_t maxsize; struct mtd_oob_ops ops; + int idx = 0; if (argc < 3) goto usage; - if (arg_off_size(argc - 2, argv + 2, nand, &addr, - &dummy_size) < 0) { - printf("Offset or partition name expected\n"); + if (arg_off(argv[2], &idx, &addr, &maxsize)) { + puts("Offset or partition name expected\n"); + return 1; + } + + if (idx != 0) { + puts("Partition not on first NAND device\n"); return 1; } @@ -264,8 +346,8 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, nand_info_t *nand, if (addr != nand_env_oob_offset) { printf("Verification of env offset in OOB failed: " - "0x%08lx expected but got 0x%08lx\n", - addr, nand_env_oob_offset); + "0x%08llx expected but got 0x%08lx\n", + (unsigned long long)addr, nand_env_oob_offset); return 1; } } else { @@ -293,9 +375,9 @@ static void nand_print_info(int idx) int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { - int i, dev, ret = 0; - ulong addr, off; - size_t size; + int i, ret = 0; + ulong addr; + loff_t off, size; char *cmd, *s; nand_info_t *nand; #ifdef CONFIG_SYS_NAND_QUIET @@ -304,6 +386,8 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) int quiet = 0; #endif const char *quiet_str = getenv("quiet"); + int dev = nand_curr_device; + int repeat = flag & CMD_FLAG_REPEAT; /* at least two arguments please */ if (argc < 2) @@ -314,6 +398,10 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) cmd = argv[1]; + /* Only "dump" is repeatable. */ + if (repeat && strcmp(cmd, "dump")) + return 0; + if (strcmp(cmd, "info") == 0) { putc('\n'); @@ -325,68 +413,45 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) } if (strcmp(cmd, "device") == 0) { - if (argc < 3) { putc('\n'); - if ((nand_curr_device < 0) || - (nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE)) + if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE) puts("no devices available\n"); else - nand_print_info(nand_curr_device); + nand_print_info(dev); return 0; } - dev = (int)simple_strtoul(argv[2], NULL, 10); - if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[dev].name) { - puts("No such device\n"); - return 1; - } - printf("Device %d: %s", dev, nand_info[dev].name); - puts("... is now current device\n"); - nand_curr_device = dev; -#ifdef CONFIG_SYS_NAND_SELECT_DEVICE - /* - * Select the chip in the board/cpu specific driver - */ - board_nand_select_device(nand_info[dev].priv, dev); -#endif + dev = (int)simple_strtoul(argv[2], NULL, 10); + set_dev(dev); return 0; } - if (strcmp(cmd, "bad") != 0 && strcmp(cmd, "erase") != 0 && - strncmp(cmd, "dump", 4) != 0 && - strncmp(cmd, "read", 4) != 0 && strncmp(cmd, "write", 5) != 0 && - strcmp(cmd, "scrub") != 0 && strcmp(cmd, "markbad") != 0 && - strcmp(cmd, "biterr") != 0 && - strcmp(cmd, "lock") != 0 && strcmp(cmd, "unlock") != 0 -#ifdef CONFIG_ENV_OFFSET_OOB - && strcmp(cmd, "env.oob") != 0 -#endif - ) - goto usage; - #ifdef CONFIG_ENV_OFFSET_OOB /* this command operates only on the first nand device */ - if (strcmp(cmd, "env.oob") == 0) { - return do_nand_env_oob(cmdtp, &nand_info[0], - argc - 1, argv + 1); - } + if (strcmp(cmd, "env.oob") == 0) + return do_nand_env_oob(cmdtp, argc - 1, argv + 1); #endif - /* the following commands operate on the current device */ - if (nand_curr_device < 0 || nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE || - !nand_info[nand_curr_device].name) { + /* The following commands operate on the current device, unless + * overridden by a partition specifier. Note that if somehow the + * current device is invalid, it will have to be changed to a valid + * one before these commands can run, even if a partition specifier + * for another device is to be used. + */ + if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || + !nand_info[dev].name) { puts("\nno devices available\n"); return 1; } - nand = &nand_info[nand_curr_device]; + nand = &nand_info[dev]; if (strcmp(cmd, "bad") == 0) { - printf("\nDevice %d bad blocks:\n", nand_curr_device); + printf("\nDevice %d bad blocks:\n", dev); for (off = 0; off < nand->size; off += nand->erasesize) if (nand_block_isbad(nand, off)) - printf(" %08lx\n", off); + printf(" %08llx\n", (unsigned long long)off); return 0; } @@ -395,23 +460,52 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) * 0 1 2 3 4 * nand erase [clean] [off size] */ - if (strcmp(cmd, "erase") == 0 || strcmp(cmd, "scrub") == 0) { + if (strncmp(cmd, "erase", 5) == 0 || strncmp(cmd, "scrub", 5) == 0) { nand_erase_options_t opts; /* "clean" at index 2 means request to write cleanmarker */ int clean = argc > 2 && !strcmp("clean", argv[2]); int o = clean ? 3 : 2; - int scrub = !strcmp(cmd, "scrub"); + int scrub = !strncmp(cmd, "scrub", 5); + int part = 0; + int chip = 0; + int spread = 0; + int args = 2; + + if (cmd[5] != 0) { + if (!strcmp(&cmd[5], ".spread")) { + spread = 1; + } else if (!strcmp(&cmd[5], ".part")) { + part = 1; + args = 1; + } else if (!strcmp(&cmd[5], ".chip")) { + chip = 1; + args = 0; + } else { + goto usage; + } + } + + /* + * Don't allow missing arguments to cause full chip/partition + * erases -- easy to do accidentally, e.g. with a misspelled + * variable name. + */ + if (argc != o + args) + goto usage; - printf("\nNAND %s: ", scrub ? "scrub" : "erase"); + printf("\nNAND %s: ", cmd); /* skip first two or three arguments, look for offset and size */ - if (arg_off_size(argc - o, argv + o, nand, &off, &size) != 0) + if (arg_off_size(argc - o, argv + o, &dev, &off, &size) != 0) return 1; + nand = &nand_info[dev]; + memset(&opts, 0, sizeof(opts)); opts.offset = off; opts.length = size; opts.jffs2 = clean; opts.quiet = quiet; + opts.spread = spread; if (scrub) { puts("Warning: " @@ -449,19 +543,14 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) if (argc < 3) goto usage; - s = strchr(cmd, '.'); off = (int)simple_strtoul(argv[2], NULL, 16); - - if (s != NULL && strcmp(s, ".oob") == 0) - ret = nand_dump(nand, off, 1); - else - ret = nand_dump(nand, off, 0); + ret = nand_dump(nand, off, !strcmp(&cmd[4], ".oob"), repeat); return ret == 0 ? 1 : 0; - } if (strncmp(cmd, "read", 4) == 0 || strncmp(cmd, "write", 5) == 0) { + size_t rwsize; int read; if (argc < 4) @@ -471,23 +560,26 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) read = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */ printf("\nNAND %s: ", read ? "read" : "write"); - if (arg_off_size(argc - 3, argv + 3, nand, &off, &size) != 0) + if (arg_off_size(argc - 3, argv + 3, &dev, &off, &size) != 0) return 1; + nand = &nand_info[dev]; + rwsize = size; + s = strchr(cmd, '.'); if (!s || !strcmp(s, ".jffs2") || !strcmp(s, ".e") || !strcmp(s, ".i")) { if (read) - ret = nand_read_skip_bad(nand, off, &size, + ret = nand_read_skip_bad(nand, off, &rwsize, (u_char *)addr); else - ret = nand_write_skip_bad(nand, off, &size, + ret = nand_write_skip_bad(nand, off, &rwsize, (u_char *)addr); } else if (!strcmp(s, ".oob")) { /* out-of-band data */ mtd_oob_ops_t ops = { .oobbuf = (u8 *)addr, - .ooblen = size, + .ooblen = rwsize, .mode = MTD_OOB_RAW }; @@ -500,7 +592,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) return 1; } - printf(" %zu bytes %s: %s\n", size, + printf(" %zu bytes %s: %s\n", rwsize, read ? "read" : "written", ret ? "ERROR" : "OK"); return ret == 0 ? 0 : 1; @@ -561,10 +653,10 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) } if (strcmp(cmd, "unlock") == 0) { - if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0) + if (arg_off_size(argc - 2, argv + 2, &dev, &off, &size) < 0) return 1; - if (!nand_unlock(nand, off, size)) { + if (!nand_unlock(&nand_info[dev], off, size)) { puts("NAND flash successfully unlocked\n"); } else { puts("Error unlocking NAND flash, " @@ -588,11 +680,16 @@ U_BOOT_CMD( "nand write - addr off|partition size\n" " read/write 'size' bytes starting at offset 'off'\n" " to/from memory address 'addr', skipping bad blocks.\n" - "nand erase [clean] [off size] - erase 'size' bytes from\n" - " offset 'off' (entire device if not specified)\n" + "nand erase[.spread] [clean] [off [size]] - erase 'size' bytes " + "from offset 'off'\n" + " With '.spread', erase enough for given file size, otherwise,\n" + " 'size' includes skipped bad blocks.\n" + "nand erase.part [clean] partition - erase entire mtd partition'\n" + "nand erase.chip [clean] - erase entire chip'\n" "nand bad - show bad blocks\n" "nand dump[.oob] off - dump page\n" - "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n" + "nand scrub off size | scrub.part partition | scrub.chip\n" + " really clean NAND erasing bad blocks (UNSAFE)\n" "nand markbad off [...] - mark bad block(s) at offset (UNSAFE)\n" "nand biterr off - make a bit error at offset (UNSAFE)" #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK diff --git a/common/cmd_net.c b/common/cmd_net.c index 3ffb9df..44d17db 100644 --- a/common/cmd_net.c +++ b/common/cmd_net.c @@ -54,6 +54,7 @@ U_BOOT_CMD( "[loadAddress] [[hostIPaddr:]bootfilename]" ); +#ifdef CONFIG_CMD_RARP int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { return netboot_common (RARP, cmdtp, argc, argv); @@ -64,6 +65,7 @@ U_BOOT_CMD( "boot image via network using RARP/TFTP protocol", "[loadAddress] [[hostIPaddr:]bootfilename]" ); +#endif #if defined(CONFIG_CMD_DHCP) int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/common/cmd_tsi148.c b/common/cmd_tsi148.c index 1e83c88..6dc9dab 100644 --- a/common/cmd_tsi148.c +++ b/common/cmd_tsi148.c @@ -419,7 +419,7 @@ int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (argc > 5) vam = simple_strtoul(argv[5], NULL, 16); if (argc > 6) - vdw = simple_strtoul(argv[7], NULL, 16); + vdw = simple_strtoul(argv[6], NULL, 16); switch (cmd) { case 'c': @@ -465,7 +465,7 @@ int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } U_BOOT_CMD( - tsi148, 8, 1, do_tsi148, + tsi148, 7, 1, do_tsi148, "initialize and configure Turndra Tsi148\n", "init\n" " - initialize tsi148\n" diff --git a/common/dlmalloc.c b/common/dlmalloc.c index ae5702d..fce7a76 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -1152,7 +1152,7 @@ struct malloc_chunk INTERNAL_SIZE_T size; /* Size in bytes, including overhead. */ struct malloc_chunk* fd; /* double links -- used only if free. */ struct malloc_chunk* bk; -}; +} __attribute__((__may_alias__)) ; typedef struct malloc_chunk* mchunkptr; diff --git a/common/env_common.c b/common/env_common.c index 88f068c..5acda4d 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -237,8 +237,8 @@ void env_relocate (void) set_default_env(NULL); #else show_boot_progress (-60); -#endif set_default_env("!bad CRC"); +#endif } else { env_relocate_spec (); } diff --git a/common/env_mmc.c b/common/env_mmc.c index cc288d4..3d7fceb 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -29,6 +29,7 @@ #include <linux/stddef.h> #include <malloc.h> #include <mmc.h> +#include <errno.h> /* references to names in env_common.c */ extern uchar default_environment[]; @@ -96,13 +97,23 @@ inline int write_env(struct mmc *mmc, unsigned long size, int saveenv(void) { + env_t env_new; + ssize_t len; + char *res; struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); if (init_mmc_for_env(mmc)) return 1; + res = (char *)&env_new.data; + len = hexport('\0', &res, ENV_SIZE); + if (len < 0) { + error("Cannot export environment: errno = %d\n", errno); + return 1; + } + env_new.crc = crc32(0, env_new.data, ENV_SIZE); printf("Writing to MMC(%d)... ", CONFIG_SYS_MMC_ENV_DEV); - if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, env_ptr)) { + if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, (u_char *)&env_new)) { puts("failed\n"); return 1; } @@ -129,18 +140,21 @@ inline int read_env(struct mmc *mmc, unsigned long size, void env_relocate_spec(void) { #if !defined(ENV_IS_EMBEDDED) + char buf[CONFIG_ENV_SIZE]; + struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); - if (init_mmc_for_env(mmc)) + if (init_mmc_for_env(mmc)) { + use_default(); return; + } - if (read_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, env_ptr)) - return use_default(); - - if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) - return use_default(); + if (read_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) { + use_default(); + return; + } - gd->env_valid = 1; + env_import(buf, 1); #endif } diff --git a/common/fdt_support.c b/common/fdt_support.c index 0ed6e77..90e9097 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -362,10 +362,40 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat, do_fixup_by_compat(fdt, compat, prop, &val, 4, create); } -int fdt_fixup_memory(void *blob, u64 start, u64 size) +/* + * Get cells len in bytes + * if #NNNN-cells property is 2 then len is 8 + * otherwise len is 4 + */ +static int get_cells_len(void *blob, char *nr_cells_name) { - int err, nodeoffset, len = 0; - u8 tmp[16]; + const u32 *cell; + + cell = fdt_getprop(blob, 0, nr_cells_name, NULL); + if (cell && *cell == 2) + return 8; + + return 4; +} + +/* + * Write a 4 or 8 byte big endian cell + */ +static void write_cell(u8 *addr, u64 val, int size) +{ + int shift = (size - 1) * 8; + while (size-- > 0) { + *addr++ = (val >> shift) & 0xff; + shift -= 8; + } +} + +int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) +{ + int err, nodeoffset; + int addr_cell_len, size_cell_len, len; + u8 tmp[banks * 8]; + int bank; const u32 *addrcell, *sizecell; err = fdt_check_header(blob); @@ -391,44 +421,15 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size) return err; } - addrcell = fdt_getprop(blob, 0, "#address-cells", NULL); - /* use shifts and mask to ensure endianness */ - if ((addrcell) && (*addrcell == 2)) { - tmp[0] = (start >> 56) & 0xff; - tmp[1] = (start >> 48) & 0xff; - tmp[2] = (start >> 40) & 0xff; - tmp[3] = (start >> 32) & 0xff; - tmp[4] = (start >> 24) & 0xff; - tmp[5] = (start >> 16) & 0xff; - tmp[6] = (start >> 8) & 0xff; - tmp[7] = (start ) & 0xff; - len = 8; - } else { - tmp[0] = (start >> 24) & 0xff; - tmp[1] = (start >> 16) & 0xff; - tmp[2] = (start >> 8) & 0xff; - tmp[3] = (start ) & 0xff; - len = 4; - } + addr_cell_len = get_cells_len(blob, "#address-cells"); + size_cell_len = get_cells_len(blob, "#size-cells"); - sizecell = fdt_getprop(blob, 0, "#size-cells", NULL); - /* use shifts and mask to ensure endianness */ - if ((sizecell) && (*sizecell == 2)) { - tmp[0+len] = (size >> 56) & 0xff; - tmp[1+len] = (size >> 48) & 0xff; - tmp[2+len] = (size >> 40) & 0xff; - tmp[3+len] = (size >> 32) & 0xff; - tmp[4+len] = (size >> 24) & 0xff; - tmp[5+len] = (size >> 16) & 0xff; - tmp[6+len] = (size >> 8) & 0xff; - tmp[7+len] = (size ) & 0xff; - len += 8; - } else { - tmp[0+len] = (size >> 24) & 0xff; - tmp[1+len] = (size >> 16) & 0xff; - tmp[2+len] = (size >> 8) & 0xff; - tmp[3+len] = (size ) & 0xff; - len += 4; + for (bank = 0, len = 0; bank < banks; bank++) { + write_cell(tmp + len, start[bank], addr_cell_len); + len += addr_cell_len; + + write_cell(tmp + len, size[bank], size_cell_len); + len += size_cell_len; } err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); @@ -440,6 +441,11 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size) return 0; } +int fdt_fixup_memory(void *blob, u64 start, u64 size) +{ + return fdt_fixup_memory_banks(blob, &start, &size, 1); +} + void fdt_fixup_ethernet(void *fdt) { int node, i, j; @@ -667,6 +673,16 @@ int fdt_fixup_nor_flash_size(void *blob) } #endif +int fdt_increase_size(void *fdt, int add_len) +{ + int newlen; + + newlen = fdt_totalsize(fdt) + add_len; + + /* Open in place with a new len */ + return fdt_open_into(fdt, fdt, newlen); +} + #ifdef CONFIG_FDT_FIXUP_PARTITIONS #include <jffs2/load_kernel.h> #include <mtd_node.h> @@ -701,16 +717,6 @@ int fdt_del_subnodes(const void *blob, int parent_offset) return 0; } -int fdt_increase_size(void *fdt, int add_len) -{ - int newlen; - - newlen = fdt_totalsize(fdt) + add_len; - - /* Open in place with a new len */ - return fdt_open_into(fdt, fdt, newlen); -} - int fdt_del_partitions(void *blob, int parent_offset) { const void *prop; @@ -1189,3 +1195,32 @@ int fdt_alloc_phandle(void *blob) return phandle + 1; } + +#if defined(CONFIG_VIDEO) +int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) +{ + int noff; + int ret; + + noff = fdt_node_offset_by_compatible(blob, -1, compat); + if (noff != -FDT_ERR_NOTFOUND) { + debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); +add_edid: + ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); + if (ret == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(blob, 512); + if (!ret) + goto add_edid; + else + goto err_size; + } else if (ret < 0) { + printf("Can't add property: %s\n", fdt_strerror(ret)); + return ret; + } + } + return 0; +err_size: + printf("Can't increase blob size: %s\n", fdt_strerror(ret)); + return ret; +} +#endif diff --git a/common/image.c b/common/image.c index 3a2f25e..385464d 100644 --- a/common/image.c +++ b/common/image.c @@ -992,7 +992,7 @@ int boot_get_ramdisk (int argc, char * const argv[], bootm_headers_t *images, return 0; } -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) +#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH /** * boot_ramdisk_high - relocate init ramdisk * @lmb: pointer to lmb handle, will be used for memory mgmt @@ -1081,7 +1081,7 @@ int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len, error: return -1; } -#endif /* defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) */ +#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */ #ifdef CONFIG_OF_LIBFDT static void fdt_error (const char *msg) @@ -1252,7 +1252,7 @@ int boot_relocate_fdt (struct lmb *lmb, ulong bootmap_base, *of_size = of_len; } else { *of_flat_tree = fdt_blob; - of_len = (CONFIG_SYS_BOOTMAPSZ + bootmap_base) - (ulong)fdt_blob; + of_len = *of_size + CONFIG_SYS_FDT_PAD; lmb_reserve(lmb, (ulong)fdt_blob, of_len); fdt_set_totalsize(*of_flat_tree, of_len); @@ -1561,7 +1561,7 @@ int boot_get_fdt (int flag, int argc, char * const argv[], bootm_headers_t *imag goto error; } - if (be32_to_cpu (fdt_totalsize (fdt_blob)) != fdt_len) { + if (fdt_totalsize(fdt_blob) != fdt_len) { fdt_error ("fdt size != image size"); goto error; } @@ -1575,7 +1575,7 @@ int boot_get_fdt (int flag, int argc, char * const argv[], bootm_headers_t *imag } *of_flat_tree = fdt_blob; - *of_size = be32_to_cpu (fdt_totalsize (fdt_blob)); + *of_size = fdt_totalsize(fdt_blob); debug (" of_flat_tree at 0x%08lx size 0x%08lx\n", (ulong)*of_flat_tree, *of_size); @@ -1588,7 +1588,7 @@ error: } #endif /* CONFIG_OF_LIBFDT */ -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) +#ifdef CONFIG_SYS_BOOT_GET_CMDLINE /** * boot_get_cmdline - allocate and initialize kernel cmdline * @lmb: pointer to lmb handle, will be used for memory mgmt @@ -1630,7 +1630,9 @@ int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, ulong *cmd_end, return 0; } +#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */ +#ifdef CONFIG_SYS_BOOT_GET_KBD /** * boot_get_kbd - allocate and initialize kernel copy of board info * @lmb: pointer to lmb handle, will be used for memory mgmt @@ -1663,7 +1665,7 @@ int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong bootmap_base) return 0; } -#endif /* CONFIG_PPC || CONFIG_M68K */ +#endif /* CONFIG_SYS_BOOT_GET_KBD */ #endif /* !USE_HOSTCC */ #if defined(CONFIG_FIT) diff --git a/common/usb_storage.c b/common/usb_storage.c index 76949b8..613c4f0 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -204,6 +204,22 @@ int usb_stor_info(void) return 1; } +static unsigned int usb_get_max_lun(struct us_data *us) +{ + int len; + unsigned char result; + len = usb_control_msg(us->pusb_dev, + usb_rcvctrlpipe(us->pusb_dev, 0), + US_BBB_GET_MAX_LUN, + USB_TYPE_CLASS | USB_RECIP_INTERFACE | USB_DIR_IN, + 0, us->ifnum, + &result, sizeof(result), + USB_CNTL_TIMEOUT * 5); + USB_STOR_PRINTF("Get Max LUN -> len = %i, result = %i\n", + len, (int) result); + return (len > 0) ? result : 0; +} + /******************************************************************************* * scan the usb and reports device info * to the user if mode = 1 @@ -241,13 +257,22 @@ int usb_stor_scan(int mode) break; /* no more devices avaiable */ if (usb_storage_probe(dev, 0, &usb_stor[usb_max_devs])) { - /* ok, it is a storage devices - * get info and fill it in + /* OK, it's a storage device. Iterate over its LUNs + * and populate `usb_dev_desc'. */ - if (usb_stor_get_info(dev, &usb_stor[usb_max_devs], - &usb_dev_desc[usb_max_devs]) == 1) + int lun, max_lun, start = usb_max_devs; + + max_lun = usb_get_max_lun(&usb_stor[usb_max_devs]); + for (lun = 0; + lun <= max_lun && usb_max_devs < USB_MAX_STOR_DEV; + lun++) { + usb_dev_desc[usb_max_devs].lun = lun; + if (usb_stor_get_info(dev, &usb_stor[start], + &usb_dev_desc[usb_max_devs]) == 1) { usb_max_devs++; } + } + } /* if storage device */ if (usb_max_devs == USB_MAX_STOR_DEV) { printf("max USB Storage Device reached: %d stopping\n", @@ -882,6 +907,7 @@ static int usb_inquiry(ccb *srb, struct us_data *ss) do { memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_INQUIRY; + srb->cmd[1] = srb->lun << 5; srb->cmd[4] = 36; srb->datalen = 36; srb->cmdlen = 12; @@ -905,6 +931,7 @@ static int usb_request_sense(ccb *srb, struct us_data *ss) ptr = (char *)srb->pdata; memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_REQ_SENSE; + srb->cmd[1] = srb->lun << 5; srb->cmd[4] = 18; srb->datalen = 18; srb->pdata = &srb->sense_buf[0]; @@ -924,6 +951,7 @@ static int usb_test_unit_ready(ccb *srb, struct us_data *ss) do { memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_TST_U_RDY; + srb->cmd[1] = srb->lun << 5; srb->datalen = 0; srb->cmdlen = 12; if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD) @@ -943,6 +971,7 @@ static int usb_read_capacity(ccb *srb, struct us_data *ss) do { memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_RD_CAPAC; + srb->cmd[1] = srb->lun << 5; srb->datalen = 8; srb->cmdlen = 12; if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD) @@ -957,6 +986,7 @@ static int usb_read_10(ccb *srb, struct us_data *ss, unsigned long start, { memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_READ10; + srb->cmd[1] = srb->lun << 5; srb->cmd[2] = ((unsigned char) (start >> 24)) & 0xff; srb->cmd[3] = ((unsigned char) (start >> 16)) & 0xff; srb->cmd[4] = ((unsigned char) (start >> 8)) & 0xff; @@ -973,6 +1003,7 @@ static int usb_write_10(ccb *srb, struct us_data *ss, unsigned long start, { memset(&srb->cmd[0], 0, 12); srb->cmd[0] = SCSI_WRITE10; + srb->cmd[1] = srb->lun << 5; srb->cmd[2] = ((unsigned char) (start >> 24)) & 0xff; srb->cmd[3] = ((unsigned char) (start >> 16)) & 0xff; srb->cmd[4] = ((unsigned char) (start >> 8)) & 0xff; @@ -166,8 +166,8 @@ gccincdir := $(shell $(CC) -print-file-name=include) CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \ -D__KERNEL__ -ifneq ($(TEXT_BASE),) -CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) +ifneq ($(CONFIG_SYS_TEXT_BASE),) +CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) endif ifneq ($(RESET_VECTOR_ADDRESS),) @@ -205,8 +205,8 @@ endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) LDFLAGS += -Bstatic -T $(obj)u-boot.lds $(PLATFORM_LDFLAGS) -ifneq ($(TEXT_BASE),) -LDFLAGS += -Ttext $(TEXT_BASE) +ifneq ($(CONFIG_SYS_TEXT_BASE),) +LDFLAGS += -Ttext $(CONFIG_SYS_TEXT_BASE) endif # Location of a usable BFD library, where we define "usable" as @@ -236,7 +236,7 @@ endif export HOSTCC HOSTCFLAGS HOSTLDFLAGS PEDCFLAGS HOSTSTRIP CROSS_COMPILE \ AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE -export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS +export CONFIG_SYS_TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS ######################################################################### diff --git a/doc/README.ARM-memory-map b/doc/README.ARM-memory-map index e2c4e16..1b120ac 100644 --- a/doc/README.ARM-memory-map +++ b/doc/README.ARM-memory-map @@ -9,8 +9,8 @@ To: Wolfgang Denk <wd@denx.de> > >How are they (should they be) set in your memory map above? -_armboot_start contains the value of TEXT_BASE (0xA07E0000); it seems -TEXT_BASE and _armboot_start are both used for the same purpose in +_armboot_start contains the value of CONFIG_SYS_TEXT_BASE (0xA07E0000); it seems +CONFIG_SYS_TEXT_BASE and _armboot_start are both used for the same purpose in different parts of the (ARM) code. Furthermore, the startup code (cpu/<arm>/start.S) internally uses another variable (_TEXT_BASE) with the same content as _armboot_start. diff --git a/doc/README.COBRA5272 b/doc/README.COBRA5272 index 2d3f706..ae0f148 100644 --- a/doc/README.COBRA5272 +++ b/doc/README.COBRA5272 @@ -89,9 +89,9 @@ please first check: => u-boot as single bootloader starting from flash - in board/cobra5272/config.mk TEXT_BASE should be + in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be - TEXT_BASE = 0xffe00000 + CONFIG_SYS_TEXT_BASE = 0xffe00000 => linking address for u-boot as single bootloader stored in flash @@ -128,9 +128,9 @@ please modify the settings: => u-boot as RAM version, chainloaded by another bootloader or using bdm cable - in board/cobra5272/config.mk TEXT_BASE should be + in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be - TEXT_BASE = 0x00020000 + CONFIG_SYS_TEXT_BASE = 0x00020000 => target linking address for RAM diff --git a/doc/README.LED_display b/doc/README.LED_display new file mode 100644 index 0000000..521746e --- /dev/null +++ b/doc/README.LED_display @@ -0,0 +1,27 @@ +LED display internal API +======================================= + +This README describes the LED display API. + +The API is defined by the include file include/led-display.h + +The first step in to define CONFIG_CMD_DISPLAY in the board config file. +Then you need to provide the following functions to access LED display: + +void display_set(int cmd); + +This function should control the state of the LED display. Argument is +an ORed combination of the following values: + DISPLAY_CLEAR -- clear the display + DISPLAY_HOME -- set the position to the beginning of display + DISPLAY_MARK -- enable mark (decimal point), if implemented + +int display_putc(char c); + +This function should display it's parameter on the LED display in the +current position. Returns the displayed character on success or -1 in +case of failure. + +With this functions defined 'display' command will display it's +arguments on the LED display (or clear the display if called without +arguments). diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation index b46347b..8d328e0 100644 --- a/doc/README.arm-relocation +++ b/doc/README.arm-relocation @@ -49,7 +49,7 @@ disappear and boards which have to migrated to relocation will disappear too. ----------------------------------------------------------------------------- For boards which boot from nand_spl, it is possible to save one copy -if TEXT_BASE == relocation address! This prevents that uboot code +if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code is copied again in relocate_code(). example for the tx25 board: @@ -66,7 +66,7 @@ e) there it copy u-boot to CONFIG_SYS_NAND_U_BOOT_DST and f) u-boot code steps through board_init_f() and calculates the relocation address and copy itself to it -If TEXT_BASE == relocation address, the copying of u-boot +If CONFIG_SYS_TEXT_BASE == relocation address, the copying of u-boot in f) could be saved. ----------------------------------------------------------------------------- @@ -76,10 +76,10 @@ TODO - fill in bd_t infos (check) - adapt all boards -- maybe adapt TEXT_BASE (this must be checked from board maintainers) +- maybe adapt CONFIG_SYS_TEXT_BASE (this must be checked from board maintainers) This *must* be done for boards, which boot from NOR flash - on other boards if TEXT_BASE = relocation baseaddr, this saves + on other boards if CONFIG_SYS_TEXT_BASE = relocation baseaddr, this saves one copying from u-boot code. - new function dram_init_banksize() is actual board specific. Maybe @@ -93,13 +93,13 @@ Relocation with NAND_SPL (example for the tx25): and start with code execution on this address. - The First page contains u-boot code from u-boot:nand_spl/nand_boot_fsl_nfc.c - which inits the dram, cpu registers, reloacte itself to TEXT_BASE and loads + which inits the dram, cpu registers, reloacte itself to CONFIG_SYS_TEXT_BASE and loads the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution @CONFIG_SYS_NAND_U_BOOT_START - This u-boot does no ram int, nor cpu register setup. Just looks where it have to relocate and relocate itself to this address. - If relocate address = TEXT_BASE(not the same, as the TEXT_BASE + If relocate address = CONFIG_SYS_TEXT_BASE(not the same, as the TEXT_BASE from the nand_spl code), no need to copy, just go on with bss clear and jump to board_init_r. diff --git a/doc/README.korat b/doc/README.korat index a753f84..e059f78 100644 --- a/doc/README.korat +++ b/doc/README.korat @@ -36,8 +36,8 @@ sufficient that the upgradable U-Boot can be started by a branch to 0xF7FBFFFC. The build sequence: - make korat_config - make all perm=1 + make korat_perm_config + make all builds the permanent U-Boot by selecting loader file "u-boot.lds" and defining preprocessor symbol "CONFIG_KORAT_PERMANENT". The default build: @@ -45,7 +45,7 @@ preprocessor symbol "CONFIG_KORAT_PERMANENT". The default build: make korat_config make all -creates the upgradable U-Boot but selecting loader file "u-boot-F7FC.lds" and +creates the upgradable U-Boot by selecting loader file "u-boot-F7FC.lds" and leaving preprocessor symbol "CONFIG_KORAT_PERMANENT" undefined. 2008-02-22, Larry Johnson <lrj@acm.org> diff --git a/doc/README.m68k b/doc/README.m68k index a00ab69..3766b33 100644 --- a/doc/README.m68k +++ b/doc/README.m68k @@ -72,7 +72,7 @@ For the preloader, please see http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html U-boot is configured to run at 0x20000 at default. This can be configured by -change TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in +change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in include/configs/M5282EVB.h. 3.2 BuS EB+MCF-EV123 @@ -96,7 +96,7 @@ CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the initial vector table and basic processor initialization will not be compiled in. The start address of u-boot must be adjusted in the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile -(TEXT_BASE) to the load address. +(CONFIG_SYS_TEXT_BASE) to the load address. 4.1 MCF5272 specific Options/Settings ------------------------------------- diff --git a/doc/README.phytec.pcm030 b/doc/README.phytec.pcm030 index 29b7637..05faab6 100644 --- a/doc/README.phytec.pcm030 +++ b/doc/README.phytec.pcm030 @@ -5,11 +5,11 @@ pcm030_RAMBOOT_config \ pcm030_LOWBOOT_config: unconfig @ >include/config.h @[ -z "$(findstring LOWBOOT_,$@)" ] || \ - { echo "TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \ + { echo "CONFIG_SYS_TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \ echo "... with LOWBOOT configuration" ; \ } @[ -z "$(findstring RAMBOOT_,$@)" ] || \ - { echo "TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\ + { echo "CONFIG_SYS_TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\ config.tmp ; \ echo "... with RAMBOOT configuration" ; \ echo "... remember to make sure that MBAR is already \ diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 52d8e24..9ecdc5e 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -31,6 +31,7 @@ COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o +COBJS-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o ifdef CONFIG_FPGA_ALTERA COBJS-y += altera.o COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 5659517..a669039 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -28,6 +28,7 @@ #include <common.h> /* core U-Boot definitions */ #include <xilinx.h> /* xilinx specific definitions */ #include <altera.h> /* altera specific definitions */ +#include <lattice.h> #if 0 #define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */ @@ -139,6 +140,14 @@ static int fpga_dev_info( int devnum ) fpga_no_sup( (char *)__FUNCTION__, "Altera devices" ); #endif break; + case fpga_lattice: +#if defined(CONFIG_FPGA_LATTICE) + printf("Lattice Device\nDescriptor @ 0x%p\n", desc); + ret_val = lattice_info(desc->devdesc); +#else + fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" ); +#endif + break; default: printf( "%s: Invalid or unsupported device type %d\n", __FUNCTION__, desc->devtype ); @@ -224,6 +233,13 @@ int fpga_load( int devnum, void *buf, size_t bsize ) fpga_no_sup( (char *)__FUNCTION__, "Altera devices" ); #endif break; + case fpga_lattice: +#if defined(CONFIG_FPGA_LATTICE) + ret_val = lattice_load(desc->devdesc, buf, bsize); +#else + fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" ); +#endif + break; default: printf( "%s: Invalid or unsupported device type %d\n", __FUNCTION__, desc->devtype ); @@ -257,6 +273,13 @@ int fpga_dump( int devnum, void *buf, size_t bsize ) fpga_no_sup( (char *)__FUNCTION__, "Altera devices" ); #endif break; + case fpga_lattice: +#if defined(CONFIG_FPGA_LATTICE) + ret_val = lattice_dump(desc->devdesc, buf, bsize); +#else + fpga_no_sup( (char *)__FUNCTION__, "Lattice devices" ); +#endif + break; default: printf( "%s: Invalid or unsupported device type %d\n", __FUNCTION__, desc->devtype ); diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c new file mode 100755 index 0000000..2b5a485 --- /dev/null +++ b/drivers/fpga/ivm_core.c @@ -0,0 +1,3167 @@ +/* + * Porting to u-boot: + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Lattice ispVME Embedded code to load Lattice's FPGA: + * + * Copyright 2009 Lattice Semiconductor Corp. + * + * ispVME Embedded allows programming of Lattice's suite of FPGA + * devices on embedded systems through the JTAG port. The software + * is distributed in source code form and is open to re - distribution + * and modification where applicable. + * + * Revision History of ivm_core.c module: + * 4/25/06 ht Change some variables from unsigned short or int + * to long int to make the code compiler independent. + * 5/24/06 ht Support using RESET (TRST) pin as a special purpose + * control pin such as triggering the loading of known + * state exit. + * 3/6/07 ht added functions to support output to terminals + * + * 09/11/07 NN Type cast mismatch variables + * Moved the sclock() function to hardware.c + * 08/28/08 NN Added Calculate checksum support. + * 4/1/09 Nguyen replaced the recursive function call codes on + * the ispVMLCOUNT function + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <linux/string.h> +#include <malloc.h> +#include <lattice.h> + +#define vme_out_char(c) printf("%c", c) +#define vme_out_hex(c) printf("%x", c) +#define vme_out_string(s) printf("%s", s) + +/* + * + * Global variables used to specify the flow control and data type. + * + * g_usFlowControl: flow control register. Each bit in the + * register can potentially change the + * personality of the embedded engine. + * g_usDataType: holds the data type of the current row. + * + */ + +static unsigned short g_usFlowControl; +unsigned short g_usDataType; + +/* + * + * Global variables used to specify the ENDDR and ENDIR. + * + * g_ucEndDR: the state that the device goes to after SDR. + * g_ucEndIR: the state that the device goes to after SIR. + * + */ + +unsigned char g_ucEndDR = DRPAUSE; +unsigned char g_ucEndIR = IRPAUSE; + +/* + * + * Global variables used to support header/trailer. + * + * g_usHeadDR: the number of lead devices in bypass. + * g_usHeadIR: the sum of IR length of lead devices. + * g_usTailDR: the number of tail devices in bypass. + * g_usTailIR: the sum of IR length of tail devices. + * + */ + +static unsigned short g_usHeadDR; +static unsigned short g_usHeadIR; +static unsigned short g_usTailDR; +static unsigned short g_usTailIR; + +/* + * + * Global variable to store the number of bits of data or instruction + * to be shifted into or out from the device. + * + */ + +static unsigned short g_usiDataSize; + +/* + * + * Stores the frequency. Default to 1 MHz. + * + */ + +static int g_iFrequency = 1000; + +/* + * + * Stores the maximum amount of ram needed to hold a row of data. + * + */ + +static unsigned short g_usMaxSize; + +/* + * + * Stores the LSH or RSH value. + * + */ + +static unsigned short g_usShiftValue; + +/* + * + * Stores the current repeat loop value. + * + */ + +static unsigned short g_usRepeatLoops; + +/* + * + * Stores the current vendor. + * + */ + +static signed char g_cVendor = LATTICE; + +/* + * + * Stores the VME file CRC. + * + */ + +unsigned short g_usCalculatedCRC; + +/* + * + * Stores the Device Checksum. + * + */ +/* 08/28/08 NN Added Calculate checksum support. */ +unsigned long g_usChecksum; +static unsigned int g_uiChecksumIndex; + +/* + * + * Stores the current state of the JTAG state machine. + * + */ + +static signed char g_cCurrentJTAGState; + +/* + * + * Global variables used to support looping. + * + * g_pucHeapMemory: holds the entire repeat loop. + * g_iHeapCounter: points to the current byte in the repeat loop. + * g_iHEAPSize: the current size of the repeat in bytes. + * + */ + +unsigned char *g_pucHeapMemory; +unsigned short g_iHeapCounter; +unsigned short g_iHEAPSize; +static unsigned short previous_size; + +/* + * + * Global variables used to support intelligent programming. + * + * g_usIntelDataIndex: points to the current byte of the + * intelligent buffer. + * g_usIntelBufferSize: holds the size of the intelligent + * buffer. + * + */ + +unsigned short g_usIntelDataIndex; +unsigned short g_usIntelBufferSize; + +/* + * + * Supported VME versions. + * + */ + +const char *const g_szSupportedVersions[] = { + "__VME2.0", "__VME3.0", "____12.0", "____12.1", 0}; + +/* + * + * Holds the maximum size of each respective buffer. These variables are used + * to write the HEX files when converting VME to HEX. + * +*/ + +static unsigned short g_usTDOSize; +static unsigned short g_usMASKSize; +static unsigned short g_usTDISize; +static unsigned short g_usDMASKSize; +static unsigned short g_usLCOUNTSize; +static unsigned short g_usHDRSize; +static unsigned short g_usTDRSize; +static unsigned short g_usHIRSize; +static unsigned short g_usTIRSize; +static unsigned short g_usHeapSize; + +/* + * + * Global variables used to store data. + * + * g_pucOutMaskData: local RAM to hold one row of MASK data. + * g_pucInData: local RAM to hold one row of TDI data. + * g_pucOutData: local RAM to hold one row of TDO data. + * g_pucHIRData: local RAM to hold the current SIR header. + * g_pucTIRData: local RAM to hold the current SIR trailer. + * g_pucHDRData: local RAM to hold the current SDR header. + * g_pucTDRData: local RAM to hold the current SDR trailer. + * g_pucIntelBuffer: local RAM to hold the current intelligent buffer + * g_pucOutDMaskData: local RAM to hold one row of DMASK data. + * + */ + +unsigned char *g_pucOutMaskData = NULL, + *g_pucInData = NULL, + *g_pucOutData = NULL, + *g_pucHIRData = NULL, + *g_pucTIRData = NULL, + *g_pucHDRData = NULL, + *g_pucTDRData = NULL, + *g_pucIntelBuffer = NULL, + *g_pucOutDMaskData = NULL; + +/* + * + * JTAG state machine transition table. + * + */ + +struct { + unsigned char CurState; /* From this state */ + unsigned char NextState; /* Step to this state */ + unsigned char Pattern; /* The tragetory of TMS */ + unsigned char Pulses; /* The number of steps */ +} g_JTAGTransistions[25] = { +{ RESET, RESET, 0xFC, 6 }, /* Transitions from RESET */ +{ RESET, IDLE, 0x00, 1 }, +{ RESET, DRPAUSE, 0x50, 5 }, +{ RESET, IRPAUSE, 0x68, 6 }, +{ IDLE, RESET, 0xE0, 3 }, /* Transitions from IDLE */ +{ IDLE, DRPAUSE, 0xA0, 4 }, +{ IDLE, IRPAUSE, 0xD0, 5 }, +{ DRPAUSE, RESET, 0xF8, 5 }, /* Transitions from DRPAUSE */ +{ DRPAUSE, IDLE, 0xC0, 3 }, +{ DRPAUSE, IRPAUSE, 0xF4, 7 }, +{ DRPAUSE, DRPAUSE, 0xE8, 6 },/* 06/14/06 Support POLL STATUS LOOP*/ +{ IRPAUSE, RESET, 0xF8, 5 }, /* Transitions from IRPAUSE */ +{ IRPAUSE, IDLE, 0xC0, 3 }, +{ IRPAUSE, DRPAUSE, 0xE8, 6 }, +{ DRPAUSE, SHIFTDR, 0x80, 2 }, /* Extra transitions using SHIFTDR */ +{ IRPAUSE, SHIFTDR, 0xE0, 5 }, +{ SHIFTDR, DRPAUSE, 0x80, 2 }, +{ SHIFTDR, IDLE, 0xC0, 3 }, +{ IRPAUSE, SHIFTIR, 0x80, 2 },/* Extra transitions using SHIFTIR */ +{ SHIFTIR, IRPAUSE, 0x80, 2 }, +{ SHIFTIR, IDLE, 0xC0, 3 }, +{ DRPAUSE, DRCAPTURE, 0xE0, 4 }, /* 11/15/05 Support DRCAPTURE*/ +{ DRCAPTURE, DRPAUSE, 0x80, 2 }, +{ IDLE, DRCAPTURE, 0x80, 2 }, +{ IRPAUSE, DRCAPTURE, 0xE0, 4 } +}; + +/* + * + * List to hold all LVDS pairs. + * + */ + +LVDSPair *g_pLVDSList; +unsigned short g_usLVDSPairCount; + +/* + * + * Function prototypes. + * + */ + +static signed char ispVMDataCode(void); +static long int ispVMDataSize(void); +static void ispVMData(unsigned char *Data); +static signed char ispVMShift(signed char Code); +static signed char ispVMAmble(signed char Code); +static signed char ispVMLoop(unsigned short a_usLoopCount); +static signed char ispVMBitShift(signed char mode, unsigned short bits); +static void ispVMComment(unsigned short a_usCommentSize); +static void ispVMHeader(unsigned short a_usHeaderSize); +static signed char ispVMLCOUNT(unsigned short a_usCountSize); +static void ispVMClocks(unsigned short Clocks); +static void ispVMBypass(signed char ScanType, unsigned short Bits); +static void ispVMStateMachine(signed char NextState); +static signed char ispVMSend(unsigned short int); +static signed char ispVMRead(unsigned short int); +static signed char ispVMReadandSave(unsigned short int); +static signed char ispVMProcessLVDS(unsigned short a_usLVDSCount); +static void ispVMMemManager(signed char types, unsigned short size); + +/* + * + * External variables and functions in hardware.c module + * + */ +static signed char g_cCurrentJTAGState; + +#ifdef DEBUG + +/* + * + * GetState + * + * Returns the state as a string based on the opcode. Only used + * for debugging purposes. + * + */ + +const char *GetState(unsigned char a_ucState) +{ + switch (a_ucState) { + case RESET: + return "RESET"; + case IDLE: + return "IDLE"; + case IRPAUSE: + return "IRPAUSE"; + case DRPAUSE: + return "DRPAUSE"; + case SHIFTIR: + return "SHIFTIR"; + case SHIFTDR: + return "SHIFTDR"; + case DRCAPTURE:/* 11/15/05 support DRCAPTURE*/ + return "DRCAPTURE"; + default: + break; + } + + return 0; +} + +/* + * + * PrintData + * + * Prints the data. Only used for debugging purposes. + * + */ + +void PrintData(unsigned short a_iDataSize, unsigned char *a_pucData) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short usByteSize = 0; + unsigned short usBitIndex = 0; + signed short usByteIndex = 0; + unsigned char ucByte = 0; + unsigned char ucFlipByte = 0; + + if (a_iDataSize % 8) { + /* 09/11/07 NN Type cast mismatch variables */ + usByteSize = (unsigned short)(a_iDataSize / 8 + 1); + } else { + /* 09/11/07 NN Type cast mismatch variables */ + usByteSize = (unsigned short)(a_iDataSize / 8); + } + puts("("); + /* 09/11/07 NN Type cast mismatch variables */ + for (usByteIndex = (signed short)(usByteSize - 1); + usByteIndex >= 0; usByteIndex--) { + ucByte = a_pucData[usByteIndex]; + ucFlipByte = 0x00; + + /* + * + * Flip each byte. + * + */ + + for (usBitIndex = 0; usBitIndex < 8; usBitIndex++) { + ucFlipByte <<= 1; + if (ucByte & 0x1) { + ucFlipByte |= 0x1; + } + + ucByte >>= 1; + } + + /* + * + * Print the flipped byte. + * + */ + + printf("%.02X", ucFlipByte); + if ((usByteSize - usByteIndex) % 40 == 39) { + puts("\n\t\t"); + } + if (usByteIndex < 0) + break; + } + puts(")"); +} +#endif /* DEBUG */ + +void ispVMMemManager(signed char cTarget, unsigned short usSize) +{ + switch (cTarget) { + case XTDI: + case TDI: + if (g_pucInData != NULL) { + if (previous_size == usSize) {/*memory exist*/ + break; + } else { + free(g_pucInData); + g_pucInData = NULL; + } + } + g_pucInData = (unsigned char *) malloc(usSize / 8 + 2); + previous_size = usSize; + case XTDO: + case TDO: + if (g_pucOutData != NULL) { + if (previous_size == usSize) { /*already exist*/ + break; + } else { + free(g_pucOutData); + g_pucOutData = NULL; + } + } + g_pucOutData = (unsigned char *) malloc(usSize / 8 + 2); + previous_size = usSize; + break; + case MASK: + if (g_pucOutMaskData != NULL) { + if (previous_size == usSize) {/*already allocated*/ + break; + } else { + free(g_pucOutMaskData); + g_pucOutMaskData = NULL; + } + } + g_pucOutMaskData = (unsigned char *) malloc(usSize / 8 + 2); + previous_size = usSize; + break; + case HIR: + if (g_pucHIRData != NULL) { + free(g_pucHIRData); + g_pucHIRData = NULL; + } + g_pucHIRData = (unsigned char *) malloc(usSize / 8 + 2); + break; + case TIR: + if (g_pucTIRData != NULL) { + free(g_pucTIRData); + g_pucTIRData = NULL; + } + g_pucTIRData = (unsigned char *) malloc(usSize / 8 + 2); + break; + case HDR: + if (g_pucHDRData != NULL) { + free(g_pucHDRData); + g_pucHDRData = NULL; + } + g_pucHDRData = (unsigned char *) malloc(usSize / 8 + 2); + break; + case TDR: + if (g_pucTDRData != NULL) { + free(g_pucTDRData); + g_pucTDRData = NULL; + } + g_pucTDRData = (unsigned char *) malloc(usSize / 8 + 2); + break; + case HEAP: + if (g_pucHeapMemory != NULL) { + free(g_pucHeapMemory); + g_pucHeapMemory = NULL; + } + g_pucHeapMemory = (unsigned char *) malloc(usSize + 2); + break; + case DMASK: + if (g_pucOutDMaskData != NULL) { + if (previous_size == usSize) { /*already allocated*/ + break; + } else { + free(g_pucOutDMaskData); + g_pucOutDMaskData = NULL; + } + } + g_pucOutDMaskData = (unsigned char *) malloc(usSize / 8 + 2); + previous_size = usSize; + break; + case LHEAP: + if (g_pucIntelBuffer != NULL) { + free(g_pucIntelBuffer); + g_pucIntelBuffer = NULL; + } + g_pucIntelBuffer = (unsigned char *) malloc(usSize + 2); + break; + case LVDS: + if (g_pLVDSList != NULL) { + free(g_pLVDSList); + g_pLVDSList = NULL; + } + g_pLVDSList = (LVDSPair *) malloc(usSize * sizeof(LVDSPair)); + if (g_pLVDSList) + memset(g_pLVDSList, 0, usSize * sizeof(LVDSPair)); + break; + default: + return; + } +} + +void ispVMFreeMem(void) +{ + if (g_pucHeapMemory != NULL) { + free(g_pucHeapMemory); + g_pucHeapMemory = NULL; + } + + if (g_pucOutMaskData != NULL) { + free(g_pucOutMaskData); + g_pucOutMaskData = NULL; + } + + if (g_pucInData != NULL) { + free(g_pucInData); + g_pucInData = NULL; + } + + if (g_pucOutData != NULL) { + free(g_pucOutData); + g_pucOutData = NULL; + } + + if (g_pucHIRData != NULL) { + free(g_pucHIRData); + g_pucHIRData = NULL; + } + + if (g_pucTIRData != NULL) { + free(g_pucTIRData); + g_pucTIRData = NULL; + } + + if (g_pucHDRData != NULL) { + free(g_pucHDRData); + g_pucHDRData = NULL; + } + + if (g_pucTDRData != NULL) { + free(g_pucTDRData); + g_pucTDRData = NULL; + } + + if (g_pucOutDMaskData != NULL) { + free(g_pucOutDMaskData); + g_pucOutDMaskData = NULL; + } + + if (g_pucIntelBuffer != NULL) { + free(g_pucIntelBuffer); + g_pucIntelBuffer = NULL; + } + + if (g_pLVDSList != NULL) { + free(g_pLVDSList); + g_pLVDSList = NULL; + } +} + + +/* + * + * ispVMDataSize + * + * Returns a VME-encoded number, usually used to indicate the + * bit length of an SIR/SDR command. + * + */ + +long int ispVMDataSize() +{ + /* 09/11/07 NN added local variables initialization */ + long int iSize = 0; + signed char cCurrentByte = 0; + signed char cIndex = 0; + cIndex = 0; + while ((cCurrentByte = GetByte()) & 0x80) { + iSize |= ((long int) (cCurrentByte & 0x7F)) << cIndex; + cIndex += 7; + } + iSize |= ((long int) (cCurrentByte & 0x7F)) << cIndex; + return iSize; +} + +/* + * + * ispVMCode + * + * This is the heart of the embedded engine. All the high-level opcodes + * are extracted here. Once they have been identified, then it + * will call other functions to handle the processing. + * + */ + +signed char ispVMCode() +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short iRepeatSize = 0; + signed char cOpcode = 0; + signed char cRetCode = 0; + unsigned char ucState = 0; + unsigned short usDelay = 0; + unsigned short usToggle = 0; + unsigned char usByte = 0; + + /* + * + * Check the compression flag only if this is the first time + * this function is entered. Do not check the compression flag if + * it is being called recursively from other functions within + * the embedded engine. + * + */ + + if (!(g_usDataType & LHEAP_IN) && !(g_usDataType & HEAP_IN)) { + usByte = GetByte(); + if (usByte == 0xf1) { + g_usDataType |= COMPRESS; + } else if (usByte == 0xf2) { + g_usDataType &= ~COMPRESS; + } else { + return VME_INVALID_FILE; + } + } + + /* + * + * Begin looping through all the VME opcodes. + * + */ + + while ((cOpcode = GetByte()) >= 0) { + + switch (cOpcode) { + case STATE: + + /* + * Step the JTAG state machine. + */ + + ucState = GetByte(); + + /* + * Step the JTAG state machine to DRCAPTURE + * to support Looping. + */ + + if ((g_usDataType & LHEAP_IN) && + (ucState == DRPAUSE) && + (g_cCurrentJTAGState == ucState)) { + ispVMStateMachine(DRCAPTURE); + } + + ispVMStateMachine(ucState); + +#ifdef DEBUG + if (g_usDataType & LHEAP_IN) { + debug("LDELAY %s ", GetState(ucState)); + } else { + debug("STATE %s;\n", GetState(ucState)); + } +#endif /* DEBUG */ + break; + case SIR: + case SDR: + case XSDR: + +#ifdef DEBUG + switch (cOpcode) { + case SIR: + puts("SIR "); + break; + case SDR: + case XSDR: + if (g_usDataType & LHEAP_IN) { + puts("LSDR "); + } else { + puts("SDR "); + } + break; + } +#endif /* DEBUG */ + /* + * + * Shift in data into the device. + * + */ + + cRetCode = ispVMShift(cOpcode); + if (cRetCode != 0) { + return cRetCode; + } + break; + case WAIT: + + /* + * + * Observe delay. + * + */ + + /* 09/11/07 NN Type cast mismatch variables */ + usDelay = (unsigned short) ispVMDataSize(); + ispVMDelay(usDelay); + +#ifdef DEBUG + if (usDelay & 0x8000) { + + /* + * Since MSB is set, the delay time must be + * decoded to millisecond. The SVF2VME encodes + * the MSB to represent millisecond. + */ + + usDelay &= ~0x8000; + if (g_usDataType & LHEAP_IN) { + printf("%.2E SEC;\n", + (float) usDelay / 1000); + } else { + printf("RUNTEST %.2E SEC;\n", + (float) usDelay / 1000); + } + } else { + /* + * Since MSB is not set, the delay time + * is given as microseconds. + */ + + if (g_usDataType & LHEAP_IN) { + printf("%.2E SEC;\n", + (float) usDelay / 1000000); + } else { + printf("RUNTEST %.2E SEC;\n", + (float) usDelay / 1000000); + } + } +#endif /* DEBUG */ + break; + case TCK: + + /* + * Issue clock toggles. + */ + + /* 09/11/07 NN Type cast mismatch variables */ + usToggle = (unsigned short) ispVMDataSize(); + ispVMClocks(usToggle); + +#ifdef DEBUG + printf("RUNTEST %d TCK;\n", usToggle); +#endif /* DEBUG */ + break; + case ENDDR: + + /* + * + * Set the ENDDR. + * + */ + + g_ucEndDR = GetByte(); + +#ifdef DEBUG + printf("ENDDR %s;\n", GetState(g_ucEndDR)); +#endif /* DEBUG */ + break; + case ENDIR: + + /* + * + * Set the ENDIR. + * + */ + + g_ucEndIR = GetByte(); + +#ifdef DEBUG + printf("ENDIR %s;\n", GetState(g_ucEndIR)); +#endif /* DEBUG */ + break; + case HIR: + case TIR: + case HDR: + case TDR: + +#ifdef DEBUG + switch (cOpcode) { + case HIR: + puts("HIR "); + break; + case TIR: + puts("TIR "); + break; + case HDR: + puts("HDR "); + break; + case TDR: + puts("TDR "); + break; + } +#endif /* DEBUG */ + /* + * Set the header/trailer of the device in order + * to bypass + * successfully. + */ + + cRetCode = ispVMAmble(cOpcode); + if (cRetCode != 0) { + return cRetCode; + } + +#ifdef DEBUG + puts(";\n"); +#endif /* DEBUG */ + break; + case MEM: + + /* + * The maximum RAM required to support + * processing one row of the VME file. + */ + + /* 09/11/07 NN Type cast mismatch variables */ + g_usMaxSize = (unsigned short) ispVMDataSize(); + +#ifdef DEBUG + printf("// MEMSIZE %d\n", g_usMaxSize); +#endif /* DEBUG */ + break; + case VENDOR: + + /* + * + * Set the VENDOR type. + * + */ + + cOpcode = GetByte(); + switch (cOpcode) { + case LATTICE: +#ifdef DEBUG + puts("// VENDOR LATTICE\n"); +#endif /* DEBUG */ + g_cVendor = LATTICE; + break; + case ALTERA: +#ifdef DEBUG + puts("// VENDOR ALTERA\n"); +#endif /* DEBUG */ + g_cVendor = ALTERA; + break; + case XILINX: +#ifdef DEBUG + puts("// VENDOR XILINX\n"); +#endif /* DEBUG */ + g_cVendor = XILINX; + break; + default: + break; + } + break; + case SETFLOW: + + /* + * Set the flow control. Flow control determines + * the personality of the embedded engine. + */ + + /* 09/11/07 NN Type cast mismatch variables */ + g_usFlowControl |= (unsigned short) ispVMDataSize(); + break; + case RESETFLOW: + + /* + * + * Unset the flow control. + * + */ + + /* 09/11/07 NN Type cast mismatch variables */ + g_usFlowControl &= (unsigned short) ~(ispVMDataSize()); + break; + case HEAP: + + /* + * + * Allocate heap size to store loops. + * + */ + + cRetCode = GetByte(); + if (cRetCode != SECUREHEAP) { + return VME_INVALID_FILE; + } + /* 09/11/07 NN Type cast mismatch variables */ + g_iHEAPSize = (unsigned short) ispVMDataSize(); + + /* + * Store the maximum size of the HEAP buffer. + * Used to convert VME to HEX. + */ + + if (g_iHEAPSize > g_usHeapSize) { + g_usHeapSize = g_iHEAPSize; + } + + ispVMMemManager(HEAP, (unsigned short) g_iHEAPSize); + break; + case REPEAT: + + /* + * + * Execute loops. + * + */ + + g_usRepeatLoops = 0; + + /* 09/11/07 NN Type cast mismatch variables */ + iRepeatSize = (unsigned short) ispVMDataSize(); + + cRetCode = ispVMLoop((unsigned short) iRepeatSize); + if (cRetCode != 0) { + return cRetCode; + } + break; + case ENDLOOP: + + /* + * + * Exit point from processing loops. + * + */ + + return cRetCode; + case ENDVME: + + /* + * The only valid exit point that indicates + * end of programming. + */ + + return cRetCode; + case SHR: + + /* + * + * Right-shift address. + * + */ + + g_usFlowControl |= SHIFTRIGHT; + + /* 09/11/07 NN Type cast mismatch variables */ + g_usShiftValue = (unsigned short) (g_usRepeatLoops * + (unsigned short)GetByte()); + break; + case SHL: + + /* + * Left-shift address. + */ + + g_usFlowControl |= SHIFTLEFT; + + /* 09/11/07 NN Type cast mismatch variables */ + g_usShiftValue = (unsigned short) (g_usRepeatLoops * + (unsigned short)GetByte()); + break; + case FREQUENCY: + + /* + * + * Set the frequency. + * + */ + + /* 09/11/07 NN Type cast mismatch variables */ + g_iFrequency = (int) (ispVMDataSize() / 1000); + if (g_iFrequency == 1) + g_iFrequency = 1000; + +#ifdef DEBUG + printf("FREQUENCY %.2E HZ;\n", + (float) g_iFrequency * 1000); +#endif /* DEBUG */ + break; + case LCOUNT: + + /* + * + * Process LCOUNT command. + * + */ + + cRetCode = ispVMLCOUNT((unsigned short)ispVMDataSize()); + if (cRetCode != 0) { + return cRetCode; + } + break; + case VUES: + + /* + * + * Set the flow control to verify USERCODE. + * + */ + + g_usFlowControl |= VERIFYUES; + break; + case COMMENT: + + /* + * + * Display comment. + * + */ + + ispVMComment((unsigned short) ispVMDataSize()); + break; + case LVDS: + + /* + * + * Process LVDS command. + * + */ + + ispVMProcessLVDS((unsigned short) ispVMDataSize()); + break; + case HEADER: + + /* + * + * Discard header. + * + */ + + ispVMHeader((unsigned short) ispVMDataSize()); + break; + /* 03/14/06 Support Toggle ispENABLE signal*/ + case ispEN: + ucState = GetByte(); + if ((ucState == ON) || (ucState == 0x01)) + writePort(g_ucPinENABLE, 0x01); + else + writePort(g_ucPinENABLE, 0x00); + ispVMDelay(1); + break; + /* 05/24/06 support Toggle TRST pin*/ + case TRST: + ucState = GetByte(); + if (ucState == 0x01) + writePort(g_ucPinTRST, 0x01); + else + writePort(g_ucPinTRST, 0x00); + ispVMDelay(1); + break; + default: + + /* + * + * Invalid opcode encountered. + * + */ + +#ifdef DEBUG + printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode); +#endif /* DEBUG */ + + return VME_INVALID_FILE; + } + } + + /* + * + * Invalid exit point. Processing the token 'ENDVME' is the only + * valid way to exit the embedded engine. + * + */ + + return VME_INVALID_FILE; +} + +/* + * + * ispVMDataCode + * + * Processes the TDI/TDO/MASK/DMASK etc of an SIR/SDR command. + * + */ + +signed char ispVMDataCode() +{ + /* 09/11/07 NN added local variables initialization */ + signed char cDataByte = 0; + signed char siDataSource = 0; /*source of data from file by default*/ + + if (g_usDataType & HEAP_IN) { + siDataSource = 1; /*the source of data from memory*/ + } + + /* + * + * Clear the data type register. + * + **/ + + g_usDataType &= ~(MASK_DATA + TDI_DATA + + TDO_DATA + DMASK_DATA + CMASK_DATA); + + /* + * Iterate through SIR/SDR command and look for TDI, + * TDO, MASK, etc. + */ + + while ((cDataByte = GetByte()) >= 0) { + ispVMMemManager(cDataByte, g_usMaxSize); + switch (cDataByte) { + case TDI: + + /* + * Store the maximum size of the TDI buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usTDISize) { + g_usTDISize = g_usiDataSize; + } + /* + * Updated data type register to indicate that + * TDI data is currently being used. Process the + * data in the VME file into the TDI buffer. + */ + + g_usDataType |= TDI_DATA; + ispVMData(g_pucInData); + break; + case XTDO: + + /* + * Store the maximum size of the TDO buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usTDOSize) { + g_usTDOSize = g_usiDataSize; + } + + /* + * Updated data type register to indicate that + * TDO data is currently being used. + */ + + g_usDataType |= TDO_DATA; + break; + case TDO: + + /* + * Store the maximum size of the TDO buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usTDOSize) { + g_usTDOSize = g_usiDataSize; + } + + /* + * Updated data type register to indicate + * that TDO data is currently being used. + * Process the data in the VME file into the + * TDO buffer. + */ + + g_usDataType |= TDO_DATA; + ispVMData(g_pucOutData); + break; + case MASK: + + /* + * Store the maximum size of the MASK buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usMASKSize) { + g_usMASKSize = g_usiDataSize; + } + + /* + * Updated data type register to indicate that + * MASK data is currently being used. Process + * the data in the VME file into the MASK buffer + */ + + g_usDataType |= MASK_DATA; + ispVMData(g_pucOutMaskData); + break; + case DMASK: + + /* + * Store the maximum size of the DMASK buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usDMASKSize) { + g_usDMASKSize = g_usiDataSize; + } + + /* + * Updated data type register to indicate that + * DMASK data is currently being used. Process + * the data in the VME file into the DMASK + * buffer. + */ + + g_usDataType |= DMASK_DATA; + ispVMData(g_pucOutDMaskData); + break; + case CMASK: + + /* + * Updated data type register to indicate that + * MASK data is currently being used. Process + * the data in the VME file into the MASK buffer + */ + + g_usDataType |= CMASK_DATA; + ispVMData(g_pucOutMaskData); + break; + case CONTINUE: + return 0; + default: + /* + * Encountered invalid opcode. + */ + return VME_INVALID_FILE; + } + + switch (cDataByte) { + case TDI: + + /* + * Left bit shift. Used when performing + * algorithm looping. + */ + + if (g_usFlowControl & SHIFTLEFT) { + ispVMBitShift(SHL, g_usShiftValue); + g_usFlowControl &= ~SHIFTLEFT; + } + + /* + * Right bit shift. Used when performing + * algorithm looping. + */ + + if (g_usFlowControl & SHIFTRIGHT) { + ispVMBitShift(SHR, g_usShiftValue); + g_usFlowControl &= ~SHIFTRIGHT; + } + default: + break; + } + + if (siDataSource) { + g_usDataType |= HEAP_IN; /*restore from memory*/ + } + } + + if (siDataSource) { /*fetch data from heap memory upon return*/ + g_usDataType |= HEAP_IN; + } + + if (cDataByte < 0) { + + /* + * Encountered invalid opcode. + */ + + return VME_INVALID_FILE; + } else { + return 0; + } +} + +/* + * + * ispVMData + * Extract one row of data operand from the current data type opcode. Perform + * the decompression if necessary. Extra RAM is not required for the + * decompression process. The decompression scheme employed in this module + * is on row by row basis. The format of the data stream: + * [compression code][compressed data stream] + * 0x00 --No compression + * 0x01 --Compress by 0x00. + * Example: + * Original stream: 0x000000000000000000000001 + * Compressed stream: 0x01000901 + * Detail: 0x01 is the code, 0x00 is the key, + * 0x09 is the count of 0x00 bytes, + * 0x01 is the uncompressed byte. + * 0x02 --Compress by 0xFF. + * Example: + * Original stream: 0xFFFFFFFFFFFFFFFFFFFFFF01 + * Compressed stream: 0x02FF0901 + * Detail: 0x02 is the code, 0xFF is the key, + * 0x09 is the count of 0xFF bytes, + * 0x01 is the uncompressed byte. + * 0x03 + * : : + * 0xFE -- Compress by nibble blocks. + * Example: + * Original stream: 0x84210842108421084210 + * Compressed stream: 0x0584210 + * Detail: 0x05 is the code, means 5 nibbles block. + * 0x84210 is the 5 nibble blocks. + * The whole row is 80 bits given by g_usiDataSize. + * The number of times the block repeat itself + * is found by g_usiDataSize/(4*0x05) which is 4. + * 0xFF -- Compress by the most frequently happen byte. + * Example: + * Original stream: 0x04020401030904040404 + * Compressed stream: 0xFF04(0,1,0x02,0,1,0x01,1,0x03,1,0x09,0,0,0) + * or: 0xFF044090181C240 + * Detail: 0xFF is the code, 0x04 is the key. + * a bit of 0 represent the key shall be put into + * the current bit position and a bit of 1 + * represent copying the next of 8 bits of data + * in. + * + */ + +void ispVMData(unsigned char *ByteData) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short size = 0; + unsigned short i, j, m, getData = 0; + unsigned char cDataByte = 0; + unsigned char compress = 0; + unsigned short FFcount = 0; + unsigned char compr_char = 0xFF; + unsigned short index = 0; + signed char compression = 0; + + /*convert number in bits to bytes*/ + if (g_usiDataSize % 8 > 0) { + /* 09/11/07 NN Type cast mismatch variables */ + size = (unsigned short)(g_usiDataSize / 8 + 1); + } else { + /* 09/11/07 NN Type cast mismatch variables */ + size = (unsigned short)(g_usiDataSize / 8); + } + + /* + * If there is compression, then check if compress by key + * of 0x00 or 0xFF or by other keys or by nibble blocks + */ + + if (g_usDataType & COMPRESS) { + compression = 1; + compress = GetByte(); + if ((compress == VAR) && (g_usDataType & HEAP_IN)) { + getData = 1; + g_usDataType &= ~(HEAP_IN); + compress = GetByte(); + } + + switch (compress) { + case 0x00: + /* No compression */ + compression = 0; + break; + case 0x01: + /* Compress by byte 0x00 */ + compr_char = 0x00; + break; + case 0x02: + /* Compress by byte 0xFF */ + compr_char = 0xFF; + break; + case 0xFF: + /* Huffman encoding */ + compr_char = GetByte(); + i = 8; + for (index = 0; index < size; index++) { + ByteData[index] = 0x00; + if (i > 7) { + cDataByte = GetByte(); + i = 0; + } + if ((cDataByte << i++) & 0x80) + m = 8; + else { + ByteData[index] = compr_char; + m = 0; + } + + for (j = 0; j < m; j++) { + if (i > 7) { + cDataByte = GetByte(); + i = 0; + } + ByteData[index] |= + ((cDataByte << i++) & 0x80) >> j; + } + } + size = 0; + break; + default: + for (index = 0; index < size; index++) + ByteData[index] = 0x00; + for (index = 0; index < compress; index++) { + if (index % 2 == 0) + cDataByte = GetByte(); + for (i = 0; i < size * 2 / compress; i++) { + j = (unsigned short)(index + + (i * (unsigned short)compress)); + /*clear the nibble to zero first*/ + if (j%2) { + if (index % 2) + ByteData[j/2] |= + cDataByte & 0xF; + else + ByteData[j/2] |= + cDataByte >> 4; + } else { + if (index % 2) + ByteData[j/2] |= + cDataByte << 4; + else + ByteData[j/2] |= + cDataByte & 0xF0; + } + } + } + size = 0; + break; + } + } + + FFcount = 0; + + /* Decompress by byte 0x00 or 0xFF */ + for (index = 0; index < size; index++) { + if (FFcount <= 0) { + cDataByte = GetByte(); + if ((cDataByte == VAR) && (g_usDataType&HEAP_IN) && + !getData && !(g_usDataType&COMPRESS)) { + getData = 1; + g_usDataType &= ~(HEAP_IN); + cDataByte = GetByte(); + } + ByteData[index] = cDataByte; + if ((compression) && (cDataByte == compr_char)) + /* 09/11/07 NN Type cast mismatch variables */ + FFcount = (unsigned short) ispVMDataSize(); + /*The number of 0xFF or 0x00 bytes*/ + } else { + FFcount--; /*Use up the 0xFF chain first*/ + ByteData[index] = compr_char; + } + } + + if (getData) { + g_usDataType |= HEAP_IN; + getData = 0; + } +} + +/* + * + * ispVMShift + * + * Processes the SDR/XSDR/SIR commands. + * + */ + +signed char ispVMShift(signed char a_cCode) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short iDataIndex = 0; + unsigned short iReadLoop = 0; + signed char cRetCode = 0; + + cRetCode = 0; + /* 09/11/07 NN Type cast mismatch variables */ + g_usiDataSize = (unsigned short) ispVMDataSize(); + + /*clear the flags first*/ + g_usDataType &= ~(SIR_DATA + EXPRESS + SDR_DATA); + switch (a_cCode) { + case SIR: + g_usDataType |= SIR_DATA; + /* + * 1/15/04 If performing cascading, then go directly to SHIFTIR. + * Else, go to IRPAUSE before going to SHIFTIR + */ + if (g_usFlowControl & CASCADE) { + ispVMStateMachine(SHIFTIR); + } else { + ispVMStateMachine(IRPAUSE); + ispVMStateMachine(SHIFTIR); + if (g_usHeadIR > 0) { + ispVMBypass(HIR, g_usHeadIR); + sclock(); + } + } + break; + case XSDR: + g_usDataType |= EXPRESS; /*mark simultaneous in and out*/ + case SDR: + g_usDataType |= SDR_DATA; + /* + * 1/15/04 If already in SHIFTDR, then do not move state or + * shift in header. This would imply that the previously + * shifted frame was a cascaded frame. + */ + if (g_cCurrentJTAGState != SHIFTDR) { + /* + * 1/15/04 If performing cascading, then go directly + * to SHIFTDR. Else, go to DRPAUSE before going + * to SHIFTDR + */ + if (g_usFlowControl & CASCADE) { + if (g_cCurrentJTAGState == DRPAUSE) { + ispVMStateMachine(SHIFTDR); + /* + * 1/15/04 If cascade flag has been seat + * and the current state is DRPAUSE, + * this implies that the first cascaded + * frame is about to be shifted in. The + * header must be shifted prior to + * shifting the first cascaded frame. + */ + if (g_usHeadDR > 0) { + ispVMBypass(HDR, g_usHeadDR); + sclock(); + } + } else { + ispVMStateMachine(SHIFTDR); + } + } else { + ispVMStateMachine(DRPAUSE); + ispVMStateMachine(SHIFTDR); + if (g_usHeadDR > 0) { + ispVMBypass(HDR, g_usHeadDR); + sclock(); + } + } + } + break; + default: + return VME_INVALID_FILE; + } + + cRetCode = ispVMDataCode(); + + if (cRetCode != 0) { + return VME_INVALID_FILE; + } + +#ifdef DEBUG + printf("%d ", g_usiDataSize); + + if (g_usDataType & TDI_DATA) { + puts("TDI "); + PrintData(g_usiDataSize, g_pucInData); + } + + if (g_usDataType & TDO_DATA) { + puts("\n\t\tTDO "); + PrintData(g_usiDataSize, g_pucOutData); + } + + if (g_usDataType & MASK_DATA) { + puts("\n\t\tMASK "); + PrintData(g_usiDataSize, g_pucOutMaskData); + } + + if (g_usDataType & DMASK_DATA) { + puts("\n\t\tDMASK "); + PrintData(g_usiDataSize, g_pucOutDMaskData); + } + + puts(";\n"); +#endif /* DEBUG */ + + if (g_usDataType & TDO_DATA || g_usDataType & DMASK_DATA) { + if (g_usDataType & DMASK_DATA) { + cRetCode = ispVMReadandSave(g_usiDataSize); + if (!cRetCode) { + if (g_usTailDR > 0) { + sclock(); + ispVMBypass(TDR, g_usTailDR); + } + ispVMStateMachine(DRPAUSE); + ispVMStateMachine(SHIFTDR); + if (g_usHeadDR > 0) { + ispVMBypass(HDR, g_usHeadDR); + sclock(); + } + for (iDataIndex = 0; + iDataIndex < g_usiDataSize / 8 + 1; + iDataIndex++) + g_pucInData[iDataIndex] = + g_pucOutData[iDataIndex]; + g_usDataType &= ~(TDO_DATA + DMASK_DATA); + cRetCode = ispVMSend(g_usiDataSize); + } + } else { + cRetCode = ispVMRead(g_usiDataSize); + if (cRetCode == -1 && g_cVendor == XILINX) { + for (iReadLoop = 0; iReadLoop < 30; + iReadLoop++) { + cRetCode = ispVMRead(g_usiDataSize); + if (!cRetCode) { + break; + } else { + /* Always DRPAUSE */ + ispVMStateMachine(DRPAUSE); + /* + * Bypass other devices + * when appropriate + */ + ispVMBypass(TDR, g_usTailDR); + ispVMStateMachine(g_ucEndDR); + ispVMStateMachine(IDLE); + ispVMDelay(1000); + } + } + } + } + } else { /*TDI only*/ + cRetCode = ispVMSend(g_usiDataSize); + } + + /*transfer the input data to the output buffer for the next verify*/ + if ((g_usDataType & EXPRESS) || (a_cCode == SDR)) { + if (g_pucOutData) { + for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; + iDataIndex++) + g_pucOutData[iDataIndex] = + g_pucInData[iDataIndex]; + } + } + + switch (a_cCode) { + case SIR: + /* 1/15/04 If not performing cascading, then shift ENDIR */ + if (!(g_usFlowControl & CASCADE)) { + if (g_usTailIR > 0) { + sclock(); + ispVMBypass(TIR, g_usTailIR); + } + ispVMStateMachine(g_ucEndIR); + } + break; + case XSDR: + case SDR: + /* 1/15/04 If not performing cascading, then shift ENDDR */ + if (!(g_usFlowControl & CASCADE)) { + if (g_usTailDR > 0) { + sclock(); + ispVMBypass(TDR, g_usTailDR); + } + ispVMStateMachine(g_ucEndDR); + } + break; + default: + break; + } + + return cRetCode; +} + +/* + * + * ispVMAmble + * + * This routine is to extract Header and Trailer parameter for SIR and + * SDR operations. + * + * The Header and Trailer parameter are the pre-amble and post-amble bit + * stream need to be shifted into TDI or out of TDO of the devices. Mostly + * is for the purpose of bypassing the leading or trailing devices. ispVM + * supports only shifting data into TDI to bypass the devices. + * + * For a single device, the header and trailer parameters are all set to 0 + * as default by ispVM. If it is for multiple devices, the header and trailer + * value will change as specified by the VME file. + * + */ + +signed char ispVMAmble(signed char Code) +{ + signed char compress = 0; + /* 09/11/07 NN Type cast mismatch variables */ + g_usiDataSize = (unsigned short)ispVMDataSize(); + +#ifdef DEBUG + printf("%d", g_usiDataSize); +#endif /* DEBUG */ + + if (g_usiDataSize) { + + /* + * Discard the TDI byte and set the compression bit in the data + * type register to false if compression is set because TDI data + * after HIR/HDR/TIR/TDR is not compressed. + */ + + GetByte(); + if (g_usDataType & COMPRESS) { + g_usDataType &= ~(COMPRESS); + compress = 1; + } + } + + switch (Code) { + case HIR: + + /* + * Store the maximum size of the HIR buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usHIRSize) { + g_usHIRSize = g_usiDataSize; + } + + /* + * Assign the HIR value and allocate memory. + */ + + g_usHeadIR = g_usiDataSize; + if (g_usHeadIR) { + ispVMMemManager(HIR, g_usHeadIR); + ispVMData(g_pucHIRData); + +#ifdef DEBUG + puts(" TDI "); + PrintData(g_usHeadIR, g_pucHIRData); +#endif /* DEBUG */ + } + break; + case TIR: + + /* + * Store the maximum size of the TIR buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usTIRSize) { + g_usTIRSize = g_usiDataSize; + } + + /* + * Assign the TIR value and allocate memory. + */ + + g_usTailIR = g_usiDataSize; + if (g_usTailIR) { + ispVMMemManager(TIR, g_usTailIR); + ispVMData(g_pucTIRData); + +#ifdef DEBUG + puts(" TDI "); + PrintData(g_usTailIR, g_pucTIRData); +#endif /* DEBUG */ + } + break; + case HDR: + + /* + * Store the maximum size of the HDR buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usHDRSize) { + g_usHDRSize = g_usiDataSize; + } + + /* + * Assign the HDR value and allocate memory. + * + */ + + g_usHeadDR = g_usiDataSize; + if (g_usHeadDR) { + ispVMMemManager(HDR, g_usHeadDR); + ispVMData(g_pucHDRData); + +#ifdef DEBUG + puts(" TDI "); + PrintData(g_usHeadDR, g_pucHDRData); +#endif /* DEBUG */ + } + break; + case TDR: + + /* + * Store the maximum size of the TDR buffer. + * Used to convert VME to HEX. + */ + + if (g_usiDataSize > g_usTDRSize) { + g_usTDRSize = g_usiDataSize; + } + + /* + * Assign the TDR value and allocate memory. + * + */ + + g_usTailDR = g_usiDataSize; + if (g_usTailDR) { + ispVMMemManager(TDR, g_usTailDR); + ispVMData(g_pucTDRData); + +#ifdef DEBUG + puts(" TDI "); + PrintData(g_usTailDR, g_pucTDRData); +#endif /* DEBUG */ + } + break; + default: + break; + } + + /* + * + * Re-enable compression if it was previously set. + * + **/ + + if (compress) { + g_usDataType |= COMPRESS; + } + + if (g_usiDataSize) { + Code = GetByte(); + if (Code == CONTINUE) { + return 0; + } else { + + /* + * Encountered invalid opcode. + */ + + return VME_INVALID_FILE; + } + } + + return 0; +} + +/* + * + * ispVMLoop + * + * Perform the function call upon by the REPEAT opcode. + * Memory is to be allocated to store the entire loop from REPEAT to ENDLOOP. + * After the loop is stored then execution begin. The REPEATLOOP flag is set + * on the g_usFlowControl register to indicate the repeat loop is in session + * and therefore fetch opcode from the memory instead of from the file. + * + */ + +signed char ispVMLoop(unsigned short a_usLoopCount) +{ + /* 09/11/07 NN added local variables initialization */ + signed char cRetCode = 0; + unsigned short iHeapIndex = 0; + unsigned short iLoopIndex = 0; + + g_usShiftValue = 0; + for (iHeapIndex = 0; iHeapIndex < g_iHEAPSize; iHeapIndex++) { + g_pucHeapMemory[iHeapIndex] = GetByte(); + } + + if (g_pucHeapMemory[iHeapIndex - 1] != ENDLOOP) { + return VME_INVALID_FILE; + } + + g_usFlowControl |= REPEATLOOP; + g_usDataType |= HEAP_IN; + + for (iLoopIndex = 0; iLoopIndex < a_usLoopCount; iLoopIndex++) { + g_iHeapCounter = 0; + cRetCode = ispVMCode(); + g_usRepeatLoops++; + if (cRetCode < 0) { + break; + } + } + + g_usDataType &= ~(HEAP_IN); + g_usFlowControl &= ~(REPEATLOOP); + return cRetCode; +} + +/* + * + * ispVMBitShift + * + * Shift the TDI stream left or right by the number of bits. The data in + * *g_pucInData is of the VME format, so the actual shifting is the reverse of + * IEEE 1532 or SVF format. + * + */ + +signed char ispVMBitShift(signed char mode, unsigned short bits) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short i = 0; + unsigned short size = 0; + unsigned short tmpbits = 0; + + if (g_usiDataSize % 8 > 0) { + /* 09/11/07 NN Type cast mismatch variables */ + size = (unsigned short)(g_usiDataSize / 8 + 1); + } else { + /* 09/11/07 NN Type cast mismatch variables */ + size = (unsigned short)(g_usiDataSize / 8); + } + + switch (mode) { + case SHR: + for (i = 0; i < size; i++) { + if (g_pucInData[i] != 0) { + tmpbits = bits; + while (tmpbits > 0) { + g_pucInData[i] <<= 1; + if (g_pucInData[i] == 0) { + i--; + g_pucInData[i] = 1; + } + tmpbits--; + } + } + } + break; + case SHL: + for (i = 0; i < size; i++) { + if (g_pucInData[i] != 0) { + tmpbits = bits; + while (tmpbits > 0) { + g_pucInData[i] >>= 1; + if (g_pucInData[i] == 0) { + i--; + g_pucInData[i] = 8; + } + tmpbits--; + } + } + } + break; + default: + return VME_INVALID_FILE; + } + + return 0; +} + +/* + * + * ispVMComment + * + * Displays the SVF comments. + * + */ + +void ispVMComment(unsigned short a_usCommentSize) +{ + char cCurByte = 0; + for (; a_usCommentSize > 0; a_usCommentSize--) { + /* + * + * Print character to the terminal. + * + **/ + cCurByte = GetByte(); + vme_out_char(cCurByte); + } + cCurByte = '\n'; + vme_out_char(cCurByte); +} + +/* + * + * ispVMHeader + * + * Iterate the length of the header and discard it. + * + */ + +void ispVMHeader(unsigned short a_usHeaderSize) +{ + for (; a_usHeaderSize > 0; a_usHeaderSize--) { + GetByte(); + } +} + +/* + * + * ispVMCalculateCRC32 + * + * Calculate the 32-bit CRC. + * + */ + +void ispVMCalculateCRC32(unsigned char a_ucData) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned char ucIndex = 0; + unsigned char ucFlipData = 0; + unsigned short usCRCTableEntry = 0; + unsigned int crc_table[16] = { + 0x0000, 0xCC01, 0xD801, + 0x1400, 0xF001, 0x3C00, + 0x2800, 0xE401, 0xA001, + 0x6C00, 0x7800, 0xB401, + 0x5000, 0x9C01, 0x8801, + 0x4400 + }; + + for (ucIndex = 0; ucIndex < 8; ucIndex++) { + ucFlipData <<= 1; + if (a_ucData & 0x01) { + ucFlipData |= 0x01; + } + a_ucData >>= 1; + } + + /* 09/11/07 NN Type cast mismatch variables */ + usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]); + g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF); + g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ + usCRCTableEntry ^ crc_table[ucFlipData & 0xF]); + usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]); + g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF); + g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ + usCRCTableEntry ^ crc_table[(ucFlipData >> 4) & 0xF]); +} + +/* + * + * ispVMLCOUNT + * + * Process the intelligent programming loops. + * + */ + +signed char ispVMLCOUNT(unsigned short a_usCountSize) +{ + unsigned short usContinue = 1; + unsigned short usIntelBufferIndex = 0; + unsigned short usCountIndex = 0; + signed char cRetCode = 0; + signed char cRepeatHeap = 0; + signed char cOpcode = 0; + unsigned char ucState = 0; + unsigned short usDelay = 0; + unsigned short usToggle = 0; + unsigned char usByte = 0; + + g_usIntelBufferSize = (unsigned short)ispVMDataSize(); + + /* + * Allocate memory for intel buffer. + * + */ + + ispVMMemManager(LHEAP, g_usIntelBufferSize); + + /* + * Store the maximum size of the intelligent buffer. + * Used to convert VME to HEX. + */ + + if (g_usIntelBufferSize > g_usLCOUNTSize) { + g_usLCOUNTSize = g_usIntelBufferSize; + } + + /* + * Copy intel data to the buffer. + */ + + for (usIntelBufferIndex = 0; usIntelBufferIndex < g_usIntelBufferSize; + usIntelBufferIndex++) { + g_pucIntelBuffer[usIntelBufferIndex] = GetByte(); + } + + /* + * Set the data type register to get data from the intelligent + * data buffer. + */ + + g_usDataType |= LHEAP_IN; + + /* + * + * If the HEAP_IN flag is set, temporarily unset the flag so data will be + * retrieved from the status buffer. + * + **/ + + if (g_usDataType & HEAP_IN) { + g_usDataType &= ~HEAP_IN; + cRepeatHeap = 1; + } + +#ifdef DEBUG + printf("LCOUNT %d;\n", a_usCountSize); +#endif /* DEBUG */ + + /* + * Iterate through the intelligent programming command. + */ + + for (usCountIndex = 0; usCountIndex < a_usCountSize; usCountIndex++) { + + /* + * + * Initialize the intel data index to 0 before each iteration. + * + **/ + + g_usIntelDataIndex = 0; + cOpcode = 0; + ucState = 0; + usDelay = 0; + usToggle = 0; + usByte = 0; + usContinue = 1; + + /* + * + * Begin looping through all the VME opcodes. + * + */ + /* + * 4/1/09 Nguyen replaced the recursive function call codes on + * the ispVMLCOUNT function + * + */ + while (usContinue) { + cOpcode = GetByte(); + switch (cOpcode) { + case HIR: + case TIR: + case HDR: + case TDR: + /* + * Set the header/trailer of the device in order + * to bypass successfully. + */ + + ispVMAmble(cOpcode); + break; + case STATE: + + /* + * Step the JTAG state machine. + */ + + ucState = GetByte(); + /* + * Step the JTAG state machine to DRCAPTURE + * to support Looping. + */ + + if ((g_usDataType & LHEAP_IN) && + (ucState == DRPAUSE) && + (g_cCurrentJTAGState == ucState)) { + ispVMStateMachine(DRCAPTURE); + } + ispVMStateMachine(ucState); +#ifdef DEBUG + printf("LDELAY %s ", GetState(ucState)); +#endif /* DEBUG */ + break; + case SIR: +#ifdef DEBUG + printf("SIR "); +#endif /* DEBUG */ + /* + * Shift in data into the device. + */ + + cRetCode = ispVMShift(cOpcode); + break; + case SDR: + +#ifdef DEBUG + printf("LSDR "); +#endif /* DEBUG */ + /* + * Shift in data into the device. + */ + + cRetCode = ispVMShift(cOpcode); + break; + case WAIT: + + /* + * + * Observe delay. + * + */ + + usDelay = (unsigned short)ispVMDataSize(); + ispVMDelay(usDelay); + +#ifdef DEBUG + if (usDelay & 0x8000) { + + /* + * Since MSB is set, the delay time must + * be decoded to millisecond. The + * SVF2VME encodes the MSB to represent + * millisecond. + */ + + usDelay &= ~0x8000; + printf("%.2E SEC;\n", + (float) usDelay / 1000); + } else { + /* + * Since MSB is not set, the delay time + * is given as microseconds. + */ + + printf("%.2E SEC;\n", + (float) usDelay / 1000000); + } +#endif /* DEBUG */ + break; + case TCK: + + /* + * Issue clock toggles. + */ + + usToggle = (unsigned short)ispVMDataSize(); + ispVMClocks(usToggle); + +#ifdef DEBUG + printf("RUNTEST %d TCK;\n", usToggle); +#endif /* DEBUG */ + break; + case ENDLOOP: + + /* + * Exit point from processing loops. + */ + usContinue = 0; + break; + + case COMMENT: + + /* + * Display comment. + */ + + ispVMComment((unsigned short) ispVMDataSize()); + break; + case ispEN: + ucState = GetByte(); + if ((ucState == ON) || (ucState == 0x01)) + writePort(g_ucPinENABLE, 0x01); + else + writePort(g_ucPinENABLE, 0x00); + ispVMDelay(1); + break; + case TRST: + if (GetByte() == 0x01) + writePort(g_ucPinTRST, 0x01); + else + writePort(g_ucPinTRST, 0x00); + ispVMDelay(1); + break; + default: + + /* + * Invalid opcode encountered. + */ + + debug("\nINVALID OPCODE: 0x%.2X\n", cOpcode); + + return VME_INVALID_FILE; + } + } + if (cRetCode >= 0) { + /* + * Break if intelligent programming is successful. + */ + + break; + } + + } + /* + * If HEAP_IN flag was temporarily disabled, + * re-enable it before exiting + */ + + if (cRepeatHeap) { + g_usDataType |= HEAP_IN; + } + + /* + * Set the data type register to not get data from the + * intelligent data buffer. + */ + + g_usDataType &= ~LHEAP_IN; + return cRetCode; +} +/* + * + * ispVMClocks + * + * Applies the specified number of pulses to TCK. + * + */ + +void ispVMClocks(unsigned short Clocks) +{ + unsigned short iClockIndex = 0; + for (iClockIndex = 0; iClockIndex < Clocks; iClockIndex++) { + sclock(); + } +} + +/* + * + * ispVMBypass + * + * This procedure takes care of the HIR, HDR, TIR, TDR for the + * purpose of putting the other devices into Bypass mode. The + * current state is checked to find out if it is at DRPAUSE or + * IRPAUSE. If it is at DRPAUSE, perform bypass register scan. + * If it is at IRPAUSE, scan into instruction registers the bypass + * instruction. + * + */ + +void ispVMBypass(signed char ScanType, unsigned short Bits) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short iIndex = 0; + unsigned short iSourceIndex = 0; + unsigned char cBitState = 0; + unsigned char cCurByte = 0; + unsigned char *pcSource = NULL; + + if (Bits <= 0) { + return; + } + + switch (ScanType) { + case HIR: + pcSource = g_pucHIRData; + break; + case TIR: + pcSource = g_pucTIRData; + break; + case HDR: + pcSource = g_pucHDRData; + break; + case TDR: + pcSource = g_pucTDRData; + break; + default: + break; + } + + iSourceIndex = 0; + cBitState = 0; + for (iIndex = 0; iIndex < Bits - 1; iIndex++) { + /* Scan instruction or bypass register */ + if (iIndex % 8 == 0) { + cCurByte = pcSource[iSourceIndex++]; + } + cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) + ? 0x01 : 0x00); + writePort(g_ucPinTDI, cBitState); + sclock(); + } + + if (iIndex % 8 == 0) { + cCurByte = pcSource[iSourceIndex++]; + } + + cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) + ? 0x01 : 0x00); + writePort(g_ucPinTDI, cBitState); +} + +/* + * + * ispVMStateMachine + * + * This procedure steps all devices in the daisy chain from a given + * JTAG state to the next desirable state. If the next state is TLR, + * the JTAG state machine is brute forced into TLR by driving TMS + * high and pulse TCK 6 times. + * + */ + +void ispVMStateMachine(signed char cNextJTAGState) +{ + /* 09/11/07 NN added local variables initialization */ + signed char cPathIndex = 0; + signed char cStateIndex = 0; + + if ((g_cCurrentJTAGState == cNextJTAGState) && + (cNextJTAGState != RESET)) { + return; + } + + for (cStateIndex = 0; cStateIndex < 25; cStateIndex++) { + if ((g_cCurrentJTAGState == + g_JTAGTransistions[cStateIndex].CurState) && + (cNextJTAGState == + g_JTAGTransistions[cStateIndex].NextState)) { + break; + } + } + + g_cCurrentJTAGState = cNextJTAGState; + for (cPathIndex = 0; + cPathIndex < g_JTAGTransistions[cStateIndex].Pulses; + cPathIndex++) { + if ((g_JTAGTransistions[cStateIndex].Pattern << cPathIndex) + & 0x80) { + writePort(g_ucPinTMS, (unsigned char) 0x01); + } else { + writePort(g_ucPinTMS, (unsigned char) 0x00); + } + sclock(); + } + + writePort(g_ucPinTDI, 0x00); + writePort(g_ucPinTMS, 0x00); +} + +/* + * + * ispVMStart + * + * Enable the port to the device and set the state to RESET (TLR). + * + */ + +void ispVMStart() +{ +#ifdef DEBUG + printf("// ISPVM EMBEDDED ADDED\n"); + printf("STATE RESET;\n"); +#endif + g_usFlowControl = 0; + g_usDataType = g_uiChecksumIndex = g_cCurrentJTAGState = 0; + g_usHeadDR = g_usHeadIR = g_usTailDR = g_usTailIR = 0; + g_usMaxSize = g_usShiftValue = g_usRepeatLoops = 0; + g_usTDOSize = g_usMASKSize = g_usTDISize = 0; + g_usDMASKSize = g_usLCOUNTSize = g_usHDRSize = 0; + g_usTDRSize = g_usHIRSize = g_usTIRSize = g_usHeapSize = 0; + g_pLVDSList = NULL; + g_usLVDSPairCount = 0; + previous_size = 0; + + ispVMStateMachine(RESET); /*step devices to RESET state*/ +} + +/* + * + * ispVMEnd + * + * Set the state of devices to RESET to enable the devices and disable + * the port. + * + */ + +void ispVMEnd() +{ +#ifdef DEBUG + printf("// ISPVM EMBEDDED ADDED\n"); + printf("STATE RESET;\n"); + printf("RUNTEST 1.00E-001 SEC;\n"); +#endif + + ispVMStateMachine(RESET); /*step devices to RESET state */ + ispVMDelay(1000); /*wake up devices*/ +} + +/* + * + * ispVMSend + * + * Send the TDI data stream to devices. The data stream can be + * instructions or data. + * + */ + +signed char ispVMSend(unsigned short a_usiDataSize) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short iIndex = 0; + unsigned short iInDataIndex = 0; + unsigned char cCurByte = 0; + unsigned char cBitState = 0; + + for (iIndex = 0; iIndex < a_usiDataSize - 1; iIndex++) { + if (iIndex % 8 == 0) { + cCurByte = g_pucInData[iInDataIndex++]; + } + cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) + ? 0x01 : 0x00); + writePort(g_ucPinTDI, cBitState); + sclock(); + } + + if (iIndex % 8 == 0) { + /* Take care of the last bit */ + cCurByte = g_pucInData[iInDataIndex]; + } + + cBitState = (unsigned char) (((cCurByte << iIndex % 8) & 0x80) + ? 0x01 : 0x00); + + writePort(g_ucPinTDI, cBitState); + if (g_usFlowControl & CASCADE) { + /*1/15/04 Clock in last bit for the first n-1 cascaded frames */ + sclock(); + } + + return 0; +} + +/* + * + * ispVMRead + * + * Read the data stream from devices and verify. + * + */ + +signed char ispVMRead(unsigned short a_usiDataSize) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short usDataSizeIndex = 0; + unsigned short usErrorCount = 0; + unsigned short usLastBitIndex = 0; + unsigned char cDataByte = 0; + unsigned char cMaskByte = 0; + unsigned char cInDataByte = 0; + unsigned char cCurBit = 0; + unsigned char cByteIndex = 0; + unsigned short usBufferIndex = 0; + unsigned char ucDisplayByte = 0x00; + unsigned char ucDisplayFlag = 0x01; + char StrChecksum[256] = {0}; + unsigned char g_usCalculateChecksum = 0x00; + + /* 09/11/07 NN Type cast mismatch variables */ + usLastBitIndex = (unsigned short)(a_usiDataSize - 1); + +#ifndef DEBUG + /* + * If mask is not all zeros, then set the display flag to 0x00, + * otherwise it shall be set to 0x01 to indicate that data read + * from the device shall be displayed. If DEBUG is defined, + * always display data. + */ + + for (usDataSizeIndex = 0; usDataSizeIndex < (a_usiDataSize + 7) / 8; + usDataSizeIndex++) { + if (g_usDataType & MASK_DATA) { + if (g_pucOutMaskData[usDataSizeIndex] != 0x00) { + ucDisplayFlag = 0x00; + break; + } + } else if (g_usDataType & CMASK_DATA) { + g_usCalculateChecksum = 0x01; + ucDisplayFlag = 0x00; + break; + } else { + ucDisplayFlag = 0x00; + break; + } + } +#endif /* DEBUG */ + + /* + * + * Begin shifting data in and out of the device. + * + **/ + + for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; + usDataSizeIndex++) { + if (cByteIndex == 0) { + + /* + * Grab byte from TDO buffer. + */ + + if (g_usDataType & TDO_DATA) { + cDataByte = g_pucOutData[usBufferIndex]; + } + + /* + * Grab byte from MASK buffer. + */ + + if (g_usDataType & MASK_DATA) { + cMaskByte = g_pucOutMaskData[usBufferIndex]; + } else { + cMaskByte = 0xFF; + } + + /* + * Grab byte from CMASK buffer. + */ + + if (g_usDataType & CMASK_DATA) { + cMaskByte = 0x00; + g_usCalculateChecksum = 0x01; + } + + /* + * Grab byte from TDI buffer. + */ + + if (g_usDataType & TDI_DATA) { + cInDataByte = g_pucInData[usBufferIndex]; + } + + usBufferIndex++; + } + + cCurBit = readPort(); + + if (ucDisplayFlag) { + ucDisplayByte <<= 1; + ucDisplayByte |= cCurBit; + } + + /* + * Check if data read from port matches with expected TDO. + */ + + if (g_usDataType & TDO_DATA) { + /* 08/28/08 NN Added Calculate checksum support. */ + if (g_usCalculateChecksum) { + if (cCurBit == 0x01) + g_usChecksum += + (1 << (g_uiChecksumIndex % 8)); + g_uiChecksumIndex++; + } else { + if ((((cMaskByte << cByteIndex) & 0x80) + ? 0x01 : 0x00)) { + if (cCurBit != (unsigned char) + (((cDataByte << cByteIndex) & 0x80) + ? 0x01 : 0x00)) { + usErrorCount++; + } + } + } + } + + /* + * Write TDI data to the port. + */ + + writePort(g_ucPinTDI, + (unsigned char)(((cInDataByte << cByteIndex) & 0x80) + ? 0x01 : 0x00)); + + if (usDataSizeIndex < usLastBitIndex) { + + /* + * Clock data out from the data shift register. + */ + + sclock(); + } else if (g_usFlowControl & CASCADE) { + + /* + * Clock in last bit for the first N - 1 cascaded frames + */ + + sclock(); + } + + /* + * Increment the byte index. If it exceeds 7, then reset it back + * to zero. + */ + + cByteIndex++; + if (cByteIndex >= 8) { + if (ucDisplayFlag) { + + /* + * Store displayed data in the TDO buffer. By reusing + * the TDO buffer to store displayed data, there is no + * need to allocate a buffer simply to hold display + * data. This will not cause any false verification + * errors because the true TDO byte has already + * been consumed. + */ + + g_pucOutData[usBufferIndex - 1] = ucDisplayByte; + ucDisplayByte = 0; + } + + cByteIndex = 0; + } + /* 09/12/07 Nguyen changed to display the 1 bit expected data */ + else if (a_usiDataSize == 1) { + if (ucDisplayFlag) { + + /* + * Store displayed data in the TDO buffer. + * By reusing the TDO buffer to store displayed + * data, there is no need to allocate + * a buffer simply to hold display data. This + * will not cause any false verification errors + * because the true TDO byte has already + * been consumed. + */ + + /* + * Flip ucDisplayByte and store it in cDataByte. + */ + cDataByte = 0x00; + for (usBufferIndex = 0; usBufferIndex < 8; + usBufferIndex++) { + cDataByte <<= 1; + if (ucDisplayByte & 0x01) { + cDataByte |= 0x01; + } + ucDisplayByte >>= 1; + } + g_pucOutData[0] = cDataByte; + ucDisplayByte = 0; + } + + cByteIndex = 0; + } + } + + if (ucDisplayFlag) { + +#ifdef DEBUG + debug("RECEIVED TDO ("); +#else + vme_out_string("Display Data: 0x"); +#endif /* DEBUG */ + + /* 09/11/07 NN Type cast mismatch variables */ + for (usDataSizeIndex = (unsigned short) + ((a_usiDataSize + 7) / 8); + usDataSizeIndex > 0 ; usDataSizeIndex--) { + cMaskByte = g_pucOutData[usDataSizeIndex - 1]; + cDataByte = 0x00; + + /* + * Flip cMaskByte and store it in cDataByte. + */ + + for (usBufferIndex = 0; usBufferIndex < 8; + usBufferIndex++) { + cDataByte <<= 1; + if (cMaskByte & 0x01) { + cDataByte |= 0x01; + } + cMaskByte >>= 1; + } +#ifdef DEBUG + printf("%.2X", cDataByte); + if ((((a_usiDataSize + 7) / 8) - usDataSizeIndex) + % 40 == 39) { + printf("\n\t\t"); + } +#else + vme_out_hex(cDataByte); +#endif /* DEBUG */ + } + +#ifdef DEBUG + printf(")\n\n"); +#else + vme_out_string("\n\n"); +#endif /* DEBUG */ + /* 09/02/08 Nguyen changed to display the data Checksum */ + if (g_usChecksum != 0) { + g_usChecksum &= 0xFFFF; + sprintf(StrChecksum, "Data Checksum: %.4lX\n\n", + g_usChecksum); + vme_out_string(StrChecksum); + g_usChecksum = 0; + } + } + + if (usErrorCount > 0) { + if (g_usFlowControl & VERIFYUES) { + vme_out_string( + "USERCODE verification failed. " + "Continue programming......\n\n"); + g_usFlowControl &= ~(VERIFYUES); + return 0; + } else { + +#ifdef DEBUG + printf("TOTAL ERRORS: %d\n", usErrorCount); +#endif /* DEBUG */ + + return VME_VERIFICATION_FAILURE; + } + } else { + if (g_usFlowControl & VERIFYUES) { + vme_out_string("USERCODE verification passed. " + "Programming aborted.\n\n"); + g_usFlowControl &= ~(VERIFYUES); + return 1; + } else { + return 0; + } + } +} + +/* + * + * ispVMReadandSave + * + * Support dynamic I/O. + * + */ + +signed char ispVMReadandSave(unsigned short int a_usiDataSize) +{ + /* 09/11/07 NN added local variables initialization */ + unsigned short int usDataSizeIndex = 0; + unsigned short int usLastBitIndex = 0; + unsigned short int usBufferIndex = 0; + unsigned short int usOutBitIndex = 0; + unsigned short int usLVDSIndex = 0; + unsigned char cDataByte = 0; + unsigned char cDMASKByte = 0; + unsigned char cInDataByte = 0; + unsigned char cCurBit = 0; + unsigned char cByteIndex = 0; + signed char cLVDSByteIndex = 0; + + /* 09/11/07 NN Type cast mismatch variables */ + usLastBitIndex = (unsigned short) (a_usiDataSize - 1); + + /* + * + * Iterate through the data bits. + * + */ + + for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; + usDataSizeIndex++) { + if (cByteIndex == 0) { + + /* + * Grab byte from DMASK buffer. + */ + + if (g_usDataType & DMASK_DATA) { + cDMASKByte = g_pucOutDMaskData[usBufferIndex]; + } else { + cDMASKByte = 0x00; + } + + /* + * Grab byte from TDI buffer. + */ + + if (g_usDataType & TDI_DATA) { + cInDataByte = g_pucInData[usBufferIndex]; + } + + usBufferIndex++; + } + + cCurBit = readPort(); + cDataByte = (unsigned char)(((cInDataByte << cByteIndex) & 0x80) + ? 0x01 : 0x00); + + /* + * Initialize the byte to be zero. + */ + + if (usOutBitIndex % 8 == 0) { + g_pucOutData[usOutBitIndex / 8] = 0x00; + } + + /* + * Use TDI, DMASK, and device TDO to create new TDI (actually + * stored in g_pucOutData). + */ + + if ((((cDMASKByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) { + + if (g_pLVDSList) { + for (usLVDSIndex = 0; + usLVDSIndex < g_usLVDSPairCount; + usLVDSIndex++) { + if (g_pLVDSList[usLVDSIndex]. + usNegativeIndex == + usDataSizeIndex) { + g_pLVDSList[usLVDSIndex]. + ucUpdate = 0x01; + break; + } + } + } + + /* + * DMASK bit is 1, use TDI. + */ + + g_pucOutData[usOutBitIndex / 8] |= (unsigned char) + (((cDataByte & 0x1) ? 0x01 : 0x00) << + (7 - usOutBitIndex % 8)); + } else { + + /* + * DMASK bit is 0, use device TDO. + */ + + g_pucOutData[usOutBitIndex / 8] |= (unsigned char) + (((cCurBit & 0x1) ? 0x01 : 0x00) << + (7 - usOutBitIndex % 8)); + } + + /* + * Shift in TDI in order to get TDO out. + */ + + usOutBitIndex++; + writePort(g_ucPinTDI, cDataByte); + if (usDataSizeIndex < usLastBitIndex) { + sclock(); + } + + /* + * Increment the byte index. If it exceeds 7, then reset it back + * to zero. + */ + + cByteIndex++; + if (cByteIndex >= 8) { + cByteIndex = 0; + } + } + + /* + * If g_pLVDSList exists and pairs need updating, then update + * the negative-pair to receive the flipped positive-pair value. + */ + + if (g_pLVDSList) { + for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; + usLVDSIndex++) { + if (g_pLVDSList[usLVDSIndex].ucUpdate) { + + /* + * Read the positive value and flip it. + */ + + cDataByte = (unsigned char) + (((g_pucOutData[g_pLVDSList[usLVDSIndex]. + usPositiveIndex / 8] + << (g_pLVDSList[usLVDSIndex]. + usPositiveIndex % 8)) & 0x80) ? + 0x01 : 0x00); + /* 09/11/07 NN Type cast mismatch variables */ + cDataByte = (unsigned char) (!cDataByte); + + /* + * Get the byte that needs modification. + */ + + cInDataByte = + g_pucOutData[g_pLVDSList[usLVDSIndex]. + usNegativeIndex / 8]; + + if (cDataByte) { + + /* + * Copy over the current byte and + * set the negative bit to 1. + */ + + cDataByte = 0x00; + for (cLVDSByteIndex = 7; + cLVDSByteIndex >= 0; + cLVDSByteIndex--) { + cDataByte <<= 1; + if (7 - + (g_pLVDSList[usLVDSIndex]. + usNegativeIndex % 8) == + cLVDSByteIndex) { + + /* + * Set negative bit to 1 + */ + + cDataByte |= 0x01; + } else if (cInDataByte & 0x80) { + cDataByte |= 0x01; + } + + cInDataByte <<= 1; + } + + /* + * Store the modified byte. + */ + + g_pucOutData[g_pLVDSList[usLVDSIndex]. + usNegativeIndex / 8] = cDataByte; + } else { + + /* + * Copy over the current byte and set + * the negative bit to 0. + */ + + cDataByte = 0x00; + for (cLVDSByteIndex = 7; + cLVDSByteIndex >= 0; + cLVDSByteIndex--) { + cDataByte <<= 1; + if (7 - + (g_pLVDSList[usLVDSIndex]. + usNegativeIndex % 8) == + cLVDSByteIndex) { + + /* + * Set negative bit to 0 + */ + + cDataByte |= 0x00; + } else if (cInDataByte & 0x80) { + cDataByte |= 0x01; + } + + cInDataByte <<= 1; + } + + /* + * Store the modified byte. + */ + + g_pucOutData[g_pLVDSList[usLVDSIndex]. + usNegativeIndex / 8] = cDataByte; + } + + break; + } + } + } + + return 0; +} + +signed char ispVMProcessLVDS(unsigned short a_usLVDSCount) +{ + unsigned short usLVDSIndex = 0; + + /* + * Allocate memory to hold LVDS pairs. + */ + + ispVMMemManager(LVDS, a_usLVDSCount); + g_usLVDSPairCount = a_usLVDSCount; + +#ifdef DEBUG + printf("LVDS %d (", a_usLVDSCount); +#endif /* DEBUG */ + + /* + * Iterate through each given LVDS pair. + */ + + for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) { + + /* + * Assign the positive and negative indices of the LVDS pair. + */ + + /* 09/11/07 NN Type cast mismatch variables */ + g_pLVDSList[usLVDSIndex].usPositiveIndex = + (unsigned short) ispVMDataSize(); + /* 09/11/07 NN Type cast mismatch variables */ + g_pLVDSList[usLVDSIndex].usNegativeIndex = + (unsigned short)ispVMDataSize(); + +#ifdef DEBUG + if (usLVDSIndex < g_usLVDSPairCount - 1) { + printf("%d:%d, ", + g_pLVDSList[usLVDSIndex].usPositiveIndex, + g_pLVDSList[usLVDSIndex].usNegativeIndex); + } else { + printf("%d:%d", + g_pLVDSList[usLVDSIndex].usPositiveIndex, + g_pLVDSList[usLVDSIndex].usNegativeIndex); + } +#endif /* DEBUG */ + + } + +#ifdef DEBUG + printf(");\n", a_usLVDSCount); +#endif /* DEBUG */ + + return 0; +} diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c new file mode 100644 index 0000000..a0e7823 --- /dev/null +++ b/drivers/fpga/lattice.c @@ -0,0 +1,399 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * (C) Copyright 2002 + * Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * + * ispVM functions adapted from Lattice's ispmVMEmbedded code: + * Copyright 2009 Lattice Semiconductor Corp. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <malloc.h> +#include <fpga.h> +#include <lattice.h> + +static lattice_board_specific_func *pfns; +static char *fpga_image; +static unsigned long read_bytes; +static unsigned long bufsize; +static unsigned short expectedCRC; + +/* + * External variables and functions declared in ivm_core.c module. + */ +extern unsigned short g_usCalculatedCRC; +extern unsigned short g_usDataType; +extern unsigned char *g_pucIntelBuffer; +extern unsigned char *g_pucHeapMemory; +extern unsigned short g_iHeapCounter; +extern unsigned short g_iHEAPSize; +extern unsigned short g_usIntelDataIndex; +extern unsigned short g_usIntelBufferSize; +extern char *const g_szSupportedVersions[]; + + +/* + * ispVMDelay + * + * Users must implement a delay to observe a_usTimeDelay, where + * bit 15 of the a_usTimeDelay defines the unit. + * 1 = milliseconds + * 0 = microseconds + * Example: + * a_usTimeDelay = 0x0001 = 1 microsecond delay. + * a_usTimeDelay = 0x8001 = 1 millisecond delay. + * + * This subroutine is called upon to provide a delay from 1 millisecond to a few + * hundreds milliseconds each time. + * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16 + * bits integer, this function is restricted to produce a delay to 64000 + * micro-seconds or 32000 milli-second maximum. The VME file will never pass on + * to this function a delay time > those maximum number. If it needs more than + * those maximum, the VME file will launch the delay function several times to + * realize a larger delay time cummulatively. + * It is perfectly alright to provide a longer delay than required. It is not + * acceptable if the delay is shorter. + */ +void ispVMDelay(unsigned short delay) +{ + if (delay & 0x8000) + delay = (delay & ~0x8000) * 1000; + udelay(delay); +} + +void writePort(unsigned char a_ucPins, unsigned char a_ucValue) +{ + a_ucValue = a_ucValue ? 1 : 0; + + switch (a_ucPins) { + case g_ucPinTDI: + pfns->jtag_set_tdi(a_ucValue); + break; + case g_ucPinTCK: + pfns->jtag_set_tck(a_ucValue); + break; + case g_ucPinTMS: + pfns->jtag_set_tms(a_ucValue); + break; + default: + printf("%s: requested unknown pin\n", __func__); + } +} + +unsigned char readPort(void) +{ + return pfns->jtag_get_tdo(); +} + +void sclock(void) +{ + writePort(g_ucPinTCK, 0x01); + writePort(g_ucPinTCK, 0x00); +} + +void calibration(void) +{ + /* Apply 2 pulses to TCK. */ + writePort(g_ucPinTCK, 0x00); + writePort(g_ucPinTCK, 0x01); + writePort(g_ucPinTCK, 0x00); + writePort(g_ucPinTCK, 0x01); + writePort(g_ucPinTCK, 0x00); + + ispVMDelay(0x8001); + + /* Apply 2 pulses to TCK. */ + writePort(g_ucPinTCK, 0x01); + writePort(g_ucPinTCK, 0x00); + writePort(g_ucPinTCK, 0x01); + writePort(g_ucPinTCK, 0x00); +} + +/* + * GetByte + * + * Returns a byte to the caller. The returned byte depends on the + * g_usDataType register. If the HEAP_IN bit is set, then the byte + * is returned from the HEAP. If the LHEAP_IN bit is set, then + * the byte is returned from the intelligent buffer. Otherwise, + * the byte is returned directly from the VME file. + */ +unsigned char GetByte(void) +{ + unsigned char ucData; + unsigned int block_size = 4 * 1024; + + if (g_usDataType & HEAP_IN) { + + /* + * Get data from repeat buffer. + */ + + if (g_iHeapCounter > g_iHEAPSize) { + + /* + * Data over-run. + */ + + return 0xFF; + } + + ucData = g_pucHeapMemory[g_iHeapCounter++]; + } else if (g_usDataType & LHEAP_IN) { + + /* + * Get data from intel buffer. + */ + + if (g_usIntelDataIndex >= g_usIntelBufferSize) { + return 0xFF; + } + + ucData = g_pucIntelBuffer[g_usIntelDataIndex++]; + } else { + if (read_bytes == bufsize) { + return 0xFF; + } + ucData = *fpga_image++; + read_bytes++; + + if (!(read_bytes % block_size)) { + printf("Downloading FPGA %ld/%ld completed\r", + read_bytes, + bufsize); + } + + if (expectedCRC != 0) { + ispVMCalculateCRC32(ucData); + } + } + + return ucData; +} + +signed char ispVM(void) +{ + char szFileVersion[9] = { 0 }; + signed char cRetCode = 0; + signed char cIndex = 0; + signed char cVersionIndex = 0; + unsigned char ucReadByte = 0; + unsigned short crc; + + g_pucHeapMemory = NULL; + g_iHeapCounter = 0; + g_iHEAPSize = 0; + g_usIntelDataIndex = 0; + g_usIntelBufferSize = 0; + g_usCalculatedCRC = 0; + expectedCRC = 0; + ucReadByte = GetByte(); + switch (ucReadByte) { + case FILE_CRC: + crc = (unsigned char)GetByte(); + crc <<= 8; + crc |= GetByte(); + expectedCRC = crc; + + for (cIndex = 0; cIndex < 8; cIndex++) + szFileVersion[cIndex] = GetByte(); + + break; + default: + szFileVersion[0] = (signed char) ucReadByte; + for (cIndex = 1; cIndex < 8; cIndex++) + szFileVersion[cIndex] = GetByte(); + + break; + } + + /* + * + * Compare the VME file version against the supported version. + * + */ + + for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0; + cVersionIndex++) { + for (cIndex = 0; cIndex < 8; cIndex++) { + if (szFileVersion[cIndex] != + g_szSupportedVersions[cVersionIndex][cIndex]) { + cRetCode = VME_VERSION_FAILURE; + break; + } + cRetCode = 0; + } + + if (cRetCode == 0) { + break; + } + } + + if (cRetCode < 0) { + return VME_VERSION_FAILURE; + } + + printf("VME file checked: starting downloading to FPGA\n"); + + ispVMStart(); + + cRetCode = ispVMCode(); + + ispVMEnd(); + ispVMFreeMem(); + puts("\n"); + + if (cRetCode == 0 && expectedCRC != 0 && + (expectedCRC != g_usCalculatedCRC)) { + printf("Expected CRC: 0x%.4X\n", expectedCRC); + printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC); + return VME_CRC_FAILURE; + } + return cRetCode; +} + +static int lattice_validate(Lattice_desc *desc, const char *fn) +{ + int ret_val = FALSE; + + if (desc) { + if ((desc->family > min_lattice_type) && + (desc->family < max_lattice_type)) { + if ((desc->iface > min_lattice_iface_type) && + (desc->iface < max_lattice_iface_type)) { + if (desc->size) { + ret_val = TRUE; + } else { + printf("%s: NULL part size\n", fn); + } + } else { + printf("%s: Invalid Interface type, %d\n", + fn, desc->iface); + } + } else { + printf("%s: Invalid family type, %d\n", + fn, desc->family); + } + } else { + printf("%s: NULL descriptor!\n", fn); + } + + return ret_val; +} + +int lattice_load(Lattice_desc *desc, void *buf, size_t bsize) +{ + int ret_val = FPGA_FAIL; + + if (!lattice_validate(desc, (char *)__func__)) { + printf("%s: Invalid device descriptor\n", __func__); + } else { + pfns = desc->iface_fns; + + switch (desc->family) { + case Lattice_XP2: + fpga_image = buf; + read_bytes = 0; + bufsize = bsize; + debug("%s: Launching the Lattice ISPVME Loader:" + " addr 0x%x size 0x%x...\n", + __func__, fpga_image, bufsize); + ret_val = ispVM(); + if (ret_val) + printf("%s: error %d downloading FPGA image\n", + __func__, ret_val); + else + puts("FPGA downloaded successfully\n"); + break; + default: + printf("%s: Unsupported family type, %d\n", + __func__, desc->family); + } + } + + return ret_val; +} + +int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize) +{ + puts("Dump not supported for Lattice FPGA\n"); + + return FPGA_FAIL; + +} + +int lattice_info(Lattice_desc *desc) +{ + int ret_val = FPGA_FAIL; + + if (lattice_validate(desc, (char *)__func__)) { + printf("Family: \t"); + switch (desc->family) { + case Lattice_XP2: + puts("XP2\n"); + break; + /* Add new family types here */ + default: + printf("Unknown family type, %d\n", desc->family); + } + + puts("Interface type:\t"); + switch (desc->iface) { + case lattice_jtag_mode: + puts("JTAG Mode\n"); + break; + /* Add new interface types here */ + default: + printf("Unsupported interface type, %d\n", desc->iface); + } + + printf("Device Size: \t%d bytes\n", + desc->size); + + if (desc->iface_fns) { + printf("Device Function Table @ 0x%p\n", + desc->iface_fns); + switch (desc->family) { + case Lattice_XP2: + break; + /* Add new family types here */ + default: + break; + } + } else { + puts("No Device Function Table.\n"); + } + + if (desc->desc) + printf("Model: \t%s\n", desc->desc); + + ret_val = FPGA_SUCCESS; + } else { + printf("%s: Invalid device descriptor\n", __func__); + } + + return ret_val; +} + + diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 4f15db9..5d668f8 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_STATUS_LED) += status_led.o COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o COBJS-$(CONFIG_FSL_PMIC) += fsl_pmic.o +COBJS-$(CONFIG_PDSP188x) += pdsp188x.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/pdsp188x.c b/drivers/misc/pdsp188x.c new file mode 100644 index 0000000..656b6ee --- /dev/null +++ b/drivers/misc/pdsp188x.c @@ -0,0 +1,57 @@ +/* + * Copyright 2010 Sergey Poselenov, Emcraft Systems, <sposelenov@emcraft.com> + * Copyright 2010 Ilya Yanok, Emcraft Systems, <yanok@emcraft.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include <common.h> +#include <led-display.h> +#include <asm/io.h> + +#ifdef CONFIG_CMD_DISPLAY +#define CWORD_CLEAR 0x80 +#define CLEAR_DELAY (110 * 2) +#define DISPLAY_SIZE 8 + +static int pos; /* Current display position */ + +/* Handle different display commands */ +void display_set(int cmd) +{ + if (cmd & DISPLAY_CLEAR) { + out_8((unsigned char *)CONFIG_SYS_DISP_CWORD, CWORD_CLEAR); + udelay(1000 * CLEAR_DELAY); + } + + if (cmd & DISPLAY_HOME) { + pos = 0; + } +} + +/* + * Display a character at the current display position. + * Characters beyond the display size are ignored. + */ +int display_putc(char c) +{ + if (pos >= DISPLAY_SIZE) + return -1; + + out_8((unsigned char *)CONFIG_SYS_DISP_CHR_RAM + pos++, c); + + return c; +} +#endif diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6603d74..2ead634 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_GENERIC_MMC) += mmc.o COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o +COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 80cd9bf..c543d83 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -627,6 +627,7 @@ int mmc_startup(struct mmc *mmc) uint mult, freq; u64 cmult, csize; struct mmc_cmd cmd; + char ext_csd[512]; /* Put the Card in Identify Mode */ cmd.cmdidx = MMC_CMD_ALL_SEND_CID; @@ -742,6 +743,16 @@ int mmc_startup(struct mmc *mmc) if (err) return err; + if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { + /* check ext_csd version and capacity */ + err = mmc_send_ext_csd(mmc, ext_csd); + if (!err & (ext_csd[192] >= 2)) { + mmc->capacity = ext_csd[212] << 0 | ext_csd[213] << 8 | + ext_csd[214] << 16 | ext_csd[215] << 24; + mmc->capacity *= 512; + } + } + if (IS_SD(mmc)) err = sd_change_freq(mmc); else diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c new file mode 100644 index 0000000..9271470 --- /dev/null +++ b/drivers/mmc/omap_hsmmc.c @@ -0,0 +1,415 @@ +/* + * (C) Copyright 2008 + * Texas Instruments, <www.ti.com> + * Sukumar Ghorai <s-ghorai@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation's version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <mmc.h> +#include <part.h> +#include <i2c.h> +#include <twl4030.h> +#include <asm/io.h> +#include <asm/arch/mmc_host_def.h> + +static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size); +static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int siz); +static struct mmc hsmmc_dev[2]; +unsigned char mmc_board_init(hsmmc_t *mmc_base) +{ +#if defined(CONFIG_TWL4030_POWER) + twl4030_power_mmc_init(); +#endif + +#if defined(CONFIG_OMAP34XX) + t2_t *t2_base = (t2_t *)T2_BASE; + struct prcm *prcm_base = (struct prcm *)PRCM_BASE; + + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, + &t2_base->pbias_lite); + + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, + &t2_base->devconf0); + + writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, + &t2_base->devconf1); + + writel(readl(&prcm_base->fclken1_core) | + EN_MMC1 | EN_MMC2 | EN_MMC3, + &prcm_base->fclken1_core); + + writel(readl(&prcm_base->iclken1_core) | + EN_MMC1 | EN_MMC2 | EN_MMC3, + &prcm_base->iclken1_core); +#endif + +/* TODO add appropriate OMAP4 init - none currently necessary */ + + return 0; +} + +void mmc_init_stream(hsmmc_t *mmc_base) +{ + + writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con); + + writel(MMC_CMD0, &mmc_base->cmd); + while (!(readl(&mmc_base->stat) & CC_MASK)) + ; + writel(CC_MASK, &mmc_base->stat) + ; + writel(MMC_CMD0, &mmc_base->cmd) + ; + while (!(readl(&mmc_base->stat) & CC_MASK)) + ; + writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con); +} + + +static int mmc_init_setup(struct mmc *mmc) +{ + hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + unsigned int reg_val; + unsigned int dsor; + + mmc_board_init(mmc_base); + + writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, + &mmc_base->sysconfig); + while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) + ; + writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); + while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0) + ; + writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); + writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP, + &mmc_base->capa); + + reg_val = readl(&mmc_base->con) & RESERVED_MASK; + + writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH | + MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK | + HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con); + + dsor = 240; + mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), + (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); + mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, + (dsor << CLKD_OFFSET) | ICE_OSCILLATE); + while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) + ; + writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); + + writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl); + + writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE | + IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC, + &mmc_base->ie); + + mmc_init_stream(mmc_base); + + return 0; +} + + +static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + unsigned int flags, mmc_stat; + unsigned int retry = 0x100000; + + + while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS) + ; + writel(0xFFFFFFFF, &mmc_base->stat); + while (readl(&mmc_base->stat)) + ; + /* + * CMDREG + * CMDIDX[13:8] : Command index + * DATAPRNT[5] : Data Present Select + * ENCMDIDX[4] : Command Index Check Enable + * ENCMDCRC[3] : Command CRC Check Enable + * RSPTYP[1:0] + * 00 = No Response + * 01 = Length 136 + * 10 = Length 48 + * 11 = Length 48 Check busy after response + */ + /* Delay added before checking the status of frq change + * retry not supported by mmc.c(core file) + */ + if (cmd->cmdidx == SD_CMD_APP_SEND_SCR) + udelay(50000); /* wait 50 ms */ + + if (!(cmd->resp_type & MMC_RSP_PRESENT)) + flags = 0; + else if (cmd->resp_type & MMC_RSP_136) + flags = RSP_TYPE_LGHT136 | CICE_NOCHECK; + else if (cmd->resp_type & MMC_RSP_BUSY) + flags = RSP_TYPE_LGHT48B; + else + flags = RSP_TYPE_LGHT48; + + /* enable default flags */ + flags = flags | (CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK | + MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE); + + if (cmd->resp_type & MMC_RSP_CRC) + flags |= CCCE_CHECK; + if (cmd->resp_type & MMC_RSP_OPCODE) + flags |= CICE_CHECK; + + if (data) { + if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK) || + (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK)) { + flags |= (MSBS_MULTIBLK | BCE_ENABLE); + data->blocksize = 512; + writel(data->blocksize | (data->blocks << 16), + &mmc_base->blk); + } else + writel(data->blocksize | NBLK_STPCNT, &mmc_base->blk); + + if (data->flags & MMC_DATA_READ) + flags |= (DP_DATA | DDIR_READ); + else + flags |= (DP_DATA | DDIR_WRITE); + } + + writel(cmd->cmdarg, &mmc_base->arg); + writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd); + + do { + mmc_stat = readl(&mmc_base->stat); + retry--; + } while ((mmc_stat == 0) && (retry > 0)); + + if (retry == 0) { + printf("%s : timeout: No status update\n", __func__); + return TIMEOUT; + } + + if ((mmc_stat & IE_CTO) != 0) + return TIMEOUT; + else if ((mmc_stat & ERRI_MASK) != 0) + return -1; + + if (mmc_stat & CC_MASK) { + writel(CC_MASK, &mmc_base->stat); + if (cmd->resp_type & MMC_RSP_PRESENT) { + if (cmd->resp_type & MMC_RSP_136) { + /* response type 2 */ + cmd->response[3] = readl(&mmc_base->rsp10); + cmd->response[2] = readl(&mmc_base->rsp32); + cmd->response[1] = readl(&mmc_base->rsp54); + cmd->response[0] = readl(&mmc_base->rsp76); + } else + /* response types 1, 1b, 3, 4, 5, 6 */ + cmd->response[0] = readl(&mmc_base->rsp10); + } + } + + if (data && (data->flags & MMC_DATA_READ)) { + mmc_read_data(mmc_base, data->dest, + data->blocksize * data->blocks); + } else if (data && (data->flags & MMC_DATA_WRITE)) { + mmc_write_data(mmc_base, data->src, + data->blocksize * data->blocks); + } + return 0; +} + +static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size) +{ + unsigned int *output_buf = (unsigned int *)buf; + unsigned int mmc_stat; + unsigned int count; + + /* + * Start Polled Read + */ + count = (size > MMCSD_SECTOR_SIZE) ? MMCSD_SECTOR_SIZE : size; + count /= 4; + + while (size) { + do { + mmc_stat = readl(&mmc_base->stat); + } while (mmc_stat == 0); + + if ((mmc_stat & ERRI_MASK) != 0) + return 1; + + if (mmc_stat & BRR_MASK) { + unsigned int k; + + writel(readl(&mmc_base->stat) | BRR_MASK, + &mmc_base->stat); + for (k = 0; k < count; k++) { + *output_buf = readl(&mmc_base->data); + output_buf++; + } + size -= (count*4); + } + + if (mmc_stat & BWR_MASK) + writel(readl(&mmc_base->stat) | BWR_MASK, + &mmc_base->stat); + + if (mmc_stat & TC_MASK) { + writel(readl(&mmc_base->stat) | TC_MASK, + &mmc_base->stat); + break; + } + } + return 0; +} + +static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int size) +{ + unsigned int *input_buf = (unsigned int *)buf; + unsigned int mmc_stat; + unsigned int count; + + /* + * Start Polled Read + */ + count = (size > MMCSD_SECTOR_SIZE) ? MMCSD_SECTOR_SIZE : size; + count /= 4; + + while (size) { + do { + mmc_stat = readl(&mmc_base->stat); + } while (mmc_stat == 0); + + if ((mmc_stat & ERRI_MASK) != 0) + return 1; + + if (mmc_stat & BWR_MASK) { + unsigned int k; + + writel(readl(&mmc_base->stat) | BWR_MASK, + &mmc_base->stat); + for (k = 0; k < count; k++) { + writel(*input_buf, &mmc_base->data); + input_buf++; + } + size -= (count*4); + } + + if (mmc_stat & BRR_MASK) + writel(readl(&mmc_base->stat) | BRR_MASK, + &mmc_base->stat); + + if (mmc_stat & TC_MASK) { + writel(readl(&mmc_base->stat) | TC_MASK, + &mmc_base->stat); + break; + } + } + return 0; +} + +static void mmc_set_ios(struct mmc *mmc) +{ + hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + unsigned int dsor = 0; + + /* configue bus width */ + switch (mmc->bus_width) { + case 8: + writel(readl(&mmc_base->con) | DTW_8_BITMODE, + &mmc_base->con); + break; + + case 4: + writel(readl(&mmc_base->con) & ~DTW_8_BITMODE, + &mmc_base->con); + writel(readl(&mmc_base->hctl) | DTW_4_BITMODE, + &mmc_base->hctl); + break; + + case 1: + default: + writel(readl(&mmc_base->con) & ~DTW_8_BITMODE, + &mmc_base->con); + writel(readl(&mmc_base->hctl) & ~DTW_4_BITMODE, + &mmc_base->hctl); + break; + } + + /* configure clock with 96Mhz system clock. + */ + if (mmc->clock != 0) { + dsor = (MMC_CLOCK_REFERENCE * 1000000 / mmc->clock); + if ((MMC_CLOCK_REFERENCE * 1000000) / dsor > mmc->clock) + dsor++; + } + + mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), + (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); + + mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, + (dsor << CLKD_OFFSET) | ICE_OSCILLATE); + + while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) + ; + writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); +} + +int omap_mmc_init(int dev_index) +{ + struct mmc *mmc; + + mmc = &hsmmc_dev[dev_index]; + + sprintf(mmc->name, "OMAP SD/MMC"); + mmc->send_cmd = mmc_send_cmd; + mmc->set_ios = mmc_set_ios; + mmc->init = mmc_init_setup; + + switch (dev_index) { + case 0: + mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE; + break; + case 1: + mmc->priv = (hsmmc_t *)OMAP_HSMMC2_BASE; + break; + case 2: + mmc->priv = (hsmmc_t *)OMAP_HSMMC3_BASE; + break; + default: + mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE; + return 1; + } + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; + mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; + + mmc->f_min = 400000; + mmc->f_max = 52000000; + + mmc_register(mmc); + + return 0; +} + diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 02dd27f..798902f 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2033,7 +2033,7 @@ unsigned long flash_init (void) printf ("## Unknown FLASH on Bank %d " "- Size = 0x%08lx = %ld MB\n", i+1, flash_info[i].size, - flash_info[i].size << 20); + flash_info[i].size >> 20); #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ } #ifdef CONFIG_SYS_FLASH_PROTECTION diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 6eb52ed..a195dda 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -142,3 +142,47 @@ void put_mtd_device(struct mtd_info *mtd) c = --mtd->usecount; BUG_ON(c < 0); } + +#if defined(CONFIG_CMD_MTDPARTS_SPREAD) +/** + * mtd_get_len_incl_bad + * + * Check if length including bad blocks fits into device. + * + * @param mtd an MTD device + * @param offset offset in flash + * @param length image length + * @return image length including bad blocks in *len_incl_bad and whether or not + * the length returned was truncated in *truncated + */ +void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, + const uint64_t length, uint64_t *len_incl_bad, + int *truncated) +{ + *truncated = 0; + *len_incl_bad = 0; + + if (!mtd->block_isbad) { + *len_incl_bad = length; + return; + } + + uint64_t len_excl_bad = 0; + uint64_t block_len; + + while (len_excl_bad < length) { + if (offset >= mtd->size) { + *truncated = 1; + return; + } + + block_len = mtd->erasesize - (offset & (mtd->erasesize - 1)); + + if (!mtd->block_isbad(mtd, offset & ~(mtd->erasesize - 1))) + len_excl_bad += block_len; + + *len_incl_bad += block_len; + offset += block_len; + } +} +#endif /* defined(CONFIG_CMD_MTDPARTS_SPREAD) */ diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index e2e43ea..f647e43 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -230,18 +230,6 @@ static void part_sync(struct mtd_info *mtd) part->master->sync(part->master); } -static int part_suspend(struct mtd_info *mtd) -{ - struct mtd_part *part = PART(mtd); - return part->master->suspend(part->master); -} - -static void part_resume(struct mtd_info *mtd) -{ - struct mtd_part *part = PART(mtd); - part->master->resume(part->master); -} - static int part_block_isbad(struct mtd_info *mtd, loff_t ofs) { struct mtd_part *part = PART(mtd); @@ -339,10 +327,6 @@ static struct mtd_part *add_one_partition(struct mtd_info *master, slave->mtd.get_fact_prot_info = part_get_fact_prot_info; if (master->sync) slave->mtd.sync = part_sync; - if (!partno && master->suspend && master->resume) { - slave->mtd.suspend = part_suspend; - slave->mtd.resume = part_resume; - } if (master->lock) slave->mtd.lock = part_lock; if (master->unlock) diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index c5a86d6..d41579c 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -481,7 +481,8 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat, * Set the addr_calc_st bit(bit no 13) in the NAND Flash Control * register to 1. */ - __raw_writel(1 << 13, &davinci_emif_regs->nandfcr); + __raw_writel(DAVINCI_NANDFCR_4BIT_CALC_START, + &davinci_emif_regs->nandfcr); /* * Wait for the corr_state field (bits 8 to 11) in the diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 7d17846..21cc5a3 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -32,30 +32,6 @@ * */ -/* XXX U-BOOT XXX */ -#if 0 -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/types.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/nand_ecc.h> -#include <linux/mtd/compatmac.h> -#include <linux/interrupt.h> -#include <linux/bitops.h> -#include <linux/leds.h> -#include <asm/io.h> - -#ifdef CONFIG_MTD_PARTITIONS -#include <linux/mtd/partitions.h> -#endif - -#endif - #include <common.h> #define ENOTSUPP 524 /* Operation is not supported */ @@ -75,10 +51,6 @@ #include <asm/io.h> #include <asm/errno.h> -#ifdef CONFIG_JFFS2_NAND -#include <jffs2/jffs2.h> -#endif - /* * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting * a flash. NAND flash is initialized prior to interrupts so standard timers @@ -143,44 +115,17 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, static int nand_wait(struct mtd_info *mtd, struct nand_chip *this); -/* - * For devices which display every fart in the system on a separate LED. Is - * compiled away when LED support is disabled. - */ -/* XXX U-BOOT XXX */ -#if 0 -DEFINE_LED_TRIGGER(nand_led_trigger); -#endif - /** * nand_release_device - [GENERIC] release chip * @mtd: MTD device structure * * Deselect, release chip lock and wake up anyone waiting on the device */ -/* XXX U-BOOT XXX */ -#if 0 -static void nand_release_device(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - /* De-select the NAND device */ - chip->select_chip(mtd, -1); - - /* Release the controller and the chip */ - spin_lock(&chip->controller->lock); - chip->controller->active = NULL; - chip->state = FL_READY; - wake_up(&chip->controller->wq); - spin_unlock(&chip->controller->lock); -} -#else static void nand_release_device (struct mtd_info *mtd) { struct nand_chip *this = mtd->priv; this->select_chip(mtd, -1); /* De-select the NAND device */ } -#endif /** * nand_read_byte - [DEFAULT] read one byte from the chip @@ -490,24 +435,6 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, * Wait for the ready pin, after a command * The timeout is catched later. */ -/* XXX U-BOOT XXX */ -#if 0 -void nand_wait_ready(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - unsigned long timeo = jiffies + 2; - - led_trigger_event(nand_led_trigger, LED_FULL); - /* wait until command is processed or timeout occures */ - do { - if (chip->dev_ready(mtd)) - break; - touch_softlockup_watchdog(); - } while (time_before(jiffies, timeo)); - led_trigger_event(nand_led_trigger, LED_OFF); -} -EXPORT_SYMBOL_GPL(nand_wait_ready); -#else void nand_wait_ready(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; @@ -522,7 +449,6 @@ void nand_wait_ready(struct mtd_info *mtd) break; } } -#endif /** * nand_command - [DEFAULT] Send command to NAND device @@ -759,45 +685,11 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, * * Get the device and lock it for exclusive access */ -/* XXX U-BOOT XXX */ -#if 0 -static int -nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) -{ - spinlock_t *lock = &chip->controller->lock; - wait_queue_head_t *wq = &chip->controller->wq; - DECLARE_WAITQUEUE(wait, current); - retry: - spin_lock(lock); - - /* Hardware controller shared among independend devices */ - /* Hardware controller shared among independend devices */ - if (!chip->controller->active) - chip->controller->active = chip; - - if (chip->controller->active == chip && chip->state == FL_READY) { - chip->state = new_state; - spin_unlock(lock); - return 0; - } - if (new_state == FL_PM_SUSPENDED) { - spin_unlock(lock); - return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; - } - set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(wq, &wait); - spin_unlock(lock); - schedule(); - remove_wait_queue(wq, &wait); - goto retry; -} -#else static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state) { this->state = new_state; return 0; } -#endif /** * nand_wait - [DEFAULT] wait until the command is done @@ -808,46 +700,6 @@ static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int ne * Erase can take up to 400ms and program up to 20ms according to * general NAND and SmartMedia specs */ -/* XXX U-BOOT XXX */ -#if 0 -static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) -{ - - unsigned long timeo = jiffies; - int status, state = chip->state; - - if (state == FL_ERASING) - timeo += (HZ * 400) / 1000; - else - timeo += (HZ * 20) / 1000; - - led_trigger_event(nand_led_trigger, LED_FULL); - - /* Apply this short delay always to ensure that we do wait tWB in - * any case on any machine. */ - ndelay(100); - - if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) - chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); - else - chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); - - while (time_before(jiffies, timeo)) { - if (chip->dev_ready) { - if (chip->dev_ready(mtd)) - break; - } else { - if (chip->read_byte(mtd) & NAND_STATUS_READY) - break; - } - cond_resched(); - } - led_trigger_event(nand_led_trigger, LED_OFF); - - status = (int)chip->read_byte(mtd); - return status; -} -#else static int nand_wait(struct mtd_info *mtd, struct nand_chip *this) { unsigned long timeo; @@ -886,7 +738,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this) return this->read_byte(mtd); } -#endif /** * nand_read_page_raw - [Intern] read raw page data without ecc @@ -2001,13 +1852,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, if (!writelen) return 0; - /* reject writes, which are not page aligned */ - if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { - printk(KERN_NOTICE "nand_write: " - "Attempt to write not page aligned data\n"); - return -EINVAL; - } - column = to & (mtd->writesize - 1); subpage = column || (writelen & (mtd->writesize - 1)); @@ -2523,32 +2367,6 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) return chip->block_markbad(mtd, ofs); } -/** - * nand_suspend - [MTD Interface] Suspend the NAND flash - * @mtd: MTD device structure - */ -static int nand_suspend(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - return nand_get_device(chip, mtd, FL_PM_SUSPENDED); -} - -/** - * nand_resume - [MTD Interface] Resume the NAND flash - * @mtd: MTD device structure - */ -static void nand_resume(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - if (chip->state == FL_PM_SUSPENDED) - nand_release_device(mtd); - else - printk(KERN_ERR "nand_resume() called for a chip which is not " - "in suspended state\n"); -} - /* * Set default functions */ @@ -2584,17 +2402,8 @@ static void nand_set_defaults(struct nand_chip *chip, int busw) chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; if (!chip->scan_bbt) chip->scan_bbt = nand_default_bbt; - - if (!chip->controller) { + if (!chip->controller) chip->controller = &chip->hwcontrol; - - /* XXX U-BOOT XXX */ -#if 0 - spin_lock_init(&chip->controller->lock); - init_waitqueue_head(&chip->controller->wq); -#endif - } - } /* @@ -3028,8 +2837,6 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->sync = nand_sync; mtd->lock = NULL; mtd->unlock = NULL; - mtd->suspend = nand_suspend; - mtd->resume = nand_resume; mtd->block_isbad = nand_block_isbad; mtd->block_markbad = nand_block_markbad; @@ -3043,16 +2850,6 @@ int nand_scan_tail(struct mtd_info *mtd) return 0; } -/* module_text_address() isn't exported, and it's mostly a pointless - test if this is a module _anyway_ -- they'd have to try _really_ hard - to call us from in-kernel code if the core NAND support is modular. */ -#ifdef MODULE -#define caller_is_module() (1) -#else -#define caller_is_module() \ - module_text_address((unsigned long)__builtin_return_address(0)) -#endif - /** * nand_scan - [NAND Interface] Scan for the NAND device * @mtd: MTD device structure @@ -3069,15 +2866,6 @@ int nand_scan(struct mtd_info *mtd, int maxchips) { int ret; - /* Many callers got this wrong, so check for it for a while... */ - /* XXX U-BOOT XXX */ -#if 0 - if (!mtd->owner && caller_is_module()) { - printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); - BUG(); - } -#endif - ret = nand_scan_ident(mtd, maxchips); if (!ret) ret = nand_scan_tail(mtd); @@ -3096,40 +2884,9 @@ void nand_release(struct mtd_info *mtd) /* Deregister partitions */ del_mtd_partitions(mtd); #endif - /* Deregister the device */ - /* XXX U-BOOT XXX */ -#if 0 - del_mtd_device(mtd); -#endif /* Free bad block table memory */ kfree(chip->bbt); if (!(chip->options & NAND_OWN_BUFFERS)) kfree(chip->buffers); } - -/* XXX U-BOOT XXX */ -#if 0 -EXPORT_SYMBOL_GPL(nand_scan); -EXPORT_SYMBOL_GPL(nand_scan_ident); -EXPORT_SYMBOL_GPL(nand_scan_tail); -EXPORT_SYMBOL_GPL(nand_release); - -static int __init nand_base_init(void) -{ - led_trigger_register_simple("nand-disk", &nand_led_trigger); - return 0; -} - -static void __exit nand_base_exit(void) -{ - led_trigger_unregister_simple(nand_led_trigger); -} - -module_init(nand_base_init); -module_exit(nand_base_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); -MODULE_DESCRIPTION("Generic NAND flash driver code"); -#endif diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 2fe68ab..521ddde 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -58,19 +58,6 @@ #include <asm/errno.h> -/* XXX U-BOOT XXX */ -#if 0 -#include <linux/slab.h> -#include <linux/types.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/nand_ecc.h> -#include <linux/mtd/compatmac.h> -#include <linux/bitops.h> -#include <linux/delay.h> -#include <linux/vmalloc.h> -#endif - /** * check_pattern - [GENERIC] check if a pattern is in the buffer * @buf: the buffer to search @@ -1231,9 +1218,3 @@ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) } return 1; } - -/* XXX U-BOOT XXX */ -#if 0 -EXPORT_SYMBOL(nand_scan_bbt); -EXPORT_SYMBOL(nand_default_bbt); -#endif diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c index 463f9cb..52bc916 100644 --- a/drivers/mtd/nand/nand_ecc.c +++ b/drivers/mtd/nand/nand_ecc.c @@ -37,14 +37,6 @@ #include <common.h> -/* XXX U-BOOT XXX */ -#if 0 -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/mtd/nand_ecc.h> -#endif - #include <asm/errno.h> #include <linux/mtd/mtd.h> @@ -140,10 +132,6 @@ int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, return 0; } -/* XXX U-BOOT XXX */ -#if 0 -EXPORT_SYMBOL(nand_calculate_ecc); -#endif #endif /* CONFIG_NAND_SPL */ static inline int countbits(uint32_t byte) @@ -212,8 +200,3 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat, return -EBADMSG; } - -/* XXX U-BOOT XXX */ -#if 0 -EXPORT_SYMBOL(nand_correct_data); -#endif diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 29c42f7..22c7411 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -28,6 +28,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * + * Copyright 2010 Freescale Semiconductor + * The portions of this file whose copyright is held by Freescale and which + * are not considered a derived work of GPL v2-only code may be distributed + * and/or modified under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. */ #include <common.h> @@ -69,7 +75,7 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) { struct jffs2_unknown_node cleanmarker; erase_info_t erase; - ulong erase_length; + unsigned long erase_length, erased_length; /* in blocks */ int bbtest = 1; int result; int percent_complete = -1; @@ -78,13 +84,19 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) struct mtd_oob_ops oob_opts; struct nand_chip *chip = meminfo->priv; + if ((opts->offset & (meminfo->writesize - 1)) != 0) { + printf("Attempt to erase non page aligned data\n"); + return -1; + } + memset(&erase, 0, sizeof(erase)); memset(&oob_opts, 0, sizeof(oob_opts)); erase.mtd = meminfo; erase.len = meminfo->erasesize; erase.addr = opts->offset; - erase_length = opts->length; + erase_length = lldiv(opts->length + meminfo->erasesize - 1, + meminfo->erasesize); cleanmarker.magic = cpu_to_je16 (JFFS2_MAGIC_BITMASK); cleanmarker.nodetype = cpu_to_je16 (JFFS2_NODETYPE_CLEANMARKER); @@ -108,15 +120,8 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) priv_nand->bbt = NULL; } - if (erase_length < meminfo->erasesize) { - printf("Warning: Erase size 0x%08lx smaller than one " \ - "erase block 0x%08x\n",erase_length, meminfo->erasesize); - printf(" Erasing 0x%08x instead\n", meminfo->erasesize); - erase_length = meminfo->erasesize; - } - - for (; - erase.addr < opts->offset + erase_length; + for (erased_length = 0; + erased_length < erase_length; erase.addr += meminfo->erasesize) { WATCHDOG_RESET (); @@ -129,6 +134,10 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) "0x%08llx " " \n", erase.addr); + + if (!opts->spread) + erased_length++; + continue; } else if (ret < 0) { @@ -139,6 +148,8 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) } } + erased_length++; + result = meminfo->erase(meminfo, &erase); if (result != 0) { printf("\n%s: MTD Erase failure: %d\n", @@ -165,9 +176,7 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) } if (!opts->quiet) { - unsigned long long n =(unsigned long long) - (erase.addr + meminfo->erasesize - opts->offset) - * 100; + unsigned long long n = erased_length * 100ULL; int percent; do_div(n, erase_length); @@ -202,41 +211,6 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) return 0; } -/* XXX U-BOOT XXX */ -#if 0 - -#define MAX_PAGE_SIZE 2048 -#define MAX_OOB_SIZE 64 - -/* - * buffer array used for writing data - */ -static unsigned char data_buf[MAX_PAGE_SIZE]; -static unsigned char oob_buf[MAX_OOB_SIZE]; - -/* OOB layouts to pass into the kernel as default */ -static struct nand_ecclayout none_ecclayout = { - .useecc = MTD_NANDECC_OFF, -}; - -static struct nand_ecclayout jffs2_ecclayout = { - .useecc = MTD_NANDECC_PLACE, - .eccbytes = 6, - .eccpos = { 0, 1, 2, 3, 6, 7 } -}; - -static struct nand_ecclayout yaffs_ecclayout = { - .useecc = MTD_NANDECC_PLACE, - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15} -}; - -static struct nand_ecclayout autoplace_ecclayout = { - .useecc = MTD_NANDECC_AUTOPLACE -}; -#endif - -/* XXX U-BOOT XXX */ #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK /****************************************************************************** @@ -423,36 +397,43 @@ int nand_unlock(struct mtd_info *mtd, ulong start, ulong length) #endif /** - * get_len_incl_bad + * check_skip_len * - * Check if length including bad blocks fits into device. + * Check if there are any bad blocks, and whether length including bad + * blocks fits into device * * @param nand NAND device * @param offset offset in flash * @param length image length - * @return image length including bad blocks + * @return 0 if the image fits and there are no bad blocks + * 1 if the image fits, but there are bad blocks + * -1 if the image does not fit */ -static size_t get_len_incl_bad (nand_info_t *nand, loff_t offset, - const size_t length) +static int check_skip_len(nand_info_t *nand, loff_t offset, size_t length) { - size_t len_incl_bad = 0; size_t len_excl_bad = 0; - size_t block_len; + int ret = 0; while (len_excl_bad < length) { - block_len = nand->erasesize - (offset & (nand->erasesize - 1)); + size_t block_len, block_off; + loff_t block_start; - if (!nand_block_isbad (nand, offset & ~(nand->erasesize - 1))) - len_excl_bad += block_len; + if (offset >= nand->size) + return -1; - len_incl_bad += block_len; - offset += block_len; + block_start = offset & ~(loff_t)(nand->erasesize - 1); + block_off = offset & (nand->erasesize - 1); + block_len = nand->erasesize - block_off; - if (offset >= nand->size) - break; + if (!nand_block_isbad(nand, block_start)) + len_excl_bad += block_len; + else + ret = 1; + + offset += block_len; } - return len_incl_bad; + return ret; } /** @@ -474,29 +455,41 @@ int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, { int rval; size_t left_to_write = *length; - size_t len_incl_bad; u_char *p_buffer = buffer; + int need_skip; - /* Reject writes, which are not page aligned */ - if ((offset & (nand->writesize - 1)) != 0 || - (*length & (nand->writesize - 1)) != 0) { + /* + * nand_write() handles unaligned, partial page writes. + * + * We allow length to be unaligned, for convenience in + * using the $filesize variable. + * + * However, starting at an unaligned offset makes the + * semantics of bad block skipping ambiguous (really, + * you should only start a block skipping access at a + * partition boundary). So don't try to handle that. + */ + if ((offset & (nand->writesize - 1)) != 0) { printf ("Attempt to write non page aligned data\n"); + *length = 0; return -EINVAL; } - len_incl_bad = get_len_incl_bad (nand, offset, *length); - - if ((offset + len_incl_bad) > nand->size) { + need_skip = check_skip_len(nand, offset, *length); + if (need_skip < 0) { printf ("Attempt to write outside the flash area\n"); + *length = 0; return -EINVAL; } - if (len_incl_bad == *length) { + if (!need_skip) { rval = nand_write (nand, offset, length, buffer); - if (rval != 0) - printf ("NAND write to offset %llx failed %d\n", - offset, rval); + if (rval == 0) + return 0; + *length = 0; + printf ("NAND write to offset %llx failed %d\n", + offset, rval); return rval; } @@ -553,20 +546,28 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, { int rval; size_t left_to_read = *length; - size_t len_incl_bad; u_char *p_buffer = buffer; + int need_skip; - len_incl_bad = get_len_incl_bad (nand, offset, *length); + if ((offset & (nand->writesize - 1)) != 0) { + printf ("Attempt to read non page aligned data\n"); + *length = 0; + return -EINVAL; + } - if ((offset + len_incl_bad) > nand->size) { + need_skip = check_skip_len(nand, offset, *length); + if (need_skip < 0) { printf ("Attempt to read outside the flash area\n"); + *length = 0; return -EINVAL; } - if (len_incl_bad == *length) { + if (!need_skip) { rval = nand_read (nand, offset, length, buffer); if (!rval || rval == -EUCLEAN) return 0; + + *length = 0; printf ("NAND read from offset %llx failed %d\n", offset, rval); return rval; diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index f9273ab..24e02c2 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -2213,6 +2213,7 @@ char *onenand_print_device_info(int device, int version) } static const struct onenand_manufacturers onenand_manuf_ids[] = { + {ONENAND_MFR_NUMONYX, "Numonyx"}, {ONENAND_MFR_SAMSUNG, "Samsung"}, }; diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index ea875dc..b4ba1dd 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -2,6 +2,8 @@ * SPI flash interface * * Copyright (C) 2008 Atmel Corporation + * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik + * * Licensed under the GPL-2 or later. */ @@ -96,13 +98,68 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, return ret; } +/* + * The following table holds all device probe functions + * + * shift: number of continuation bytes before the ID + * idcode: the expected IDCODE or 0xff for non JEDEC devices + * probe: the function to call + * + * Non JEDEC devices should be ordered in the table such that + * the probe functions with best detection algorithms come first. + * + * Several matching entries are permitted, they will be tried + * in sequence until a probe function returns non NULL. + * + * IDCODE_CONT_LEN may be redefined if a device needs to declare a + * larger "shift" value. IDCODE_PART_LEN generally shouldn't be + * changed. This is the max number of bytes probe functions may + * examine when looking up part-specific identification info. + * + * Probe functions will be given the idcode buffer starting at their + * manu id byte (the "idcode" in the table below). In other words, + * all of the continuation bytes will be skipped (the "shift" below). + */ +#define IDCODE_CONT_LEN 0 +#define IDCODE_PART_LEN 5 +static const struct { + const u8 shift; + const u8 idcode; + struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode); +} flashes[] = { + /* Keep it sorted by define name */ +#ifdef CONFIG_SPI_FLASH_ATMEL + { 0, 0x1f, spi_flash_probe_atmel, }, +#endif +#ifdef CONFIG_SPI_FLASH_MACRONIX + { 0, 0xc2, spi_flash_probe_macronix, }, +#endif +#ifdef CONFIG_SPI_FLASH_SPANSION + { 0, 0x01, spi_flash_probe_spansion, }, +#endif +#ifdef CONFIG_SPI_FLASH_SST + { 0, 0xbf, spi_flash_probe_sst, }, +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO + { 0, 0x20, spi_flash_probe_stmicro, }, +#endif +#ifdef CONFIG_SPI_FLASH_WINBOND + { 0, 0xef, spi_flash_probe_winbond, }, +#endif + /* Keep it sorted by best detection */ +#ifdef CONFIG_SPI_FLASH_STMICRO + { 0, 0xff, spi_flash_probe_stmicro, }, +#endif +}; +#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN) + struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode) { struct spi_slave *spi; - struct spi_flash *flash; - int ret; - u8 idcode[5]; + struct spi_flash *flash = NULL; + int ret, i, shift; + u8 idcode[IDCODE_LEN], *idp; spi = spi_setup_slave(bus, cs, max_hz, spi_mode); if (!spi) { @@ -117,53 +174,34 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, } /* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode)); + ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); if (ret) goto err_read_id; - debug("SF: Got idcode %02x %02x %02x %02x %02x\n", idcode[0], - idcode[1], idcode[2], idcode[3], idcode[4]); - - switch (idcode[0]) { -#ifdef CONFIG_SPI_FLASH_SPANSION - case 0x01: - flash = spi_flash_probe_spansion(spi, idcode); - break; +#ifdef DEBUG + printf("SF: Got idcodes\n"); + print_buffer(0, idcode, 1, sizeof(idcode), 0); #endif -#ifdef CONFIG_SPI_FLASH_ATMEL - case 0x1F: - flash = spi_flash_probe_atmel(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_MACRONIX - case 0xc2: - flash = spi_flash_probe_macronix(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_WINBOND - case 0xef: - flash = spi_flash_probe_winbond(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_STMICRO - case 0x20: - case 0xff: /* Let the stmicro func handle non-JEDEC ids */ - flash = spi_flash_probe_stmicro(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_SST - case 0xBF: - flash = spi_flash_probe_sst(spi, idcode); - break; -#endif - default: - printf("SF: Unsupported manufacturer %02X\n", idcode[0]); - flash = NULL; - break; - } - if (!flash) + /* count the number of continuation bytes */ + for (shift = 0, idp = idcode; + shift < IDCODE_CONT_LEN && *idp == 0x7f; + ++shift, ++idp) + continue; + + /* search the table for matches in shift and id */ + for (i = 0; i < ARRAY_SIZE(flashes); ++i) + if (flashes[i].shift == shift && flashes[i].idcode == *idp) { + /* we have a match, call probe */ + flash = flashes[i].probe(spi, idp); + if (flash) + break; + } + + if (!flash) { + printf("SF: Unsupported manufacturer %02x\n", *idp); goto err_manufacturer_probe; + } spi_release_bus(spi); diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 218eeff..79eb66b 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -40,6 +40,7 @@ COBJS-$(CONFIG_DNET) += dnet.o COBJS-$(CONFIG_E1000) += e1000.o COBJS-$(CONFIG_EEPRO100) += eepro100.o COBJS-$(CONFIG_ENC28J60) += enc28j60.o +COBJS-$(CONFIG_ENC28J60_LPC2292) += enc28j60_lpc2292.o COBJS-$(CONFIG_EP93XX) += ep93xx_eth.o COBJS-$(CONFIG_ETHOC) += ethoc.o COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c index ca2b16b..4e5685c 100644 --- a/drivers/net/at91_emac.c +++ b/drivers/net/at91_emac.c @@ -220,7 +220,7 @@ static int at91emac_phy_reset(struct eth_device *netdev) at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART)); - for (i = 0; i < 100000 / 100; i++) { + for (i = 0; i < 30000; i++) { at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMSR, &status); if (status & BMSR_ANEGCOMPLETE) @@ -233,7 +233,7 @@ static int at91emac_phy_reset(struct eth_device *netdev) } else { printf("%s: Autonegotiation timed out (status=0x%04x)\n", netdev->name, status); - return 1; + return -1; } return 0; } @@ -252,7 +252,7 @@ static int at91emac_phy_init(struct eth_device *netdev) MII_PHYSID1, &phy_id); if (phy_id == 0xffff) { printf("%s: No PHY present\n", netdev->name); - return 1; + return -1; } at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, @@ -261,7 +261,7 @@ static int at91emac_phy_init(struct eth_device *netdev) if (!(status & BMSR_LSTATUS)) { /* Try to re-negotiate if we don't have link already. */ if (at91emac_phy_reset(netdev)) - return 2; + return -2; for (i = 0; i < 100000 / 100; i++) { at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, @@ -273,7 +273,7 @@ static int at91emac_phy_init(struct eth_device *netdev) } if (!(status & BMSR_LSTATUS)) { VERBOSEP("%s: link down\n", netdev->name); - return 3; + return -3; } else { at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_ADVERTISE, &adv); @@ -298,7 +298,7 @@ int at91emac_UpdateLinkSpeed(at91_emac_t *emac) at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMSR, &stat1); if (!(stat1 & BMSR_LSTATUS)) /* link status up? */ - return 1; + return -1; if (stat1 & BMSR_100FULL) { /*set Emac for 100BaseTX and Full Duplex */ @@ -333,7 +333,7 @@ int at91emac_UpdateLinkSpeed(at91_emac_t *emac) &emac->cfg); return 0; } - return 1; + return 0; } static int at91emac_init(struct eth_device *netdev, bd_t *bd) @@ -399,7 +399,7 @@ static int at91emac_init(struct eth_device *netdev, bd_t *bd) at91emac_UpdateLinkSpeed(emac); return 0; } - return 1; + return -1; } static void at91emac_halt(struct eth_device *netdev) @@ -501,11 +501,11 @@ int at91emac_register(bd_t *bis, unsigned long iobase) iobase = AT91_EMAC_BASE; emac = malloc(sizeof(*emac)+512); if (emac == NULL) - return 1; + return -1; dev = malloc(sizeof(*dev)); if (dev == NULL) { free(emac); - return 1; + return -1; } /* alignment as per Errata (64 bytes) is insufficient! */ emacfix = (emac_device *) (((unsigned long) emac + 0x1ff) & 0xFFFFFE00); diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 41a9910..e06896f 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -65,21 +65,6 @@ void eth_mdio_enable(void) davinci_eth_mdio_enable(); } -static u_int8_t davinci_eth_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; - -/* - * This function must be called before emac_open() if you want to override - * the default mac address. - */ -void davinci_eth_set_mac_addr(const u_int8_t *addr) -{ - int i; - - for (i = 0; i < sizeof (davinci_eth_mac_addr); i++) { - davinci_eth_mac_addr[i] = addr[i]; - } -} - /* EMAC Addresses */ static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; @@ -100,6 +85,43 @@ static volatile u_int8_t active_phy_addr = 0xff; phy_t phy; +static int davinci_eth_set_mac_addr(struct eth_device *dev) +{ + unsigned long mac_hi; + unsigned long mac_lo; + + /* + * Set MAC Addresses & Init multicast Hash to 0 (disable any multicast + * receive) + * Using channel 0 only - other channels are disabled + * */ + writel(0, &adap_emac->MACINDEX); + mac_hi = (dev->enetaddr[3] << 24) | + (dev->enetaddr[2] << 16) | + (dev->enetaddr[1] << 8) | + (dev->enetaddr[0]); + mac_lo = (dev->enetaddr[5] << 8) | + (dev->enetaddr[4]); + + writel(mac_hi, &adap_emac->MACADDRHI); +#if defined(DAVINCI_EMAC_VERSION2) + writel(mac_lo | EMAC_MAC_ADDR_IS_VALID | EMAC_MAC_ADDR_MATCH, + &adap_emac->MACADDRLO); +#else + writel(mac_lo, &adap_emac->MACADDRLO); +#endif + + writel(0, &adap_emac->MACHASH1); + writel(0, &adap_emac->MACHASH2); + + /* Set source MAC address - REQUIRED */ + writel(mac_hi, &adap_emac->MACSRCADDRHI); + writel(mac_lo, &adap_emac->MACSRCADDRLO); + + + return 0; +} + static void davinci_eth_mdio_enable(void) { u_int32_t clkdiv; @@ -286,8 +308,6 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) dv_reg_p addr; u_int32_t clkdiv, cnt; volatile emac_desc *rx_desc; - unsigned long mac_hi; - unsigned long mac_lo; debug_emac("+ emac_open\n"); @@ -311,30 +331,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) writel(1, &adap_emac->TXCONTROL); writel(1, &adap_emac->RXCONTROL); - /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */ - /* Using channel 0 only - other channels are disabled */ - writel(0, &adap_emac->MACINDEX); - mac_hi = (davinci_eth_mac_addr[3] << 24) | - (davinci_eth_mac_addr[2] << 16) | - (davinci_eth_mac_addr[1] << 8) | - (davinci_eth_mac_addr[0]); - mac_lo = (davinci_eth_mac_addr[5] << 8) | - (davinci_eth_mac_addr[4]); - - writel(mac_hi, &adap_emac->MACADDRHI); -#if defined(DAVINCI_EMAC_VERSION2) - writel(mac_lo | EMAC_MAC_ADDR_IS_VALID | EMAC_MAC_ADDR_MATCH, - &adap_emac->MACADDRLO); -#else - writel(mac_lo, &adap_emac->MACADDRLO); -#endif - - writel(0, &adap_emac->MACHASH1); - writel(0, &adap_emac->MACHASH2); - - /* Set source MAC address - REQUIRED */ - writel(mac_hi, &adap_emac->MACSRCADDRHI); - writel(mac_lo, &adap_emac->MACSRCADDRLO); + davinci_eth_set_mac_addr(dev); /* Set DMA 8 TX / 8 RX Head pointers to 0 */ addr = &adap_emac->TX0HDP; @@ -636,6 +633,7 @@ int davinci_emac_initialize(void) dev->halt = davinci_eth_close; dev->send = davinci_eth_send_packet; dev->recv = davinci_eth_rcv_packet; + dev->write_hwaddr = davinci_eth_set_mac_addr; eth_register(dev); diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 3238a50..6c161b6 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -1,4 +1,9 @@ /* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * Martin Krause, Martin.Krause@tqs.de + * reworked original enc28j60.c + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of @@ -6,7 +11,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -15,968 +20,959 @@ * MA 02111-1307 USA */ -#include <config.h> #include <common.h> #include <net.h> -#include <asm/arch/hardware.h> -#include <asm/arch/spi.h> - -/* - * Control Registers in Bank 0 - */ - -#define CTL_REG_ERDPTL 0x00 -#define CTL_REG_ERDPTH 0x01 -#define CTL_REG_EWRPTL 0x02 -#define CTL_REG_EWRPTH 0x03 -#define CTL_REG_ETXSTL 0x04 -#define CTL_REG_ETXSTH 0x05 -#define CTL_REG_ETXNDL 0x06 -#define CTL_REG_ETXNDH 0x07 -#define CTL_REG_ERXSTL 0x08 -#define CTL_REG_ERXSTH 0x09 -#define CTL_REG_ERXNDL 0x0A -#define CTL_REG_ERXNDH 0x0B -#define CTL_REG_ERXRDPTL 0x0C -#define CTL_REG_ERXRDPTH 0x0D -#define CTL_REG_ERXWRPTL 0x0E -#define CTL_REG_ERXWRPTH 0x0F -#define CTL_REG_EDMASTL 0x10 -#define CTL_REG_EDMASTH 0x11 -#define CTL_REG_EDMANDL 0x12 -#define CTL_REG_EDMANDH 0x13 -#define CTL_REG_EDMADSTL 0x14 -#define CTL_REG_EDMADSTH 0x15 -#define CTL_REG_EDMACSL 0x16 -#define CTL_REG_EDMACSH 0x17 -/* these are common in all banks */ -#define CTL_REG_EIE 0x1B -#define CTL_REG_EIR 0x1C -#define CTL_REG_ESTAT 0x1D -#define CTL_REG_ECON2 0x1E -#define CTL_REG_ECON1 0x1F - -/* - * Control Registers in Bank 1 - */ - -#define CTL_REG_EHT0 0x00 -#define CTL_REG_EHT1 0x01 -#define CTL_REG_EHT2 0x02 -#define CTL_REG_EHT3 0x03 -#define CTL_REG_EHT4 0x04 -#define CTL_REG_EHT5 0x05 -#define CTL_REG_EHT6 0x06 -#define CTL_REG_EHT7 0x07 -#define CTL_REG_EPMM0 0x08 -#define CTL_REG_EPMM1 0x09 -#define CTL_REG_EPMM2 0x0A -#define CTL_REG_EPMM3 0x0B -#define CTL_REG_EPMM4 0x0C -#define CTL_REG_EPMM5 0x0D -#define CTL_REG_EPMM6 0x0E -#define CTL_REG_EPMM7 0x0F -#define CTL_REG_EPMCSL 0x10 -#define CTL_REG_EPMCSH 0x11 -#define CTL_REG_EPMOL 0x14 -#define CTL_REG_EPMOH 0x15 -#define CTL_REG_EWOLIE 0x16 -#define CTL_REG_EWOLIR 0x17 -#define CTL_REG_ERXFCON 0x18 -#define CTL_REG_EPKTCNT 0x19 - -/* - * Control Registers in Bank 2 - */ - -#define CTL_REG_MACON1 0x00 -#define CTL_REG_MACON2 0x01 -#define CTL_REG_MACON3 0x02 -#define CTL_REG_MACON4 0x03 -#define CTL_REG_MABBIPG 0x04 -#define CTL_REG_MAIPGL 0x06 -#define CTL_REG_MAIPGH 0x07 -#define CTL_REG_MACLCON1 0x08 -#define CTL_REG_MACLCON2 0x09 -#define CTL_REG_MAMXFLL 0x0A -#define CTL_REG_MAMXFLH 0x0B -#define CTL_REG_MAPHSUP 0x0D -#define CTL_REG_MICON 0x11 -#define CTL_REG_MICMD 0x12 -#define CTL_REG_MIREGADR 0x14 -#define CTL_REG_MIWRL 0x16 -#define CTL_REG_MIWRH 0x17 -#define CTL_REG_MIRDL 0x18 -#define CTL_REG_MIRDH 0x19 - -/* - * Control Registers in Bank 3 - */ - -#define CTL_REG_MAADR1 0x00 -#define CTL_REG_MAADR0 0x01 -#define CTL_REG_MAADR3 0x02 -#define CTL_REG_MAADR2 0x03 -#define CTL_REG_MAADR5 0x04 -#define CTL_REG_MAADR4 0x05 -#define CTL_REG_EBSTSD 0x06 -#define CTL_REG_EBSTCON 0x07 -#define CTL_REG_EBSTCSL 0x08 -#define CTL_REG_EBSTCSH 0x09 -#define CTL_REG_MISTAT 0x0A -#define CTL_REG_EREVID 0x12 -#define CTL_REG_ECOCON 0x15 -#define CTL_REG_EFLOCON 0x17 -#define CTL_REG_EPAUSL 0x18 -#define CTL_REG_EPAUSH 0x19 - - -/* - * PHY Register - */ - -#define PHY_REG_PHID1 0x02 -#define PHY_REG_PHID2 0x03 -/* taken from the Linux driver */ -#define PHY_REG_PHCON1 0x00 -#define PHY_REG_PHCON2 0x10 -#define PHY_REG_PHLCON 0x14 - -/* - * Receive Filter Register (ERXFCON) bits - */ - -#define ENC_RFR_UCEN 0x80 -#define ENC_RFR_ANDOR 0x40 -#define ENC_RFR_CRCEN 0x20 -#define ENC_RFR_PMEN 0x10 -#define ENC_RFR_MPEN 0x08 -#define ENC_RFR_HTEN 0x04 -#define ENC_RFR_MCEN 0x02 -#define ENC_RFR_BCEN 0x01 +#include <spi.h> +#include <malloc.h> +#include <netdev.h> +#include <miiphy.h> +#include "enc28j60.h" /* - * ECON1 Register Bits + * IMPORTANT: spi_claim_bus() and spi_release_bus() + * are called at begin and end of each of the following functions: + * enc_miiphy_read(), enc_miiphy_write(), enc_write_hwaddr(), + * enc_init(), enc_recv(), enc_send(), enc_halt() + * ALL other functions assume that the bus has already been claimed! + * Since NetReceive() might call enc_send() in return, the bus must be + * released, NetReceive() called and claimed again. */ -#define ENC_ECON1_TXRST 0x80 -#define ENC_ECON1_RXRST 0x40 -#define ENC_ECON1_DMAST 0x20 -#define ENC_ECON1_CSUMEN 0x10 -#define ENC_ECON1_TXRTS 0x08 -#define ENC_ECON1_RXEN 0x04 -#define ENC_ECON1_BSEL1 0x02 -#define ENC_ECON1_BSEL0 0x01 - /* - * ECON2 Register Bits + * Controller memory layout. + * We only allow 1 frame for transmission and reserve the rest + * for reception to handle as many broadcast packets as possible. + * Also use the memory from 0x0000 for receiver buffer. See errata pt. 5 + * 0x0000 - 0x19ff 6656 bytes receive buffer + * 0x1a00 - 0x1fff 1536 bytes transmit buffer = + * control(1)+frame(1518)+status(7)+reserve(10). */ -#define ENC_ECON2_AUTOINC 0x80 -#define ENC_ECON2_PKTDEC 0x40 -#define ENC_ECON2_PWRSV 0x20 -#define ENC_ECON2_VRPS 0x08 +#define ENC_RX_BUF_START 0x0000 +#define ENC_RX_BUF_END 0x19ff +#define ENC_TX_BUF_START 0x1a00 +#define ENC_TX_BUF_END 0x1fff +#define ENC_MAX_FRM_LEN 1518 +#define RX_RESET_COUNTER 1000 /* - * EIR Register Bits + * For non data transfer functions, like phy read/write, set hwaddr, init + * we do not need a full, time consuming init including link ready wait. + * This enum helps to bring the chip through the minimum necessary inits. */ -#define ENC_EIR_PKTIF 0x40 -#define ENC_EIR_DMAIF 0x20 -#define ENC_EIR_LINKIF 0x10 -#define ENC_EIR_TXIF 0x08 -#define ENC_EIR_WOLIF 0x04 -#define ENC_EIR_TXERIF 0x02 -#define ENC_EIR_RXERIF 0x01 +enum enc_initstate {none=0, setupdone, linkready}; +typedef struct enc_device { + struct eth_device *dev; /* back pointer */ + struct spi_slave *slave; + int rx_reset_counter; + u16 next_pointer; + u8 bank; /* current bank in enc28j60 */ + enum enc_initstate initstate; +} enc_dev_t; /* - * ESTAT Register Bits + * enc_bset: set bits in a common register + * enc_bclr: clear bits in a common register + * + * making the reg parameter u8 will give a compile time warning if the + * functions are called with a register not accessible in all Banks */ +static void enc_bset(enc_dev_t *enc, const u8 reg, const u8 data) +{ + u8 dout[2]; -#define ENC_ESTAT_INT 0x80 -#define ENC_ESTAT_LATECOL 0x10 -#define ENC_ESTAT_RXBUSY 0x04 -#define ENC_ESTAT_TXABRT 0x02 -#define ENC_ESTAT_CLKRDY 0x01 + dout[0] = CMD_BFS(reg); + dout[1] = data; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); +} -/* - * EIE Register Bits - */ +static void enc_bclr(enc_dev_t *enc, const u8 reg, const u8 data) +{ + u8 dout[2]; -#define ENC_EIE_INTIE 0x80 -#define ENC_EIE_PKTIE 0x40 -#define ENC_EIE_DMAIE 0x20 -#define ENC_EIE_LINKIE 0x10 -#define ENC_EIE_TXIE 0x08 -#define ENC_EIE_WOLIE 0x04 -#define ENC_EIE_TXERIE 0x02 -#define ENC_EIE_RXERIE 0x01 + dout[0] = CMD_BFC(reg); + dout[1] = data; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); +} /* - * MACON1 Register Bits + * high byte of the register contains bank number: + * 0: no bank switch necessary + * 1: switch to bank 0 + * 2: switch to bank 1 + * 3: switch to bank 2 + * 4: switch to bank 3 */ -#define ENC_MACON1_LOOPBK 0x10 -#define ENC_MACON1_TXPAUS 0x08 -#define ENC_MACON1_RXPAUS 0x04 -#define ENC_MACON1_PASSALL 0x02 -#define ENC_MACON1_MARXEN 0x01 - +static void enc_set_bank(enc_dev_t *enc, const u16 reg) +{ + u8 newbank = reg >> 8; + + if (newbank == 0 || newbank == enc->bank) + return; + switch (newbank) { + case 1: + enc_bclr(enc, CTL_REG_ECON1, + ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1); + break; + case 2: + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_BSEL0); + enc_bclr(enc, CTL_REG_ECON1, ENC_ECON1_BSEL1); + break; + case 3: + enc_bclr(enc, CTL_REG_ECON1, ENC_ECON1_BSEL0); + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_BSEL1); + break; + case 4: + enc_bset(enc, CTL_REG_ECON1, + ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1); + break; + } + enc->bank = newbank; +} /* - * MACON2 Register Bits + * local functions to access SPI + * + * reg: register inside ENC28J60 + * data: 8/16 bits to write + * c: number of retries + * + * enc_r8: read 8 bits + * enc_r16: read 16 bits + * enc_w8: write 8 bits + * enc_w16: write 16 bits + * enc_w8_retry: write 8 bits, verify and retry + * enc_rbuf: read from ENC28J60 into buffer + * enc_wbuf: write from buffer into ENC28J60 */ -#define ENC_MACON2_MARST 0x80 -#define ENC_MACON2_RNDRST 0x40 -#define ENC_MACON2_MARXRST 0x08 -#define ENC_MACON2_RFUNRST 0x04 -#define ENC_MACON2_MATXRST 0x02 -#define ENC_MACON2_TFUNRST 0x01 /* - * MACON3 Register Bits + * MAC and MII registers need a 3 byte SPI transfer to read, + * all other registers need a 2 byte SPI transfer. */ -#define ENC_MACON3_PADCFG2 0x80 -#define ENC_MACON3_PADCFG1 0x40 -#define ENC_MACON3_PADCFG0 0x20 -#define ENC_MACON3_TXCRCEN 0x10 -#define ENC_MACON3_PHDRLEN 0x08 -#define ENC_MACON3_HFRMEN 0x04 -#define ENC_MACON3_FRMLNEN 0x02 -#define ENC_MACON3_FULDPX 0x01 +static int enc_reg2nbytes(const u16 reg) +{ + /* check if MAC or MII register */ + return ((reg >= CTL_REG_MACON1 && reg <= CTL_REG_MIRDH) || + (reg >= CTL_REG_MAADR1 && reg <= CTL_REG_MAADR4) || + (reg == CTL_REG_MISTAT)) ? 3 : 2; +} /* - * MICMD Register Bits + * Read a byte register */ -#define ENC_MICMD_MIISCAN 0x02 -#define ENC_MICMD_MIIRD 0x01 +static u8 enc_r8(enc_dev_t *enc, const u16 reg) +{ + u8 dout[3]; + u8 din[3]; + int nbytes = enc_reg2nbytes(reg); + + enc_set_bank(enc, reg); + dout[0] = CMD_RCR(reg); + spi_xfer(enc->slave, nbytes * 8, dout, din, + SPI_XFER_BEGIN | SPI_XFER_END); + return din[nbytes-1]; +} /* - * MISTAT Register Bits + * Read a L/H register pair and return a word. + * Must be called with the L register's address. */ -#define ENC_MISTAT_NVALID 0x04 -#define ENC_MISTAT_SCAN 0x02 -#define ENC_MISTAT_BUSY 0x01 +static u16 enc_r16(enc_dev_t *enc, const u16 reg) +{ + u8 dout[3]; + u8 din[3]; + u16 result; + int nbytes = enc_reg2nbytes(reg); + + enc_set_bank(enc, reg); + dout[0] = CMD_RCR(reg); + spi_xfer(enc->slave, nbytes * 8, dout, din, + SPI_XFER_BEGIN | SPI_XFER_END); + result = din[nbytes-1]; + dout[0]++; /* next register */ + spi_xfer(enc->slave, nbytes * 8, dout, din, + SPI_XFER_BEGIN | SPI_XFER_END); + result |= din[nbytes-1] << 8; + return result; +} /* - * PHID1 and PHID2 values + * Write a byte register */ -#define ENC_PHID1_VALUE 0x0083 -#define ENC_PHID2_VALUE 0x1400 -#define ENC_PHID2_MASK 0xFC00 - - -#define ENC_SPI_SLAVE_CS 0x00010000 /* pin P1.16 */ -#define ENC_RESET 0x00020000 /* pin P1.17 */ +static void enc_w8(enc_dev_t *enc, const u16 reg, const u8 data) +{ + u8 dout[2]; -#define FAILSAFE_VALUE 5000 + enc_set_bank(enc, reg); + dout[0] = CMD_WCR(reg); + dout[1] = data; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); +} /* - * Controller memory layout: - * - * 0x0000 - 0x17ff 6k bytes receive buffer - * 0x1800 - 0x1fff 2k bytes transmit buffer - */ -/* Use the lower memory for receiver buffer. See errata pt. 5 */ -#define ENC_RX_BUF_START 0x0000 -#define ENC_TX_BUF_START 0x1800 -/* taken from the Linux driver */ -#define ENC_RX_BUF_END 0x17ff -#define ENC_TX_BUF_END 0x1fff - -/* maximum frame length */ -#define ENC_MAX_FRM_LEN 1518 - -#define enc_enable() PUT32(IO1CLR, ENC_SPI_SLAVE_CS) -#define enc_disable() PUT32(IO1SET, ENC_SPI_SLAVE_CS) -#define enc_cfg_spi() spi_set_cfg(0, 0, 0); spi_set_clock(8); - - -static unsigned char encReadReg (unsigned char regNo); -static void encWriteReg (unsigned char regNo, unsigned char data); -static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c); -static void encReadBuff (unsigned short length, unsigned char *pBuff); -static void encWriteBuff (unsigned short length, unsigned char *pBuff); -static void encBitSet (unsigned char regNo, unsigned char data); -static void encBitClr (unsigned char regNo, unsigned char data); -static void encReset (void); -static void encInit (unsigned char *pEthAddr); -static unsigned short phyRead (unsigned char addr); -static void phyWrite(unsigned char, unsigned short); -static void encPoll (void); -static void encRx (void); - -#define m_nic_read(reg) encReadReg(reg) -#define m_nic_write(reg, data) encWriteReg(reg, data) -#define m_nic_write_retry(reg, data, count) encWriteRegRetry(reg, data, count) -#define m_nic_read_data(len, buf) encReadBuff((len), (buf)) -#define m_nic_write_data(len, buf) encWriteBuff((len), (buf)) - -/* bit field set */ -#define m_nic_bfs(reg, data) encBitSet(reg, data) - -/* bit field clear */ -#define m_nic_bfc(reg, data) encBitClr(reg, data) - -static unsigned char bank = 0; /* current bank in enc28j60 */ -static unsigned char next_pointer_lsb; -static unsigned char next_pointer_msb; - -static unsigned char buffer[ENC_MAX_FRM_LEN]; -static int rxResetCounter = 0; - -#define RX_RESET_COUNTER 1000; - -/*----------------------------------------------------------------------------- - * Always returns 0 + * Write a L/H register pair. + * Must be called with the L register's address. */ -int eth_init (bd_t * bis) +static void enc_w16(enc_dev_t *enc, const u16 reg, const u16 data) { - unsigned char estatVal; - uchar enetaddr[6]; - - /* configure GPIO */ - (*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS; - (*((volatile unsigned long *) IO1DIR)) |= ENC_RESET; - - /* CS and RESET active low */ - PUT32 (IO1SET, ENC_SPI_SLAVE_CS); - PUT32 (IO1SET, ENC_RESET); - - spi_init (); - - /* taken from the Linux driver - dangerous stuff here! */ - /* Wait for CLKRDY to become set (i.e., check that we can communicate with - the ENC) */ - do - { - estatVal = m_nic_read(CTL_REG_ESTAT); - } while ((estatVal & 0x08) || (~estatVal & ENC_ESTAT_CLKRDY)); - - /* initialize controller */ - encReset (); - eth_getenv_enetaddr("ethaddr", enetaddr); - encInit (enetaddr); - - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */ - - return 0; + u8 dout[2]; + + enc_set_bank(enc, reg); + dout[0] = CMD_WCR(reg); + dout[1] = data; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + dout[0]++; /* next register */ + dout[1] = data >> 8; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); } -int eth_send (volatile void *packet, int length) +/* + * Write a byte register, verify and retry + */ +static void enc_w8_retry(enc_dev_t *enc, const u16 reg, const u8 data, const int c) { - /* check frame length, etc. */ - /* TODO: */ - - /* switch to bank 0 */ - m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); - - /* set EWRPT */ - m_nic_write (CTL_REG_EWRPTL, (ENC_TX_BUF_START & 0xff)); - m_nic_write (CTL_REG_EWRPTH, (ENC_TX_BUF_START >> 8)); - - /* set ETXND */ - m_nic_write (CTL_REG_ETXNDL, (length + ENC_TX_BUF_START) & 0xFF); - m_nic_write (CTL_REG_ETXNDH, (length + ENC_TX_BUF_START) >> 8); - - /* set ETXST */ - m_nic_write (CTL_REG_ETXSTL, ENC_TX_BUF_START & 0xFF); - m_nic_write (CTL_REG_ETXSTH, ENC_TX_BUF_START >> 8); - - /* write packet */ - m_nic_write_data (length, (unsigned char *) packet); + u8 dout[2]; + u8 readback; + int i; - /* taken from the Linux driver */ - /* Verify that the internal transmit logic has not been altered by excessive - collisions. See Errata B4 12 and 14. - */ - if (m_nic_read(CTL_REG_EIR) & ENC_EIR_TXERIF) { - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_TXRST); - m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_TXRST); + enc_set_bank(enc, reg); + for (i = 0; i < c; i++) { + dout[0] = CMD_WCR(reg); + dout[1] = data; + spi_xfer(enc->slave, 2 * 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + readback = enc_r8(enc, reg); + if (readback == data) + break; + /* wait 1ms */ + udelay(1000); + } + if (i == c) { + printf("%s: write reg 0x%03x failed\n", enc->dev->name, reg); } - m_nic_bfc(CTL_REG_EIR, (ENC_EIR_TXERIF | ENC_EIR_TXIF)); - - /* set ECON1.TXRTS */ - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_TXRTS); - - return 0; } - -/***************************************************************************** - * This function resets the receiver only. This function may be called from - * interrupt-context. +/* + * Read ENC RAM into buffer */ -static void encReceiverReset (void) +static void enc_rbuf(enc_dev_t *enc, const u16 length, u8 *buf) { - unsigned char econ1; - - econ1 = m_nic_read (CTL_REG_ECON1); - if ((econ1 & ENC_ECON1_RXRST) == 0) { - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXRST); - rxResetCounter = RX_RESET_COUNTER; - } + u8 dout[1]; + + dout[0] = CMD_RBM; + spi_xfer(enc->slave, 8, dout, NULL, SPI_XFER_BEGIN); + spi_xfer(enc->slave, length * 8, NULL, buf, SPI_XFER_END); +#ifdef DEBUG + puts("Rx:\n"); + print_buffer(0, buf, 1, length, 0); +#endif } -/***************************************************************************** - * receiver reset timer +/* + * Write buffer into ENC RAM */ -static void encReceiverResetCallback (void) +static void enc_wbuf(enc_dev_t *enc, const u16 length, const u8 *buf, const u8 control) { - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXRST); - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */ + u8 dout[2]; + dout[0] = CMD_WBM; + dout[1] = control; + spi_xfer(enc->slave, 2 * 8, dout, NULL, SPI_XFER_BEGIN); + spi_xfer(enc->slave, length * 8, buf, NULL, SPI_XFER_END); +#ifdef DEBUG + puts("Tx:\n"); + print_buffer(0, buf, 1, length, 0); +#endif } -/*----------------------------------------------------------------------------- - * Check for received packets. Call NetReceive for each packet. The return - * value is ignored by the caller. +/* + * Try to claim the SPI bus. + * Print error message on failure. */ -int eth_rx (void) +static int enc_claim_bus(enc_dev_t *enc) { - if (rxResetCounter > 0 && --rxResetCounter == 0) { - encReceiverResetCallback (); - } - - encPoll (); - - return 0; + int rc = spi_claim_bus(enc->slave); + if (rc) + printf("%s: failed to claim SPI bus\n", enc->dev->name); + return rc; } -void eth_halt (void) +/* + * Release previously claimed SPI bus. + * This function is mainly for symmetry to enc_claim_bus(). + * Let the toolchain decide to inline it... + */ +static void enc_release_bus(enc_dev_t *enc) { - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXEN); /* disable receive */ + spi_release_bus(enc->slave); } -/*****************************************************************************/ - -static void encPoll (void) +/* + * Read PHY register + */ +static u16 phy_read(enc_dev_t *enc, const u8 addr) { - unsigned char eir_reg; - volatile unsigned char estat_reg; - unsigned char pkt_cnt; + uint64_t etime; + u8 status; -#ifdef CONFIG_USE_IRQ - /* clear global interrupt enable bit in enc28j60 */ - m_nic_bfc (CTL_REG_EIE, ENC_EIE_INTIE); -#endif - estat_reg = m_nic_read (CTL_REG_ESTAT); - - eir_reg = m_nic_read (CTL_REG_EIR); - - if (eir_reg & ENC_EIR_TXIF) { - /* clear TXIF bit in EIR */ - m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXIF); + enc_w8(enc, CTL_REG_MIREGADR, addr); + enc_w8(enc, CTL_REG_MICMD, ENC_MICMD_MIIRD); + /* 1 second timeout - only happens on hardware problem */ + etime = get_ticks() + get_tbclk(); + /* poll MISTAT.BUSY bit until operation is complete */ + do + { + status = enc_r8(enc, CTL_REG_MISTAT); + } while (get_ticks() <= etime && (status & ENC_MISTAT_BUSY)); + if (status & ENC_MISTAT_BUSY) { + printf("%s: timeout reading phy\n", enc->dev->name); + return 0; } + enc_w8(enc, CTL_REG_MICMD, 0); + return enc_r16(enc, CTL_REG_MIRDL); +} - /* We have to use pktcnt and not pktif bit, see errata pt. 6 */ +/* + * Write PHY register + */ +static void phy_write(enc_dev_t *enc, const u8 addr, const u16 data) +{ + uint64_t etime; + u8 status; - /* move to bank 1 */ - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1); - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0); + enc_w8(enc, CTL_REG_MIREGADR, addr); + enc_w16(enc, CTL_REG_MIWRL, data); + /* 1 second timeout - only happens on hardware problem */ + etime = get_ticks() + get_tbclk(); + /* poll MISTAT.BUSY bit until operation is complete */ + do + { + status = enc_r8(enc, CTL_REG_MISTAT); + } while (get_ticks() <= etime && (status & ENC_MISTAT_BUSY)); + if (status & ENC_MISTAT_BUSY) { + printf("%s: timeout writing phy\n", enc->dev->name); + return; + } +} - /* read pktcnt */ - pkt_cnt = m_nic_read (CTL_REG_EPKTCNT); +/* + * Verify link status, wait if necessary + * + * Note: with a 10 MBit/s only PHY there is no autonegotiation possible, + * half/full duplex is a pure setup matter. For the time being, this driver + * will setup in half duplex mode only. + */ +static int enc_phy_link_wait(enc_dev_t *enc) +{ + u16 status; + int duplex; + uint64_t etime; + +#ifdef CONFIG_ENC_SILENTLINK + /* check if we have a link, then just return */ + status = phy_read(enc, PHY_REG_PHSTAT1); + if (status & ENC_PHSTAT1_LLSTAT) + return 0; +#endif - if (pkt_cnt > 0) { - if ((eir_reg & ENC_EIR_PKTIF) == 0) { - /*printf("encPoll: pkt cnt > 0, but pktif not set\n"); */ + /* wait for link with 1 second timeout */ + etime = get_ticks() + get_tbclk(); + while (get_ticks() <= etime) { + status = phy_read(enc, PHY_REG_PHSTAT1); + if (status & ENC_PHSTAT1_LLSTAT) { + /* now we have a link */ + status = phy_read(enc, PHY_REG_PHSTAT2); + duplex = (status & ENC_PHSTAT2_DPXSTAT) ? 1 : 0; + printf("%s: link up, 10Mbps %s-duplex\n", + enc->dev->name, duplex ? "full" : "half"); + return 0; } - encRx (); - /* clear PKTIF bit in EIR, this should not need to be done but it - seems like we get problems if we do not */ - m_nic_bfc (CTL_REG_EIR, ENC_EIR_PKTIF); + udelay(1000); } - if (eir_reg & ENC_EIR_RXERIF) { - printf ("encPoll: rx error\n"); - m_nic_bfc (CTL_REG_EIR, ENC_EIR_RXERIF); - } - if (eir_reg & ENC_EIR_TXERIF) { - printf ("encPoll: tx error\n"); - m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXERIF); - } - -#ifdef CONFIG_USE_IRQ - /* set global interrupt enable bit in enc28j60 */ - m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE); -#endif + /* timeout occured */ + printf("%s: link down\n", enc->dev->name); + return 1; } -static void encRx (void) +/* + * This function resets the receiver only. + */ +static void enc_reset_rx(enc_dev_t *enc) { - unsigned short pkt_len; - unsigned short copy_len; - unsigned short status; - unsigned char eir_reg; - unsigned char pkt_cnt = 0; - unsigned short rxbuf_rdpt; + u8 econ1; - /* switch to bank 0 */ - m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); + econ1 = enc_r8(enc, CTL_REG_ECON1); + if ((econ1 & ENC_ECON1_RXRST) == 0) { + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_RXRST); + enc->rx_reset_counter = RX_RESET_COUNTER; + } +} - m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb); - m_nic_write (CTL_REG_ERDPTH, next_pointer_msb); +/* + * Reset receiver and reenable it. + */ +static void enc_reset_rx_call(enc_dev_t *enc) +{ + enc_bclr(enc, CTL_REG_ECON1, ENC_ECON1_RXRST); + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_RXEN); +} +/* + * Copy a packet from the receive ring and forward it to + * the protocol stack. + */ +static void enc_receive(enc_dev_t *enc) +{ + u8 *packet = (u8 *)NetRxPackets[0]; + u16 pkt_len; + u16 copy_len; + u16 status; + u8 eir_reg; + u8 pkt_cnt = 0; + u16 rxbuf_rdpt; + u8 hbuf[6]; + + enc_w16(enc, CTL_REG_ERDPTL, enc->next_pointer); do { - m_nic_read_data (6, buffer); - next_pointer_lsb = buffer[0]; - next_pointer_msb = buffer[1]; - pkt_len = buffer[2]; - pkt_len |= (unsigned short) buffer[3] << 8; - status = buffer[4]; - status |= (unsigned short) buffer[5] << 8; - + enc_rbuf(enc, 6, hbuf); + enc->next_pointer = hbuf[0] | (hbuf[1] << 8); + pkt_len = hbuf[2] | (hbuf[3] << 8); + status = hbuf[4] | (hbuf[5] << 8); + debug("next_pointer=$%04x pkt_len=%u status=$%04x\n", + enc->next_pointer, pkt_len, status); if (pkt_len <= ENC_MAX_FRM_LEN) copy_len = pkt_len; else copy_len = 0; - if ((status & (1L << 7)) == 0) /* check Received Ok bit */ copy_len = 0; - - /* taken from the Linux driver */ /* check if next pointer is resonable */ - if ((((unsigned int)next_pointer_msb << 8) | - (unsigned int)next_pointer_lsb) >= ENC_TX_BUF_START) + if (enc->next_pointer >= ENC_TX_BUF_START) copy_len = 0; - if (copy_len > 0) { - m_nic_read_data (copy_len, buffer); + enc_rbuf(enc, copy_len, packet); } - /* advance read pointer to next pointer */ - m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb); - m_nic_write (CTL_REG_ERDPTH, next_pointer_msb); - + enc_w16(enc, CTL_REG_ERDPTL, enc->next_pointer); /* decrease packet counter */ - m_nic_bfs (CTL_REG_ECON2, ENC_ECON2_PKTDEC); - - /* taken from the Linux driver */ - /* Only odd values should be written to ERXRDPTL, + enc_bset(enc, CTL_REG_ECON2, ENC_ECON2_PKTDEC); + /* + * Only odd values should be written to ERXRDPTL, * see errata B4 pt.13 */ - rxbuf_rdpt = (next_pointer_msb << 8 | next_pointer_lsb) - 1; - if ((rxbuf_rdpt < (m_nic_read(CTL_REG_ERXSTH) << 8 | - m_nic_read(CTL_REG_ERXSTL))) || (rxbuf_rdpt > - (m_nic_read(CTL_REG_ERXNDH) << 8 | - m_nic_read(CTL_REG_ERXNDL)))) { - m_nic_write(CTL_REG_ERXRDPTL, m_nic_read(CTL_REG_ERXNDL)); - m_nic_write(CTL_REG_ERXRDPTH, m_nic_read(CTL_REG_ERXNDH)); + rxbuf_rdpt = enc->next_pointer - 1; + if ((rxbuf_rdpt < enc_r16(enc, CTL_REG_ERXSTL)) || + (rxbuf_rdpt > enc_r16(enc, CTL_REG_ERXNDL))) { + enc_w16(enc, CTL_REG_ERXRDPTL, + enc_r16(enc, CTL_REG_ERXNDL)); } else { - m_nic_write(CTL_REG_ERXRDPTL, rxbuf_rdpt & 0xFF); - m_nic_write(CTL_REG_ERXRDPTH, rxbuf_rdpt >> 8); + enc_w16(enc, CTL_REG_ERXRDPTL, rxbuf_rdpt); } - - /* move to bank 1 */ - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1); - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0); - /* read pktcnt */ - pkt_cnt = m_nic_read (CTL_REG_EPKTCNT); - - /* switch to bank 0 */ - m_nic_bfc (CTL_REG_ECON1, - (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); - + pkt_cnt = enc_r8(enc, CTL_REG_EPKTCNT); if (copy_len == 0) { - eir_reg = m_nic_read (CTL_REG_EIR); - encReceiverReset (); - printf ("eth_rx: copy_len=0\n"); + eir_reg = enc_r8(enc, CTL_REG_EIR); + enc_reset_rx(enc); + printf("%s: receive copy_len=0\n", enc->dev->name); continue; } - - NetReceive ((unsigned char *) buffer, pkt_len); - - eir_reg = m_nic_read (CTL_REG_EIR); - } while (pkt_cnt); /* Use EPKTCNT not EIR.PKTIF flag, see errata pt. 6 */ -} - -static void encWriteReg (unsigned char regNo, unsigned char data) -{ - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0x40 | regNo); /* write in regNo */ - spi_write (data); - - enc_disable (); - enc_enable (); - - spi_write (0x1f); /* write reg 0x1f */ - - enc_disable (); - spi_unlock (); + /* + * Because NetReceive() might call enc_send(), we need to + * release the SPI bus, call NetReceive(), reclaim the bus + */ + enc_release_bus(enc); + NetReceive(packet, pkt_len); + if (enc_claim_bus(enc)) + return; + eir_reg = enc_r8(enc, CTL_REG_EIR); + } while (pkt_cnt); + /* Use EPKTCNT not EIR.PKTIF flag, see errata pt. 6 */ } -static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c) +/* + * Poll for completely received packets. + */ +static void enc_poll(enc_dev_t *enc) { - unsigned char readback; - int i; - - spi_lock (); + u8 eir_reg; + u8 estat_reg; + u8 pkt_cnt; - for (i = 0; i < c; i++) { - enc_cfg_spi (); - enc_enable (); - - spi_write (0x40 | regNo); /* write in regNo */ - spi_write (data); - - enc_disable (); - enc_enable (); - - spi_write (0x1f); /* write reg 0x1f */ - - enc_disable (); - - spi_unlock (); /* we must unlock spi first */ - - readback = encReadReg (regNo); - - spi_lock (); - - if (readback == data) - break; +#ifdef CONFIG_USE_IRQ + /* clear global interrupt enable bit in enc28j60 */ + enc_bclr(enc, CTL_REG_EIE, ENC_EIE_INTIE); +#endif + estat_reg = enc_r8(enc, CTL_REG_ESTAT); + eir_reg = enc_r8(enc, CTL_REG_EIR); + if (eir_reg & ENC_EIR_TXIF) { + /* clear TXIF bit in EIR */ + enc_bclr(enc, CTL_REG_EIR, ENC_EIR_TXIF); } - spi_unlock (); - - if (i == c) { - printf ("enc28j60: write reg %d failed\n", regNo); + /* We have to use pktcnt and not pktif bit, see errata pt. 6 */ + pkt_cnt = enc_r8(enc, CTL_REG_EPKTCNT); + if (pkt_cnt > 0) { + if ((eir_reg & ENC_EIR_PKTIF) == 0) { + debug("enc_poll: pkt cnt > 0, but pktif not set\n"); + } + enc_receive(enc); + /* + * clear PKTIF bit in EIR, this should not need to be done + * but it seems like we get problems if we do not + */ + enc_bclr(enc, CTL_REG_EIR, ENC_EIR_PKTIF); } -} - -static unsigned char encReadReg (unsigned char regNo) -{ - unsigned char rxByte; - - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0x1f); /* read reg 0x1f */ - - bank = spi_read () & 0x3; - - enc_disable (); - enc_enable (); - - spi_write (regNo); - rxByte = spi_read (); - - /* check if MAC or MII register */ - if (((bank == 2) && (regNo <= 0x1a)) || - ((bank == 3) && (regNo <= 0x05 || regNo == 0x0a))) { - /* ignore first byte and read another byte */ - rxByte = spi_read (); + if (eir_reg & ENC_EIR_RXERIF) { + printf("%s: rx error\n", enc->dev->name); + enc_bclr(enc, CTL_REG_EIR, ENC_EIR_RXERIF); } - - enc_disable (); - spi_unlock (); - - return rxByte; -} - -static void encReadBuff (unsigned short length, unsigned char *pBuff) -{ - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0x20 | 0x1a); /* read buffer memory */ - - while (length--) { - if (pBuff != NULL) - *pBuff++ = spi_read (); - else - spi_write (0); + if (eir_reg & ENC_EIR_TXERIF) { + printf("%s: tx error\n", enc->dev->name); + enc_bclr(enc, CTL_REG_EIR, ENC_EIR_TXERIF); } - - enc_disable (); - spi_unlock (); -} - -static void encWriteBuff (unsigned short length, unsigned char *pBuff) -{ - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0x60 | 0x1a); /* write buffer memory */ - - spi_write (0x00); /* control byte */ - - while (length--) - spi_write (*pBuff++); - - enc_disable (); - spi_unlock (); -} - -static void encBitSet (unsigned char regNo, unsigned char data) -{ - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0x80 | regNo); /* bit field set */ - spi_write (data); - - enc_disable (); - spi_unlock (); -} - -static void encBitClr (unsigned char regNo, unsigned char data) -{ - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0xA0 | regNo); /* bit field clear */ - spi_write (data); - - enc_disable (); - spi_unlock (); +#ifdef CONFIG_USE_IRQ + /* set global interrupt enable bit in enc28j60 */ + enc_bset(enc, CTL_REG_EIE, ENC_EIE_INTIE); +#endif } -static void encReset (void) +/* + * Completely Reset the ENC + */ +static void enc_reset(enc_dev_t *enc) { - spi_lock (); - enc_cfg_spi (); - enc_enable (); - - spi_write (0xff); /* soft reset */ - - enc_disable (); - spi_unlock (); + u8 dout[1]; + dout[0] = CMD_SRC; + spi_xfer(enc->slave, 8, dout, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); /* sleep 1 ms. See errata pt. 2 */ - udelay (1000); + udelay(1000); } -static void encInit (unsigned char *pEthAddr) -{ - unsigned short phid1 = 0; - unsigned short phid2 = 0; - - /* switch to bank 0 */ - m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); - +/* + * Initialisation data for most of the ENC registers + */ +static const u16 enc_initdata[] = { /* * Setup the buffer space. The reset values are valid for the * other pointers. + * + * We shall not write to ERXST, see errata pt. 5. Instead we + * have to make sure that ENC_RX_BUS_START is 0. */ - /* We shall not write to ERXST, see errata pt. 5. Instead we - have to make sure that ENC_RX_BUS_START is 0. */ - m_nic_write_retry (CTL_REG_ERXSTL, (ENC_RX_BUF_START & 0xFF), 1); - m_nic_write_retry (CTL_REG_ERXSTH, (ENC_RX_BUF_START >> 8), 1); - - /* taken from the Linux driver */ - m_nic_write_retry (CTL_REG_ERXNDL, (ENC_RX_BUF_END & 0xFF), 1); - m_nic_write_retry (CTL_REG_ERXNDH, (ENC_RX_BUF_END >> 8), 1); - - m_nic_write_retry (CTL_REG_ERDPTL, (ENC_RX_BUF_START & 0xFF), 1); - m_nic_write_retry (CTL_REG_ERDPTH, (ENC_RX_BUF_START >> 8), 1); - - next_pointer_lsb = (ENC_RX_BUF_START & 0xFF); - next_pointer_msb = (ENC_RX_BUF_START >> 8); - - /* verify identification */ - phid1 = phyRead (PHY_REG_PHID1); - phid2 = phyRead (PHY_REG_PHID2); - - if (phid1 != ENC_PHID1_VALUE - || (phid2 & ENC_PHID2_MASK) != ENC_PHID2_VALUE) { - printf ("ERROR: failed to identify controller\n"); - printf ("phid1 = %x, phid2 = %x\n", - phid1, (phid2 & ENC_PHID2_MASK)); - printf ("should be phid1 = %x, phid2 = %x\n", - ENC_PHID1_VALUE, ENC_PHID2_VALUE); - } - + CTL_REG_ERXSTL, ENC_RX_BUF_START, + CTL_REG_ERXSTH, ENC_RX_BUF_START >> 8, + CTL_REG_ERXNDL, ENC_RX_BUF_END, + CTL_REG_ERXNDH, ENC_RX_BUF_END >> 8, + CTL_REG_ERDPTL, ENC_RX_BUF_START, + CTL_REG_ERDPTH, ENC_RX_BUF_START >> 8, /* - * --- MAC Initialization --- + * Set the filter to receive only good-CRC, unicast and broadcast + * frames. + * Note: some DHCP servers return their answers as broadcasts! + * So its unwise to remove broadcast from this. This driver + * might incur receiver overruns with packet loss on a broadcast + * flooded network. */ - - /* Pull MAC out of Reset */ - - /* switch to bank 2 */ - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1); + CTL_REG_ERXFCON, ENC_RFR_BCEN | ENC_RFR_UCEN | ENC_RFR_CRCEN, /* enable MAC to receive frames */ - /* added some bits from the Linux driver */ - m_nic_write_retry (CTL_REG_MACON1 - ,(ENC_MACON1_MARXEN | ENC_MACON1_TXPAUS | ENC_MACON1_RXPAUS) - ,10); + CTL_REG_MACON1, + ENC_MACON1_MARXEN | ENC_MACON1_TXPAUS | ENC_MACON1_RXPAUS, /* configure pad, tx-crc and duplex */ - /* added a bit from the Linux driver */ - m_nic_write_retry (CTL_REG_MACON3 - ,(ENC_MACON3_PADCFG0 | ENC_MACON3_TXCRCEN | ENC_MACON3_FRMLNEN) - ,10); + CTL_REG_MACON3, + ENC_MACON3_PADCFG0 | ENC_MACON3_TXCRCEN | + ENC_MACON3_FRMLNEN, - /* added 4 new lines from the Linux driver */ /* Allow infinite deferals if the medium is continously busy */ - m_nic_write_retry(CTL_REG_MACON4, (1<<6) /*ENC_MACON4_DEFER*/, 10); + CTL_REG_MACON4, ENC_MACON4_DEFER, /* Late collisions occur beyond 63 bytes */ - m_nic_write_retry(CTL_REG_MACLCON2, 63, 10); + CTL_REG_MACLCON2, 63, - /* Set (low byte) Non-Back-to_Back Inter-Packet Gap. Recommended 0x12 */ - m_nic_write_retry(CTL_REG_MAIPGL, 0x12, 10); + /* + * Set (low byte) Non-Back-to_Back Inter-Packet Gap. + * Recommended 0x12 + */ + CTL_REG_MAIPGL, 0x12, /* - * Set (high byte) Non-Back-to_Back Inter-Packet Gap. Recommended - * 0x0c for half-duplex. Nothing for full-duplex - */ - m_nic_write_retry(CTL_REG_MAIPGH, 0x0C, 10); + * Set (high byte) Non-Back-to_Back Inter-Packet Gap. + * Recommended 0x0c for half-duplex. Nothing for full-duplex + */ + CTL_REG_MAIPGH, 0x0C, /* set maximum frame length */ - m_nic_write_retry (CTL_REG_MAMXFLL, (ENC_MAX_FRM_LEN & 0xff), 10); - m_nic_write_retry (CTL_REG_MAMXFLH, (ENC_MAX_FRM_LEN >> 8), 10); + CTL_REG_MAMXFLL, ENC_MAX_FRM_LEN, + CTL_REG_MAMXFLH, ENC_MAX_FRM_LEN >> 8, /* - * Set MAC back-to-back inter-packet gap. Recommended 0x12 for half duplex + * Set MAC back-to-back inter-packet gap. + * Recommended 0x12 for half duplex * and 0x15 for full duplex. */ - m_nic_write_retry (CTL_REG_MABBIPG, 0x12, 10); + CTL_REG_MABBIPG, 0x12, - /* set MAC address */ + /* end of table */ + 0xffff +}; - /* switch to bank 3 */ - m_nic_bfs (CTL_REG_ECON1, (ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1)); +/* + * Wait for the XTAL oscillator to become ready + */ +static int enc_clock_wait(enc_dev_t *enc) +{ + uint64_t etime; - m_nic_write_retry (CTL_REG_MAADR0, pEthAddr[5], 1); - m_nic_write_retry (CTL_REG_MAADR1, pEthAddr[4], 1); - m_nic_write_retry (CTL_REG_MAADR2, pEthAddr[3], 1); - m_nic_write_retry (CTL_REG_MAADR3, pEthAddr[2], 1); - m_nic_write_retry (CTL_REG_MAADR4, pEthAddr[1], 1); - m_nic_write_retry (CTL_REG_MAADR5, pEthAddr[0], 1); + /* one second timeout */ + etime = get_ticks() + get_tbclk(); /* - * PHY Initialization taken from the Linux driver + * Wait for CLKRDY to become set (i.e., check that we can + * communicate with the ENC) */ + do + { + if (enc_r8(enc, CTL_REG_ESTAT) & ENC_ESTAT_CLKRDY) + return 0; + } while (get_ticks() <= etime); + + printf("%s: timeout waiting for CLKRDY\n", enc->dev->name); + return -1; +} + +/* + * Write the MAC address into the ENC + */ +static int enc_write_macaddr(enc_dev_t *enc) +{ + unsigned char *p = enc->dev->enetaddr; + + enc_w8_retry(enc, CTL_REG_MAADR5, *p++, 5); + enc_w8_retry(enc, CTL_REG_MAADR4, *p++, 5); + enc_w8_retry(enc, CTL_REG_MAADR3, *p++, 5); + enc_w8_retry(enc, CTL_REG_MAADR2, *p++, 5); + enc_w8_retry(enc, CTL_REG_MAADR1, *p++, 5); + enc_w8_retry(enc, CTL_REG_MAADR0, *p, 5); + return 0; +} + +/* + * Setup most of the ENC registers + */ +static int enc_setup(enc_dev_t *enc) +{ + u16 phid1 = 0; + u16 phid2 = 0; + const u16 *tp; + + /* reset enc struct values */ + enc->next_pointer = ENC_RX_BUF_START; + enc->rx_reset_counter = RX_RESET_COUNTER; + enc->bank = 0xff; /* invalidate current bank in enc28j60 */ + + /* verify PHY identification */ + phid1 = phy_read(enc, PHY_REG_PHID1); + phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK; + if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) { + printf("%s: failed to identify PHY. Found %04x:%04x\n", + enc->dev->name, phid1, phid2); + return -1; + } - /* Prevent automatic loopback of data beeing transmitted by setting - ENC_PHCON2_HDLDIS */ - phyWrite(PHY_REG_PHCON2, (1<<8)); + /* now program registers */ + for (tp = enc_initdata; *tp != 0xffff; tp += 2) + enc_w8_retry(enc, tp[0], tp[1], 10); + + /* + * Prevent automatic loopback of data beeing transmitted by setting + * ENC_PHCON2_HDLDIS + */ + phy_write(enc, PHY_REG_PHCON2, (1<<8)); - /* LEDs configuration + /* + * LEDs configuration * LEDA: LACFG = 0100 -> display link status * LEDB: LBCFG = 0111 -> display TX & RX activity * STRCH = 1 -> LED pulses */ - phyWrite(PHY_REG_PHLCON, 0x0472); + phy_write(enc, PHY_REG_PHLCON, 0x0472); /* Reset PDPXMD-bit => half duplex */ - phyWrite(PHY_REG_PHCON1, 0); - - /* - * Receive settings - */ + phy_write(enc, PHY_REG_PHCON1, 0); #ifdef CONFIG_USE_IRQ /* enable interrupts */ - m_nic_bfs (CTL_REG_EIE, ENC_EIE_PKTIE); - m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXIE); - m_nic_bfs (CTL_REG_EIE, ENC_EIE_RXERIE); - m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXERIE); - m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE); + enc_bset(enc, CTL_REG_EIE, ENC_EIE_PKTIE); + enc_bset(enc, CTL_REG_EIE, ENC_EIE_TXIE); + enc_bset(enc, CTL_REG_EIE, ENC_EIE_RXERIE); + enc_bset(enc, CTL_REG_EIE, ENC_EIE_TXERIE); + enc_bset(enc, CTL_REG_EIE, ENC_EIE_INTIE); #endif + + return 0; } -/***************************************************************************** - * - * Description: - * Read PHY registers. - * - * NOTE! This function will change to Bank 2. - * - * Params: - * [in] addr address of the register to read - * - * Returns: - * The value in the register +/* + * Check if ENC has been initialized. + * If not, try to initialize it. + * Remember initialized state in struct. */ -static unsigned short phyRead (unsigned char addr) +static int enc_initcheck(enc_dev_t *enc, const enum enc_initstate requiredstate) { - unsigned short ret = 0; - - /* move to bank 2 */ - m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1); + if (enc->initstate >= requiredstate) + return 0; + + if (enc->initstate < setupdone) { + /* Initialize the ENC only */ + enc_reset(enc); + /* if any of functions fails, skip the rest and return an error */ + if (enc_clock_wait(enc) || enc_setup(enc) || enc_write_macaddr(enc)) { + return -1; + } + enc->initstate = setupdone; + } + /* if that's all we need, return here */ + if (enc->initstate >= requiredstate) + return 0; - /* write address to MIREGADR */ - m_nic_write (CTL_REG_MIREGADR, addr); + /* now wait for link ready condition */ + if (enc_phy_link_wait(enc)) { + return -1; + } + enc->initstate = linkready; + return 0; +} - /* set MICMD.MIIRD */ - m_nic_write (CTL_REG_MICMD, ENC_MICMD_MIIRD); +#if defined(CONFIG_CMD_MII) +/* + * Read a PHY register. + * + * This function is registered with miiphy_register(). + */ +int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value) +{ + struct eth_device *dev = eth_get_dev_by_name(devname); + enc_dev_t *enc; + + if (!dev || phy_adr != 0) + return -1; + + enc = dev->priv; + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, setupdone)) { + enc_release_bus(enc); + return -1; + } + *value = phy_read(enc, reg); + enc_release_bus(enc); + return 0; +} - /* taken from the Linux driver */ - /* move to bank 3 */ - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); +/* + * Write a PHY register. + * + * This function is registered with miiphy_register(). + */ +int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value) +{ + struct eth_device *dev = eth_get_dev_by_name(devname); + enc_dev_t *enc; + + if (!dev || phy_adr != 0) + return -1; + + enc = dev->priv; + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, setupdone)) { + enc_release_bus(enc); + return -1; + } + phy_write(enc, reg, value); + enc_release_bus(enc); + return 0; +} +#endif - /* poll MISTAT.BUSY bit until operation is complete */ - while ((m_nic_read (CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) { - static int cnt = 0; +/* + * Write hardware (MAC) address. + * + * This function entered into eth_device structure. + */ +static int enc_write_hwaddr(struct eth_device *dev) +{ + enc_dev_t *enc = dev->priv; - if (cnt++ >= 1000) { - /* GJ - this seems extremely dangerous! */ - /* printf("#"); */ - cnt = 0; - } + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, setupdone)) { + enc_release_bus(enc); + return -1; } + enc_release_bus(enc); + return 0; +} - /* taken from the Linux driver */ - /* move to bank 2 */ - m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); +/* + * Initialize ENC28J60 for use. + * + * This function entered into eth_device structure. + */ +static int enc_init(struct eth_device *dev, bd_t *bis) +{ + enc_dev_t *enc = dev->priv; - /* clear MICMD.MIIRD */ - m_nic_write (CTL_REG_MICMD, 0); + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, linkready)) { + enc_release_bus(enc); + return -1; + } + /* enable receive */ + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_RXEN); + enc_release_bus(enc); + return 0; +} - ret = (m_nic_read (CTL_REG_MIRDH) << 8); - ret |= (m_nic_read (CTL_REG_MIRDL) & 0xFF); +/* + * Check for received packets. + * + * This function entered into eth_device structure. + */ +static int enc_recv(struct eth_device *dev) +{ + enc_dev_t *enc = dev->priv; - return ret; + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, linkready)) { + enc_release_bus(enc); + return -1; + } + /* Check for dead receiver */ + if (enc->rx_reset_counter > 0) + enc->rx_reset_counter--; + else + enc_reset_rx_call(enc); + enc_poll(enc); + enc_release_bus(enc); + return 0; } -/***************************************************************************** - * - * Taken from the Linux driver. - * Description: - * Write PHY registers. - * - * NOTE! This function will change to Bank 3. +/* + * Send a packet. * - * Params: - * [in] addr address of the register to write to - * [in] data to be written + * This function entered into eth_device structure. * - * Returns: - * None + * Should we wait here until we have a Link? Or shall we leave that to + * protocol retries? */ -static void phyWrite(unsigned char addr, unsigned short data) +static int enc_send( + struct eth_device *dev, + volatile void *packet, + int length) { - /* move to bank 2 */ - m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); + enc_dev_t *enc = dev->priv; + + if (enc_claim_bus(enc)) + return -1; + if (enc_initcheck(enc, linkready)) { + enc_release_bus(enc); + return -1; + } + /* setup transmit pointers */ + enc_w16(enc, CTL_REG_EWRPTL, ENC_TX_BUF_START); + enc_w16(enc, CTL_REG_ETXNDL, length + ENC_TX_BUF_START); + enc_w16(enc, CTL_REG_ETXSTL, ENC_TX_BUF_START); + /* write packet to ENC */ + enc_wbuf(enc, length, (u8 *) packet, 0x00); + /* + * Check that the internal transmit logic has not been altered + * by excessive collisions. Reset transmitter if so. + * See Errata B4 12 and 14. + */ + if (enc_r8(enc, CTL_REG_EIR) & ENC_EIR_TXERIF) { + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_TXRST); + enc_bclr(enc, CTL_REG_ECON1, ENC_ECON1_TXRST); + } + enc_bclr(enc, CTL_REG_EIR, (ENC_EIR_TXERIF | ENC_EIR_TXIF)); + /* start transmitting */ + enc_bset(enc, CTL_REG_ECON1, ENC_ECON1_TXRTS); + enc_release_bus(enc); + return 0; +} - /* write address to MIREGADR */ - m_nic_write(CTL_REG_MIREGADR, addr); +/* + * Finish use of ENC. + * + * This function entered into eth_device structure. + */ +static void enc_halt(struct eth_device *dev) +{ + enc_dev_t *enc = dev->priv; - m_nic_write(CTL_REG_MIWRL, data & 0xff); - m_nic_write(CTL_REG_MIWRH, data >> 8); + if (enc_claim_bus(enc)) + return; + /* Just disable receiver */ + enc_bclr(enc, CTL_REG_ECON1, ENC_ECON1_RXEN); + enc_release_bus(enc); +} - /* move to bank 3 */ - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0); - m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); +/* + * This is the only exported function. + * + * It may be called several times with different bus:cs combinations. + */ +int enc28j60_initialize(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct eth_device *dev; + enc_dev_t *enc; - /* poll MISTAT.BUSY bit until operation is complete */ - while((m_nic_read(CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) { - static int cnt = 0; + /* try to allocate, check and clear eth_device object */ + dev = malloc(sizeof(*dev)); + if (!dev) { + return -1; + } + memset(dev, 0, sizeof(*dev)); - if(cnt++ >= 1000) { - cnt = 0; - } + /* try to allocate, check and clear enc_dev_t object */ + enc = malloc(sizeof(*enc)); + if (!enc) { + free(dev); + return -1; + } + memset(enc, 0, sizeof(*enc)); + + /* try to setup the SPI slave */ + enc->slave = spi_setup_slave(bus, cs, max_hz, mode); + if (!enc->slave) { + printf("enc28j60: invalid SPI device %i:%i\n", bus, cs); + free(enc); + free(dev); + return -1; } + + enc->dev = dev; + /* now fill the eth_device object */ + dev->priv = enc; + dev->init = enc_init; + dev->halt = enc_halt; + dev->send = enc_send; + dev->recv = enc_recv; + dev->write_hwaddr = enc_write_hwaddr; + sprintf(dev->name, "enc%i.%i", bus, cs); + eth_register(dev); +#if defined(CONFIG_CMD_MII) + miiphy_register(dev->name, enc_miiphy_read, enc_miiphy_write); +#endif + return 0; } diff --git a/drivers/net/enc28j60.h b/drivers/net/enc28j60.h new file mode 100644 index 0000000..888c599 --- /dev/null +++ b/drivers/net/enc28j60.h @@ -0,0 +1,251 @@ +/* + * (X) extracted from enc28j60.c + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _enc28j60_h +#define _enc28j60_h + +/* + * SPI Commands + * + * Bits 7-5: Command + * Bits 4-0: Register + */ +#define CMD_RCR(x) (0x00+((x)&0x1f)) /* Read Control Register */ +#define CMD_RBM 0x3a /* Read Buffer Memory */ +#define CMD_WCR(x) (0x40+((x)&0x1f)) /* Write Control Register */ +#define CMD_WBM 0x7a /* Write Buffer Memory */ +#define CMD_BFS(x) (0x80+((x)&0x1f)) /* Bit Field Set */ +#define CMD_BFC(x) (0xa0+((x)&0x1f)) /* Bit Field Clear */ +#define CMD_SRC 0xff /* System Reset Command */ + +/* NEW: encode (bank number+1) in upper byte */ + +/* Common Control Registers accessible in all Banks */ +#define CTL_REG_EIE 0x01B +#define CTL_REG_EIR 0x01C +#define CTL_REG_ESTAT 0x01D +#define CTL_REG_ECON2 0x01E +#define CTL_REG_ECON1 0x01F + +/* Control Registers accessible in Bank 0 */ +#define CTL_REG_ERDPTL 0x100 +#define CTL_REG_ERDPTH 0x101 +#define CTL_REG_EWRPTL 0x102 +#define CTL_REG_EWRPTH 0x103 +#define CTL_REG_ETXSTL 0x104 +#define CTL_REG_ETXSTH 0x105 +#define CTL_REG_ETXNDL 0x106 +#define CTL_REG_ETXNDH 0x107 +#define CTL_REG_ERXSTL 0x108 +#define CTL_REG_ERXSTH 0x109 +#define CTL_REG_ERXNDL 0x10A +#define CTL_REG_ERXNDH 0x10B +#define CTL_REG_ERXRDPTL 0x10C +#define CTL_REG_ERXRDPTH 0x10D +#define CTL_REG_ERXWRPTL 0x10E +#define CTL_REG_ERXWRPTH 0x10F +#define CTL_REG_EDMASTL 0x110 +#define CTL_REG_EDMASTH 0x111 +#define CTL_REG_EDMANDL 0x112 +#define CTL_REG_EDMANDH 0x113 +#define CTL_REG_EDMADSTL 0x114 +#define CTL_REG_EDMADSTH 0x115 +#define CTL_REG_EDMACSL 0x116 +#define CTL_REG_EDMACSH 0x117 + +/* Control Registers accessible in Bank 1 */ +#define CTL_REG_EHT0 0x200 +#define CTL_REG_EHT1 0x201 +#define CTL_REG_EHT2 0x202 +#define CTL_REG_EHT3 0x203 +#define CTL_REG_EHT4 0x204 +#define CTL_REG_EHT5 0x205 +#define CTL_REG_EHT6 0x206 +#define CTL_REG_EHT7 0x207 +#define CTL_REG_EPMM0 0x208 +#define CTL_REG_EPMM1 0x209 +#define CTL_REG_EPMM2 0x20A +#define CTL_REG_EPMM3 0x20B +#define CTL_REG_EPMM4 0x20C +#define CTL_REG_EPMM5 0x20D +#define CTL_REG_EPMM6 0x20E +#define CTL_REG_EPMM7 0x20F +#define CTL_REG_EPMCSL 0x210 +#define CTL_REG_EPMCSH 0x211 +#define CTL_REG_EPMOL 0x214 +#define CTL_REG_EPMOH 0x215 +#define CTL_REG_EWOLIE 0x216 +#define CTL_REG_EWOLIR 0x217 +#define CTL_REG_ERXFCON 0x218 +#define CTL_REG_EPKTCNT 0x219 + +/* Control Registers accessible in Bank 2 */ +#define CTL_REG_MACON1 0x300 +#define CTL_REG_MACON2 0x301 +#define CTL_REG_MACON3 0x302 +#define CTL_REG_MACON4 0x303 +#define CTL_REG_MABBIPG 0x304 +#define CTL_REG_MAIPGL 0x306 +#define CTL_REG_MAIPGH 0x307 +#define CTL_REG_MACLCON1 0x308 +#define CTL_REG_MACLCON2 0x309 +#define CTL_REG_MAMXFLL 0x30A +#define CTL_REG_MAMXFLH 0x30B +#define CTL_REG_MAPHSUP 0x30D +#define CTL_REG_MICON 0x311 +#define CTL_REG_MICMD 0x312 +#define CTL_REG_MIREGADR 0x314 +#define CTL_REG_MIWRL 0x316 +#define CTL_REG_MIWRH 0x317 +#define CTL_REG_MIRDL 0x318 +#define CTL_REG_MIRDH 0x319 + +/* Control Registers accessible in Bank 3 */ +#define CTL_REG_MAADR1 0x400 +#define CTL_REG_MAADR0 0x401 +#define CTL_REG_MAADR3 0x402 +#define CTL_REG_MAADR2 0x403 +#define CTL_REG_MAADR5 0x404 +#define CTL_REG_MAADR4 0x405 +#define CTL_REG_EBSTSD 0x406 +#define CTL_REG_EBSTCON 0x407 +#define CTL_REG_EBSTCSL 0x408 +#define CTL_REG_EBSTCSH 0x409 +#define CTL_REG_MISTAT 0x40A +#define CTL_REG_EREVID 0x412 +#define CTL_REG_ECOCON 0x415 +#define CTL_REG_EFLOCON 0x417 +#define CTL_REG_EPAUSL 0x418 +#define CTL_REG_EPAUSH 0x419 + +/* PHY Register */ +#define PHY_REG_PHCON1 0x00 +#define PHY_REG_PHSTAT1 0x01 +#define PHY_REG_PHID1 0x02 +#define PHY_REG_PHID2 0x03 +#define PHY_REG_PHCON2 0x10 +#define PHY_REG_PHSTAT2 0x11 +#define PHY_REG_PHLCON 0x14 + +/* Receive Filter Register (ERXFCON) bits */ +#define ENC_RFR_UCEN 0x80 +#define ENC_RFR_ANDOR 0x40 +#define ENC_RFR_CRCEN 0x20 +#define ENC_RFR_PMEN 0x10 +#define ENC_RFR_MPEN 0x08 +#define ENC_RFR_HTEN 0x04 +#define ENC_RFR_MCEN 0x02 +#define ENC_RFR_BCEN 0x01 + +/* ECON1 Register Bits */ +#define ENC_ECON1_TXRST 0x80 +#define ENC_ECON1_RXRST 0x40 +#define ENC_ECON1_DMAST 0x20 +#define ENC_ECON1_CSUMEN 0x10 +#define ENC_ECON1_TXRTS 0x08 +#define ENC_ECON1_RXEN 0x04 +#define ENC_ECON1_BSEL1 0x02 +#define ENC_ECON1_BSEL0 0x01 + +/* ECON2 Register Bits */ +#define ENC_ECON2_AUTOINC 0x80 +#define ENC_ECON2_PKTDEC 0x40 +#define ENC_ECON2_PWRSV 0x20 +#define ENC_ECON2_VRPS 0x08 + +/* EIR Register Bits */ +#define ENC_EIR_PKTIF 0x40 +#define ENC_EIR_DMAIF 0x20 +#define ENC_EIR_LINKIF 0x10 +#define ENC_EIR_TXIF 0x08 +#define ENC_EIR_WOLIF 0x04 +#define ENC_EIR_TXERIF 0x02 +#define ENC_EIR_RXERIF 0x01 + +/* ESTAT Register Bits */ +#define ENC_ESTAT_INT 0x80 +#define ENC_ESTAT_LATECOL 0x10 +#define ENC_ESTAT_RXBUSY 0x04 +#define ENC_ESTAT_TXABRT 0x02 +#define ENC_ESTAT_CLKRDY 0x01 + +/* EIE Register Bits */ +#define ENC_EIE_INTIE 0x80 +#define ENC_EIE_PKTIE 0x40 +#define ENC_EIE_DMAIE 0x20 +#define ENC_EIE_LINKIE 0x10 +#define ENC_EIE_TXIE 0x08 +#define ENC_EIE_WOLIE 0x04 +#define ENC_EIE_TXERIE 0x02 +#define ENC_EIE_RXERIE 0x01 + +/* MACON1 Register Bits */ +#define ENC_MACON1_LOOPBK 0x10 +#define ENC_MACON1_TXPAUS 0x08 +#define ENC_MACON1_RXPAUS 0x04 +#define ENC_MACON1_PASSALL 0x02 +#define ENC_MACON1_MARXEN 0x01 + +/* MACON2 Register Bits */ +#define ENC_MACON2_MARST 0x80 +#define ENC_MACON2_RNDRST 0x40 +#define ENC_MACON2_MARXRST 0x08 +#define ENC_MACON2_RFUNRST 0x04 +#define ENC_MACON2_MATXRST 0x02 +#define ENC_MACON2_TFUNRST 0x01 + +/* MACON3 Register Bits */ +#define ENC_MACON3_PADCFG2 0x80 +#define ENC_MACON3_PADCFG1 0x40 +#define ENC_MACON3_PADCFG0 0x20 +#define ENC_MACON3_TXCRCEN 0x10 +#define ENC_MACON3_PHDRLEN 0x08 +#define ENC_MACON3_HFRMEN 0x04 +#define ENC_MACON3_FRMLNEN 0x02 +#define ENC_MACON3_FULDPX 0x01 + +/* MACON4 Register Bits */ +#define ENC_MACON4_DEFER 0x40 + +/* MICMD Register Bits */ +#define ENC_MICMD_MIISCAN 0x02 +#define ENC_MICMD_MIIRD 0x01 + +/* MISTAT Register Bits */ +#define ENC_MISTAT_NVALID 0x04 +#define ENC_MISTAT_SCAN 0x02 +#define ENC_MISTAT_BUSY 0x01 + +/* PHID1 and PHID2 values */ +#define ENC_PHID1_VALUE 0x0083 +#define ENC_PHID2_VALUE 0x1400 +#define ENC_PHID2_MASK 0xFC00 + +/* PHCON1 values */ +#define ENC_PHCON1_PDPXMD 0x0100 + +/* PHSTAT1 values */ +#define ENC_PHSTAT1_LLSTAT 0x0004 + +/* PHSTAT2 values */ +#define ENC_PHSTAT2_LSTAT 0x0400 +#define ENC_PHSTAT2_DPXSTAT 0x0200 + +#endif diff --git a/drivers/net/enc28j60_lpc2292.c b/drivers/net/enc28j60_lpc2292.c new file mode 100644 index 0000000..bf95052 --- /dev/null +++ b/drivers/net/enc28j60_lpc2292.c @@ -0,0 +1,983 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#warning This driver is depreciated. Please update to new SPI framework enc28j60 driver +#include <config.h> +#include <common.h> +#include <net.h> +#include <asm/arch/hardware.h> +#include <asm/arch/spi.h> + +/* + * Control Registers in Bank 0 + */ + +#define CTL_REG_ERDPTL 0x00 +#define CTL_REG_ERDPTH 0x01 +#define CTL_REG_EWRPTL 0x02 +#define CTL_REG_EWRPTH 0x03 +#define CTL_REG_ETXSTL 0x04 +#define CTL_REG_ETXSTH 0x05 +#define CTL_REG_ETXNDL 0x06 +#define CTL_REG_ETXNDH 0x07 +#define CTL_REG_ERXSTL 0x08 +#define CTL_REG_ERXSTH 0x09 +#define CTL_REG_ERXNDL 0x0A +#define CTL_REG_ERXNDH 0x0B +#define CTL_REG_ERXRDPTL 0x0C +#define CTL_REG_ERXRDPTH 0x0D +#define CTL_REG_ERXWRPTL 0x0E +#define CTL_REG_ERXWRPTH 0x0F +#define CTL_REG_EDMASTL 0x10 +#define CTL_REG_EDMASTH 0x11 +#define CTL_REG_EDMANDL 0x12 +#define CTL_REG_EDMANDH 0x13 +#define CTL_REG_EDMADSTL 0x14 +#define CTL_REG_EDMADSTH 0x15 +#define CTL_REG_EDMACSL 0x16 +#define CTL_REG_EDMACSH 0x17 +/* these are common in all banks */ +#define CTL_REG_EIE 0x1B +#define CTL_REG_EIR 0x1C +#define CTL_REG_ESTAT 0x1D +#define CTL_REG_ECON2 0x1E +#define CTL_REG_ECON1 0x1F + +/* + * Control Registers in Bank 1 + */ + +#define CTL_REG_EHT0 0x00 +#define CTL_REG_EHT1 0x01 +#define CTL_REG_EHT2 0x02 +#define CTL_REG_EHT3 0x03 +#define CTL_REG_EHT4 0x04 +#define CTL_REG_EHT5 0x05 +#define CTL_REG_EHT6 0x06 +#define CTL_REG_EHT7 0x07 +#define CTL_REG_EPMM0 0x08 +#define CTL_REG_EPMM1 0x09 +#define CTL_REG_EPMM2 0x0A +#define CTL_REG_EPMM3 0x0B +#define CTL_REG_EPMM4 0x0C +#define CTL_REG_EPMM5 0x0D +#define CTL_REG_EPMM6 0x0E +#define CTL_REG_EPMM7 0x0F +#define CTL_REG_EPMCSL 0x10 +#define CTL_REG_EPMCSH 0x11 +#define CTL_REG_EPMOL 0x14 +#define CTL_REG_EPMOH 0x15 +#define CTL_REG_EWOLIE 0x16 +#define CTL_REG_EWOLIR 0x17 +#define CTL_REG_ERXFCON 0x18 +#define CTL_REG_EPKTCNT 0x19 + +/* + * Control Registers in Bank 2 + */ + +#define CTL_REG_MACON1 0x00 +#define CTL_REG_MACON2 0x01 +#define CTL_REG_MACON3 0x02 +#define CTL_REG_MACON4 0x03 +#define CTL_REG_MABBIPG 0x04 +#define CTL_REG_MAIPGL 0x06 +#define CTL_REG_MAIPGH 0x07 +#define CTL_REG_MACLCON1 0x08 +#define CTL_REG_MACLCON2 0x09 +#define CTL_REG_MAMXFLL 0x0A +#define CTL_REG_MAMXFLH 0x0B +#define CTL_REG_MAPHSUP 0x0D +#define CTL_REG_MICON 0x11 +#define CTL_REG_MICMD 0x12 +#define CTL_REG_MIREGADR 0x14 +#define CTL_REG_MIWRL 0x16 +#define CTL_REG_MIWRH 0x17 +#define CTL_REG_MIRDL 0x18 +#define CTL_REG_MIRDH 0x19 + +/* + * Control Registers in Bank 3 + */ + +#define CTL_REG_MAADR1 0x00 +#define CTL_REG_MAADR0 0x01 +#define CTL_REG_MAADR3 0x02 +#define CTL_REG_MAADR2 0x03 +#define CTL_REG_MAADR5 0x04 +#define CTL_REG_MAADR4 0x05 +#define CTL_REG_EBSTSD 0x06 +#define CTL_REG_EBSTCON 0x07 +#define CTL_REG_EBSTCSL 0x08 +#define CTL_REG_EBSTCSH 0x09 +#define CTL_REG_MISTAT 0x0A +#define CTL_REG_EREVID 0x12 +#define CTL_REG_ECOCON 0x15 +#define CTL_REG_EFLOCON 0x17 +#define CTL_REG_EPAUSL 0x18 +#define CTL_REG_EPAUSH 0x19 + + +/* + * PHY Register + */ + +#define PHY_REG_PHID1 0x02 +#define PHY_REG_PHID2 0x03 +/* taken from the Linux driver */ +#define PHY_REG_PHCON1 0x00 +#define PHY_REG_PHCON2 0x10 +#define PHY_REG_PHLCON 0x14 + +/* + * Receive Filter Register (ERXFCON) bits + */ + +#define ENC_RFR_UCEN 0x80 +#define ENC_RFR_ANDOR 0x40 +#define ENC_RFR_CRCEN 0x20 +#define ENC_RFR_PMEN 0x10 +#define ENC_RFR_MPEN 0x08 +#define ENC_RFR_HTEN 0x04 +#define ENC_RFR_MCEN 0x02 +#define ENC_RFR_BCEN 0x01 + +/* + * ECON1 Register Bits + */ + +#define ENC_ECON1_TXRST 0x80 +#define ENC_ECON1_RXRST 0x40 +#define ENC_ECON1_DMAST 0x20 +#define ENC_ECON1_CSUMEN 0x10 +#define ENC_ECON1_TXRTS 0x08 +#define ENC_ECON1_RXEN 0x04 +#define ENC_ECON1_BSEL1 0x02 +#define ENC_ECON1_BSEL0 0x01 + +/* + * ECON2 Register Bits + */ +#define ENC_ECON2_AUTOINC 0x80 +#define ENC_ECON2_PKTDEC 0x40 +#define ENC_ECON2_PWRSV 0x20 +#define ENC_ECON2_VRPS 0x08 + +/* + * EIR Register Bits + */ +#define ENC_EIR_PKTIF 0x40 +#define ENC_EIR_DMAIF 0x20 +#define ENC_EIR_LINKIF 0x10 +#define ENC_EIR_TXIF 0x08 +#define ENC_EIR_WOLIF 0x04 +#define ENC_EIR_TXERIF 0x02 +#define ENC_EIR_RXERIF 0x01 + +/* + * ESTAT Register Bits + */ + +#define ENC_ESTAT_INT 0x80 +#define ENC_ESTAT_LATECOL 0x10 +#define ENC_ESTAT_RXBUSY 0x04 +#define ENC_ESTAT_TXABRT 0x02 +#define ENC_ESTAT_CLKRDY 0x01 + +/* + * EIE Register Bits + */ + +#define ENC_EIE_INTIE 0x80 +#define ENC_EIE_PKTIE 0x40 +#define ENC_EIE_DMAIE 0x20 +#define ENC_EIE_LINKIE 0x10 +#define ENC_EIE_TXIE 0x08 +#define ENC_EIE_WOLIE 0x04 +#define ENC_EIE_TXERIE 0x02 +#define ENC_EIE_RXERIE 0x01 + +/* + * MACON1 Register Bits + */ +#define ENC_MACON1_LOOPBK 0x10 +#define ENC_MACON1_TXPAUS 0x08 +#define ENC_MACON1_RXPAUS 0x04 +#define ENC_MACON1_PASSALL 0x02 +#define ENC_MACON1_MARXEN 0x01 + + +/* + * MACON2 Register Bits + */ +#define ENC_MACON2_MARST 0x80 +#define ENC_MACON2_RNDRST 0x40 +#define ENC_MACON2_MARXRST 0x08 +#define ENC_MACON2_RFUNRST 0x04 +#define ENC_MACON2_MATXRST 0x02 +#define ENC_MACON2_TFUNRST 0x01 + +/* + * MACON3 Register Bits + */ +#define ENC_MACON3_PADCFG2 0x80 +#define ENC_MACON3_PADCFG1 0x40 +#define ENC_MACON3_PADCFG0 0x20 +#define ENC_MACON3_TXCRCEN 0x10 +#define ENC_MACON3_PHDRLEN 0x08 +#define ENC_MACON3_HFRMEN 0x04 +#define ENC_MACON3_FRMLNEN 0x02 +#define ENC_MACON3_FULDPX 0x01 + +/* + * MICMD Register Bits + */ +#define ENC_MICMD_MIISCAN 0x02 +#define ENC_MICMD_MIIRD 0x01 + +/* + * MISTAT Register Bits + */ +#define ENC_MISTAT_NVALID 0x04 +#define ENC_MISTAT_SCAN 0x02 +#define ENC_MISTAT_BUSY 0x01 + +/* + * PHID1 and PHID2 values + */ +#define ENC_PHID1_VALUE 0x0083 +#define ENC_PHID2_VALUE 0x1400 +#define ENC_PHID2_MASK 0xFC00 + + +#define ENC_SPI_SLAVE_CS 0x00010000 /* pin P1.16 */ +#define ENC_RESET 0x00020000 /* pin P1.17 */ + +#define FAILSAFE_VALUE 5000 + +/* + * Controller memory layout: + * + * 0x0000 - 0x17ff 6k bytes receive buffer + * 0x1800 - 0x1fff 2k bytes transmit buffer + */ +/* Use the lower memory for receiver buffer. See errata pt. 5 */ +#define ENC_RX_BUF_START 0x0000 +#define ENC_TX_BUF_START 0x1800 +/* taken from the Linux driver */ +#define ENC_RX_BUF_END 0x17ff +#define ENC_TX_BUF_END 0x1fff + +/* maximum frame length */ +#define ENC_MAX_FRM_LEN 1518 + +#define enc_enable() PUT32(IO1CLR, ENC_SPI_SLAVE_CS) +#define enc_disable() PUT32(IO1SET, ENC_SPI_SLAVE_CS) +#define enc_cfg_spi() spi_set_cfg(0, 0, 0); spi_set_clock(8); + + +static unsigned char encReadReg (unsigned char regNo); +static void encWriteReg (unsigned char regNo, unsigned char data); +static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c); +static void encReadBuff (unsigned short length, unsigned char *pBuff); +static void encWriteBuff (unsigned short length, unsigned char *pBuff); +static void encBitSet (unsigned char regNo, unsigned char data); +static void encBitClr (unsigned char regNo, unsigned char data); +static void encReset (void); +static void encInit (unsigned char *pEthAddr); +static unsigned short phyRead (unsigned char addr); +static void phyWrite(unsigned char, unsigned short); +static void encPoll (void); +static void encRx (void); + +#define m_nic_read(reg) encReadReg(reg) +#define m_nic_write(reg, data) encWriteReg(reg, data) +#define m_nic_write_retry(reg, data, count) encWriteRegRetry(reg, data, count) +#define m_nic_read_data(len, buf) encReadBuff((len), (buf)) +#define m_nic_write_data(len, buf) encWriteBuff((len), (buf)) + +/* bit field set */ +#define m_nic_bfs(reg, data) encBitSet(reg, data) + +/* bit field clear */ +#define m_nic_bfc(reg, data) encBitClr(reg, data) + +static unsigned char bank = 0; /* current bank in enc28j60 */ +static unsigned char next_pointer_lsb; +static unsigned char next_pointer_msb; + +static unsigned char buffer[ENC_MAX_FRM_LEN]; +static int rxResetCounter = 0; + +#define RX_RESET_COUNTER 1000; + +/*----------------------------------------------------------------------------- + * Always returns 0 + */ +int eth_init (bd_t * bis) +{ + unsigned char estatVal; + uchar enetaddr[6]; + + /* configure GPIO */ + (*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS; + (*((volatile unsigned long *) IO1DIR)) |= ENC_RESET; + + /* CS and RESET active low */ + PUT32 (IO1SET, ENC_SPI_SLAVE_CS); + PUT32 (IO1SET, ENC_RESET); + + spi_init (); + + /* taken from the Linux driver - dangerous stuff here! */ + /* Wait for CLKRDY to become set (i.e., check that we can communicate with + the ENC) */ + do + { + estatVal = m_nic_read(CTL_REG_ESTAT); + } while ((estatVal & 0x08) || (~estatVal & ENC_ESTAT_CLKRDY)); + + /* initialize controller */ + encReset (); + eth_getenv_enetaddr("ethaddr", enetaddr); + encInit (enetaddr); + + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */ + + return 0; +} + +int eth_send (volatile void *packet, int length) +{ + /* check frame length, etc. */ + /* TODO: */ + + /* switch to bank 0 */ + m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); + + /* set EWRPT */ + m_nic_write (CTL_REG_EWRPTL, (ENC_TX_BUF_START & 0xff)); + m_nic_write (CTL_REG_EWRPTH, (ENC_TX_BUF_START >> 8)); + + /* set ETXND */ + m_nic_write (CTL_REG_ETXNDL, (length + ENC_TX_BUF_START) & 0xFF); + m_nic_write (CTL_REG_ETXNDH, (length + ENC_TX_BUF_START) >> 8); + + /* set ETXST */ + m_nic_write (CTL_REG_ETXSTL, ENC_TX_BUF_START & 0xFF); + m_nic_write (CTL_REG_ETXSTH, ENC_TX_BUF_START >> 8); + + /* write packet */ + m_nic_write_data (length, (unsigned char *) packet); + + /* taken from the Linux driver */ + /* Verify that the internal transmit logic has not been altered by excessive + collisions. See Errata B4 12 and 14. + */ + if (m_nic_read(CTL_REG_EIR) & ENC_EIR_TXERIF) { + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_TXRST); + m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_TXRST); + } + m_nic_bfc(CTL_REG_EIR, (ENC_EIR_TXERIF | ENC_EIR_TXIF)); + + /* set ECON1.TXRTS */ + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_TXRTS); + + return 0; +} + + +/***************************************************************************** + * This function resets the receiver only. This function may be called from + * interrupt-context. + */ +static void encReceiverReset (void) +{ + unsigned char econ1; + + econ1 = m_nic_read (CTL_REG_ECON1); + if ((econ1 & ENC_ECON1_RXRST) == 0) { + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXRST); + rxResetCounter = RX_RESET_COUNTER; + } +} + +/***************************************************************************** + * receiver reset timer + */ +static void encReceiverResetCallback (void) +{ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXRST); + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */ +} + +/*----------------------------------------------------------------------------- + * Check for received packets. Call NetReceive for each packet. The return + * value is ignored by the caller. + */ +int eth_rx (void) +{ + if (rxResetCounter > 0 && --rxResetCounter == 0) { + encReceiverResetCallback (); + } + + encPoll (); + + return 0; +} + +void eth_halt (void) +{ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXEN); /* disable receive */ +} + +/*****************************************************************************/ + +static void encPoll (void) +{ + unsigned char eir_reg; + volatile unsigned char estat_reg; + unsigned char pkt_cnt; + +#ifdef CONFIG_USE_IRQ + /* clear global interrupt enable bit in enc28j60 */ + m_nic_bfc (CTL_REG_EIE, ENC_EIE_INTIE); +#endif + estat_reg = m_nic_read (CTL_REG_ESTAT); + + eir_reg = m_nic_read (CTL_REG_EIR); + + if (eir_reg & ENC_EIR_TXIF) { + /* clear TXIF bit in EIR */ + m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXIF); + } + + /* We have to use pktcnt and not pktif bit, see errata pt. 6 */ + + /* move to bank 1 */ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1); + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0); + + /* read pktcnt */ + pkt_cnt = m_nic_read (CTL_REG_EPKTCNT); + + if (pkt_cnt > 0) { + if ((eir_reg & ENC_EIR_PKTIF) == 0) { + /*printf("encPoll: pkt cnt > 0, but pktif not set\n"); */ + } + encRx (); + /* clear PKTIF bit in EIR, this should not need to be done but it + seems like we get problems if we do not */ + m_nic_bfc (CTL_REG_EIR, ENC_EIR_PKTIF); + } + + if (eir_reg & ENC_EIR_RXERIF) { + printf ("encPoll: rx error\n"); + m_nic_bfc (CTL_REG_EIR, ENC_EIR_RXERIF); + } + if (eir_reg & ENC_EIR_TXERIF) { + printf ("encPoll: tx error\n"); + m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXERIF); + } + +#ifdef CONFIG_USE_IRQ + /* set global interrupt enable bit in enc28j60 */ + m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE); +#endif +} + +static void encRx (void) +{ + unsigned short pkt_len; + unsigned short copy_len; + unsigned short status; + unsigned char eir_reg; + unsigned char pkt_cnt = 0; + unsigned short rxbuf_rdpt; + + /* switch to bank 0 */ + m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); + + m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb); + m_nic_write (CTL_REG_ERDPTH, next_pointer_msb); + + do { + m_nic_read_data (6, buffer); + next_pointer_lsb = buffer[0]; + next_pointer_msb = buffer[1]; + pkt_len = buffer[2]; + pkt_len |= (unsigned short) buffer[3] << 8; + status = buffer[4]; + status |= (unsigned short) buffer[5] << 8; + + if (pkt_len <= ENC_MAX_FRM_LEN) + copy_len = pkt_len; + else + copy_len = 0; + + if ((status & (1L << 7)) == 0) /* check Received Ok bit */ + copy_len = 0; + + /* taken from the Linux driver */ + /* check if next pointer is resonable */ + if ((((unsigned int)next_pointer_msb << 8) | + (unsigned int)next_pointer_lsb) >= ENC_TX_BUF_START) + copy_len = 0; + + if (copy_len > 0) { + m_nic_read_data (copy_len, buffer); + } + + /* advance read pointer to next pointer */ + m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb); + m_nic_write (CTL_REG_ERDPTH, next_pointer_msb); + + /* decrease packet counter */ + m_nic_bfs (CTL_REG_ECON2, ENC_ECON2_PKTDEC); + + /* taken from the Linux driver */ + /* Only odd values should be written to ERXRDPTL, + * see errata B4 pt.13 + */ + rxbuf_rdpt = (next_pointer_msb << 8 | next_pointer_lsb) - 1; + if ((rxbuf_rdpt < (m_nic_read(CTL_REG_ERXSTH) << 8 | + m_nic_read(CTL_REG_ERXSTL))) || (rxbuf_rdpt > + (m_nic_read(CTL_REG_ERXNDH) << 8 | + m_nic_read(CTL_REG_ERXNDL)))) { + m_nic_write(CTL_REG_ERXRDPTL, m_nic_read(CTL_REG_ERXNDL)); + m_nic_write(CTL_REG_ERXRDPTH, m_nic_read(CTL_REG_ERXNDH)); + } else { + m_nic_write(CTL_REG_ERXRDPTL, rxbuf_rdpt & 0xFF); + m_nic_write(CTL_REG_ERXRDPTH, rxbuf_rdpt >> 8); + } + + /* move to bank 1 */ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1); + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0); + + /* read pktcnt */ + pkt_cnt = m_nic_read (CTL_REG_EPKTCNT); + + /* switch to bank 0 */ + m_nic_bfc (CTL_REG_ECON1, + (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); + + if (copy_len == 0) { + eir_reg = m_nic_read (CTL_REG_EIR); + encReceiverReset (); + printf ("eth_rx: copy_len=0\n"); + continue; + } + + NetReceive ((unsigned char *) buffer, pkt_len); + + eir_reg = m_nic_read (CTL_REG_EIR); + } while (pkt_cnt); /* Use EPKTCNT not EIR.PKTIF flag, see errata pt. 6 */ +} + +static void encWriteReg (unsigned char regNo, unsigned char data) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0x40 | regNo); /* write in regNo */ + spi_write (data); + + enc_disable (); + enc_enable (); + + spi_write (0x1f); /* write reg 0x1f */ + + enc_disable (); + spi_unlock (); +} + +static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c) +{ + unsigned char readback; + int i; + + spi_lock (); + + for (i = 0; i < c; i++) { + enc_cfg_spi (); + enc_enable (); + + spi_write (0x40 | regNo); /* write in regNo */ + spi_write (data); + + enc_disable (); + enc_enable (); + + spi_write (0x1f); /* write reg 0x1f */ + + enc_disable (); + + spi_unlock (); /* we must unlock spi first */ + + readback = encReadReg (regNo); + + spi_lock (); + + if (readback == data) + break; + } + spi_unlock (); + + if (i == c) { + printf ("enc28j60: write reg %d failed\n", regNo); + } +} + +static unsigned char encReadReg (unsigned char regNo) +{ + unsigned char rxByte; + + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0x1f); /* read reg 0x1f */ + + bank = spi_read () & 0x3; + + enc_disable (); + enc_enable (); + + spi_write (regNo); + rxByte = spi_read (); + + /* check if MAC or MII register */ + if (((bank == 2) && (regNo <= 0x1a)) || + ((bank == 3) && (regNo <= 0x05 || regNo == 0x0a))) { + /* ignore first byte and read another byte */ + rxByte = spi_read (); + } + + enc_disable (); + spi_unlock (); + + return rxByte; +} + +static void encReadBuff (unsigned short length, unsigned char *pBuff) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0x20 | 0x1a); /* read buffer memory */ + + while (length--) { + if (pBuff != NULL) + *pBuff++ = spi_read (); + else + spi_write (0); + } + + enc_disable (); + spi_unlock (); +} + +static void encWriteBuff (unsigned short length, unsigned char *pBuff) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0x60 | 0x1a); /* write buffer memory */ + + spi_write (0x00); /* control byte */ + + while (length--) + spi_write (*pBuff++); + + enc_disable (); + spi_unlock (); +} + +static void encBitSet (unsigned char regNo, unsigned char data) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0x80 | regNo); /* bit field set */ + spi_write (data); + + enc_disable (); + spi_unlock (); +} + +static void encBitClr (unsigned char regNo, unsigned char data) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0xA0 | regNo); /* bit field clear */ + spi_write (data); + + enc_disable (); + spi_unlock (); +} + +static void encReset (void) +{ + spi_lock (); + enc_cfg_spi (); + enc_enable (); + + spi_write (0xff); /* soft reset */ + + enc_disable (); + spi_unlock (); + + /* sleep 1 ms. See errata pt. 2 */ + udelay (1000); +} + +static void encInit (unsigned char *pEthAddr) +{ + unsigned short phid1 = 0; + unsigned short phid2 = 0; + + /* switch to bank 0 */ + m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0)); + + /* + * Setup the buffer space. The reset values are valid for the + * other pointers. + */ + /* We shall not write to ERXST, see errata pt. 5. Instead we + have to make sure that ENC_RX_BUS_START is 0. */ + m_nic_write_retry (CTL_REG_ERXSTL, (ENC_RX_BUF_START & 0xFF), 1); + m_nic_write_retry (CTL_REG_ERXSTH, (ENC_RX_BUF_START >> 8), 1); + + /* taken from the Linux driver */ + m_nic_write_retry (CTL_REG_ERXNDL, (ENC_RX_BUF_END & 0xFF), 1); + m_nic_write_retry (CTL_REG_ERXNDH, (ENC_RX_BUF_END >> 8), 1); + + m_nic_write_retry (CTL_REG_ERDPTL, (ENC_RX_BUF_START & 0xFF), 1); + m_nic_write_retry (CTL_REG_ERDPTH, (ENC_RX_BUF_START >> 8), 1); + + next_pointer_lsb = (ENC_RX_BUF_START & 0xFF); + next_pointer_msb = (ENC_RX_BUF_START >> 8); + + /* verify identification */ + phid1 = phyRead (PHY_REG_PHID1); + phid2 = phyRead (PHY_REG_PHID2); + + if (phid1 != ENC_PHID1_VALUE + || (phid2 & ENC_PHID2_MASK) != ENC_PHID2_VALUE) { + printf ("ERROR: failed to identify controller\n"); + printf ("phid1 = %x, phid2 = %x\n", + phid1, (phid2 & ENC_PHID2_MASK)); + printf ("should be phid1 = %x, phid2 = %x\n", + ENC_PHID1_VALUE, ENC_PHID2_VALUE); + } + + /* + * --- MAC Initialization --- + */ + + /* Pull MAC out of Reset */ + + /* switch to bank 2 */ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* enable MAC to receive frames */ + /* added some bits from the Linux driver */ + m_nic_write_retry (CTL_REG_MACON1 + ,(ENC_MACON1_MARXEN | ENC_MACON1_TXPAUS | ENC_MACON1_RXPAUS) + ,10); + + /* configure pad, tx-crc and duplex */ + /* added a bit from the Linux driver */ + m_nic_write_retry (CTL_REG_MACON3 + ,(ENC_MACON3_PADCFG0 | ENC_MACON3_TXCRCEN | ENC_MACON3_FRMLNEN) + ,10); + + /* added 4 new lines from the Linux driver */ + /* Allow infinite deferals if the medium is continously busy */ + m_nic_write_retry(CTL_REG_MACON4, (1<<6) /*ENC_MACON4_DEFER*/, 10); + + /* Late collisions occur beyond 63 bytes */ + m_nic_write_retry(CTL_REG_MACLCON2, 63, 10); + + /* Set (low byte) Non-Back-to_Back Inter-Packet Gap. Recommended 0x12 */ + m_nic_write_retry(CTL_REG_MAIPGL, 0x12, 10); + + /* + * Set (high byte) Non-Back-to_Back Inter-Packet Gap. Recommended + * 0x0c for half-duplex. Nothing for full-duplex + */ + m_nic_write_retry(CTL_REG_MAIPGH, 0x0C, 10); + + /* set maximum frame length */ + m_nic_write_retry (CTL_REG_MAMXFLL, (ENC_MAX_FRM_LEN & 0xff), 10); + m_nic_write_retry (CTL_REG_MAMXFLH, (ENC_MAX_FRM_LEN >> 8), 10); + + /* + * Set MAC back-to-back inter-packet gap. Recommended 0x12 for half duplex + * and 0x15 for full duplex. + */ + m_nic_write_retry (CTL_REG_MABBIPG, 0x12, 10); + + /* set MAC address */ + + /* switch to bank 3 */ + m_nic_bfs (CTL_REG_ECON1, (ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1)); + + m_nic_write_retry (CTL_REG_MAADR0, pEthAddr[5], 1); + m_nic_write_retry (CTL_REG_MAADR1, pEthAddr[4], 1); + m_nic_write_retry (CTL_REG_MAADR2, pEthAddr[3], 1); + m_nic_write_retry (CTL_REG_MAADR3, pEthAddr[2], 1); + m_nic_write_retry (CTL_REG_MAADR4, pEthAddr[1], 1); + m_nic_write_retry (CTL_REG_MAADR5, pEthAddr[0], 1); + + /* + * PHY Initialization taken from the Linux driver + */ + + /* Prevent automatic loopback of data beeing transmitted by setting + ENC_PHCON2_HDLDIS */ + phyWrite(PHY_REG_PHCON2, (1<<8)); + + /* LEDs configuration + * LEDA: LACFG = 0100 -> display link status + * LEDB: LBCFG = 0111 -> display TX & RX activity + * STRCH = 1 -> LED pulses + */ + phyWrite(PHY_REG_PHLCON, 0x0472); + + /* Reset PDPXMD-bit => half duplex */ + phyWrite(PHY_REG_PHCON1, 0); + + /* + * Receive settings + */ + +#ifdef CONFIG_USE_IRQ + /* enable interrupts */ + m_nic_bfs (CTL_REG_EIE, ENC_EIE_PKTIE); + m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXIE); + m_nic_bfs (CTL_REG_EIE, ENC_EIE_RXERIE); + m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXERIE); + m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE); +#endif +} + +/***************************************************************************** + * + * Description: + * Read PHY registers. + * + * NOTE! This function will change to Bank 2. + * + * Params: + * [in] addr address of the register to read + * + * Returns: + * The value in the register + */ +static unsigned short phyRead (unsigned char addr) +{ + unsigned short ret = 0; + + /* move to bank 2 */ + m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* write address to MIREGADR */ + m_nic_write (CTL_REG_MIREGADR, addr); + + /* set MICMD.MIIRD */ + m_nic_write (CTL_REG_MICMD, ENC_MICMD_MIIRD); + + /* taken from the Linux driver */ + /* move to bank 3 */ + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* poll MISTAT.BUSY bit until operation is complete */ + while ((m_nic_read (CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) { + static int cnt = 0; + + if (cnt++ >= 1000) { + /* GJ - this seems extremely dangerous! */ + /* printf("#"); */ + cnt = 0; + } + } + + /* taken from the Linux driver */ + /* move to bank 2 */ + m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* clear MICMD.MIIRD */ + m_nic_write (CTL_REG_MICMD, 0); + + ret = (m_nic_read (CTL_REG_MIRDH) << 8); + ret |= (m_nic_read (CTL_REG_MIRDL) & 0xFF); + + return ret; +} + +/***************************************************************************** + * + * Taken from the Linux driver. + * Description: + * Write PHY registers. + * + * NOTE! This function will change to Bank 3. + * + * Params: + * [in] addr address of the register to write to + * [in] data to be written + * + * Returns: + * None + */ +static void phyWrite(unsigned char addr, unsigned short data) +{ + /* move to bank 2 */ + m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* write address to MIREGADR */ + m_nic_write(CTL_REG_MIREGADR, addr); + + m_nic_write(CTL_REG_MIWRL, data & 0xff); + m_nic_write(CTL_REG_MIWRH, data >> 8); + + /* move to bank 3 */ + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0); + m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1); + + /* poll MISTAT.BUSY bit until operation is complete */ + while((m_nic_read(CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) { + static int cnt = 0; + + if(cnt++ >= 1000) { + cnt = 0; + } + } +} diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c index c88e596..bc8c922 100644 --- a/drivers/net/mpc5xxx_fec.c +++ b/drivers/net/mpc5xxx_fec.c @@ -250,6 +250,13 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) mpc5xxx_fec_init_phy(dev, bis); /* + * Call board-specific PHY fixups (if any) + */ +#ifdef CONFIG_RESET_PHY_R + reset_phy(); +#endif + + /* * Initialize RxBD/TxBD rings */ mpc5xxx_fec_rbd_init(fec); diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index 54a1bfb..ba9c67e 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -654,6 +654,28 @@ again: return length; } +static int smc_write_hwaddr(struct eth_device *dev) +{ + int i; + + swap_to(ETHERNET); + SMC_SELECT_BANK (dev, 1); +#ifdef USE_32_BIT + for (i = 0; i < 6; i += 2) { + word address; + + address = dev->enetaddr[i + 1] << 8; + address |= dev->enetaddr[i]; + SMC_outw(dev, address, (ADDR0_REG + i)); + } +#else + for (i = 0; i < 6; i++) + SMC_outb(dev, dev->enetaddr[i], (ADDR0_REG + i)); +#endif + swap_to(FLASH); + return 0; +} + /* * Open and Initialize the board * @@ -662,8 +684,6 @@ again: */ static int smc_init(struct eth_device *dev, bd_t *bd) { - int i; - swap_to(ETHERNET); PRINTK2 ("%s: smc_init\n", SMC_DEV_NAME); @@ -680,20 +700,6 @@ static int smc_init(struct eth_device *dev, bd_t *bd) /* conservative setting (10Mbps, HalfDuplex, no AutoNeg.) */ /* SMC_SELECT_BANK(dev, 0); */ /* SMC_outw(dev, 0, RPC_REG); */ - SMC_SELECT_BANK (dev, 1); - -#ifdef USE_32_BIT - for (i = 0; i < 6; i += 2) { - word address; - - address = dev->enetaddr[i + 1] << 8; - address |= dev->enetaddr[i]; - SMC_outw(dev, address, (ADDR0_REG + i)); - } -#else - for (i = 0; i < 6; i++) - SMC_outb(dev, dev->enetaddr[i], (ADDR0_REG + i)); -#endif printf(SMC_DEV_NAME ": MAC %pM\n", dev->enetaddr); @@ -1360,6 +1366,7 @@ int smc91111_initialize(u8 dev_num, int base_addr) return 0; } + memset(dev, 0, sizeof(*dev)); priv->dev_num = dev_num; dev->priv = priv; dev->iobase = base_addr; @@ -1374,6 +1381,7 @@ int smc91111_initialize(u8 dev_num, int base_addr) dev->halt = smc_halt; dev->send = smc_send; dev->recv = smc_rcv; + dev->write_hwaddr = smc_write_hwaddr; sprintf(dev->name, "%s-%hu", SMC_DEV_NAME, dev_num); eth_register(dev); diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 0820daa..76af939 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -26,6 +26,7 @@ #include <common.h> #include <net.h> #include <config.h> +#include <malloc.h> #include <asm/io.h> #undef DEBUG @@ -63,26 +64,19 @@ #define XEL_RSR_RECV_IE_MASK 0x00000008UL typedef struct { - unsigned int baseaddress; /* Base address for device (IPIF) */ - unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ - unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ - unsigned char deviceid; /* Unique ID of device - for future */ + u32 baseaddress; /* Base address for device (IPIF) */ + u32 nexttxbuffertouse; /* Next TX buffer to write to */ + u32 nextrxbuffertouse; /* Next RX buffer to read from */ + uchar deviceid; /* Unique ID of device - for future */ } xemaclite; static xemaclite emaclite; static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ -/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ -#ifdef CONFIG_ENV_IS_NOWHERE -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; -#else -static u8 emacaddr[ENET_ADDR_LENGTH]; -#endif - -void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) +static void xemaclite_alignedread (u32 *srcptr, void *destptr, u32 bytecount) { - unsigned int i; + u32 i; u32 alignbuffer; u32 *to32ptr; u32 *from32ptr; @@ -107,9 +101,9 @@ void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) } } -void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) +static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount) { - unsigned i; + u32 i; u32 alignbuffer; u32 *to32ptr = (u32 *) destptr; u32 *from32ptr; @@ -134,23 +128,16 @@ void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) *to32ptr++ = alignbuffer; } -void eth_halt (void) +static void emaclite_halt(struct eth_device *dev) { debug ("eth_halt\n"); } -int eth_init (bd_t * bis) +static int emaclite_init(struct eth_device *dev, bd_t *bis) { - uchar enetaddr[6]; - debug ("EmacLite Initialization Started\n"); memset (&emaclite, 0, sizeof (xemaclite)); - emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; - - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { - memcpy(enetaddr, emacaddr, ENET_ADDR_LENGTH); - eth_setenv_enetaddr("ethaddr", enetaddr); - } + emaclite.baseaddress = dev->iobase; /* * TX - TX_PING & TX_PONG initialization @@ -158,7 +145,7 @@ int eth_init (bd_t * bis) /* Restart PING TX */ out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); /* Copy MAC address */ - xemaclite_alignedwrite (enetaddr, + xemaclite_alignedwrite (dev->enetaddr, emaclite.baseaddress, ENET_ADDR_LENGTH); /* Set the length */ out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); @@ -171,7 +158,7 @@ int eth_init (bd_t * bis) #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG /* The same operation with PONG TX */ out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); - xemaclite_alignedwrite (enetaddr, emaclite.baseaddress + + xemaclite_alignedwrite (dev->enetaddr, emaclite.baseaddress + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, @@ -194,7 +181,7 @@ int eth_init (bd_t * bis) return 0; } -int xemaclite_txbufferavailable (xemaclite * instanceptr) +static int xemaclite_txbufferavailable (xemaclite *instanceptr) { u32 reg; u32 txpingbusy; @@ -216,12 +203,12 @@ int xemaclite_txbufferavailable (xemaclite * instanceptr) return (!(txpingbusy && txpongbusy)); } -int eth_send (volatile void *ptr, int len) { - - unsigned int reg; - unsigned int baseaddress; +static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len) +{ + u32 reg; + u32 baseaddress; - unsigned maxtry = 1000; + u32 maxtry = 1000; if (len > ENET_MAX_MTU) len = ENET_MAX_MTU; @@ -293,11 +280,11 @@ int eth_send (volatile void *ptr, int len) { return 0; } -int eth_rx (void) +static int emaclite_recv(struct eth_device *dev) { - unsigned int length; - unsigned int reg; - unsigned int baseaddress; + u32 length; + u32 reg; + u32 baseaddress; baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; reg = in_be32 (baseaddress + XEL_RSR_OFFSET); @@ -322,7 +309,7 @@ int eth_rx (void) #endif } /* Get the length of the frame that arrived */ - switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & + switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) & 0xFFFF0000 ) >> 16) { case 0x806: length = 42 + 20; /* FIXME size of ARP */ @@ -330,7 +317,7 @@ int eth_rx (void) break; case 0x800: length = 14 + 14 + - (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & + (((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10))) & 0xFFFF0000) >> 16); /* FIXME size of IP packet */ debug ("IP Packet\n"); break; @@ -353,3 +340,26 @@ int eth_rx (void) return 1; } + +int xilinx_emaclite_initialize (bd_t *bis, int base_addr) +{ + struct eth_device *dev; + + dev = malloc(sizeof(*dev)); + if (dev == NULL) + hang(); + + memset(dev, 0, sizeof(*dev)); + sprintf(dev->name, "Xilinx_Emaclite"); + + dev->iobase = base_addr; + dev->priv = 0; + dev->init = emaclite_init; + dev->halt = emaclite_halt; + dev->send = emaclite_send; + dev->recv = emaclite_recv; + + eth_register(dev); + + return 0; +} diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index e10c0f3..48033d7 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -1223,8 +1223,10 @@ static int uec_init(struct eth_device* dev, bd_t *bd) i = 50; do { err = curphy->read_status(uec->mii_info); + if (!(((i-- > 0) && !uec->mii_info->link) || err)) + break; udelay(100000); - } while (((i-- > 0) && !uec->mii_info->link) || err); + } while (1); if (err || i <= 0) printf("warning: %s: timeout on PHY link\n", dev->name); diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 2d3a896..9be784e 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -351,6 +351,15 @@ static int marvell_config_aneg (struct uec_mii_info *mii_info) static int genmii_config_aneg (struct uec_mii_info *mii_info) { if (mii_info->autoneg) { + /* Speed up the common case, if link is already up, speed and + duplex match, skip auto neg as it already matches */ + if (!genmii_read_status(mii_info) && mii_info->link) + if (mii_info->duplex == DUPLEX_FULL && + mii_info->speed == SPEED_100) + if (mii_info->advertising & + ADVERTISED_100baseT_Full) + return 0; + config_genmii_advert (mii_info); genmii_restart_aneg (mii_info); } else @@ -389,7 +398,6 @@ static int genmii_update_link (struct uec_mii_info *mii_info) status = phy_read(mii_info, PHY_BMSR); } mii_info->link = 1; - udelay(500000); /* another 500 ms (results in faster booting) */ } else { if (status & PHY_BMSR_LS) mii_info->link = 1; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 7e833fd..32f24de 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -70,6 +70,15 @@ void NS16550_putc (NS16550_t com_port, char c) { while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0); serial_out(c, &com_port->thr); + + /* + * Call watchdog_reset() upon newline. This is done here in putc + * since the environment code uses a single puts() to print the complete + * environment upon "printenv". So we can't put this watchdog call + * in puts(). + */ + if (c == '\n') + WATCHDOG_RESET(); } #ifndef CONFIG_NS16550_MIN_FUNCTIONS diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index bc6480c..b22ca90 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -1276,9 +1276,6 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) debug("%s: status %d\n", __func__, req->status); packet_received = 1; - - if (req) - dev->rx_req = req; } static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags) @@ -1287,16 +1284,18 @@ static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags) dev->tx_req = usb_ep_alloc_request(dev->in_ep, 0); if (!dev->tx_req) - goto fail; + goto fail1; dev->rx_req = usb_ep_alloc_request(dev->out_ep, 0); if (!dev->rx_req) - goto fail; + goto fail2; return 0; -fail: +fail2: + usb_ep_free_request(dev->in_ep, dev->tx_req); +fail1: error("can't alloc requests"); return -1; } @@ -1791,8 +1790,6 @@ static int usb_eth_init(struct eth_device *netdev, bd_t *bd) } dev->network_started = 0; - dev->tx_req = NULL; - dev->rx_req = NULL; packet_received = 0; packet_sent = 0; @@ -1813,6 +1810,7 @@ static int usb_eth_init(struct eth_device *netdev, bd_t *bd) usb_gadget_handle_interrupts(); } + packet_received = 0; rx_submit(dev, dev->rx_req, 0); return 0; fail: @@ -1823,15 +1821,13 @@ static int usb_eth_send(struct eth_device *netdev, volatile void *packet, int length) { int retval; - struct usb_request *req = NULL; struct eth_dev *dev = &l_ethdev; + struct usb_request *req = dev->tx_req; unsigned long ts; unsigned long timeout = USB_CONNECT_TIMEOUT; debug("%s:...\n", __func__); - req = dev->tx_req; - req->buf = (void *)packet; req->context = NULL; req->complete = tx_complete; @@ -1883,8 +1879,7 @@ static int usb_eth_recv(struct eth_device *netdev) NetReceive(NetRxPackets[0], dev->rx_req->length); packet_received = 0; - if (dev->rx_req) - rx_submit(dev, dev->rx_req, 0); + rx_submit(dev, dev->rx_req, 0); } else error("dev->rx_req invalid"); } diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 255679a..0e7c9db 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -35,7 +35,12 @@ COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o # echi COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o +ifdef CONFIG_MPC512X +COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o +else COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o +endif +COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index c674929..6e0043a 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -40,7 +40,7 @@ int ehci_hcd_init(void) { struct usb_ehci *ehci; - ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR; + ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR; hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); hcor = (struct ehci_hcor *)((uint32_t) hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c new file mode 100644 index 0000000..d360108 --- /dev/null +++ b/drivers/usb/host/ehci-mpc512x.c @@ -0,0 +1,159 @@ +/* + * (C) Copyright 2010, Damien Dusha, <d.dusha@gmail.com> + * + * (C) Copyright 2009, Value Team S.p.A. + * Francesco Rendine, <francesco.rendine@valueteam.com> + * + * (C) Copyright 2009 Freescale Semiconductor, Inc. + * + * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB + * + * Author: Tor Krill tor@excito.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <pci.h> +#include <usb.h> +#include <asm/io.h> +#include <usb/ehci-fsl.h> + +#include "ehci.h" +#include "ehci-core.h" + +static void fsl_setup_phy(volatile struct ehci_hcor *); +static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci); +static int reset_usb_controller(volatile struct usb_ehci *ehci); +static void usb_platform_dr_init(volatile struct usb_ehci *ehci); + +/* + * Initialize SOC FSL EHCI Controller + * + * This code is derived from EHCI FSL USB Linux driver for MPC5121 + * + */ +int ehci_hcd_init(void) +{ + volatile struct usb_ehci *ehci; + + /* Hook the memory mapped registers for EHCI-Controller */ + ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR; + hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength)); + hcor = (struct ehci_hcor *)((uint32_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + /* configure interface for UTMI_WIDE */ + usb_platform_dr_init(ehci); + + /* Init Phy USB0 to UTMI+ */ + fsl_setup_phy(hcor); + + /* Set to host mode */ + fsl_platform_set_host_mode(ehci); + + /* + * Setting the burst size seems to be required to prevent the + * USB from hanging when communicating with certain USB Mass + * storage devices. This was determined by analysing the + * EHCI registers under Linux vs U-Boot and burstsize was the + * major non-interrupt related difference between the two + * implementations. + * + * Some USB sticks behave better than others. In particular, + * the following USB stick is especially problematic: + * 0930:6545 Toshiba Corp + * + * The burstsize is set here to match the Linux implementation. + */ + out_be32(&ehci->burstsize, FSL_EHCI_TXPBURST(8) | + FSL_EHCI_RXPBURST(8)); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(void) +{ + volatile struct usb_ehci *ehci; + int exit_status = 0; + + if (hcor) { + /* Unhook struct */ + hccr = NULL; + hcor = NULL; + + /* Reset the USB controller */ + ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR; + exit_status = reset_usb_controller(ehci); + } + + return exit_status; +} + +static int reset_usb_controller(volatile struct usb_ehci *ehci) +{ + unsigned int i; + + /* Command a reset of the USB Controller */ + out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST); + + /* Wait for the reset process to finish */ + for (i = 65535 ; i > 0 ; i--) { + /* + * The host will set this bit to zero once the + * reset process is complete + */ + if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0) + return 0; + } + + /* Hub did not reset in time */ + return -1; +} + +static void fsl_setup_phy(volatile struct ehci_hcor *hcor) +{ + uint32_t portsc; + + portsc = ehci_readl(&hcor->or_portsc[0]); + portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); + + /* Enable the phy mode to UTMI Wide */ + portsc |= PORT_PTS_PTW; + portsc |= PORT_PTS_UTMI; + + ehci_writel(&hcor->or_portsc[0], portsc); +} + +static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci) +{ + uint32_t temp; + + temp = in_le32(&ehci->usbmode); + temp |= CM_HOST | ES_BE; + out_le32(&ehci->usbmode, temp); +} + +static void usb_platform_dr_init(volatile struct usb_ehci *ehci) +{ + /* Configure interface for UTMI_WIDE */ + out_be32(&ehci->isiphyctrl, PHYCTRL_PHYE | PHYCTRL_PXE); + out_be32(&ehci->usbgenctrl, GC_PPP | GC_PFP ); +} diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c new file mode 100644 index 0000000..8d7b380 --- /dev/null +++ b/drivers/usb/host/ehci-mxc.c @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + + +#include <common.h> +#include <usb.h> +#include <asm/io.h> +#include <asm/arch/mx31-regs.h> +#include <usb/ehci-fsl.h> +#include <errno.h> + +#include "ehci.h" +#include "ehci-core.h" + +#define USBCTRL_OTGBASE_OFFSET 0x600 + +#define MX31_OTG_SIC_SHIFT 29 +#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT) +#define MX31_OTG_PM_BIT (1 << 24) + +#define MX31_H2_SIC_SHIFT 21 +#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT) +#define MX31_H2_PM_BIT (1 << 16) +#define MX31_H2_DT_BIT (1 << 5) + +#define MX31_H1_SIC_SHIFT 13 +#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT) +#define MX31_H1_PM_BIT (1 << 8) +#define MX31_H1_DT_BIT (1 << 4) + +static int mxc_set_usbcontrol(int port, unsigned int flags) +{ + unsigned int v; +#ifdef CONFIG_MX31 + v = readl(MX31_OTG_BASE_ADDR + USBCTRL_OTGBASE_OFFSET); + + switch (port) { + case 0: /* OTG port */ + v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) + << MX31_OTG_SIC_SHIFT; + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX31_OTG_PM_BIT; + + break; + case 1: /* H1 port */ + v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | + MX31_H1_DT_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) + << MX31_H1_SIC_SHIFT; + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX31_H1_PM_BIT; + + if (!(flags & MXC_EHCI_TTL_ENABLED)) + v |= MX31_H1_DT_BIT; + + break; + case 2: /* H2 port */ + v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | + MX31_H2_DT_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) + << MX31_H2_SIC_SHIFT; + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX31_H2_PM_BIT; + + if (!(flags & MXC_EHCI_TTL_ENABLED)) + v |= MX31_H2_DT_BIT; + + break; + default: + return -EINVAL; + } + + writel(v, MX31_OTG_BASE_ADDR + + USBCTRL_OTGBASE_OFFSET); +#endif + return 0; +} + +int ehci_hcd_init(void) +{ + u32 tmp; + struct usb_ehci *ehci; + struct clock_control_regs *sc_regs = + (struct clock_control_regs *)CCM_BASE; + + tmp = __raw_readl(&sc_regs->ccmr); + __raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ; + + udelay(80); + + /* Take USB2 */ + ehci = (struct usb_ehci *)(MX31_OTG_BASE_ADDR + + (0x200 * CONFIG_MXC_USB_PORT)); + hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); + hcor = (struct ehci_hcor *)((uint32_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + setbits_le32(&ehci->usbmode, CM_HOST); + setbits_le32(&ehci->control, USB_EN); + + __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); + + mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS); + + udelay(10000); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(void) +{ + return 0; +} diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index b3c1d5d..6fae8ba 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -71,6 +71,11 @@ struct ehci_hcor { #define STD_ASS (1 << 15) #define STS_HALT (1 << 12) uint32_t or_usbintr; +#define INTR_UE (1 << 0) /* USB interrupt enable */ +#define INTR_UEE (1 << 1) /* USB error interrupt enable */ +#define INTR_PCE (1 << 2) /* Port change detect enable */ +#define INTR_SEE (1 << 4) /* system error enable */ +#define INTR_AAE (1 << 5) /* Interrupt on async adavance enable */ uint32_t or_frindex; uint32_t or_ctrldssegment; uint32_t or_periodiclistbase; diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 3f76c4e..d246978 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1529,7 +1529,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, if (usb_pipebulk(pipe)) timeout = BULK_TO; else - timeout = 100; + timeout = 1000; /* wait for it to complete */ for (;;) { diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index af989aa..f38b279 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -144,19 +144,28 @@ static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out) u16 csr; if (dir_out) { - if (!toggle) - writew(MUSB_TXCSR_CLRDATATOG, &musbr->txcsr); - else { - csr = readw(&musbr->txcsr); + csr = readw(&musbr->txcsr); + if (!toggle) { + if (csr & MUSB_TXCSR_MODE) + csr = MUSB_TXCSR_CLRDATATOG; + else + csr = 0; + writew(csr, &musbr->txcsr); + } else { csr |= MUSB_TXCSR_H_WR_DATATOGGLE; writew(csr, &musbr->txcsr); csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT); writew(csr, &musbr->txcsr); } } else { - if (!toggle) - writew(MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr); - else { + if (!toggle) { + csr = readw(&musbr->txcsr); + if (csr & MUSB_TXCSR_MODE) + csr = MUSB_RXCSR_CLRDATATOG; + else + csr = 0; + writew(csr, &musbr->rxcsr); + } else { csr = readw(&musbr->rxcsr); csr |= MUSB_RXCSR_H_WR_DATATOGGLE; writew(csr, &musbr->rxcsr); diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 7f04b49..51831f0 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -334,37 +334,6 @@ enum ipu_panel { #define IOMUX_MODE_L(pin, mode) IOMUX_MODE(((pin) + 0xc) ^ 3, mode) -enum lcd_pin { - MX31_PIN_D3_SPL = IOMUX_PIN(0xff, 19), - MX31_PIN_D3_CLS = IOMUX_PIN(0xff, 20), - MX31_PIN_D3_REV = IOMUX_PIN(0xff, 21), - MX31_PIN_CONTRAST = IOMUX_PIN(0xff, 22), - MX31_PIN_VSYNC3 = IOMUX_PIN(0xff, 23), - - MX31_PIN_DRDY0 = IOMUX_PIN(0xff, 33), - MX31_PIN_FPSHIFT = IOMUX_PIN(0xff, 34), - MX31_PIN_HSYNC = IOMUX_PIN(0xff, 35), - - MX31_PIN_LD17 = IOMUX_PIN(0xff, 37), - MX31_PIN_LD16 = IOMUX_PIN(0xff, 38), - MX31_PIN_LD15 = IOMUX_PIN(0xff, 39), - MX31_PIN_LD14 = IOMUX_PIN(0xff, 40), - MX31_PIN_LD13 = IOMUX_PIN(0xff, 41), - MX31_PIN_LD12 = IOMUX_PIN(0xff, 42), - MX31_PIN_LD11 = IOMUX_PIN(0xff, 43), - MX31_PIN_LD10 = IOMUX_PIN(0xff, 44), - MX31_PIN_LD9 = IOMUX_PIN(0xff, 45), - MX31_PIN_LD8 = IOMUX_PIN(0xff, 46), - MX31_PIN_LD7 = IOMUX_PIN(0xff, 47), - MX31_PIN_LD6 = IOMUX_PIN(0xff, 48), - MX31_PIN_LD5 = IOMUX_PIN(0xff, 49), - MX31_PIN_LD4 = IOMUX_PIN(0xff, 50), - MX31_PIN_LD3 = IOMUX_PIN(0xff, 51), - MX31_PIN_LD2 = IOMUX_PIN(0xff, 52), - MX31_PIN_LD1 = IOMUX_PIN(0xff, 53), - MX31_PIN_LD0 = IOMUX_PIN(0xff, 54), -}; - struct chan_param_mem_planar { /* Word 0 */ u32 xv:10; diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 5f1f800..c2dd514 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -82,6 +82,11 @@ CFLAGS := $(filter-out $(RELFLAGS),$(CFLAGS)) CPPFLAGS := $(filter-out $(RELFLAGS),$(CPPFLAGS)) endif +# We don't want gcc reordering functions if possible. This ensures that an +# application's entry point will be the first function in the application's +# source file. +CFLAGS += $(call cc-option,-fno-toplevel-reorder) + all: $(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF) ######################################################################### diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 003666e..744e961 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -439,11 +439,19 @@ get_vfatname (fsdata *mydata, int curclust, __u8 *cluster, { dir_entry *realdent; dir_slot *slotptr = (dir_slot *)retdent; - __u8 *nextclust = cluster + mydata->clust_size * SECTOR_SIZE; + __u8 *buflimit = cluster + ((curclust == 0) ? + LINEAR_PREFETCH_SIZE : + (mydata->clust_size * SECTOR_SIZE) + ); __u8 counter = (slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff; int idx = 0; - while ((__u8 *)slotptr < nextclust) { + if (counter > VFAT_MAXSEQ) { + debug("Error: VFAT name is too long\n"); + return -1; + } + + while ((__u8 *)slotptr < buflimit) { if (counter == 0) break; if (((slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff) != counter) @@ -452,10 +460,11 @@ get_vfatname (fsdata *mydata, int curclust, __u8 *cluster, counter--; } - if ((__u8 *)slotptr >= nextclust) { + if ((__u8 *)slotptr >= buflimit) { dir_slot *slotptr2; - slotptr--; + if (curclust == 0) + return -1; curclust = get_fatent(mydata, curclust); if (CHECK_CLUST(curclust, mydata->fatsize)) { debug("curclust: 0x%x\n", curclust); @@ -470,14 +479,19 @@ get_vfatname (fsdata *mydata, int curclust, __u8 *cluster, } slotptr2 = (dir_slot *)get_vfatname_block; - while (slotptr2->id > 0x01) + while (counter > 0) { + if (((slotptr2->id & ~LAST_LONG_ENTRY_MASK) + & 0xff) != counter) + return -1; slotptr2++; + counter--; + } /* Save the real directory entry */ - realdent = (dir_entry *)slotptr2 + 1; - while ((__u8 *)slotptr2 >= get_vfatname_block) { - slot2str(slotptr2, l_name, &idx); + realdent = (dir_entry *)slotptr2; + while ((__u8 *)slotptr2 > get_vfatname_block) { slotptr2--; + slot2str(slotptr2, l_name, &idx); } } else { /* Save the real directory entry */ @@ -549,7 +563,7 @@ static dir_entry *get_dentfromdir (fsdata *mydata, int startsect, dentptr = (dir_entry *)get_dentfromdir_block; for (i = 0; i < DIRENTSPERCLUST; i++) { - char s_name[14], l_name[256]; + char s_name[14], l_name[VFAT_MAXLEN_BYTES]; l_name[0] = '\0'; if (dentptr->name[0] == DELETED_FLAG) { @@ -841,7 +855,11 @@ do_fat_read (const char *filename, void *buffer, unsigned long maxsize, debug("FAT read sect=%d, clust_size=%d, DIRENTSPERBLOCK=%d\n", cursect, mydata->clust_size, DIRENTSPERBLOCK); - if (disk_read(cursect, mydata->clust_size, do_fat_read_block) < 0) { + if (disk_read(cursect, + (mydata->fatsize == 32) ? + (mydata->clust_size) : + LINEAR_PREFETCH_SIZE, + do_fat_read_block) < 0) { debug("Error: reading rootdir block\n"); return -1; } @@ -849,9 +867,13 @@ do_fat_read (const char *filename, void *buffer, unsigned long maxsize, dentptr = (dir_entry *) do_fat_read_block; for (i = 0; i < DIRENTSPERBLOCK; i++) { - char s_name[14], l_name[256]; + char s_name[14], l_name[VFAT_MAXLEN_BYTES]; l_name[0] = '\0'; + if (dentptr->name[0] == DELETED_FLAG) { + dentptr++; + continue; + } if ((dentptr->attr & ATTR_VOLUME)) { #ifdef CONFIG_SUPPORT_VFAT if ((dentptr->attr & ATTR_VFAT) && @@ -859,7 +881,10 @@ do_fat_read (const char *filename, void *buffer, unsigned long maxsize, prevcksum = ((dir_slot *)dentptr)->alias_checksum; - get_vfatname(mydata, 0, + get_vfatname(mydata, + (mydata->fatsize == 32) ? + root_cluster : + 0, do_fat_read_block, dentptr, l_name); diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 746bf18..cdc5ff1 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -70,6 +70,7 @@ #define CONFIG_CMD_PORTIO /* Port I/O */ #define CONFIG_CMD_REGINFO /* Register dump */ #define CONFIG_CMD_REISER /* Reiserfs support */ +#define CONFIG_CMD_RARP /* rarpboot support */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SAVES /* save S record dump */ diff --git a/include/configs/A3000.h b/include/configs/A3000.h index 6d8870c..26d4d8a 100644 --- a/include/configs/A3000.h +++ b/include/configs/A3000.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_A3000 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -135,7 +136,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -170,7 +171,7 @@ * Definitions for initial stack pointer and data area */ -/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */ +/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */ /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -310,12 +311,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ADCIOP.h b/include/configs/ADCIOP.h index d8303f3..5610914 100644 --- a/include/configs/ADCIOP.h +++ b/include/configs/ADCIOP.h @@ -36,6 +36,8 @@ #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ #define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ @@ -200,13 +202,4 @@ #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ #define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ADS860.h b/include/configs/ADS860.h index 688e77a..82ea172 100644 --- a/include/configs/ADS860.h +++ b/include/configs/ADS860.h @@ -20,6 +20,8 @@ /* Processor type */ #define CONFIG_MPC860 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/AMX860.h b/include/configs/AMX860.h index 6e2907e..aa35cbc 100644 --- a/include/configs/AMX860.h +++ b/include/configs/AMX860.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 #define CONFIG_AMX860 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef CONFIG_8xx_CONS_SMC1 /* Console is on SCC2 */ #undef CONFIG_8xx_CONS_SMC2 #define CONFIG_8xx_CONS_SCC2 1 @@ -297,12 +299,4 @@ #define CONFIG_SYS_OR6_PRELIM 0xFFFF8000 /* 32kB, 15 waits, cs after addr, no bursts */ #define CONFIG_SYS_BR6_PRELIM 0x60000401 /* use GPCM for CS generation, 8 bit port */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index e707075..f1ae16c 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -27,6 +27,13 @@ #define CONFIG_AP1000 1 /* ...on an AP1000 board */ +/* + * Start at bottom of RAM, but at an aliased address so that it looks + * like it's not in RAM. This is a bit of voodoo to allow it to be + * run from RAM instead of Flash. + */ +#define CONFIG_SYS_TEXT_BASE 0x08000000 + #define CONFIG_PCI 1 #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ @@ -141,7 +148,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0x20000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ @@ -213,14 +220,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index cb3f80b..b846afc 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -38,6 +38,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_APCG405 1 /* ...on a APC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_BOARD_EARLY_INIT_R 1 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -429,14 +431,6 @@ #endif /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * PCI OHCI controller */ #define CONFIG_USB_OHCI_NEW 1 diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 568ce15..b4ff718 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_AR405 1 /* ...on a AR405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ @@ -182,8 +184,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -269,12 +271,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 789f750..480051b 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ASH405 1 /* ...on a ASH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -351,14 +353,6 @@ #define CONFIG_SYS_DUART_RST (0x80000000 >> 14) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 58f0c1f..dda6baa 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -47,6 +47,10 @@ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_MPC8548 1 /* MPC8548 specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* enable any pci type devices */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -173,7 +177,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 8000 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI 1 @@ -378,14 +382,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/Adder.h b/include/configs/Adder.h index e4d30a1..a1c530b 100644 --- a/include/configs/Adder.h +++ b/include/configs/Adder.h @@ -32,6 +32,8 @@ #define CONFIG_ADDER /* Analogue&Micro Adder board */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_BAUDRATE 38400 @@ -130,7 +132,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */ @@ -207,14 +209,6 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h index 576aa74..b5c9049 100644 --- a/include/configs/Alaska8220.h +++ b/include/configs/Alaska8220.h @@ -31,6 +31,9 @@ #define CONFIG_MPC8220 1 #define CONFIG_ALASKA8220 1 /* ... on Alaska board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +41,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -252,7 +252,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index 555145e..9250ef3 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -35,6 +35,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* these hardware addresses are pretty bogus, please change them to suit your needs */ @@ -466,15 +468,6 @@ extern unsigned long bab7xx_get_gclk_freq (void); #define CONFIG_SYS_L2_BAB7xx -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_TULIP #define CONFIG_TULIP_SELECT_MEDIA diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index 44befe9..d051704 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -56,10 +56,17 @@ #define CONFIG_BC3450_FP 1 /* + enable FP O/P */ #undef CONFIG_BC3450_CRT /* + enable CRT O/P (Debug only!) */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -207,7 +214,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -324,7 +331,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -386,7 +393,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 98f6396..7d928eb 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -45,6 +45,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_BMW 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_BCM570x 1 /* Use Broadcom BCM570x Ethernet Driver */ @@ -124,7 +126,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (2048 << 10) /* Reserve 2MB for malloc() */ @@ -300,13 +302,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h index ad075b8..9c55805 100644 --- a/include/configs/CANBT.h +++ b/include/configs/CANBT.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CANBT 1 /* ...on a CANBT board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ @@ -127,8 +129,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -226,13 +228,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 764f71b..ad36a14 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -75,6 +75,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -540,15 +542,6 @@ #define CONFIG_SYS_GPIO0_TSRH 0x00000000 #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NO_SERIAL_EEPROM /*--------------------------------------------------------------------*/ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 9c57acb..3e973f2 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC8000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -207,8 +209,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -318,14 +320,6 @@ #define CONFIG_SYS_PLD_RESET (0x80000000 >> 12) /* GPIO12 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index 6451263..486a4e0 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_CPC45 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -126,7 +127,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -338,16 +339,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - - /*----------------------------------------------------------------------*/ /* CPC45 Memory Map */ /*----------------------------------------------------------------------*/ diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index c6882fd..e4d8f9c 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -36,6 +36,8 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */ @@ -270,12 +272,4 @@ #define CONFIG_SYS_PB_LED (0x80000000 >> 16) /* GPIO16 */ #define CONFIG_SYS_INTA_FAKE (0x80000000 >> 23) /* GPIO23 */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index da57b04..6b2986d 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -204,9 +206,9 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -338,13 +340,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index d682d37..908b872 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -39,6 +39,8 @@ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #undef CONFIG_CPCI405_6U /* enable this for 6U boards */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -399,13 +401,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 1c521f2..a2b8d72 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -39,6 +39,8 @@ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ #define CONFIG_CPCI405AB 1 /* ...and special AB version */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -391,13 +393,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index c7b7931..7fea5e3 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -38,6 +38,8 @@ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -394,12 +396,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index f2d51f7..37341cb 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -57,6 +57,8 @@ #define CONFIG_CPCI750 1 /* this is an CPCI750 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 9600 /* console baudrate = 9600 */ #define CONFIG_MV64360_ECC /* enable ECC support */ @@ -616,14 +618,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1) diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index f114290..5aff74c 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCIISER4 1 /* ...on a CPCIISER4 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ @@ -252,12 +254,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 6d76d9f..233d36b 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -37,6 +37,12 @@ #define CONFIG_CPU86 1 /* ...on a CPU86 board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifdef CONFIG_BOOT_ROM +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#else +#define CONFIG_SYS_TEXT_BASE 0xFF000000 +#endif + /* * select serial console configuration * @@ -304,7 +310,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -333,15 +339,6 @@ #define CONFIG_ENV_SIZE (2048 - 512) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index 83b010c..560e449 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -38,6 +38,12 @@ #define CONFIG_PCI #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifdef CONFIG_BOOT_ROM +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#else +#define CONFIG_SYS_TEXT_BASE 0xFF000000 +#endif + /* * select serial console configuration * @@ -319,7 +325,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -354,15 +360,6 @@ #define CONFIG_ENV_SIZE (2048 - 512) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index f6cd760..6ababa1 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -36,6 +36,13 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC405 family */ + +/* + * Note: I make an "image" from U-Boot itself, which prefixes 0x40 + * bytes of header info, hence start address is thus shifted. + */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0040 + #define CONFIG_SYS_CLK_FREQ 25000000 #define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -159,7 +166,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */ @@ -241,12 +248,4 @@ #define EEPROM_WRITE_ADDRESS 0xA0 #define EEPROM_READ_ADDRESS 0xA1 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/CU824.h b/include/configs/CU824.h index 4a3f2bc..8e19aeb3 100644 --- a/include/configs/CU824.h +++ b/include/configs/CU824.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8240 1 #define CONFIG_CU824 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -114,7 +115,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -290,14 +291,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 21230e1..fc2727e 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -36,6 +36,8 @@ #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ #define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ @@ -190,13 +192,4 @@ #define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index 910933a..26bb649 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -120,6 +120,8 @@ if we use PCI it has its own MAC addr */ #define CONFIG_DB64360 1 /* this is an DB64360 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */ /*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the DRAM for ECC in the phase we are relocating to it, which isn't so sufficient. @@ -593,14 +595,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index 765eaaf..74312cd 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -58,6 +58,8 @@ #define CONFIG_DB64460 1 /* this is an DB64460 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */ /*ronen - we don't use the global CONFIG_ECC, since in the global ecc we initialize the DRAM for ECC in the phase we are relocating to it, which isn't so sufficient. @@ -531,14 +533,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0" #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 5311dfb..cb110e3 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DP405 1 /* ...on a DP405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -157,8 +159,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -257,14 +259,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 6ba9f13..d99b840 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -36,6 +36,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DU405 1 /* ...on a DU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -289,13 +291,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 9c34994..e6e2b30 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -37,6 +37,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333400 /* external freq to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_LAST_STAGE_INIT 1 /* last_stage_init */ @@ -51,7 +55,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND0_ADDR 0xd0000000 /* NAND Flash */ #define CONFIG_SYS_NAND1_ADDR 0xd0100000 /* NAND Flash */ #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ @@ -417,14 +421,6 @@ int du440_phy_addr(int devnum); #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \ CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS} -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index 880cb4e..af57fb9 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -173,10 +173,10 @@ /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ -#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index 84d27b6..7e940b8 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -35,6 +35,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* these hardware addresses are pretty bogus, please change them to suit your needs */ @@ -347,14 +349,6 @@ #endif #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/ELPT860.h b/include/configs/ELPT860.h index 0f56302..f38160a 100644 --- a/include/configs/ELPT860.h +++ b/include/configs/ELPT860.h @@ -47,6 +47,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_ELPT860 1 /* ...on a LEOX's ELPT860 CPU board */ +#define CONFIG_SYS_TEXT_BASE 0x02000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -386,17 +388,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/*----------------------------------------------------------------------- - * Internal Definitions - *----------------------------------------------------------------------- - * - */ - -/* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h index e1c6096..ec1cc4eb 100644 --- a/include/configs/EP88x.h +++ b/include/configs/EP88x.h @@ -30,6 +30,8 @@ #define CONFIG_EP88X /* Embedded Planet EP88x board */ +#define CONFIG_SYS_TEXT_BASE 0xFC000000 + #define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -125,7 +127,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */ @@ -205,12 +207,4 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h index da3b4ae..42465da 100644 --- a/include/configs/ERIC.h +++ b/include/configs/ERIC.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ERIC 1 /* ...on a ERIC board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* run board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ @@ -361,14 +363,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/ESTEEM192E.h b/include/configs/ESTEEM192E.h index 11a862e..d5a3cd3 100644 --- a/include/configs/ESTEEM192E.h +++ b/include/configs/ESTEEM192E.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_ESTEEM192E 1 /* ...on a EST ESTEEM192E */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_FLASH_16BIT 1 /* Rom 16 bit data bus */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -310,22 +312,4 @@ #define CONFIG_SYS_MAMR_8COL 0x18803112 #define CONFIG_SYS_MAMR_9COL 0x18803112 /* same as 8 column because its just easier to port with*/ - -/* - * Internal Definitions - * - * Boot Flags - */ - -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ETX094.h b/include/configs/ETX094.h index c36f2bb1..e890a97 100644 --- a/include/configs/ETX094.h +++ b/include/configs/ETX094.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_ETX094 1 /* ...on a ETX_094 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -355,13 +357,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index 0903536..d312811 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -42,6 +42,8 @@ #define CONFIG_EVB64260 1 /* this is an EVB64260 board */ #define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */ #undef CONFIG_ECC /* enable ECC support */ @@ -419,14 +421,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 4d08243..1489d30 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -165,7 +165,7 @@ #define CONFIG_SYS_FLASH1_SIZE 0x02000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE #define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ @@ -205,14 +205,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/FADS823.h b/include/configs/FADS823.h index cb75960..9795834 100644 --- a/include/configs/FADS823.h +++ b/include/configs/FADS823.h @@ -38,6 +38,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */ #define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */ @@ -341,13 +343,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ /* values according to the manual */ diff --git a/include/configs/FADS850SAR.h b/include/configs/FADS850SAR.h index 84187fb..9e2b1a4 100644 --- a/include/configs/FADS850SAR.h +++ b/include/configs/FADS850SAR.h @@ -34,6 +34,8 @@ #define CONFIG_MPC850SAR 1 #define CONFIG_FADS 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -295,14 +297,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ diff --git a/include/configs/FADS860T.h b/include/configs/FADS860T.h index dcb0c39..ed7484b 100644 --- a/include/configs/FADS860T.h +++ b/include/configs/FADS860T.h @@ -20,6 +20,8 @@ /* processor type */ #define CONFIG_MPC860T 1 /* 860T */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/FLAGADM.h b/include/configs/FLAGADM.h index 0f4277c..12144cd 100644 --- a/include/configs/FLAGADM.h +++ b/include/configs/FLAGADM.h @@ -37,6 +37,8 @@ #define CONFIG_FLAGADM 1 /* ...on a FLAGA DM */ #define CONFIG_8xx_GCLK_FREQ 48000000 /*48MHz*/ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */ #define CONFIG_8xx_CONS_SMC2 1 #undef CONFIG_8xx_CONS_NONE @@ -312,12 +314,4 @@ #define CONFIG_SYS_OR4 ( OR_AM_MSK | OR_CSNT_SAM | OR_BI | OR_G5LS) #define CONFIG_SYS_BR4 ( (DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_UPMB | BR_V ) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h index addca2f..1a3d2f8 100644 --- a/include/configs/FPS850L.h +++ b/include/configs/FPS850L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_FPS850L 1 /* ...on a FingerPrint Sensor */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -428,15 +430,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h index ec9000d..20e618f 100644 --- a/include/configs/FPS860L.h +++ b/include/configs/FPS860L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_FPS860L 1 /* ...on a FingerPrint Sensor */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -428,15 +430,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET /* pass open firmware flat tree */ diff --git a/include/configs/G2000.h b/include/configs/G2000.h index e2e6cb2..00f27cc 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_G2000 1 /* ...on a PLU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -381,14 +383,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index 12f879a..915aff3 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -35,6 +35,8 @@ #define CONFIG_MPC860 #define CONFIG_GEN860T +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* * Identify the board */ @@ -725,12 +727,6 @@ ) /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * FEC interrupt assignment */ #define FEC_INTERRUPT SIU_LEVEL1 diff --git a/include/configs/GENIETV.h b/include/configs/GENIETV.h index fadd830..dc925af 100644 --- a/include/configs/GENIETV.h +++ b/include/configs/GENIETV.h @@ -38,6 +38,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x00000000 + #define CONFIG_ETHADDR 08:00:22:50:70:63 /* Ethernet address */ #define CONFIG_ENV_OVERWRITE 1 /* Overwrite the environment */ @@ -331,14 +333,6 @@ MAMR_G0CLA_A11 | MAMR_RLFA_1X | MAMR_WLFA_1X \ | MAMR_TLFA_4X) /* 0x5d802114 */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 0db9298..8a31324 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -43,6 +43,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HH405 1 /* ...on a HH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -311,7 +313,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF80000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc() */ @@ -481,14 +483,6 @@ #define CONFIG_SYS_LCD1_RST (0x80000000 >> 31) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h index 251fe67..6cb19c5 100644 --- a/include/configs/HIDDEN_DRAGON.h +++ b/include/configs/HIDDEN_DRAGON.h @@ -42,6 +42,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_HIDDEN_DRAGON 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -131,7 +133,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -376,14 +378,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 5dea96e..863204e 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_HUB405 1 /* ...on a HUB405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -354,14 +356,6 @@ #define CONFIG_SYS_UART5_RS232 (0x80000000 >> 8) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/IAD210.h b/include/configs/IAD210.h index ea1e706..5633177 100644 --- a/include/configs/IAD210.h +++ b/include/configs/IAD210.h @@ -44,6 +44,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MPC862 1 +#define CONFIG_SYS_TEXT_BASE 0x08000000 + #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_8xx_CONS_SMC1 @@ -370,15 +372,6 @@ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_8X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_MPC860T /* Interrupt level assignments. diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h index 917135e..3fa6130 100644 --- a/include/configs/ICU862.h +++ b/include/configs/ICU862.h @@ -39,6 +39,8 @@ #define CONFIG_ICU862 1 #define CONFIG_MPC862 1 +#define CONFIG_SYS_TEXT_BASE 0x40F00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -210,7 +212,7 @@ #else #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* @@ -448,13 +450,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13a01114 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #ifdef CONFIG_MPC860T diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 4e73941..1b90a6b 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -39,6 +39,8 @@ #define CPU_ID_STR "MPC8247" #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOOTCOUNT_LIMIT @@ -229,7 +231,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { 0xFF800000 } #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0xFFF00000 @@ -305,19 +307,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/IP860.h b/include/configs/IP860.h index ed6b7fd..df7ea9a 100644 --- a/include/configs/IP860.h +++ b/include/configs/IP860.h @@ -35,6 +35,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IP860 1 /* ...on a IP860 board */ + +#define CONFIG_SYS_TEXT_BASE 0x10000000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ @@ -455,18 +458,4 @@ typedef struct ip860_bcsr_s { #define BD_CTRL_FLWE 0x20 /* Flash Write Enable */ #define BD_CTRL_RWDN 0x10 /* VMEBus Requester Release When Done Enable */ -/*----------------------------------------------------------------------- - * - *----------------------------------------------------------------------- - * - */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 3cb6cf7..281d0bd 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -38,6 +38,8 @@ #define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */ #define CONFIG_IPHASE4539 1 /* ...on a Interphase 4539 PMC */ +#define CONFIG_SYS_TEXT_BASE 0xffb00000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /*----------------------------------------------------------------------- @@ -193,7 +195,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFF800000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -250,15 +252,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - -/*----------------------------------------------------------------------- * Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */ diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h index c0b1d86..e651658 100644 --- a/include/configs/ISPAN.h +++ b/include/configs/ISPAN.h @@ -33,6 +33,8 @@ #define CONFIG_ISPAN /* ...on one of Interphase iSPAN boards */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xFE7A0000 + /*----------------------------------------------------------------------- * Select serial console configuration * @@ -171,7 +173,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ @@ -235,14 +237,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/*----------------------------------------------------------------------- * Cache Configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */ diff --git a/include/configs/IVML24.h b/include/configs/IVML24.h index 1a4924e..6444bd1 100644 --- a/include/configs/IVML24.h +++ b/include/configs/IVML24.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IVML24 1 /* ...on a IVML24 board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #if defined (CONFIG_IVML24_16M) # define CONFIG_IDENT_STRING " IVML24" #elif defined (CONFIG_IVML24_32M) @@ -473,13 +475,4 @@ MBMR_AMB_TYPE_1 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A10 | \ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IVMS8.h b/include/configs/IVMS8.h index 256cabd..1ebbc45 100644 --- a/include/configs/IVMS8.h +++ b/include/configs/IVMS8.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_IVMS8 1 /* ...on a IVMS8 board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #if defined (CONFIG_IVMS8_16M) # define CONFIG_IDENT_STRING " IVMS8" #elif defined (CONFIG_IVMS8_32M) @@ -456,13 +458,4 @@ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 3961100..f54a393 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -33,10 +33,18 @@ #define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFF000000 boot low for 16 MiB boards + * 0xFF800000 boot low for 8 MiB boards + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -122,11 +130,11 @@ #endif -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ #if defined(CONFIG_LITE5200B) # error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B #else @@ -274,7 +282,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/JSE.h b/include/configs/JSE.h index b0b1175..2a1cc58 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -37,7 +37,7 @@ /* JSE has a PPC405GPr */ #define CONFIG_405GP 1 /* ... which is a 4xxx series */ -#define CONFIG_4xx 1 +#define CONFIG_4x 1 /* ... with a 33MHz OSC. connected to the SysCLK input */ #define CONFIG_SYS_CLK_FREQ 33333333 /* ... with on-chip memory here (4KBytes) */ @@ -46,6 +46,8 @@ /* Do not set up locked dcache as init ram. */ #undef CONFIG_SYS_INIT_DCACHE_CS +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */ #define CONFIG_SYSTEMACE 1 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 @@ -293,15 +295,6 @@ /* Configuration Port location */ #define CONFIG_PORT_ADDR 0xF0000500 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 94cc317..46b9175 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -43,6 +43,9 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ @@ -286,14 +289,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ #define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index c6978c3..9702d63 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -38,6 +38,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_KUP4K 1 /* ...on a KUP4K module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -495,15 +497,6 @@ #define LATCH_ADDR 0x90000200 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #define CONFIG_AUTOBOOT_STOP_STR "." #define CONFIG_SILENT_CONSOLE 1 diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h index ab535e1..9613ed9 100644 --- a/include/configs/KUP4X.h +++ b/include/configs/KUP4X.h @@ -38,6 +38,8 @@ #define CONFIG_MPC859T 1 /* This is a MPC859T CPU */ #define CONFIG_KUP4X 1 /* ...on a KUP4X module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -446,15 +448,6 @@ #define LATCH_ADDR 0x90000200 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */ diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 6e8a4b8..7c58f68 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -40,6 +40,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_LANTEC 2 /* ...on a Lantec rev.2 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* * Port assignments (CONFIG_LANTEC == 1): * - SMC1: J11 (MDB) ? @@ -340,14 +342,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 6c6b5d6..887bd63 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -232,7 +232,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 6e0aa14..46f60bf 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -172,10 +172,10 @@ /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ -#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) +#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #else -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index a80d330..1ff80ee 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -245,7 +245,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 5b4bba8..1cdc373 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -305,7 +305,7 @@ #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #ifdef CONFIG_CF_SBF -# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400) +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #endif diff --git a/include/configs/MBX.h b/include/configs/MBX.h index 5f7c7a8..3b4d60c 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -46,6 +46,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_MBX 1 /* ...on an MBX module */ +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -310,12 +312,4 @@ */ #define CONFIG_SYS_DER 0 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MBX860T.h b/include/configs/MBX860T.h index afe2383..6964bec 100644 --- a/include/configs/MBX860T.h +++ b/include/configs/MBX860T.h @@ -28,6 +28,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MBX 1 +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_CPUCLOCK 40 #define CONFIG_8xx_BUSCLOCK (CONFIG_8xx_CPUCLOCK) #define TARGET_SYSTEM_FREQUENCY 40 @@ -282,14 +284,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_MAMR 0x13821000 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 2e63306..d79b702 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -109,6 +109,9 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ @@ -351,14 +354,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ #define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ diff --git a/include/configs/MHPC.h b/include/configs/MHPC.h index 19a288c..6ad0658 100644 --- a/include/configs/MHPC.h +++ b/include/configs/MHPC.h @@ -43,6 +43,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* do special hardware init. */ #define CONFIG_MISC_INIT_R 1 +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED #undef CONFIG_8xx_CONS_SMC1 #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ @@ -386,12 +388,4 @@ */ #define CONFIG_SYS_DER 0 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index bfff750..58764d0 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -35,6 +35,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_MIP405 1 /* ...on a MIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Note that it may also be a MIP405T board which is a subset of the * MIP405 @@ -315,15 +318,6 @@ #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ diff --git a/include/configs/ML2.h b/include/configs/ML2.h index 2fc0119..8579f96 100644 --- a/include/configs/ML2.h +++ b/include/configs/ML2.h @@ -30,6 +30,7 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_ML2 1 /* ...on a ML2 board */ +#define CONFIG_SYS_TEXT_BASE 0x18000000 #define CONFIG_ENV_IS_IN_FLASH 1 @@ -221,14 +222,6 @@ */ #define SPD_EEPROM_ADDRESS 0x50 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h index 986590a..69c0cab 100644 --- a/include/configs/MOUSSE.h +++ b/include/configs/MOUSSE.h @@ -48,7 +48,11 @@ #define CONFIG_MPC824X 1 #define CONFIG_MPC8240 1 #define CONFIG_MOUSSE 1 + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_ADDR_MAP_B 1 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 #if 1 @@ -312,15 +316,6 @@ */ #define CONFIG_SYS_CACHELINE_SIZE 16 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Localizations */ #if 0 #define CONFIG_ETHADDR 0:0:0:0:1:d diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index ffd37fd..05caf21 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -48,12 +48,16 @@ #define CONFIG_MPC8260ADS 1 /* Motorola PQ2 ADS family board */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* * Figure out if we are booting low via flash HRCW or high via the BCSR. */ -#if (TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */ +#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) /* Boot low (flash HRCW) */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -373,10 +377,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT #endif @@ -537,11 +539,11 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=400000\0" \ "console=ttyCPM0\0" \ "setbootargs=setenv bootargs " \ diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 55d77f8..97202df 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -33,7 +33,7 @@ /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !! !! !! This configuration requires JP3 to be in position 1-2 to work !! - !! To make it work for the default, the TEXT_BASE define in !! + !! To make it work for the default, the CONFIG_SYS_TEXT_BASE define in !! !! board/mpc8266ads/config.mk must be changed from 0xfe000000 to !! !! 0xfff00000 !! !! The CONFIG_SYS_HRCW_MASTER define below must also be changed to match !! @@ -53,6 +53,8 @@ #define CONFIG_MPC8266ADS 1 /* ...on motorola ADS board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ @@ -419,10 +421,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 1314271..2eab1c4 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_MISC_INIT_R /* @@ -200,7 +202,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -496,14 +498,6 @@ #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 3fdd1b0..1b2bebb 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -35,6 +35,10 @@ #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFE000000 +#endif + #define CONFIG_PCI #define CONFIG_FSL_ELBC 1 @@ -196,7 +200,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT @@ -577,14 +581,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE @@ -609,11 +605,11 @@ "ethprime=TSEC1\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "console=ttyS0\0" \ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index abc29c0..17ce3bc 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -25,9 +25,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0x00100000 +#define CONFIG_SYS_TEXT_BASE 0x00100000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFE000000 #endif /* @@ -177,7 +181,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -604,14 +608,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 0719fcea..abbb92a 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -17,6 +17,8 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_PCI 1 /* @@ -146,7 +148,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -507,14 +509,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if (CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -551,11 +545,11 @@ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "ramdiskaddr=1000000\0" \ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index bed62bd..6009d44 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -28,8 +28,8 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ -#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ -#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 /* * System Clock Setup @@ -135,7 +135,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -526,14 +526,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 55e9de0..5682787 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -38,8 +38,10 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ @@ -51,7 +53,7 @@ #endif /* CONFIG_PCISLAVE */ #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_SYS_CLK_FREQ 66000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 #else @@ -172,7 +174,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -667,14 +669,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 117f745..5d10a5e 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -56,7 +56,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#if (TEXT_BASE == 0xFE000000) +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) #define CONFIG_SYS_LOWBOOT #endif @@ -67,6 +67,10 @@ #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFEF00000 +#endif + #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ #define CONFIG_MISC_INIT_F @@ -292,7 +296,7 @@ boards, we say we have two, but don't display a message if we find only one. */ /* * U-Boot memory configuration */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -394,8 +398,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #endif -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66666666 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33333333 /* in Hz */ @@ -660,14 +664,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -716,11 +712,11 @@ boards, we say we have two, but don't display a message if we find only one. */ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index d7381aa..bc644ba 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -30,6 +30,9 @@ #define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ #undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ @@ -161,7 +164,7 @@ * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -567,14 +570,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index fc53ecc..e9a6400 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -26,18 +26,20 @@ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFF800000 + /* * System Clock Setup */ #ifdef CONFIG_CLKIN_33MHZ #define CONFIG_83XX_CLKIN 33333333 #define CONFIG_SYS_CLK_FREQ 33333333 -#define PCI_33M 1 +#define CONFIG_PCI_33M 1 #define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_10X1 #else #define CONFIG_83XX_CLKIN 66000000 #define CONFIG_SYS_CLK_FREQ 66000000 -#define PCI_66M 1 +#define CONFIG_PCI_66M 1 #define HRCWL_CSB_TO_CLKIN_MPC8360ERDK HRCWL_CSB_TO_CLKIN_5X1 #endif /* CONFIG_CLKIN_33MHZ */ @@ -153,7 +155,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xFF800000 /* FLASH base address */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -484,14 +486,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif /* CONFIG_PCI */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 8546ebc..fa0da48 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -29,6 +29,8 @@ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + /* * System Clock Setup */ @@ -196,7 +198,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -618,14 +620,6 @@ extern int board_pci_host_broken(void); #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 20c2304..9d99a93 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -30,6 +30,8 @@ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XERDB 1 +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_PCI 1 #define CONFIG_BOARD_EARLY_INIT_F @@ -220,7 +222,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -627,14 +629,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -667,11 +661,11 @@ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "ramdiskaddr=1000000\0" \ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 0a9f47b..8b8f467 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -29,24 +29,28 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT 1 #endif -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif -#ifdef CONFIG_MK_SDCARD +#ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 #endif -#ifdef CONFIG_MK_SPIFLASH +#ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif /* High Level Configuration Options */ @@ -229,7 +233,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) @@ -707,14 +711,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -759,11 +755,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8536ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index c133895..b1ee07b 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -41,6 +41,12 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_MPC8540ADS 1 /* MPC8540ADS board specific */ +/* + * default CCARBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #ifndef CONFIG_HAS_FEC #define CONFIG_HAS_FEC 1 /* 8540 has FEC */ #endif @@ -137,7 +143,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -420,14 +426,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 75227a6..cc52a67 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -36,6 +36,8 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_MPC8540EVAL 1 /* MPC8540EVAL board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #undef CONFIG_PCI /* pci ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -107,7 +109,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)*/ #define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -330,14 +332,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index c3167e9..037aae7 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8541 1 /* MPC8541 specific */ #define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -145,7 +147,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -436,14 +438,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 1804582..0b69885 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -34,6 +34,10 @@ #define CONFIG_MPC8544 1 #define CONFIG_MPC8544DS 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -154,7 +158,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -451,14 +455,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -498,11 +494,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8544ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e1e4acf..5d21d11 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -36,6 +36,10 @@ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ @@ -157,7 +161,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -491,14 +495,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -542,11 +538,11 @@ extern unsigned long get_clock_freq(void); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=ramdisk.uboot\0" \ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index b0dd175..0068684 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -143,7 +145,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -434,14 +436,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 31740fd..96f7383 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -42,6 +42,12 @@ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ #define CONFIG_MPC8560 1 +/* + * default CCARBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -134,7 +140,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -461,14 +467,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index a98ecde..d6171b4 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8568 1 /* MPC8568 specific */ #define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller */ #define CONFIG_PCIE1 1 /* PCIE controller */ @@ -154,7 +156,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -451,14 +453,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 95c0a9f..e3a997e 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -51,7 +51,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ -#ifdef CONFIG_MK_ATM +#ifdef CONFIG_ATM #define CONFIG_PQ_MDS_PIB #define CONFIG_PQ_MDS_PIB_ATM #endif @@ -62,10 +62,14 @@ extern unsigned long get_clock_freq(void); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 #endif /* @@ -190,7 +194,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) #define CONFIG_SYS_RAMBOOT @@ -585,14 +589,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 34ebbdb..e8206ea 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -29,7 +29,7 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif @@ -41,6 +41,10 @@ #define CONFIG_MPC8572DS 1 #define CONFIG_MP 1 /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -189,7 +193,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -601,14 +605,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -654,11 +650,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8572ds/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 645d947..c876e98 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -19,6 +19,8 @@ #define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ /* video */ @@ -53,6 +55,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported & enabled */ #define CONFIG_ALTIVEC 1 @@ -184,7 +187,7 @@ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -423,7 +426,7 @@ /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -519,14 +522,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -605,11 +600,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=8610hpcd/ramdisk.uboot\0" \ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3b80d14..9009e3c 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -41,6 +41,12 @@ /*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */ #define CONFIG_ADDR_MAP 1 /* Use addr map */ +/* + * default CCSRBAR is at 0xff700000 + * assume U-Boot is less than 0.5MB + */ +#define CONFIG_SYS_TEXT_BASE 0xeff00000 + #ifdef RUN_DIAG #define CONFIG_SYS_DIAG_ADDR CONFIG_SYS_FLASH_BASE #endif @@ -68,6 +74,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */ @@ -238,7 +245,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -586,7 +593,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -674,14 +681,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -727,11 +726,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=your.ramdisk.u-boot\0" \ diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h index 85c6890..beada7e 100644 --- a/include/configs/MPC86xADS.h +++ b/include/configs/MPC86xADS.h @@ -28,6 +28,8 @@ #undef CONFIG_MPC859DSL #undef CONFIG_MPC852T +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/MPC885ADS.h b/include/configs/MPC885ADS.h index 8ffc1b2..eeb2355 100644 --- a/include/configs/MPC885ADS.h +++ b/include/configs/MPC885ADS.h @@ -15,6 +15,8 @@ #define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h index ec9e1ec..e0bfd08 100644 --- a/include/configs/MUSENKI.h +++ b/include/configs/MUSENKI.h @@ -45,6 +45,7 @@ #define CONFIG_MPC8245 1 #define CONFIG_MUSENKI 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 @@ -118,7 +119,7 @@ #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -153,7 +154,7 @@ * Definitions for initial stack pointer and data area */ -/* #define CONFIG_SYS_MONITOR_BASE TEXT_BASE */ +/* #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE */ /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 @@ -293,12 +294,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 8f6b16b..acc7187 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -32,10 +32,11 @@ #define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_MISC_INIT_R 1 @@ -211,7 +212,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_LOWBOOT -#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* @@ -240,7 +241,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 25d8077..04d97cd 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -37,6 +37,8 @@ #define CONFIG_MPC834x 1 #define CONFIG_MPC8343 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_IMMR 0xE0000000 #define CONFIG_PCI @@ -116,7 +118,7 @@ /* * U-Boot memory configuration */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_INIT_RAM_LOCK @@ -186,7 +188,7 @@ #define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 3 -#define PCI_66M +#define CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66666667 #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW @@ -379,15 +381,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 669816c..dd392d0 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -43,6 +43,8 @@ #define MVBLUE_BOARD_BOX 1 #define MVBLUE_BOARD_LYNX 2 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define ERR_LED(code) do { if (code) \ *(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \ @@ -172,7 +174,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_EUMB_ADDR 0xFC000000 @@ -340,13 +342,4 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h index 10210f0..9bf7fcb 100644 --- a/include/configs/MVS1.h +++ b/include/configs/MVS1.h @@ -406,13 +406,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A7 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h index 000c4c6..c125157 100644 --- a/include/configs/MVSMR.h +++ b/include/configs/MVSMR.h @@ -32,10 +32,11 @@ #define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF800000 +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_MISC_INIT_R 1 @@ -177,7 +178,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_LOWBOOT -#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* @@ -210,7 +211,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 6343cfe..df1c1ca 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -36,6 +36,8 @@ #define CONFIG_MPC852T 1 #define CONFIG_NC650 1 +#define CONFIG_SYS_TEXT_BASE 0x40700000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -213,7 +215,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* @@ -424,14 +426,6 @@ #define CONFIG_SYS_MBMR_NAND ( MBMR_WLFB_5X ) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ #define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */ diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 76ca916..62eef46 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -41,6 +41,8 @@ #define CONFIG_MPC870 1 /* This is a MPC885 CPU */ #define CONFIG_NETPHONE 1 /* ...on a NetPhone board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -478,14 +480,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 4f9f9fe..db22ba3 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -37,6 +37,8 @@ #define CONFIG_MPC885 1 /* This is a MPC885 CPU */ #define CONFIG_NETTA 1 /* ...on a NetTA board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -487,14 +489,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /*********************************************************************************************************** diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index d060cb7..87000e6 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -41,6 +41,8 @@ #define CONFIG_MPC870 1 /* This is a MPC885 CPU */ #define CONFIG_NETTA2 1 /* ...on a NetTA2 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -479,14 +481,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index a18b480..b7119fd 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -37,6 +37,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_NETVIA 1 /* ...on a NetVia board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 @@ -346,14 +348,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Ethernet at SCC2 */ #define CONFIG_SCC2_ENET diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h index 6a4c47d..4f76ca1 100644 --- a/include/configs/NSCU.h +++ b/include/configs/NSCU.h @@ -37,6 +37,8 @@ #define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */ #define CONFIG_NSCU 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,15 +476,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #undef CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/NX823.h b/include/configs/NX823.h index 5054d5e..e588ea3 100644 --- a/include/configs/NX823.h +++ b/include/configs/NX823.h @@ -39,6 +39,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_NX823 1 /* ...on a NEXUS 823 module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /*#define CONFIG_VIDEO 1 */ #define CONFIG_8xx_GCLK_FREQ MPC8XX_SPEED @@ -356,15 +358,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_ENV_OVERWRITE /* allow changes to ethaddr (for now) */ #define CONFIG_ETHADDR 00:10:20:30:40:50 #define CONFIG_IPADDR 10.77.77.20 diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index ad2e4da..0343043 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_OCRTC 1 /* ...on a OCRTC board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ @@ -300,13 +302,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 3d35362..cef1117 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -298,13 +298,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/OXC.h b/include/configs/OXC.h index 74c51f4..9a0c558 100644 --- a/include/configs/OXC.h +++ b/include/configs/OXC.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_OXC 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_IDENT_STRING " [oxc] " @@ -136,7 +138,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN 0x00030000 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_PRELIMBASE) @@ -314,13 +316,4 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index da826fc..1a4632f 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -22,6 +22,10 @@ #define CONFIG_P1022DS #define CONFIG_MP /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ @@ -125,7 +129,7 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 2 #define CONFIG_SYS_MAX_FLASH_SECT 1024 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -397,14 +401,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -432,11 +428,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=uramdisk\0" \ diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index fa45b5b..cff0ed34 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -30,33 +30,37 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_P1011RDB +#ifdef CONFIG_P1011RDB #define CONFIG_P1011 #endif -#ifdef CONFIG_MK_P1020RDB +#ifdef CONFIG_P1020RDB #define CONFIG_P1020 #endif -#ifdef CONFIG_MK_P2010RDB +#ifdef CONFIG_P2010RDB #define CONFIG_P2010 #endif -#ifdef CONFIG_MK_P2020RDB +#ifdef CONFIG_P2020RDB #define CONFIG_P2020 #endif -#ifdef CONFIG_MK_NAND +#ifdef CONFIG_NAND #define CONFIG_NAND_U_BOOT 1 #define CONFIG_RAMBOOT_NAND 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif -#ifdef CONFIG_MK_SDCARD +#ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 #endif -#ifdef CONFIG_MK_SPIFLASH +#ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif /* High Level Configuration Options */ @@ -188,7 +192,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) @@ -538,14 +542,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20)/* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -579,11 +575,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "loadaddr=1000000\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 74cff0c..e7cdb92 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -29,7 +29,7 @@ #include "../board/freescale/common/ics307_clk.h" -#ifdef CONFIG_MK_36BIT +#ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif @@ -41,6 +41,10 @@ #define CONFIG_P2020DS 1 #define CONFIG_MP 1 /* support multiple processors */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -92,7 +96,7 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#ifdef CONFIG_MK_DDR2 +#ifdef CONFIG_DDR2 #define CONFIG_FSL_DDR2 #else #define CONFIG_FSL_DDR3 1 @@ -224,7 +228,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -605,14 +609,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -659,11 +655,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=p2020ds/ramdisk.uboot\0" \ diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index 890170d..47b7558 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -42,6 +42,8 @@ #define CONFIG_P3G4 1 /* this is a P3G4 board */ #define CONFIG_SYS_GT_6426x GT_64260 /* with a 64260 system controller */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BAUDRATE 115200 /* console baudrate = 115200 */ #undef CONFIG_ECC /* enable ECC support */ @@ -198,7 +200,7 @@ #define CONFIG_SYS_FLASH_BASE 0xff000000 #define CONFIG_SYS_RESET_ADDRESS 0xfff00100 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ /* areas to map different things with the GT in physical space */ @@ -421,14 +423,6 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOARD_ASM_INIT 1 diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 87703c9..5e7b81f 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -36,4 +36,8 @@ #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#endif + #include "corenet_ds.h" diff --git a/include/configs/PATI.h b/include/configs/PATI.h index 88e9528..b07cac1 100644 --- a/include/configs/PATI.h +++ b/include/configs/PATI.h @@ -33,6 +33,9 @@ #define CONFIG_MPC555 1 /* This is an MPC555 CPU */ #define CONFIG_PATI 1 /* ...On a PATI board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Serial Console Configuration */ #define CONFIG_5xx_CONS_SCI1 #undef CONFIG_5xx_CONS_SCI2 @@ -144,7 +147,7 @@ #define PLD_CONFIG_BASE 0x04001000 /* PLD (CS3) */ #define CONFIG_SYS_MONITOR_BASE 0xFFF00000 -/* CONFIG_SYS_FLASH_BASE */ /* TEXT_BASE is defined in the board config.mk file. */ +/* CONFIG_SYS_FLASH_BASE */ /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */ /* This adress is given to the linker with -Ttext to */ /* locate the text section at this adress. */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 192 kB for Monitor */ @@ -283,16 +286,6 @@ */ #define CONFIG_SYS_DER 0x00000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define VERSION_TAG "released" #define CONFIG_ISO_STRING "MEV-10084-001" diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 244d6fe..28769b3 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -39,6 +39,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PCI405 1 /* ...on a PCI405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFD0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */ @@ -311,12 +313,4 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h index c60a9f7..3e7e74b 100644 --- a/include/configs/PCI5441.h +++ b/include/configs/PCI5441.h @@ -63,7 +63,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index c30ac78..d0ce924 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -43,6 +43,8 @@ #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 @@ -117,7 +119,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -238,14 +240,6 @@ L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- RTC m48t59 */ diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index bc67480..8f7ec02 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -43,6 +43,8 @@ #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 @@ -119,7 +121,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -240,14 +242,6 @@ L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- RTC m48t59 */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2901cfd..e3cf943 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -35,6 +35,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PIP405 1 /* ...on a PIP405 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /*********************************************************** * Clock ***********************************************************/ @@ -260,15 +263,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*********************************************************************** * External peripheral base address ***********************************************************************/ diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index 874c20b..8e8c049 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -65,7 +65,7 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 928ed8e..3844e48 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PLU405 1 /* ...on a PLU405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -268,8 +270,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* @@ -396,14 +398,6 @@ #define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in MHz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/PM520.h b/include/configs/PM520.h index 22de207..5832307 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -33,13 +33,12 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_PM520 1 /* ... on PM520 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -241,7 +240,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/PM826.h b/include/configs/PM826.h index 636bd26..d26254f 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -39,6 +39,10 @@ #define CONFIG_PM826 1 /* ...on a PM8260 module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* Standard: boot 64-bit flash */ +#endif + #undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -304,7 +308,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -318,15 +322,6 @@ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 9d620af..3053ad4 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -39,6 +39,10 @@ #define CONFIG_PM828 1 /* ...on a PM828 module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x40000000 /* Standard: boot 64-bit flash */ +#endif + #undef CONFIG_DB_CR826_J30x_ON /* J30x jumpers on D.B. carrier */ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -298,7 +302,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -312,15 +316,6 @@ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index cf8a8cf..5963334 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -41,6 +41,8 @@ #define CONFIG_MPC8540 1 /* MPC8540 specific */ #define CONFIG_PM854 1 /* PM854 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -137,7 +139,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -365,14 +367,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 0bd28fc..1559fd6 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -42,6 +42,8 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ #define CONFIG_PM856 1 /* PM856 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -139,7 +141,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -365,14 +367,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index c420efe..b1d0ea5 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -32,6 +32,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405 1 /* ...on a PMC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -195,8 +197,8 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* 128 kB for malloc() */ #define CONFIG_PRAM 0 /* use pram variable to overwrite */ @@ -334,14 +336,6 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 5b1048e..74b656c 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -28,6 +28,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PMC405DE 1 /* ...on a PMC405DE board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ #define CONFIG_BOARD_TYPES 1 /* support board types */ @@ -205,8 +207,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xfe000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index bf2247d..7585e6e 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -39,6 +39,10 @@ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF90000 +#endif + #define CONFIG_SYS_CLK_FREQ 33333400 #if 0 /* temporary disabled because OS/9 does not like dcache on startup */ @@ -53,7 +57,7 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */ #define CONFIG_PRAM 0 /* use pram variable to overwrite */ @@ -61,7 +65,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */ #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE @@ -503,14 +507,6 @@ #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ #define CONFIG_SYS_NAND_QUIET_TEST 1 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/PN62.h b/include/configs/PN62.h index 562c5c3..01878ab 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_PN62 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 @@ -148,7 +150,7 @@ #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -301,14 +303,4 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index f9b2014..3bc3d70 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -75,6 +75,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */ + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -557,15 +559,6 @@ #define CONFIG_SYS_GPIO0_TSRH 0x00000000 #define CONFIG_SYS_GPIO0_TCR 0xF7FF8014 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #define CONFIG_NO_SERIAL_EEPROM /*--------------------------------------------------------------------*/ diff --git a/include/configs/QS823.h b/include/configs/QS823.h index c1416cb..ec2e0c9 100644 --- a/include/configs/QS823.h +++ b/include/configs/QS823.h @@ -53,6 +53,8 @@ #define CONFIG_QS823 1 /* ...on a QS823 module */ #define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Select the target clock speed */ #undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */ #undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */ @@ -563,14 +565,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_BR7_PRELIM 0xF0700000 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Sanity checks */ #if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET) diff --git a/include/configs/QS850.h b/include/configs/QS850.h index de74fee..3d455c4 100644 --- a/include/configs/QS850.h +++ b/include/configs/QS850.h @@ -53,6 +53,8 @@ #define CONFIG_QS850 1 /* ...on a QS850 module */ #define CONFIG_SCC2_ENET 1 /* SCC2 10BaseT ethernet */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Select the target clock speed */ #undef CONFIG_CLOCK_16MHZ /* cpu=16,777,216 Hz, mem=16Mhz */ #undef CONFIG_CLOCK_33MHZ /* cpu=33,554,432 Hz, mem=33Mhz */ @@ -563,14 +565,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) #define CONFIG_SYS_BR7_PRELIM 0xF0700000 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Sanity checks */ #if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET) diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h index 705d375..99ccf08 100644 --- a/include/configs/QS860T.h +++ b/include/configs/QS860T.h @@ -54,6 +54,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_QS860T 1 /* ...on a QS860T module */ +/* Start address of 512K Socketed Flash */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_FEC_ENET 1 /* FEC 10/100BaseT ethernet */ #define CONFIG_MII #define FEC_INTERRUPT SIU_LEVEL1 @@ -400,15 +403,6 @@ CONFIG_SPI /* #define CONFIG_SYS_OR7 0xFF000000 */ /* #define CONFIG_SYS_BR7 0xE8000000 */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Sanity checks */ diff --git a/include/configs/R360MPI.h b/include/configs/R360MPI.h index 830f4bc..a0355f1 100644 --- a/include/configs/R360MPI.h +++ b/include/configs/R360MPI.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_R360MPI 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_LCD #undef CONFIG_EDT32F10 #define CONFIG_SHARP_LQ057Q3DC02 @@ -475,13 +477,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 00ac6cf..5a23e56 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -39,6 +39,7 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_RBC823 1 /* ...on a RBC823 module */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 #if 0 #define DEBUG 1 @@ -406,15 +407,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * JFFS2 partitions * diff --git a/include/configs/RPXClassic.h b/include/configs/RPXClassic.h index bec5278..e8e8a5d 100644 --- a/include/configs/RPXClassic.h +++ b/include/configs/RPXClassic.h @@ -42,6 +42,8 @@ #define CONFIG_MPC860 1 #define CONFIG_RPXCLASSIC 1 +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -442,15 +444,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXlite.h b/include/configs/RPXlite.h index dd9134d..a7609ca 100644 --- a/include/configs/RPXlite.h +++ b/include/configs/RPXlite.h @@ -39,6 +39,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_RPXLITE 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -129,7 +131,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #ifdef CONFIG_BZIP2 #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */ @@ -335,15 +337,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index a59053c..b895f05 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -51,6 +51,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ #define CONFIG_RPXLITE 1 /* RPXlite DW version board */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ #define CONFIG_SPLASH_SCREEN /* ... with splashscreen support*/ #endif @@ -414,14 +416,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10) /* CONFIG_SYS_MAMR_9COL:0x20904000 @ 64MHz */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ /* Configuration variable added by yooth. */ /*%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */ diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h index da962f3..2ac764d 100644 --- a/include/configs/RPXsuper.h +++ b/include/configs/RPXsuper.h @@ -1,6 +1,7 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x80F00000 /***************************************************************************** * @@ -34,7 +35,7 @@ #undef CONFIG_SYS_SBC_BOOT_LOW /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -504,12 +505,4 @@ ORxG_SCY_5_CLK |\ ORxG_TRLX) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index 6ec5be0..9530381 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_RRVISION 1 /* ...on a RRvision board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_GCLK_FREQ 64000000 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -468,12 +470,4 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index e630afe..cdfce6a 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -33,6 +33,8 @@ #define CPU_ID_STR "MPC8250" #endif /* CONFIG_MPC8248 */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ #define CONFIG_RATTLER /* Analogue&Micro Rattler board */ @@ -220,7 +222,7 @@ */ #endif /* CONFIG_CMD_JFFS2 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -262,9 +264,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index d6b3cb8..b91dc4b 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -34,7 +34,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_PCI_66 #endif @@ -48,6 +48,8 @@ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 + #define CONFIG_CPM2 1 /* has CPM2 */ @@ -324,7 +326,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if 0 /* XXX This doesn't work and I don't want to fix it */ @@ -420,14 +422,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/SCM.h b/include/configs/SCM.h index c6fb074..edad459 100644 --- a/include/configs/SCM.h +++ b/include/configs/SCM.h @@ -38,6 +38,8 @@ #define CONFIG_SCM 1 /* ...on a System Controller Module */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #if (CONFIG_TQM8260 <= 100) # error "TQM8260 module revison not supported" #endif @@ -247,7 +249,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -338,19 +340,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 9c8c318..15d99f9 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -36,6 +36,10 @@ #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x00100000 +#endif + #define CONFIG_PCI #define CONFIG_FSL_ELBC 1 @@ -91,7 +95,7 @@ */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT @@ -477,14 +481,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_OVERWRITE @@ -511,11 +507,11 @@ "ethprime=TSEC1\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "fdtaddr=ae0000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \ "console=ttyS0\0" \ diff --git a/include/configs/SM850.h b/include/configs/SM850.h index 56f03e2..259f8ab 100644 --- a/include/configs/SM850.h +++ b/include/configs/SM850.h @@ -38,6 +38,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_SM850 1 /*...on a MPC850 Service Module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -363,15 +365,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index adb6ac5..ba3ada1 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -198,6 +198,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_MMC 1 /* we use this ethernet chip */ -#define CONFIG_ENC28J60 +#define CONFIG_ENC28J60_LPC2292 #endif /* __CONFIG_H */ diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h index fa77882..b132a78 100644 --- a/include/configs/SPD823TS.h +++ b/include/configs/SPD823TS.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_SPD823TS 1 /* ...on a SPD823TS board */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -417,12 +419,4 @@ MBMR_AMB_TYPE_0 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A11 | \ MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index 8ee8cbf..7c3f874 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -64,6 +64,8 @@ #define CONFIG_MPC860T 1 #define CONFIG_MPC855T 1 +#define CONFIG_SYS_TEXT_BASE 0xF8000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_SCC1 @@ -372,13 +374,6 @@ #define DUART_BR5_VALUE ((CONFIG_SYS_DUARTA_BASE & BR_BA_MSK ) | DUART_BR_VALUE) #define DUART_BR6_VALUE ((CONFIG_SYS_DUARTB_BASE & BR_BA_MSK ) | DUART_BR_VALUE) -/********************************************************** - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_RESET_ON_PANIC /* reset if system panic() */ #define CONFIG_ENV_IS_IN_FLASH diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h index 125b9a2..f6107ce 100644 --- a/include/configs/Sandpoint8240.h +++ b/include/configs/Sandpoint8240.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_SANDPOINT 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -159,7 +161,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -400,16 +402,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h index 8cb920e..66a98c1 100644 --- a/include/configs/Sandpoint8245.h +++ b/include/configs/Sandpoint8245.h @@ -39,6 +39,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_SANDPOINT 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if 0 #define USE_DINK32 1 #else @@ -129,7 +131,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -378,16 +380,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 7a6602c..ad86e2e 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -37,10 +37,18 @@ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #define CONFIG_TB5200 1 /* ... on a TB5200 base board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -132,7 +140,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -251,7 +259,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -329,7 +337,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TK885D.h b/include/configs/TK885D.h index 7cefa32..d849dbc 100644 --- a/include/configs/TK885D.h +++ b/include/configs/TK885D.h @@ -40,6 +40,8 @@ #define CONFIG_TQM885D 1 /* ...on a TQM88D module */ #define CONFIG_TK885D 1 /* ...in a TK885D base board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -484,14 +486,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Network configuration */ #define CONFIG_FEC_ENET /* enable ethernet on FEC */ diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index 50197f4..ab1773c 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -45,10 +45,15 @@ #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ #define CONFIG_TOP5200 1 /* ... on TOP5200 board - we need this for FEC.C */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * allowed and functional CONFIG_SYS_TEXT_BASE values: + * 0xff000000 low boot at 0x00000100 (default board setting) + * 0xfff00000 high boot at 0xfff00100 (board needs modification) + * 0x00100000 RAM load and test + */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -138,11 +143,11 @@ /* * MUST be low boot - HIGHBOOT is not supported anymore */ -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #else -# error "TEXT_BASE must be 0xff000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xff000000" #endif /* @@ -299,7 +304,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index b9e450d..a9d9bed 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -53,6 +53,9 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_MPC860T 1 /* even better... an FEC! */ #define CONFIG_TOP860 1 /* ...on a TOP860 module */ + +#define CONFIG_SYS_TEXT_BASE 0x80000000 + #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_IDENT_STRING " EMK TOP860" @@ -212,7 +215,7 @@ * adresses */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /*----------------------------------------------------------------------- @@ -246,14 +249,6 @@ */ #define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Debug Enable Register *----------------------------------------------------------------------- diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 107bff1..2612c7a 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -37,6 +37,17 @@ #define CONFIG_TQM5200 1 /* ... on TQM5200 module */ #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + /* On a Cameron or on a FO300 board or ... */ #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300) #define CONFIG_STK52XX 1 /* ... on a STK52XX board */ @@ -44,9 +55,6 @@ #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -214,7 +222,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE != 0xFFF00000) +#if (CONFIG_SYS_TEXT_BASE != 0xFFF00000) # define CONFIG_SYS_LOWBOOT 1 /* Boot low */ #endif @@ -489,7 +497,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index 372c76d..b68d7a7 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ #define CONFIG_LCD_LOGO 1 /* print our logo on the LCD */ #define CONFIG_LCD_INFO 1 /* ... and some board info */ @@ -481,15 +483,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index 64c9707..374300b 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_TQM823M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #ifdef CONFIG_LCD /* with LCD controller ? */ /* #define CONFIG_NEC_NL6448BC20 1 / * use NEC NL6448BC20 display */ #endif @@ -477,15 +479,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h index 582e670..2104e03 100644 --- a/include/configs/TQM8260.h +++ b/include/configs/TQM8260.h @@ -44,6 +44,8 @@ * (easy to change) */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */ #if 0 @@ -279,7 +281,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8260/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -375,19 +377,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 12a7eda..063ca23 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8272_FAMILY 1 #define CONFIG_TQM8272 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_GET_CPU_STR_F 1 /* Get the CPU ID STR */ #define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */ @@ -357,7 +359,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8272/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8272/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -498,18 +500,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index d0c6a4d..36399ca 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_TQM834X 1 /* TQM834X board specific */ +#define CONFIG_SYS_TEXT_BASE 0x80000000 + /* IMMR Base Addres Register, use Freescale default: 0xff400000 */ #define CONFIG_SYS_IMMR 0xff400000 @@ -139,7 +141,7 @@ /* * Monitor config */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT @@ -458,14 +460,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index bf6ecce..c97bf66 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_TQM850L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -466,15 +468,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 7442452..3e13f61 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC850 1 /* This is a MPC850 CPU */ #define CONFIG_TQM850M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -466,15 +468,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index 5bf8f02..1bc2861 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_TQM855L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -470,15 +472,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 456ed7e..197ffde 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -505,15 +507,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index ccb339d..59655b1 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -41,6 +41,12 @@ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ +#if defined(CONFIG_TQM8548_BE) +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#else +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 +#endif + #if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE) #define CONFIG_TQM8548 #endif @@ -75,7 +81,7 @@ * NAND flash support (disabled by default) * * Warning: NAND support will likely increase the U-Boot image size - * to more than 256 KB. Please adjust TEXT_BASE if necessary. + * to more than 256 KB. Please adjust CONFIG_SYS_TEXT_BASE if necessary. */ #ifdef CONFIG_TQM8548_BE #define CONFIG_NAND @@ -219,7 +225,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Note: when changing the Local Bus clock divider you have to @@ -243,7 +249,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1)/* Reserved for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1)/* Reserved for Monitor */ #define CONFIG_SYS_MALLOC_LEN (384 * 1024) /* Reserved for malloc */ /* Serial Port */ @@ -623,14 +629,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -659,7 +657,7 @@ MK_STR(CONFIG_HOSTNAME)".dtb\0" #define CONFIG_ENV_BOOTFILE "bootfile="MK_STR(CONFIG_HOSTNAME)"/uImage\0" #define CONFIG_ENV_UBOOT "uboot="MK_STR(CONFIG_HOSTNAME)"/u-boot.bin\0" \ - "uboot_addr="MK_STR(TEXT_BASE)"\0" + "uboot_addr="MK_STR(CONFIG_SYS_TEXT_BASE)"\0" #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_ENV_BOOTFILE \ diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index 94b9a3b..d3d0db4 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_TQM860L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -469,15 +471,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index ce5e691..0854d95 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860 CPU */ #define CONFIG_TQM860M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,14 +476,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index d77df9c..c247737 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -39,6 +39,8 @@ #define CONFIG_TQM862L 1 /* ...on a TQM8xxL module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -474,15 +476,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index a6c465b..1b6d9cb 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -39,6 +39,8 @@ #define CONFIG_TQM862M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -475,15 +477,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 9ec815c..a5018d5 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -36,6 +36,8 @@ #define CONFIG_MPC866 1 /* This is a MPC866 CPU */ #define CONFIG_TQM866M 1 /* ...on a TQM8xxM module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -496,14 +498,6 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A9 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index c715c07..507fb2f 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -39,6 +39,8 @@ #define CONFIG_MPC885 1 /* This is a MPC885 CPU */ #define CONFIG_TQM885D 1 /* ...on a TQM88D module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CONFIG_SYS_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ @@ -482,14 +484,6 @@ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Network configuration */ #define CONFIG_SCC2_ENET /* enable ethernet on SCC2 */ diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h index 7510ab1..c518d6e 100644 --- a/include/configs/Total5200.h +++ b/include/configs/Total5200.h @@ -44,10 +44,17 @@ #define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ #define CONFIG_TOTAL5200 1 /* ... on Total5200 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -132,7 +139,7 @@ #define CONFIG_CMD_USB -#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -245,7 +252,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index b9ea610..026d2a4 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOH405 1 /* ...on a VOH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -257,7 +259,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFF80000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (2 * 1024*1024) /* Reserve 2 MB for malloc() */ @@ -409,14 +411,6 @@ #define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index a88b41a..fddefb2 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -35,6 +35,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC8000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -183,8 +185,8 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) @@ -287,14 +289,6 @@ #define CONFIG_SYS_GPIO0_TCR 0xF7FE0014 /* 0 ... 31 */ /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h index 3614184..6243afe 100644 --- a/include/configs/VoVPN-GW.h +++ b/include/configs/VoVPN-GW.h @@ -29,6 +29,8 @@ /* define busmode: 8260 */ #undef CONFIG_BUSMODE_60x +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ #ifdef CONFIG_CLKIN_66MHz #define CONFIG_8260_CLKIN 66666666 /* in Hz */ @@ -308,15 +310,11 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE (32*1024*1024) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_FLASH (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_OFFSET) #define CONFIG_SYS_MONITOR_LEN 0x00020000 #define CONFIG_SYS_MALLOC_LEN 0x00020000 -/* boot flags */ -#define BOOTFLAG_COLD 0x01 /* normal power-on */ -#define BOOTFLAG_WARM 0x02 /* software reboot */ - /* cache configuration */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* for MPC8260 */ #if defined(CONFIG_CMD_KGDB) diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 0fbe80c..9eacd82 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -38,6 +38,8 @@ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMC 1 /* ...specifically an LMC */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */ #define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */ @@ -316,15 +318,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index f12fa55..6591d02 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -38,6 +38,8 @@ #define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */ #define CONFIG_W7OLMG 1 /* ...specifically an LMG */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */ #define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */ @@ -319,15 +321,6 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 34a5fff..e23ad41 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -38,6 +38,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WUH405 1 /* ...on a WUH405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -348,14 +350,6 @@ #define CONFIG_SYS_DUART_RST (0x80000000 >> 14) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h index 8b47862..5605849 100644 --- a/include/configs/XPEDITE1000.h +++ b/include/configs/XPEDITE1000.h @@ -39,6 +39,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * DDR config */ @@ -52,7 +54,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ @@ -247,12 +249,6 @@ extern void out32(unsigned int, unsigned long); #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -269,7 +265,7 @@ extern void out32(unsigned int, unsigned long); * ff000000 - ffbfffff OS Use/Filesystem (12MB) */ -#define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE) +#define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE) #define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000) #define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000) diff --git a/include/configs/XPEDITE5170.h b/include/configs/XPEDITE5170.h index 8770a8d..1851997 100644 --- a/include/configs/XPEDITE5170.h +++ b/include/configs/XPEDITE5170.h @@ -36,9 +36,12 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5170" #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_ALTIVEC 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -151,7 +154,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \ {0xf7f00000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ /* @@ -491,7 +494,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); BATL_PP_RW |\ BATL_CACHEINHIBIT |\ BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE |\ +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE |\ BATU_BL_1M |\ BATU_VS |\ BATU_VP) @@ -575,12 +578,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h index 1fbe4fb..d0e9492 100644 --- a/include/configs/XPEDITE5200.h +++ b/include/configs/XPEDITE5200.h @@ -38,6 +38,10 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5200" #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -130,7 +134,7 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xfbf40000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Chip select configuration @@ -370,12 +374,6 @@ #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h index 8225fff..629dc0d 100644 --- a/include/configs/XPEDITE5370.h +++ b/include/configs/XPEDITE5370.h @@ -38,6 +38,10 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5370" #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#endif + #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ @@ -151,7 +155,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ /* * Chip select configuration @@ -427,12 +431,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h index c439068..a0fca03 100644 --- a/include/configs/Yukon8220.h +++ b/include/configs/Yukon8220.h @@ -31,6 +31,9 @@ #define CONFIG_MPC8220 1 #define CONFIG_YUKON8220 1 /* ... on Yukon board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +41,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -263,7 +263,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/ZPC1900.h b/include/configs/ZPC1900.h index 8ae765c..0eabf37 100644 --- a/include/configs/ZPC1900.h +++ b/include/configs/ZPC1900.h @@ -29,6 +29,9 @@ #define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */ #define CONFIG_ZPC1900 1 /* ...on Zephyr ZPC.1900 board */ + +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CPU_ID_STR "MPC8265" #define CONFIG_CPM2 1 /* Has a CPM2 */ @@ -212,10 +215,8 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index fcc47a9..17ada0d 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -41,6 +41,8 @@ #define CONFIG_EVB64260 1 /* this is an EVB64260 board */ #define CONFIG_ZUMA_V2 1 /* always define this for ZUMA v2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* #define CONFIG_ZUMA_V2_OLD 1 */ /* backwards compat for old V2 board */ #define CONFIG_BAUDRATE 38400 /* console baudrate = 38400 */ @@ -387,12 +389,4 @@ */ #define CONFIG_GT_I2C -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h new file mode 100644 index 0000000..6dcebe6 --- /dev/null +++ b/include/configs/a4m072.h @@ -0,0 +1,384 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */ +#define CONFIG_A4M072 1 /* ... on A4M072 board */ +#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ + +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ + +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ +#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } +/* define to enable silent console */ +#define CONFIG_SILENT_CONSOLE +#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ + +/* + * PCI Mapping: + * 0x40000000 - 0x4fffffff - PCI Memory + * 0x50000000 - 0x50ffffff - PCI IO Space + */ +#define CONFIG_PCI + +#if defined(CONFIG_PCI) +#define CONFIG_PCI_PNP 1 +#define CONFIG_PCI_SCAN_SHOW 1 +#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x50000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x01000000 +#endif + +#define CONFIG_SYS_XLB_PIPELINING 1 + +#undef CONFIG_NET_MULTI +#undef CONFIG_EEPRO100 + +/* Partitions */ +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION + +/* USB */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_OHCI_BE_CONTROLLER +#undef CONFIG_SYS_USB_OHCI_BOARD_INIT +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_CMD_USB +#define CONFIG_CMD_MII +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_DISPLAY + +#if defined(CONFIG_PCI) +#define CONFIG_CMD_PCI +#endif + +#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ +#define CONFIG_SYS_LOWBOOT 1 +#define CONFIG_SYS_LOWBOOT32 1 +#endif + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ + +#define CONFIG_SYS_AUTOLOAD "n" + +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "asdfg" + +#undef CONFIG_BOOTARGS +#define CONFIG_PREBOOT "run try_update" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \ + "cf1=diskboot 200000 0:1\0" \ + "bootcmd_cf1=run bcf1\0" \ + "bcf=setenv bootargs root=/dev/hda3\0" \ + "bootcmd_nfs=run bnfs\0" \ + "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs\0" \ + "bootcmd_nor=cp.b ${kernel_addr} 200000 100000; run norargs addip; run bk\0" \ + "bnfs=nfs 200000 ${rootpath}/boot/uImage ; run nfsargs addip ; run bk\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \ + "try_update=usb start;sleep 2;usb start;sleep 1;fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;source 2F0000\0" \ + "env_addr=FE060000\0" \ + "kernel_addr=FE100000\0" \ + "rootfs_addr=FE200000\0" \ + "add_mtd=setenv bootargs ${bootargs} mtdparts=phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \ + "bcf1=run cf1; run bcf; run addip; run bk\0" \ + "add_consolespec=setenv bootargs ${bootargs} console=/dev/null quiet\0" \ + "addip=if test \"${ethaddr}\" != \"00:00:00:00:00:00\" ; then if test -n ${ipaddr}; then setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off panic=1; fi ; fi\0" \ + "hostname=CPUP0\0" \ + "ethaddr=00:00:00:00:00:00\0" \ + "netdev=eth0\0" \ + "bootcmd=run bootcmd_nor\0" \ + "" +/* + * IPB Bus clocking configuration. + */ +#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ + +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +#define CONFIG_SYS_EEPROM_WREN 1 +#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4 + +/* + * Flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xFE000000 +#define CONFIG_SYS_FLASH_SIZE 0x02000000 +#if !defined(CONFIG_SYS_LOWBOOT) +#error "CONFIG_SYS_LOWBOOT not defined?" +#else /* CONFIG_SYS_LOWBOOT */ +#if defined(CONFIG_SYS_LOWBOOT32) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000) +#endif +#endif /* CONFIG_SYS_LOWBOOT */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START} + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#define CONFIG_ENV_OVERWRITE 1 + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xF0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ + + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +# define CONFIG_SYS_RAMBOOT 1 +#endif + +#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_MPC5xxx_FEC_MII100 +/* + * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb + */ +/* #define CONFIG_MPC5xxx_FEC_MII10 */ +#define CONFIG_PHY_ADDR 0x1f +#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */ + +/* + * GPIO configuration + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_CMDLINE_EDITING 1 +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ + +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE +/* Flash at CSBoot, CS0 */ +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00 +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE +/* External SRAM at CS1 */ +#define CONFIG_SYS_CS1_START 0x62000000 +#define CONFIG_SYS_CS1_SIZE 0x00400000 +#define CONFIG_SYS_CS1_CFG 0x00009930 +#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START +#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE +/* LED display at CS7 */ +#define CONFIG_SYS_CS7_START 0x6a000000 +#define CONFIG_SYS_CS7_SIZE (64*1024) +#define CONFIG_SYS_CS7_CFG 0x0000bf30 + +#define CONFIG_SYS_CS_BURST 0x00000000 +#define CONFIG_SYS_CS_DEADCYCLE 0x33333003 + +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +/*----------------------------------------------------------------------- + * USB stuff + *----------------------------------------------------------------------- + */ +#define CONFIG_USB_CLOCK 0x0001BBBB +#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */ + +/*----------------------------------------------------------------------- + * IDE/ATA stuff Supports IDE harddisk + *----------------------------------------------------------------------- + */ + +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ + +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CONFIG_IDE_PREINIT + +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */ + +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 + +#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA + +/* Offset for data I/O */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) + +/* Offset for normal register accesses */ +#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) + +/* Offset for alternate registers */ +#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) + +/* Interval between registers */ +#define CONFIG_SYS_ATA_STRIDE 4 + +#define CONFIG_ATAPI 1 + +/*----------------------------------------------------------------------- + * Open firmware flat tree support + *----------------------------------------------------------------------- + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_SOC "soc5200@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" + +/* Support for the 7-segment display */ +#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START +#define CONFIG_SHOW_ACTIVITY /* used for display realization */ + +#define CONFIG_SHOW_BOOT_PROGRESS + +#endif /* __CONFIG_H */ diff --git a/include/configs/acadia.h b/include/configs/acadia.h index 39f85ae..c1bd4be 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -35,6 +35,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EZ 1 /* Specifc 405EZ support*/ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/aev.h b/include/configs/aev.h index 54e6c57..10ffb2e 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -41,10 +41,18 @@ #define CONFIG_AEVFIFO 1 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration with room for + * max 64 MByte Flash ROM) + * 0xFFF00000 boot high (for a backup copy of U-Boot) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* * Serial console configuration @@ -128,7 +136,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -221,7 +229,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -273,7 +281,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 7038291..dfe7802 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -33,6 +33,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_4xx_DCACHE /* Enable i- and d-cache */ @@ -362,14 +365,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 9c53d37..b9f1f6b 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -24,7 +24,7 @@ #define __AMCC_COMMON_H #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */ diff --git a/include/configs/aria.h b/include/configs/aria.h index c5a3feb..a63c453 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -51,6 +51,8 @@ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ #define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* video */ #undef CONFIG_VIDEO @@ -305,7 +307,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (384 * 1024) #ifdef CONFIG_FSL_DIU_FB @@ -525,14 +527,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/assabet.h b/include/configs/assabet.h index d17d4bd..58cdbd5 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -140,7 +140,7 @@ #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 7c8281c..f2bc26a 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -69,17 +69,17 @@ #include <config_cmd_default.h> /* - * CONFIG_MK_RAM defines if u-boot is loaded via BDM (or started from + * CONFIG_RAM defines if u-boot is loaded via BDM (or started from * a different bootloader that has already performed RAM setup) or * started directly from flash, which is the regular case for production * boards. */ -#ifdef CONFIG_MK_RAM +#ifdef CONFIG_RAM #define CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_TEXT_BASE 0x40020000 +#define CONFIG_SYS_TEXT_BASE 0x40020000 #define ENABLE_JFFS 0 #else -#define CONFIG_TEXT_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00000000 #define ENABLE_JFFS 1 #endif @@ -343,7 +343,7 @@ #define CONFIG_SYS_FLASH_BASE 0x00000000 #ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE CONFIG_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #else /* This is mainly used during relocation in start.S */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) diff --git a/include/configs/atc.h b/include/configs/atc.h index 24015b7..62e38e1 100644 --- a/include/configs/atc.h +++ b/include/configs/atc.h @@ -37,6 +37,8 @@ #define CONFIG_ATC 1 /* ...on a ATC board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + /* * select serial console configuration * @@ -256,7 +258,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* max. 128 MB */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -280,14 +282,6 @@ #define CONFIG_ENV_SIZE 2048 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h index 18276c5..1bdfd9d 100644 --- a/include/configs/bamboo.h +++ b/include/configs/bamboo.h @@ -36,6 +36,10 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/barco.h b/include/configs/barco.h index b1af701..b656c01 100644 --- a/include/configs/barco.h +++ b/include/configs/barco.h @@ -62,6 +62,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_BARCOBCD_STREAMING 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #undef USE_DINK32 #define CONFIG_CONS_INDEX 3 /* set to '3' for on-chip DUART */ @@ -156,7 +158,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -353,15 +355,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 54fc063..fa9053b 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -154,7 +154,7 @@ /* * Video Settings */ -#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 +#ifdef CONFIG_BF527_EZKIT_REV_2_1 # define CONFIG_LQ035Q1_SPI_BUS 0 # define CONFIG_LQ035Q1_SPI_CS 7 #endif diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h index 560c64f..0bb97d9 100644 --- a/include/configs/bluestone.h +++ b/include/configs/bluestone.h @@ -31,6 +31,11 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index 3e64492..7262b3e 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_BUBINGA 1 /* ...on a BUBINGA board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/c2mon.h b/include/configs/c2mon.h index 4508d75..1351f29 100644 --- a/include/configs/c2mon.h +++ b/include/configs/c2mon.h @@ -36,6 +36,8 @@ #define CONFIG_MPC855 1 /* This is a MPC855 CPU */ #define CONFIG_C2MON 1 /* ...on a C2MON module */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_80MHz 1 /* Running at 5 * 16 = 80 MHz */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ @@ -417,13 +419,4 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/canmb.h b/include/configs/canmb.h index 1f275e5..e1ee158 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -33,10 +33,14 @@ #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * allowed and functional CONFIG_SYS_TEXT_BASE values: + * 0xfe000000 low boot at 0x00000100 (default board setting) + * 0x00100000 RAM load and test + */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R @@ -77,11 +81,11 @@ /* * MUST be low boot - HIGHBOOT is not supported anymore */ -#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #else -# error "TEXT_BASE must be 0xFE000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000" #endif /* @@ -160,7 +164,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 51087f7..fcc7d0e 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -48,6 +48,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h index 72cf941..1b129a2 100644 --- a/include/configs/cm5200.h +++ b/include/configs/cm5200.h @@ -31,6 +31,8 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_CM5200 1 /* ... on CM5200 platform */ +#define CONFIG_SYS_TEXT_BASE 0xfc000000 + #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -169,7 +171,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */ @@ -317,9 +319,6 @@ #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI #define CONFIG_SYS_HID0_FINAL HID0_ICE -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */ /* diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h index c3c603b..88a45c3 100644 --- a/include/configs/cmi_mpc5xx.h +++ b/include/configs/cmi_mpc5xx.h @@ -38,6 +38,8 @@ #define CONFIG_MPC555 1 /* This is an MPC555 CPU */ #define CONFIG_CMI 1 /* Using the customized cmi board */ +#define CONFIG_SYS_TEXT_BASE 0x02000000 /* Boot from flash at location 0x00000000 */ + /* Serial Console Configuration */ #define CONFIG_5xx_CONS_SCI1 #undef CONFIG_5xx_CONS_SCI2 @@ -142,7 +144,7 @@ #define ANYBUS_BASE 0x03010000 /* Anybus Module */ #define CONFIG_SYS_RESET_ADRESS 0x01000000 /* Adress which causes reset */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* TEXT_BASE is defined in the board config.mk file. */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* CONFIG_SYS_TEXT_BASE is defined in the board config.mk file. */ /* This adress is given to the linker with -Ttext to */ /* locate the text section at this adress. */ #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ @@ -267,13 +269,4 @@ */ #define CONFIG_SYS_DER 0x00000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 330e3ac..18710fb 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -107,7 +107,7 @@ * * Setting #if 0: u-boot will start from flash and relocate itself to RAM * - * Please do not forget to modify the setting of TEXT_BASE + * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) * * --- diff --git a/include/configs/cogent_mpc8260.h b/include/configs/cogent_mpc8260.h index 566565a..8bfd702 100644 --- a/include/configs/cogent_mpc8260.h +++ b/include/configs/cogent_mpc8260.h @@ -37,6 +37,8 @@ #define CONFIG_COGENT 1 /* using Cogent Modular Architecture */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_MISC_INIT_R /* Use misc_init_r() */ @@ -238,7 +240,7 @@ #else #define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ @@ -368,7 +370,7 @@ * (the *_SIZE vars must be a power of 2) */ -#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */ +#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */ #define CONFIG_SYS_CMA_CS0_SIZE (1 << 20) #if 0 #define CONFIG_SYS_CMA_CS2_BASE 0x10000000 /* Local Bus SDRAM */ @@ -407,13 +409,4 @@ #endif #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/cogent_mpc8xx.h b/include/configs/cogent_mpc8xx.h index 750c0df..3cc95b4 100644 --- a/include/configs/cogent_mpc8xx.h +++ b/include/configs/cogent_mpc8xx.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is an MPC860 CPU */ #define CONFIG_COGENT 1 /* using Cogent Modular Architecture */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_MISC_INIT_R /* Use misc_init_r() */ @@ -185,7 +187,7 @@ #else #define CONFIG_SYS_FLASH_BASE CMA_MB_FLASH_BASE /* flash on m/b */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -310,7 +312,7 @@ * (the *_SIZE vars must be a power of 2) */ -#define CONFIG_SYS_CMA_CS0_BASE TEXT_BASE /* EPROM */ +#define CONFIG_SYS_CMA_CS0_BASE CONFIG_SYS_TEXT_BASE /* EPROM */ #define CONFIG_SYS_CMA_CS0_SIZE (1 << 20) #define CONFIG_SYS_CMA_CS1_BASE CMA_MB_RAM_BASE /* RAM + I/O SLOT 1 */ #define CONFIG_SYS_CMA_CS1_SIZE (64 << 20) @@ -364,13 +366,4 @@ #define CONFIG_SYS_OR3_PRELIM ((~(CONFIG_SYS_CMA_CS3_SIZE-1)&OR_AM_MSK)|OR_BI|OR_SETA) #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 9184eeb..c021d82 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -240,7 +240,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 @@ -587,14 +587,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -619,7 +611,7 @@ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" MK_STR(TEXT_BASE) "\0" \ + "ubootaddr=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index f7290d6..a865296 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -45,10 +45,11 @@ #define CONFIG_CPCI5200 1 /* ... on CPCI5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -126,11 +127,11 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_DATE -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -240,7 +241,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 7108210..acd9c93 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -40,6 +40,8 @@ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * OS Bootstrap configuration * @@ -251,7 +253,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFE000000 #define CONFIG_SYS_FLASH_SIZE 0x02000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */ @@ -303,13 +305,4 @@ #define CONFIG_SYS_I2C_PLL_ADDR 0x58 /* I2C address of AMIS FS6377-01 PLL */ #define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */ -/* - * Internal Definitions - * - * Boot Flags - * - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 7b9f29a..69abb16 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -40,6 +40,8 @@ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * OS Bootstrap configuration * @@ -250,7 +252,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_SIZE 0x00800000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */ @@ -301,13 +303,4 @@ */ #define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */ -/* - * Internal Definitions - * - * Boot Flags - * - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e0a3bae..7bf6336 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -26,6 +26,7 @@ /* * Board */ +#define CONFIG_DRIVER_TI_EMAC /* * SoC Configuration @@ -79,6 +80,43 @@ #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ /* + * Flash & Environment + */ +#ifdef CONFIG_USE_NAND +#undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_PAGE_2K +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_SYS_CLE_MASK 0x10 +#define CONFIG_SYS_ALE_MASK 0x8 +#undef CONFIG_SYS_NAND_HW_ECC +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define DEF_BOOTM "" +#endif + +/* + * Network & Ethernet Configuration + */ +#ifdef CONFIG_DRIVER_TI_EMAC +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#endif + +/* * U-Boot general configuration */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ @@ -100,7 +138,7 @@ /* * Linux Information */ -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS \ @@ -127,6 +165,20 @@ #undef CONFIG_CMD_PING #endif +#ifdef CONFIG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND + +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_LZO +#define CONFIG_RBTREE +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 4c01844..1746495 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -118,6 +118,7 @@ #define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */ #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index b439c80..d8c9362 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -186,7 +186,7 @@ #define CONFIG_FLASH_CFI_DRIVER 1 /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/debris.h b/include/configs/debris.h index dc59df9..188061e 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -30,6 +30,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* Environments */ /* bootargs */ @@ -204,7 +206,7 @@ #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00040000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -451,16 +453,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 7a1a7c3..2e9a13f 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -40,10 +40,17 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_DIGSY_MTC 1 /* ... on InterControl digsyMTC board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_SYS_CACHELINE_SIZE 32 @@ -103,7 +110,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_USB -#if (TEXT_BASE == 0xFF000000) +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) #define CONFIG_SYS_LOWBOOT 1 #endif @@ -308,7 +315,7 @@ (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 21d2d28..0d44eda 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -28,6 +28,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_DLVISION 1 /* on a Neo board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index fc7c1c6..78cab29 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -172,7 +172,7 @@ #define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */ #define CONFIG_SYS_BL_START_FLASH 0x38040000 /* Address of relocated code */ #define CONFIG_SYS_BL_START_RAM 0x03fd0000 /* Address of relocated code */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ #define CONFIG_SYS_FLASH_BASE 0x38000000 /* Boot Flash */ #define CONFIG_SYS_FLASH_BASE_1 0x10000000 /* StrataFlash 1 */ diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h index 85bf236..637cc55 100644 --- a/include/configs/eXalion.h +++ b/include/configs/eXalion.h @@ -40,6 +40,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_EXALION 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #if defined (CONFIG_MPC8240) /* #warning ---------- eXalion with MPC8240 --------------- */ #elif defined (CONFIG_MPC8245) @@ -109,7 +111,7 @@ #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area @@ -412,16 +414,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ diff --git a/include/configs/ebony.h b/include/configs/ebony.h index 8c3284a..a0d3869 100644 --- a/include/configs/ebony.h +++ b/include/configs/ebony.h @@ -37,6 +37,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index 4b00391..ff25ee2 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -5,21 +5,21 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_MK_edb9301 +#ifdef CONFIG_edb9301 #define CONFIG_EDB9301 -#elif defined(CONFIG_MK_edb9302) +#elif defined(CONFIG_edb9302) #define CONFIG_EDB9302 -#elif defined(CONFIG_MK_edb9302a) +#elif defined(CONFIG_edb9302a) #define CONFIG_EDB9302A -#elif defined(CONFIG_MK_edb9307) +#elif defined(CONFIG_edb9307) #define CONFIG_EDB9307 -#elif defined(CONFIG_MK_edb9307a) +#elif defined(CONFIG_edb9307a) #define CONFIG_EDB9307A -#elif defined(CONFIG_MK_edb9312) +#elif defined(CONFIG_edb9312) #define CONFIG_EDB9312 -#elif defined(CONFIG_MK_edb9315) +#elif defined(CONFIG_edb9315) #define CONFIG_EDB9315 -#elif defined(CONFIG_MK_edb9315a) +#elif defined(CONFIG_edb9315a) #define CONFIG_EDB9315A #else #error "no board defined" diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index a738425..5f083bd 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -31,6 +31,8 @@ #define CONFIG_EP8248 /* Embedded Planet EP8248 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -197,7 +199,7 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -232,9 +234,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index 3f4425a..cbf55db 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -48,6 +48,8 @@ #define CONFIG_SYS_EP8260_H2 1 /* #undef CONFIG_SYS_EP8260_H2 */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* What is the oscillator's (UX2) frequency in Hz? */ @@ -97,7 +99,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ep8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ep8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -438,7 +440,7 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 * Note also that the logic that sets CONFIG_SYS_RAMBOOT is platform dependent. */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -746,14 +748,6 @@ #endif /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index b52b941..48985a0 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -31,6 +31,8 @@ #define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */ /* 256MB SDRAM / 64MB FLASH */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ @@ -333,7 +335,7 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -361,9 +363,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 29951f7..d95144d 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -42,8 +42,20 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) does not work + */ +#ifdef CONFIG_galaxy5200_LOWBOOT +#define CONFIG_SYS_TEXT_BASE 0xFE000000 +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif /* * Serial console configuration @@ -76,7 +88,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFE000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low */ #define CONFIG_SYS_LOWBOOT 1 #endif /* RAMBOOT will be defined automatically in memory section */ @@ -204,7 +216,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index d6db7bf..282afbc 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -40,6 +40,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index d188439..bb4ea79 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -270,7 +270,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -287,7 +287,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration uses on board SMC91C111 diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index 3a568ff..35c4a08 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -238,7 +238,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -255,7 +255,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration uses on board SMC91C111, however if a mezzanine diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h index 4dd9a0f..92fbbbb 100644 --- a/include/configs/gr_xc3s_1500.h +++ b/include/configs/gr_xc3s_1500.h @@ -215,7 +215,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -232,7 +232,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/grsim.h b/include/configs/grsim.h index c3f1a31..5dfdf51 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -240,7 +240,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -257,7 +257,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 7ebbf25..39af8fe 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -238,7 +238,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) #define CONFIG_SYS_STACK_SIZE (0x10000-32) -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -255,7 +255,7 @@ #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) /* make un relocated address from relocated address */ -#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-TEXT_BASE)) +#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) /* * Ethernet configuration diff --git a/include/configs/gth2.h b/include/configs/gth2.h index 677baea..b5f454c 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -141,7 +141,7 @@ #define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 9ed3846..6c1ddac 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -50,6 +50,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Enable debug prints */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ @@ -83,7 +85,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -819,13 +821,4 @@ ORxG_SCY_11_CLK |\ ORxG_EHTR) #endif /* CONFIG_SYS_IO_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index 68bf998..dd5e5a2 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 #define CONFIG_HOSTNAME hcu4 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -57,7 +59,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* ... with on-chip memory here (4KBytes) */ #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 5aa304d..a2edf51 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -41,6 +41,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_HOSTNAME hcu5 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -61,7 +63,7 @@ #define CONFIG_SYS_BOOT_BASE_ADDR 0xfff00000 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE #define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ diff --git a/include/configs/hermes.h b/include/configs/hermes.h index 0df46fa..58fc4ce 100644 --- a/include/configs/hermes.h +++ b/include/configs/hermes.h @@ -36,6 +36,8 @@ #define CONFIG_MPC860 1 /* This is a MPC860T CPU */ #define CONFIG_HERMES 1 /* ...on a HERMES-PRO board */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -332,13 +334,4 @@ #define CONFIG_SYS_MAMR_9COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index d40b7a9..60e5c2b 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -33,10 +33,11 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_HMI1001 1 /* HMI1001 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R @@ -80,7 +81,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFFF00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -149,7 +150,7 @@ #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ #define CONFIG_SYS_MAX_FLASH_SECT 67 /* max num of sects on one chip */ -#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ @@ -204,7 +205,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -352,6 +353,7 @@ /* Display addresses */ /*---------------------------------------------------------------------*/ +#define CONFIG_PDSP188x #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38) #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30) diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 5a282ff..ccfc3df 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -37,6 +37,8 @@ #define CONFIG_HYMOD 1 /* ...on a Hymod board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ #define CONFIG_BOARD_POSTCLK_INIT /* have board_postclk_init() function */ @@ -386,8 +388,8 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_FPGA_BASE 0x80000000 /* * unfortunately, CONFIG_SYS_MONITOR_LEN must include the @@ -728,14 +730,6 @@ #define FPGA_MAIN_IRQ SIU_INT_IRQ2 /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ diff --git a/include/configs/icon.h b/include/configs/icon.h index ad0ca5d..8d98d57 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -35,6 +35,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ diff --git a/include/configs/igep0020.h b/include/configs/igep0020.h new file mode 100644 index 0000000..34e8a57 --- /dev/null +++ b/include/configs/igep0020.h @@ -0,0 +1,228 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */ + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include <asm/arch/cpu.h> +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * NS16550 Configuration + */ + +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* select serial console configuration */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* DDR */ +#define CONFIG_OMAP3_NUMONYX_DDR 1 + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 +#define CONFIG_TWL4030_USB 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "IGEP" + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_ONENAND /* ONENAND support */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* Environment information */ +#define CONFIG_BOOTCOMMAND \ + "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0" + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" + +#define CONFIG_AUTO_COMPLETE 1 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "U-Boot # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + * + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/* + * FLASH and environment organization + */ + +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ + +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_ENV_IS_IN_ONENAND 1 +#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ +#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes for initial data */ + +/* + * SMSC911x Ethernet + */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE 0x2C000000 +#endif /* (CONFIG_CMD_NET) */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */ diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h new file mode 100644 index 0000000..5e2e0ed --- /dev/null +++ b/include/configs/igep0030.h @@ -0,0 +1,215 @@ +/* + * (C) Copyright 2010 + * ISEE 2007 SL, <www.iseebcn.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include <asm/sizes.h> + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */ + +#define CONFIG_SDRC /* The chip has SDRC controller */ + +#include <asm/arch/cpu.h> +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * NS16550 Configuration + */ + +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* select serial console configuration */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* DDR */ +#define CONFIG_OMAP3_NUMONYX_DDR 1 + +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 +#define CONFIG_TWL4030_USB 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "IGEP" + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_ONENAND /* ONENAND support */ +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ +#define CONFIG_MTD_DEVICE + +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_IMLS /* List all found images */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* Environment information */ +#define CONFIG_BOOTCOMMAND \ + "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0" + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usbtty=cdc_acm\0" + +#define CONFIG_AUTO_COMPLETE 1 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "U-Boot # " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) + +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ + /* works on */ +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ + 0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ + /* load address */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ + +/* + * Physical Memory Map + * + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/* + * FLASH and environment organization + */ + +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ + +#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + +#define CONFIG_ENV_IS_IN_ONENAND 1 +#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ +#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes for initial data */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */ diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 88c62d1..9425237 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -147,6 +147,13 @@ #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) +#undef CONFIG_SYS_ARM_WITHOUT_RELOC +#define CONFIG_SYS_SDRAM_BASE CSD0_BASE +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_END IRAM_SIZE +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) + /*----------------------------------------------------------------------- * FLASH and environment organization */ diff --git a/include/configs/incaip.h b/include/configs/incaip.h index 2129dfd..b7ba6f4 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -139,7 +139,7 @@ #define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 69365e6..3636d12 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -36,10 +36,16 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_INKA4X0 1 /* INKA4x0 board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFE00000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFE00000 /* Standard: boot low */ +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ @@ -105,7 +111,7 @@ #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFFE00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFE00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -214,7 +220,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/intip.h b/include/configs/intip.h index 82c8282..56d2be2 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -45,6 +45,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index 6903b36..c37b83b 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -37,13 +37,12 @@ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ #define CONFIG_IPEK01 /* Motherboard is ipek01 */ +#define CONFIG_SYS_TEXT_BASE 0xfc000000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #ifdef CONFIG_CMD_KGDB #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ @@ -274,7 +273,7 @@ CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index 9c45acf..6f5ac94 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -33,14 +33,20 @@ #define CONFIG_MPC5200 1 /* especially an MPC5200 */ #define CONFIG_JUPITER 1 /* ... on Jupiter board */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R 1 #define CONFIG_BOARD_EARLY_INIT_F 1 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -184,7 +190,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */ -#define CONFIG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -226,7 +232,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/katmai.h b/include/configs/katmai.h index e4ccd7d..135a4c2 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -41,6 +41,8 @@ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + /* * Enable this board for more than 2GB of SDRAM */ diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 612a0fe..e153b31 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -39,6 +39,10 @@ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/km8xx.h b/include/configs/km8xx.h index a10744e..2a42e99 100644 --- a/include/configs/km8xx.h +++ b/include/configs/km8xx.h @@ -271,14 +271,6 @@ #define CONFIG_SYS_BR3_PRELIM (0x30000401) #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SCC3_ENET #define CONFIG_ETHPRIME "SCC" #define CONFIG_HAS_ETH0 diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 4794256..03d3aac 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -30,6 +30,8 @@ #define CONFIG_KMETER1 1 /* KMETER1 board specific */ #define CONFIG_HOSTNAME kmeter1 +#define CONFIG_SYS_TEXT_BASE 0xF0000000 + /* include common defines/options for all Keymile boards */ #include "keymile-common.h" @@ -157,7 +159,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xF0000000 #define CONFIG_SYS_PIGGY_BASE 0xE8000000 #define CONFIG_SYS_PIGGY_SIZE 128 @@ -440,14 +442,6 @@ #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #endif /* CONFIG_PCI */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define BOOTFLASH_START F0000000 #define CONFIG_PRAM 512 /* protected RAM [KBytes] */ diff --git a/include/configs/kmsupx4.h b/include/configs/kmsupx4.h index 8f1e602..228bdd7 100644 --- a/include/configs/kmsupx4.h +++ b/include/configs/kmsupx4.h @@ -32,6 +32,8 @@ #define CONFIG_KMSUPX4 1 /* ...on a kmsupx4 board */ #define CONFIG_HOSTNAME kmsupx4 +#define CONFIG_SYS_TEXT_BASE 0xf0000000 + /* include common defines/options for all Keymile 8xx boards */ #include "km8xx.h" diff --git a/include/configs/korat.h b/include/configs/korat.h index 55ef4f0..3a0531b 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -38,6 +38,12 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 +#ifdef CONFIG_KORAT_PERMANENT +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#else +#define CONFIG_SYS_TEXT_BASE 0xF7F60000 +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ @@ -64,7 +70,7 @@ #define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000 #define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE) #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE #define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ @@ -552,14 +558,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h index 0d95263..fa87625 100644 --- a/include/configs/kvme080.h +++ b/include/configs/kvme080.h @@ -28,6 +28,8 @@ #define CONFIG_MPC8245 1 #define CONFIG_KVME080 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -136,7 +138,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_MONITOR_LEN 0x00040000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (512 << 10) #define CONFIG_SYS_BOOTMAPSZ (8 << 20) @@ -268,7 +270,4 @@ #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - #endif /* __CONFIG_H */ diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index 6883e79..aaf663a 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -20,6 +20,22 @@ #ifndef __CONFIG_H #define __CONFIG_H +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * + * Standard configuration - all models + * 0xFFF00000 boot from flash + * + * Test configuration (boot from RAM using uloader.o) + * LinkStation HD-HLAN and KuroBox Standard + * 0x03F00000 boot from RAM + * LinkStation HD-HGLAN and KuroBox HG + * 0x07F00000 boot from RAM + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #if 0 #define DEBUG #endif @@ -217,7 +233,7 @@ #define CONFIG_SYS_FLASH_BASE 0xFFC00000 #define CONFIG_SYS_FLASH_SIZE 0x00400000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 #define CONFIG_SYS_EUMB_ADDR 0x80000000 @@ -240,7 +256,7 @@ #endif /*----------------------------------------------------------------------- - * Change TEXT_BASE in bord/linkstation/config.mk to get a RAM build + * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build * * RAM based builds are for testing purposes. A Linux module, uloader.o, * exists to load U-Boot and pass control to it @@ -495,12 +511,4 @@ */ #define CONFIG_DOS_PARTITION -/*----------------------------------------------------------------------- - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h deleted file mode 100644 index 0535ee1..0000000 --- a/include/configs/logodl.h +++ /dev/null @@ -1,299 +0,0 @@ -/* - * (C) Copyright 2003 - * Robert Schwebel, Pengutronix, r.schwebel@pengutronix.de. - * - * Configuration for the Logotronic DL board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * include/configs/logodl.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_PXA250 1 /* This is an PXA250 CPU */ -#define CONFIG_GEALOG 1 /* on a Logotronic GEALOG SG board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - /* for timer/console/ethernet */ - -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_NO_DCACHE - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART 1 /* we use FFUART */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 19200 -#undef CONFIG_MISC_INIT_R /* FIXME: misc_init_r() missing */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_RUN - - -#define CONFIG_BOOTDELAY 3 -/* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */ -#define CONFIG_BOOTARGS "console=ttyS0,19200" -#define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.1.56 -#define CONFIG_SERVERIP 192.168.1.2 -#define CONFIG_BOOTCOMMAND "bootm 0x40000" -#define CONFIG_SHOW_BOOT_PROGRESS - -#define CONFIG_CMDLINE_TAG 1 - -/* - * Miscellaneous configurable options - */ - -/* - * Size of malloc() pool; this lives below the uppermost 128 KiB which are - * used for the RAM copy of the uboot code - * - */ -#define CONFIG_SYS_MALLOC_LEN (256*1024) - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */ - -#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ - -#define CONFIG_SYS_HZ 1000 - /* RS: the oscillator is actually 3680130?? */ - -#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ - /* 0101000001 */ - /* ^^^^^ Memory Speed 99.53 MHz */ - /* ^^ Run Mode Speed = 2x Mem Speed */ - /* ^^ Turbo Mode Sp. = 1x Run M. Sp. */ - -#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128 KiB */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* - * SMSC91C111 Network Card - */ -#if 0 -#define CONFIG_NET_MULTI -#define CONFIG_SMC91111 1 -#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */ -#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ -#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ -#undef CONFIG_SHOW_ACTIVITY -#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ -#endif - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of RAM */ -#define PHYS_SDRAM_1 0x08000000 /* SRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE (4*1024*1024) /* 4 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */ -#define PHYS_FLASH_SIZE (32*1024*1024) /* 32 MB */ - -#define CONFIG_SYS_DRAM_BASE PHYS_SDRAM_1 /* RAM starts here */ -#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - - -/* - * GPIO settings - * - * GP?? == FOOBAR is 0/1 - */ - -#define _BIT0 0x00000001 -#define _BIT1 0x00000002 -#define _BIT2 0x00000004 -#define _BIT3 0x00000008 - -#define _BIT4 0x00000010 -#define _BIT5 0x00000020 -#define _BIT6 0x00000040 -#define _BIT7 0x00000080 - -#define _BIT8 0x00000100 -#define _BIT9 0x00000200 -#define _BIT10 0x00000400 -#define _BIT11 0x00000800 - -#define _BIT12 0x00001000 -#define _BIT13 0x00002000 -#define _BIT14 0x00004000 -#define _BIT15 0x00008000 - -#define _BIT16 0x00010000 -#define _BIT17 0x00020000 -#define _BIT18 0x00040000 -#define _BIT19 0x00080000 - -#define _BIT20 0x00100000 -#define _BIT21 0x00200000 -#define _BIT22 0x00400000 -#define _BIT23 0x00800000 - -#define _BIT24 0x01000000 -#define _BIT25 0x02000000 -#define _BIT26 0x04000000 -#define _BIT27 0x08000000 - -#define _BIT28 0x10000000 -#define _BIT29 0x20000000 -#define _BIT30 0x40000000 -#define _BIT31 0x80000000 - - -#define CONFIG_SYS_LED_A_BIT (_BIT18) -#define CONFIG_SYS_LED_A_SR GPSR0 -#define CONFIG_SYS_LED_A_CR GPCR0 - -#define CONFIG_SYS_LED_B_BIT (_BIT16) -#define CONFIG_SYS_LED_B_SR GPSR1 -#define CONFIG_SYS_LED_B_CR GPCR1 - - -/* LED A: off, LED B: off */ -#define CONFIG_SYS_GPSR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT18) -#define CONFIG_SYS_GPSR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CONFIG_SYS_GPSR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CONFIG_SYS_GPCR0_VAL 0x00000000 -#define CONFIG_SYS_GPCR1_VAL 0x00000000 -#define CONFIG_SYS_GPCR2_VAL 0x00000000 - -#define CONFIG_SYS_GPDR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT17+_BIT18) -#define CONFIG_SYS_GPDR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CONFIG_SYS_GPDR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CONFIG_SYS_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31) -#define CONFIG_SYS_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) -#define CONFIG_SYS_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\ - _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CONFIG_SYS_GAFR2_U_VAL (_BIT1) - -#define CONFIG_SYS_PSSR_VAL (0x20) - -/* - * Memory settings - */ -#define CONFIG_SYS_MSC0_VAL 0x123c2980 -#define CONFIG_SYS_MSC1_VAL 0x123c2661 -#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8 - - -/* no sdram/pcmcia here */ -#define CONFIG_SYS_MDCNFG_VAL 0x00000000 -#define CONFIG_SYS_MDREFR_VAL 0x00000000 -#define CONFIG_SYS_MDREFR_VAL_100 0x00000000 -#define CONFIG_SYS_MDMRS_VAL 0x00000000 - -/* only SRAM */ -#define SXCNFG_SETTINGS 0x00000000 - -/* - * PCMCIA and CF Interfaces - */ - -#define CONFIG_SYS_MECR_VAL 0x00000000 -#define CONFIG_SYS_MCMEM0_VAL 0x00010504 -#define CONFIG_SYS_MCMEM1_VAL 0x00010504 -#define CONFIG_SYS_MCATT0_VAL 0x00010504 -#define CONFIG_SYS_MCATT1_VAL 0x00010504 -#define CONFIG_SYS_MCIO0_VAL 0x00004715 -#define CONFIG_SYS_MCIO1_VAL 0x00004715 - - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -/* FIXME */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index 7ce8d6d..65276a2 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -156,6 +156,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_MMC 1 /* we use this ethernet chip */ -#define CONFIG_ENC28J60 +#define CONFIG_ENC28J60_LPC2292 #endif /* __CONFIG_H */ diff --git a/include/configs/luan.h b/include/configs/luan.h index 6b1a41f..d801404 100644 --- a/include/configs/luan.h +++ b/include/configs/luan.h @@ -37,6 +37,8 @@ #define CONFIG_440 1 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index be20d72..1062765 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -39,6 +39,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823E CPU */ #define CONFIG_LWMON 1 /* ...on a LWMON board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Default Ethernet MAC address */ #define CONFIG_ETHADDR 00:11:B0:00:00:00 @@ -610,12 +612,4 @@ */ #define CONFIG_SYS_MAR 0x00000088 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 4a3b1dc..d003710 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -36,6 +36,11 @@ #define CONFIG_440EPX 1 /* Specific PPC440EPx */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ @@ -48,7 +53,7 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */ @@ -644,14 +649,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 80163d4..c4853ab 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -39,6 +39,8 @@ #define CONFIG_405EX 1 /* Specifc 405EX support*/ #define CONFIG_SYS_CLK_FREQ 33330000 /* ext frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h index 0224608..797378b 100644 --- a/include/configs/manroland/common.h +++ b/include/configs/manroland/common.h @@ -29,9 +29,6 @@ * (easy to change) */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_BOARD_EARLY_INIT_R /* Partitions */ @@ -55,6 +52,11 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_SNTP +/* + * 8-symbol LED display (can be accessed with 'display' command) + */ +#define CONFIG_PDSP188x + #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ /* @@ -101,11 +103,11 @@ "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin \0" \ "u-boot_addr_r=200000\0" \ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ - "update=protect off " xstr(TEXT_BASE) " +${filesize};" \ - "erase " xstr(TEXT_BASE) " +${filesize};" \ - "cp.b ${u-boot_addr_r} " xstr(TEXT_BASE) \ + "update=protect off " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \ + "erase " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize};" \ + "cp.b ${u-boot_addr_r} " xstr(CONFIG_SYS_TEXT_BASE) \ " ${filesize};" \ - "protect on " xstr(TEXT_BASE) " +${filesize}\0" \ + "protect on " xstr(CONFIG_SYS_TEXT_BASE) " +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run net_nfs" diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h index d25e093..7be1354 100644 --- a/include/configs/manroland/mpc5200-common.h +++ b/include/configs/manroland/mpc5200-common.h @@ -42,7 +42,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\ 230400 } -#if (TEXT_BASE == 0xFFF00000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -88,7 +88,7 @@ #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ -#define CONFIG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/ @@ -140,7 +140,7 @@ #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 7ef6385..4d946ab 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -33,13 +33,20 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MCC200 1 /* ... on MCC200 board */ +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low (standard configuration) + * 0xFFF00000 boot high + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ #define CONFIG_MISC_INIT_R -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -169,7 +176,7 @@ "rootpath=/opt/eldk/ppc_6xx\0" \ "bootfile=/tftpboot/" CONFIG_SYS__BOARDNAME "/uImage\0" \ "load=tftp 200000 /tftpboot/" CONFIG_SYS__BOARDNAME "/u-boot.bin\0" \ - "text_base=" MK_STR(TEXT_BASE) "\0" \ + "text_base=" MK_STR(CONFIG_SYS_TEXT_BASE) "\0" \ "kernel_addr=0xFC0C0000\0" \ "update=protect off ${text_base} +${filesize};" \ "era ${text_base} +${filesize};" \ @@ -239,7 +246,7 @@ #define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */ -#if TEXT_BASE == CONFIG_SYS_FLASH_BASE +#if CONFIG_SYS_TEXT_BASE == CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LOWBOOT 1 #endif @@ -259,7 +266,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index 8dd87cb..4aef6fc 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -37,6 +37,8 @@ #define CONFIG_4xx 1 #define CONFIG_HOSTNAME mcu25 +#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 + /* * Include common defines/options for all boards produced by Netstal Maschinen */ @@ -57,7 +59,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* ... with on-chip memory here (4KBytes) */ #define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index a26de0b..1e82bc5 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -48,6 +48,8 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ @@ -210,7 +212,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Monitor length */ #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Malloc size */ @@ -361,14 +363,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h index 73405ea..036b790 100644 --- a/include/configs/mecp5200.h +++ b/include/configs/mecp5200.h @@ -45,10 +45,11 @@ #define CONFIG_MECP5200 1 /* ... on MECP5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -105,11 +106,11 @@ #define CONFIG_CMD_ELF -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -221,7 +222,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 55d1fc9..4dcd679 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -34,6 +34,8 @@ #define CONFIG_MGCOGE 1 #define CONFIG_HOSTNAME mgcoge +#define CONFIG_SYS_TEXT_BASE 0xFE000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* include common defines/options for all Keymile boards */ @@ -123,7 +125,7 @@ CONFIG_SYS_FLASH_BASE_1, \ CONFIG_SYS_FLASH_BASE_2 } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -193,9 +195,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h index 1618f7d..6036da8 100644 --- a/include/configs/mgsuvd.h +++ b/include/configs/mgsuvd.h @@ -32,6 +32,8 @@ #define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */ #define CONFIG_HOSTNAME mgsuvd +#define CONFIG_SYS_TEXT_BASE 0xf0000000 + /* include common defines/options for all Keymile 8xx boards */ #include "km8xx.h" diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 9b1569a..bcdd86e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2008 Michal Simek + * (C) Copyright 2007-2010 Michal Simek * * Michal SIMEK <monstr@monstr.eu> * @@ -27,73 +27,75 @@ #include "../board/xilinx/microblaze-generic/xparameters.h" -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +/* MicroBlaze CPU */ +#define CONFIG_MICROBLAZE 1 #define MICROBLAZE_V5 1 /* uart */ #ifdef XILINX_UARTLITE_BASEADDR - #define CONFIG_XILINX_UARTLITE - #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR - #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE - #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } - #define CONSOLE_ARG "console=console=ttyUL0,115200\0" +# define CONFIG_XILINX_UARTLITE +# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } +# define CONSOLE_ARG "console=console=ttyUL0,115200\0" #elif XILINX_UART16550_BASEADDR - #define CONFIG_SYS_NS16550 1 - #define CONFIG_SYS_NS16550_SERIAL - #define CONFIG_SYS_NS16550_REG_SIZE -4 - #define CONFIG_CONS_INDEX 1 - #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) - #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ - #define CONFIG_BAUDRATE 115200 - - /* The following table includes the supported baudrates */ - #define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - #define CONSOLE_ARG "console=console=ttyS0,115200\0" +# define CONFIG_SYS_NS16550 1 +# define CONFIG_SYS_NS16550_SERIAL +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# define CONFIG_CONS_INDEX 1 +# define CONFIG_SYS_NS16550_COM1 \ + (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ +# define CONFIG_BAUDRATE 115200 + +/* The following table includes the supported baudrates */ +# define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +# define CONSOLE_ARG "console=console=ttyS0,115200\0" #else - #error Undefined uart +# error Undefined uart #endif /* setting reset address */ -/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ +/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ /* ethernet */ #ifdef XILINX_EMACLITE_BASEADDR - #define CONFIG_XILINX_EMACLITE 1 - #define CONFIG_SYS_ENET +# define CONFIG_XILINX_EMACLITE 1 +# define CONFIG_SYS_ENET #elif XILINX_LLTEMAC_BASEADDR - #define CONFIG_XILINX_LL_TEMAC 1 - #define CONFIG_SYS_ENET +# define CONFIG_XILINX_LL_TEMAC 1 +# define CONFIG_SYS_ENET #endif #undef ET_DEBUG /* gpio */ #ifdef XILINX_GPIO_BASEADDR - #define CONFIG_SYS_GPIO_0 1 - #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR +# define CONFIG_SYS_GPIO_0 1 +# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0 1 - #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +# define CONFIG_SYS_INTC_0 1 +# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR +# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #endif /* timer */ #ifdef XILINX_TIMER_BASEADDR - #if (XILINX_TIMER_IRQ != -1) - #define CONFIG_SYS_TIMER_0 1 - #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR - #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ - #define FREQUENCE XILINX_CLOCK_FREQ - #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) - #endif +# if (XILINX_TIMER_IRQ != -1) +# define CONFIG_SYS_TIMER_0 1 +# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR +# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ +# define FREQUENCE XILINX_CLOCK_FREQ +# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +# endif #elif XILINX_CLOCK_FREQ - #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ +# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ #else - #error BAD CLOCK FREQ +# error BAD CLOCK FREQ #endif /* FSL */ /* #define CONFIG_SYS_FSL_2 */ @@ -101,7 +103,7 @@ /* * memory layout - Example - * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_TEXT_BASE = 0x1200_0000; * CONFIG_SYS_SRAM_BASE = 0x1000_0000; * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; * @@ -111,7 +113,7 @@ * * 0x1000_0000 CONFIG_SYS_SDRAM_BASE * FREE - * 0x1200_0000 TEXT_BASE + * 0x1200_0000 CONFIG_SYS_TEXT_BASE * U-BOOT code * 0x1202_0000 * FREE @@ -135,15 +137,20 @@ /* global pointer */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size of global data */ /* start of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE \ + - CONFIG_SYS_GBL_DATA_SIZE) /* monitor code */ -#define SIZE 0x40000 +#define SIZE 0x40000 #define CONFIG_SYS_MONITOR_LEN (SIZE - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_BASE \ + (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_END \ + (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_MALLOC_BASE \ + (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) /* stack */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE @@ -152,55 +159,62 @@ #define FLASH #ifdef FLASH - #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START - #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE - #define CONFIG_SYS_FLASH_CFI 1 - #define CONFIG_FLASH_CFI_DRIVER 1 - #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ - #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ - - #ifdef RAMENV - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - - #else /* !RAMENV */ - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) - #define CONFIG_ENV_SIZE 0x20000 - #endif /* !RAMBOOT */ +# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START +# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE +# define CONFIG_SYS_FLASH_CFI 1 +# define CONFIG_FLASH_CFI_DRIVER 1 +/* ?empty sector */ +# define CONFIG_SYS_FLASH_EMPTY_INFO 1 +/* max number of memory banks */ +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* max number of sectors on one chip */ +# define CONFIG_SYS_MAX_FLASH_SECT 512 +/* hardware flash protection */ +# define CONFIG_SYS_FLASH_PROTECTION + +# ifdef RAMENV +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + +# else /* !RAMENV */ +# define CONFIG_ENV_IS_IN_FLASH 1 +/* 128K(one sector) for env */ +# define CONFIG_ENV_SECT_SIZE 0x20000 +# define CONFIG_ENV_ADDR \ + (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) +# define CONFIG_ENV_SIZE 0x20000 +# endif /* !RAMBOOT */ #else /* !FLASH */ - /* ENV in RAM */ - #define CONFIG_SYS_NO_FLASH 1 - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ +/* ENV in RAM */ +# define CONFIG_SYS_NO_FLASH 1 +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) +/* hardware flash protection */ +# define CONFIG_SYS_FLASH_PROTECTION #endif /* !FLASH */ /* system ace */ #ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION +# define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +# define SYSTEMACE_CONFIG_FPGA +# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +# define CONFIG_DOS_PARTITION #endif #if defined(XILINX_USE_ICACHE) - #define CONFIG_ICACHE +# define CONFIG_ICACHE #else - #undef CONFIG_ICACHE +# undef CONFIG_ICACHE #endif #if defined(XILINX_USE_DCACHE) - #define CONFIG_DCACHE +# define CONFIG_DCACHE #else - #undef CONFIG_DCACHE +# undef CONFIG_DCACHE #endif /* @@ -222,36 +236,39 @@ #define CONFIG_CMD_ECHO #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) - #define CONFIG_CMD_CACHE +# define CONFIG_CMD_CACHE #else - #undef CONFIG_CMD_CACHE +# undef CONFIG_CMD_CACHE #endif #ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET +# undef CONFIG_CMD_NET +# undef CONFIG_NET_MULTI #else - #define CONFIG_CMD_PING +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +# define CONFIG_NET_MULTI #endif #if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +# define CONFIG_CMD_FAT #endif #if defined(FLASH) - #define CONFIG_CMD_ECHO - #define CONFIG_CMD_FLASH - #define CONFIG_CMD_IMLS - #define CONFIG_CMD_JFFS2 - - #if !defined(RAMENV) - #define CONFIG_CMD_SAVEENV - #define CONFIG_CMD_SAVES - #endif +# define CONFIG_CMD_ECHO +# define CONFIG_CMD_FLASH +# define CONFIG_CMD_IMLS +# define CONFIG_CMD_JFFS2 + +# if !defined(RAMENV) +# define CONFIG_CMD_SAVEENV +# define CONFIG_CMD_SAVES +# endif #else - #undef CONFIG_CMD_IMLS - #undef CONFIG_CMD_FLASH - #undef CONFIG_CMD_JFFS2 +# undef CONFIG_CMD_IMLS +# undef CONFIG_CMD_FLASH +# undef CONFIG_CMD_JFFS2 #endif #if defined(CONFIG_CMD_JFFS2) @@ -259,21 +276,26 @@ #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=ml401-0" +#define MTDIDS_DEFAULT "nor0=flash-0" /* default mtd partition table */ -#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ +#define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ "256k(env),3m(kernel),1m(romfs),"\ "1m(cramfs),-(jffs2)" #endif /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +/* size of console buffer */ +#define CONFIG_SYS_CBSIZE 512 + /* print buffer size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 15 #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ #define CONFIG_BOOTARGS "root=romfs" @@ -290,9 +312,9 @@ #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" -#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ - "nor0=ml401-0\0"\ - "mtdparts=mtdparts=ml401-0:"\ +#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ + "nor0=flash-0\0"\ + "mtdparts=mtdparts=flash-0:"\ "256k(u-boot),256k(env),3m(kernel),"\ "1m(romfs),1m(cramfs),-(jffs2)\0" @@ -301,7 +323,7 @@ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +# define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #endif #endif /* __CONFIG_H */ diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index fa4310b..935b5b9 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -37,6 +37,8 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + /* * BOOTP options */ @@ -192,12 +194,12 @@ * (e.g., by the BDI). Otherwise we must specify the default boot-up value of * MBAR, as given in the doccumentation. */ -#if TEXT_BASE == 0x00100000 +#if CONFIG_SYS_TEXT_BASE == 0x00100000 #define CONFIG_SYS_DEFAULT_MBAR 0xf0000000 -#else /* TEXT_BASE != 0x00100000 */ +#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */ #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 #define CONFIG_SYS_LOWBOOT 1 -#endif /* TEXT_BASE == 0x00100000 */ +#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */ /* Use SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM @@ -207,7 +209,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif @@ -411,9 +413,6 @@ extern void __led_set(led_id_t id, int state); #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI #define CONFIG_SYS_HID0_FINAL HID0_ICE -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 3740316..fbcc839 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -48,6 +48,8 @@ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + /* video */ #undef CONFIG_VIDEO @@ -274,7 +276,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ @@ -375,6 +377,20 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ /* + * USB Support + */ +#define CONFIG_CMD_USB + +#if defined(CONFIG_CMD_USB) +#define CONFIG_USB_EHCI /* Enable EHCI Support */ +#define CONFIG_USB_EHCI_FSL /* On a FSL platform */ +#define CONFIG_EHCI_MMIO_BIG_ENDIAN /* With big-endian regs */ +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* * Environment */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -442,10 +458,15 @@ "mpc5121.nand:-(data)" -#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2) +#if defined(CONFIG_CMD_IDE) || defined(CONFIG_CMD_EXT2) || defined(CONFIG_CMD_USB) + #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION + +#define CONFIG_CMD_FAT +#define CONFIG_SUPPORT_VFAT + #endif /* defined(CONFIG_CMD_IDE) */ /* @@ -496,14 +517,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index 497ea42..94a8c93 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -42,6 +42,8 @@ #define CONFIG_HIGH_BATS /* High BATs supported */ #define CONFIG_ALTIVEC /* undef to disable */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_SYS_BOARD_NAME "MPC7448 HPC II" #define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II" @@ -251,7 +253,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0x3fffff00 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* u-boot code base */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* u-boot code base */ #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ /* Peripheral Device section */ @@ -399,13 +401,5 @@ #define L2_INIT 0 #define L2_ENABLE (L2_INIT | L2CR_L2E) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION #endif /* __CONFIG_H */ diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index b5a19e4..14f663f 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -33,6 +33,10 @@ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308_P1M 1 /* mpc8308_p1m board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFC000000 +#endif + /* * On-board devices * @@ -206,7 +210,7 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ @@ -486,14 +490,6 @@ #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 8c06bf2..02090f2 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -65,7 +65,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) /* NOR Flash */ /* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/ diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index 43f46bf..345bdd1 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -33,6 +33,8 @@ #define CONFIG_MPC8260 1 #define CONFIG_MUAS3001 1 +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* Do boardspecific init */ @@ -225,7 +227,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT #endif @@ -275,9 +277,6 @@ #define CONFIG_SYS_HRCW_SLAVE6 0 #define CONFIG_SYS_HRCW_SLAVE7 0 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/mucmc52.h b/include/configs/mucmc52.h index f87dc9c..101788a 100644 --- a/include/configs/mucmc52.h +++ b/include/configs/mucmc52.h @@ -35,6 +35,10 @@ #define CONFIG_MUCMC52 1 /* MUCMC52 board */ #define CONFIG_HOSTNAME mucmc52 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #include "manroland/common.h" #include "manroland/mpc5200-common.h" diff --git a/include/configs/munices.h b/include/configs/munices.h index fa5230f..97330d5 100644 --- a/include/configs/munices.h +++ b/include/configs/munices.h @@ -31,9 +31,12 @@ #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_MUNICES 1 /* ... on MUNICes board */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -119,7 +122,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -154,11 +157,11 @@ */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OFFSET 0x40000 -#define CONFIG_ENV_ADDR (TEXT_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x4000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR_REDUND (TEXT_BASE + CONFIG_ENV_OFFSET_REDUND) +#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #define CONFIG_ENV_OVERWRITE 1 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 8864f3a..6165473 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -30,8 +30,8 @@ #define CONFIG_MX51 /* in a mx51 */ #define CONFIG_SKIP_RELOCATE_UBOOT -#define CONFIG_MX51_HCLK_FREQ 24000000 /* RedBoot says 26MHz */ -#define CONFIG_MX51_CLK32 32768 +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/neo.h b/include/configs/neo.h index f8f53e8..1063d12 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -29,6 +29,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_NEO 1 /* on a Neo board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 8f42b6c..122f139 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -27,7 +27,7 @@ #define __NETSTAL_COMMON_H #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index bdc0f79..c9c69bb 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -32,10 +32,9 @@ #define CONFIG_MPC5200 #define CONFIG_O2DNT 1 /* ... on O2DNT board */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* boot low for 16 MiB boards */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -102,10 +101,10 @@ #define CONFIG_CMD_PCI -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 #else -# error "TEXT_BASE must be 0xFF000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xFF000000" #endif /* @@ -222,7 +221,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index d11d218..f33f0ff 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -46,6 +46,8 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 1bd0f37..900dbd3 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -55,6 +55,15 @@ #undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R +#define CONFIG_OF_LIBFDT 1 +/* + * The early kernel mapping on ARM currently only maps from the base of DRAM + * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. + * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, + * so that leaves DRAM base to DRAM base + 0x4000 available. + */ +#define CONFIG_SYS_BOOTMAPSZ 0x4000 + #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 @@ -95,8 +104,9 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* DDR - I use Micron DDR */ @@ -111,11 +121,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "Beagle" /* commands to include */ #include <config_cmd_default.h> @@ -189,6 +194,7 @@ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "nandroot=/dev/mtdblock4 rw\0" \ @@ -209,10 +215,10 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ @@ -222,7 +228,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index a0e0f24..69f9126 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -87,8 +87,9 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* DDR - I use Micron DDR */ @@ -97,6 +98,7 @@ /* commands to include */ #include <config_cmd_default.h> +#define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ @@ -158,6 +160,7 @@ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "nandroot=/dev/mtdblock4 rw\0" \ @@ -178,10 +181,10 @@ "omapdss.def_disp=${defaultdisplay} " \ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ @@ -191,7 +194,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -321,4 +324,7 @@ extern unsigned int boot_flash_type; #endif /* (CONFIG_CMD_NET) */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index a0d27a4..b52ca19 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_NS16550_COM3 UART3_BASE #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} @@ -107,8 +106,9 @@ #define CONFIG_TWL6030_POWER 1 /* MMC */ +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 @@ -120,11 +120,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "OMAP4 Panda" /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -144,18 +139,11 @@ #undef CONFIG_CMD_IMLS /* List all found images */ /* - * Enabling relocation of u-boot by default - * Relocation can be skipped if u-boot is copied to the TEXT_BASE - */ -#undef CONFIG_SKIP_RELOCATE_UBOOT - -/* * Environment setup */ #define CONFIG_BOOTDELAY 3 -/* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -163,7 +151,7 @@ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ - "mmcdev=1\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -179,7 +167,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init ${mmcdev}; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -239,4 +227,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index d5439f9..174d73f 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -63,10 +63,10 @@ /* * Size of malloc() pool - * Total Size Environment - 256k + * Total Size Environment - 128k * Malloc - add 256k */ -#define CONFIG_ENV_SIZE (256 << 10) +#define CONFIG_ENV_SIZE (128 << 10) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ /* initial data */ @@ -89,12 +89,9 @@ #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} - /* I2C */ #define CONFIG_HARD_I2C 1 #define CONFIG_SYS_I2C_SPEED 100000 @@ -108,11 +105,17 @@ #define CONFIG_TWL6030_POWER 1 /* MMC */ +#define CONFIG_GENERIC_MMC 1 #define CONFIG_MMC 1 -#define CONFIG_OMAP3_MMC 1 +#define CONFIG_OMAP_HSMMC 1 #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* MMC ENV related defines */ +#define CONFIG_ENV_IS_IN_MMC 1 +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ +#define CONFIG_ENV_OFFSET 0xE0000 + /* USB */ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 @@ -121,11 +124,6 @@ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "SDP4430" /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -138,6 +136,7 @@ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_SAVEENV /* Disabled commands */ #undef CONFIG_CMD_NET @@ -145,18 +144,11 @@ #undef CONFIG_CMD_IMLS /* List all found images */ /* - * Enabling relocation of u-boot by default - * Relocation can be skipped if u-boot is copied to the TEXT_BASE - */ -#undef CONFIG_SKIP_RELOCATE_UBOOT - -/* * Environment setup */ #define CONFIG_BOOTDELAY 3 -/* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -164,7 +156,7 @@ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ - "mmcdev=1\0" \ + "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -180,7 +172,7 @@ "bootm ${loadaddr}\0" \ #define CONFIG_BOOTCOMMAND \ - "if mmc init ${mmcdev}; then " \ + "if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -240,4 +232,7 @@ */ #define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE) + #endif /* __CONFIG_H */ diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index 17ec08f..8b5ef8f 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -40,6 +40,8 @@ *----------------------------------------------------------------------*/ #define CONFIG_P3Mx /* used for both board versions */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #if defined (CONFIG_P3M750) #define CONFIG_750FX /* 750GL/GX/FX */ #define CONFIG_HIGH_BATS /* High BATs supported */ @@ -447,12 +449,4 @@ #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 6edf91e..71529a2 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -39,6 +39,9 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ /*----------------------------------------------------------------------- @@ -318,14 +321,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index 5ad745e..d5cf89a 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -104,7 +104,7 @@ #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 8acf3c7..5898b4e 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -41,9 +41,18 @@ High Level Configuration Options #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */ /* FEC configuration and IDE */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFF000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------------- Serial console configuration @@ -71,7 +80,7 @@ Serial console configuration #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ -#if (TEXT_BASE == 0xFF000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low */ #define CONFIG_SYS_LOWBOOT 1 #endif /* RAMBOOT will be defined automatically in memory section */ @@ -222,7 +231,7 @@ RTC configuration CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 85152d1..afdd69c 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -40,6 +40,9 @@ #define CONFIG_440EP 1 /* Specific PPC440EP support */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -443,14 +446,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index f073fcd..37a22a7 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -49,6 +49,8 @@ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ +#define CONFIG_SYS_TEXT_BASE 0xF0000000 + /* Used for silent command in environment */ #define CONFIG_SYS_DEVICE_NULLDEV #define CONFIG_SILENT_CONSOLE @@ -271,7 +273,7 @@ #define CONFIG_FDT_FIXUP_PARTITIONS #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of monitor */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* 512 kB for monitor */ #ifdef CONFIG_FSL_DIU_FB #define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* for malloc */ @@ -432,14 +434,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h index 80a0bc6..28dfe3b 100644 --- a/include/configs/pf5200.h +++ b/include/configs/pf5200.h @@ -44,10 +44,11 @@ #define CONFIG_PF5200 1 /* ... on PF5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -122,11 +123,11 @@ #define CONFIG_CMD_PCI -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -226,7 +227,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index 04779c4..e7584c3 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -49,6 +49,7 @@ #undef CONFIG_ALTIVEC #define CONFIG_BUS_CLK 66000000 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* * Monitor configuration @@ -240,7 +241,7 @@ * CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x20000 @@ -414,16 +415,4 @@ #define CONFIG_SYS_BOARD_ASM_INIT - -/* - * Boot flags - * - * BOOTFLAG_COLD - Indicates a power-on boot - * BOOTFLAG_WARM - Indicates a software reset - */ - -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 - - #endif /* __CONFIG_H */ diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h index f387601..7018a8c 100644 --- a/include/configs/ppmc8260.h +++ b/include/configs/ppmc8260.h @@ -34,6 +34,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0xfe000000 + /***************************************************************************** * * These settings must match the way _your_ board is set up @@ -76,7 +78,7 @@ #define CONFIG_SYS_PPMC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ppmc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ppmc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -1004,13 +1006,4 @@ ORxG_TRLX |\ ORxG_EHTR) #endif /* CONFIG_SYS_LED_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/purple.h b/include/configs/purple.h index 2573aa1..25d8ebe 100644 --- a/include/configs/purple.h +++ b/include/configs/purple.h @@ -134,7 +134,7 @@ #define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index cbacdf9..fb697d5 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -136,7 +136,7 @@ */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/qong.h b/include/configs/qong.h index 7f284ef..426d90d 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -66,8 +66,11 @@ #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* FPGA */ +#define CONFIG_FPGA #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) +#define CONFIG_FPGA_LATTICE +#define CONFIG_FPGA_COUNT 1 #ifdef CONFIG_QONG_FPGA /* Ethernet */ @@ -86,6 +89,23 @@ #define CONFIG_BMP_16BPP #define CONFIG_DISPLAY_COM57H5M10XRC +/* USB */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_MXC +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORT 2 +#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT) +#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* CONFIG_CMD_USB */ + /* * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the * initial TFTP transfer, should the user wish one, significantly. @@ -105,25 +125,16 @@ #include <config_cmd_default.h> #define CONFIG_CMD_CACHE -#define CONFIG_CMD_PING +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR #define CONFIG_CMD_SPI -#define CONFIG_CMD_DATE -#define BOARD_LATE_INIT -/* - * You can compile in a MAC address and your custom net settings by using - * the following syntax. - * - * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx - * #define CONFIG_SERVERIP <server ip> - * #define CONFIG_IPADDR <board ip> - * #define CONFIG_GATEWAYIP <gateway ip> - * #define CONFIG_NETMASK <your netmask> - */ +#define BOARD_LATE_INIT #define CONFIG_BOOTDELAY 5 @@ -145,7 +156,7 @@ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "addmisc=setenv bootargs ${bootargs}\0" \ "uboot_addr=A0000000\0" \ - "kernel_addr=A00A0000\0" \ + "kernel_addr=A00C0000\0" \ "ramdisk_addr=A0300000\0" \ "u-boot=qong/u-boot.bin\0" \ "kernel_addr_r=80800000\0" \ @@ -247,7 +258,7 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) @@ -277,10 +288,14 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_LZO #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDIDS_DEFAULT "nor0=physmap-flash.0," \ + "nand0=gen_nand" #define MTDPARTS_DEFAULT \ - "mtdparts=physmap-flash.0:384k(U-Boot),128k(env1)," \ - "128k(env2),2432k(kernel),13m(ramdisk),-(user)" + "mtdparts=physmap-flash.0:" \ + "512k(U-Boot),128k(env1),128k(env2)," \ + "2304k(kernel),13m(ramdisk),-(user);" \ + "gen_nand:" \ + "128m(nand)" /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 0764cc8..f847f9c 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -175,7 +177,7 @@ #define CONFIG_SYS_FLASH_BASE 0xFFC00000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE) /* * For booting Linux, the board info and command line data @@ -207,7 +209,7 @@ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ /* the environment is located before u-boot */ -#define CONFIG_ENV_ADDR (TEXT_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/quantum.h b/include/configs/quantum.h index e440e93..2440eee 100644 --- a/include/configs/quantum.h +++ b/include/configs/quantum.h @@ -39,6 +39,8 @@ #define CONFIG_RPXLITE 1 /* QUANTUM is the RPXlite clone */ #define CONFIG_RMU 1 /* The QUNATUM is based on our RMU */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -405,14 +407,6 @@ MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * BCSRx * * Board Status and Control Registers diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 955f3ff..bc518db 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) /* Address of u-boot image in Flash */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 3afe93a..41376da 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -73,7 +73,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) /* Flash board support */ #define CONFIG_SYS_FLASH_BASE (0xA0000000) diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 3c1e882..a7d5dac 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -33,6 +33,8 @@ #define CONFIG_460SX 1 /* ... PPC460 family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ +#define CONFIG_SYS_TEXT_BASE 0xfffb0000 + /*----------------------------------------------------------------------- * Include common defines/options for all AMCC boards *----------------------------------------------------------------------*/ diff --git a/include/configs/rmu.h b/include/configs/rmu.h index 026826b..5e6bc27 100644 --- a/include/configs/rmu.h +++ b/include/configs/rmu.h @@ -39,6 +39,8 @@ #define CONFIG_RPXLITE 1 /* RMU is the RPXlite clone */ #define CONFIG_RMU 1 +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -169,7 +171,7 @@ #else #define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ #endif -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /* @@ -189,7 +191,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR ((TEXT_BASE) + 0x40000) +#define CONFIG_ENV_ADDR ((CONFIG_SYS_TEXT_BASE) + 0x40000) #define CONFIG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Used size for environment */ @@ -381,14 +383,6 @@ MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X) /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * BCSRx * * Board Status and Control Registers diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 8207844..b82ff37 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -39,6 +39,8 @@ #define CONFIG_RSD_PROTO 1 /* on a R&S Protocol Board */ #define CONFIG_CPM2 1 /* Has a CPM2 */ +#define CONFIG_SYS_TEXT_BASE 0xff000000 + #define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ /* @@ -419,12 +421,4 @@ #define CONFIG_SYS_OR5_PRELIM (P2SZ_TO_AM(PHYS_DPRAM_SHARC_SIZE) | \ ORxG_ACS_DIV4) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index b0198aa..d741716 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -35,6 +35,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ #undef CONFIG_LOGBUFFER /* External logbuffer support */ @@ -85,7 +87,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sacsng/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sacsng/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -1062,12 +1064,4 @@ ORxG_EHTR) #endif /* (defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)) */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 187002c..3de2a9e 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -36,6 +36,8 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_SBC405 1 /* ...on a WR SBC405 board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ @@ -274,12 +276,4 @@ #define SPD_EEPROM_ADDRESS 0x50 #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8240.h b/include/configs/sbc8240.h index 1cc2920..0934a00 100644 --- a/include/configs/sbc8240.h +++ b/include/configs/sbc8240.h @@ -43,6 +43,8 @@ #define CONFIG_MPC8240 1 #define CONFIG_WRSBC8240 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } @@ -175,7 +177,7 @@ typedef unsigned int led_id_t; #define CONFIG_SYS_EUMB_ADDR 0xFCE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -353,14 +355,6 @@ typedef unsigned int led_id_t; # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index 3fa80a8..54a1a36 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -35,6 +35,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Enable debug prints */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ @@ -84,7 +86,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/sbc8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -1076,13 +1078,4 @@ ORxG_TRLX |\ ORxG_EHTR) #endif /* CONFIG_SYS_LED_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b8f4b6e..ee2292c 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -32,21 +32,6 @@ #define __CONFIG_H /* - * Top level Makefile configuration choices - */ -#ifdef CONFIG_MK_PCI -#define CONFIG_PCI -#endif - -#ifdef CONFIG_MK_66 -#define PCI_66M -#endif - -#ifdef CONFIG_MK_33 -#define PCI_33M -#endif - -/* * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ @@ -55,6 +40,8 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFF800000 + /* Don't enable PCI2 on sbc834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ @@ -64,14 +51,14 @@ * physically empty. The board will automatically (i.e w/o jumpers) * clock down to 33MHz if you insert a 33MHz PCI card. */ -#ifdef PCI_33M +#ifdef CONFIG_PCI_33M #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ #else /* 66M */ #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #endif #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_33M +#ifdef CONFIG_PCI_33M #define CONFIG_SYS_CLK_FREQ 33000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1 #else /* 66M */ @@ -172,7 +159,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -612,14 +599,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 8d047de..0ddd20d 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -32,20 +32,19 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_PCI -#define CONFIG_PCI +#ifdef CONFIG_PCI #define CONFIG_PCI1 #endif -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_SYS_CLK_DIV 1 #endif -#ifdef CONFIG_MK_33 +#ifdef CONFIG_33 #define CONFIG_SYS_CLK_DIV 2 #endif -#ifdef CONFIG_MK_PCIE +#ifdef CONFIG_PCIE #define CONFIG_PCIE1 #endif @@ -58,6 +57,10 @@ #define CONFIG_MPC8548 1 /* MPC8548 specific */ #define CONFIG_SBC8548 1 /* SBC8548 board specific */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfffa0000 +#endif + #undef CONFIG_RIO #ifdef CONFIG_PCI @@ -206,7 +209,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI @@ -328,12 +331,12 @@ /* * For soldered on flash, (128kB/sector) we use 2 sectors for u-boot and - * one for env+bootpg (TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM + * one for env+bootpg (CONFIG_SYS_TEXT_BASE=0xfffa_0000, 384kB total). For SODIMM * flash (512kB/sector) we use 1 sector for u-boot, and one for env+bootpg - * (TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right + * (CONFIG_SYS_TEXT_BASE=0xfff0_0000, 1MB total). This dynamically sets the right * thing for MONITOR_LEN in both cases. */ -#define CONFIG_SYS_MONITOR_LEN (~TEXT_BASE + 1) +#define CONFIG_SYS_MONITOR_LEN (~CONFIG_SYS_TEXT_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ /* Serial Port */ @@ -451,10 +454,10 @@ */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE 0x2000 -#if TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */ +#if CONFIG_SYS_TEXT_BASE == 0xfff00000 /* Boot from 64MB SODIMM */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x80000) #define CONFIG_ENV_SECT_SIZE 0x80000 /* 512K(one sector) for env */ -#elif TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */ +#elif CONFIG_SYS_TEXT_BASE == 0xfffa0000 /* Boot from 8MB soldered flash */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000) #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ #else @@ -516,14 +519,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ @@ -563,11 +558,11 @@ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ - "erase " MK_STR(TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ - "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ + "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \ + "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=uRamdisk\0" \ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 6352278..cd9652c 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -34,7 +34,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_66 +#ifdef CONFIG_66 #define CONFIG_PCI_66 #endif @@ -46,6 +46,8 @@ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ +#define CONFIG_SYS_TEXT_BASE 0xfffc0000 + #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_SBC8560 1 /* configuration for SBC8560 board */ @@ -327,7 +329,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if 0 /* XXX This doesn't work and I don't want to fix it */ @@ -422,14 +424,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index a7831c0..9e2aef4 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -43,6 +43,8 @@ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #ifdef RUN_DIAG #define CONFIG_SYS_DIAG_ADDR 0xff800000 #endif @@ -64,6 +66,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/ @@ -229,7 +232,7 @@ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ #define CONFIG_FLASH_CFI_DRIVER @@ -476,7 +479,7 @@ /* Map the last 1M of flash where we're running from reset */ #define CONFIG_SYS_DBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT6U_EARLY (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT6U_EARLY (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT6L_EARLY (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT6U_EARLY CONFIG_SYS_DBAT6U_EARLY @@ -540,14 +543,6 @@ #define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 278b60e..3e6abf3 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -62,6 +62,8 @@ #define CONFIG_4xx 1 #define CONFIG_405GP 1 +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */ @@ -377,7 +379,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFFE00000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ #define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */ @@ -484,14 +486,6 @@ /* Initial value of the stack pointern in internal SRAM */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* ################################################################################### */ /* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ /* They are currently undefined cause they are initiaized in board/solidcard3/init.S */ diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 988d41f..412deea 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -42,6 +42,10 @@ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#endif + /* * Include common defines/options for all AMCC eval boards */ @@ -53,7 +57,7 @@ /* * Define this if you want support for video console with radeon 9200 pci card - * Also set TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case + * Also set CONFIG_SYS_TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case */ #undef CONFIG_VIDEO diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 624fe04..451b534 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -51,7 +51,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ 12000000 -#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU #endif diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 595d174..bfd09a0 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -210,7 +210,7 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ #define CONFIG_IDENT_STRING " for SMDKC100" -#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU #endif diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 88be349..0bbad16 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -45,6 +45,8 @@ #define CONFIG_MPC8544 1 #define CONFIG_SOCRATES 1 +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #define CONFIG_PCI #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -159,7 +161,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ @@ -388,14 +390,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/sorcery.h b/include/configs/sorcery.h index 5db1379..75b8e60 100644 --- a/include/configs/sorcery.h +++ b/include/configs/sorcery.h @@ -31,6 +31,8 @@ #define CONFIG_MPC8220 1 #define CONFIG_SORCERY 1 /* Sorcery board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 60Mhz, read Hid1 for the CPU multiplier to @@ -38,9 +40,6 @@ #define CONFIG_SYS_MPC8220_CLKIN 60000000 /* ... running at 60MHz */ #define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 8 /* VCO multiplier can't be read from any register */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* * Serial console configuration */ @@ -234,7 +233,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h index 1fe2a04..4d18747 100644 --- a/include/configs/spc1920.h +++ b/include/configs/spc1920.h @@ -26,6 +26,8 @@ #define CONFIG_SPC1920 1 /* SPC1920 board */ #define CONFIG_MPC885 1 /* MPC885 CPU */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_8xx_CONS_SMC1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -161,7 +163,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for monitor */ #ifdef CONFIG_BZIP2 @@ -422,12 +424,4 @@ #define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h index 0248aba..37bdebb 100644 --- a/include/configs/spear3xx.h +++ b/include/configs/spear3xx.h @@ -28,13 +28,13 @@ * High Level Configuration Options * (easy to change) */ -#if defined(CONFIG_MK_spear300) +#if defined(CONFIG_spear300) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR300 1 -#elif defined(CONFIG_MK_spear310) +#elif defined(CONFIG_spear310) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR310 1 -#elif defined(CONFIG_MK_spear320) +#elif defined(CONFIG_spear320) #define CONFIG_SPEAR3XX 1 #define CONFIG_SPEAR320 1 #endif diff --git a/include/configs/spieval.h b/include/configs/spieval.h index d377e19..b5ac168 100644 --- a/include/configs/spieval.h +++ b/include/configs/spieval.h @@ -41,9 +41,6 @@ #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -176,7 +173,7 @@ #define CONFIG_TIMESTAMP /* display image timestamps */ -#if (TEXT_BASE == 0xFC000000) /* Boot low */ +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */ # define CONFIG_SYS_LOWBOOT 1 #endif @@ -283,7 +280,7 @@ /* * Flash configuration */ -#define CONFIG_SYS_FLASH_BASE TEXT_BASE /* 0xFC000000 */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */ /* use CFI flash driver if no module variant is spezified */ #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ @@ -335,7 +332,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 891d2bf..479fbab 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -43,6 +43,8 @@ #define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/ #define CONFIG_MPC8560 1 +#define CONFIG_SYS_TEXT_BASE 0xfff80000 + #undef CONFIG_PCI /* pci ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ @@ -97,7 +99,7 @@ #define CONFIG_SYS_OR1_PRELIM 0xffff0ff7 /* 64K is enough */ #define CONFIG_SYS_LBC_LCLDEVS_BASE 0xfc000000 /* Base of localbus devices */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -364,14 +366,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 911c906..6ea5807 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -43,6 +43,8 @@ #define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/ #define CONFIG_MPC8560 1 +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_PCI /* PCI ethernet support */ #define CONFIG_TSEC_ENET /* tsec ethernet support*/ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ @@ -109,7 +111,7 @@ #define CONFIG_SYS_BR1_PRELIM 0xFB001801 /* 32-bit port */ #define CONFIG_SYS_OR1_PRELIM 0xFFFF0FF7 /* 64K is enough */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -396,14 +398,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 5854366..b9739ff 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -38,6 +38,8 @@ #define CONFIG_MPC875 1 /* This is a MPC875 CPU */ #define CONFIG_STXXTC 1 /* ...on a STx XTc board */ +#define CONFIG_SYS_TEXT_BASE 0x40F00000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE @@ -430,14 +432,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_LAST_STAGE_INIT /* needed to reset the damn phys */ /****************************************************************/ diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 425f472..219b85b 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -31,6 +31,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Custom configuration */ /* SC823,SC850,SC860SAR, FEL8xx-AT(823/850/860) */ /* SC85T,SC860T, FEL8xx-AT(855T/860T) */ @@ -465,13 +467,4 @@ #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM #define CONFIG_SYS_DOC_BASE 0x80000000 - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 39ca793..d00e64e 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -31,6 +31,10 @@ #define CONFIG_440 1 #define CONFIG_4xx 1 /* ... PPC4xx family */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#endif + #define CONFIG_HOSTNAME t3corp /* diff --git a/include/configs/taihu.h b/include/configs/taihu.h index 7e660ee..6e9dbc5 100644 --- a/include/configs/taihu.h +++ b/include/configs/taihu.h @@ -32,6 +32,8 @@ #define CONFIG_4xx 1 /* member of PPC4xx family */ #define CONFIG_TAIHU 1 /* on a taihu board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/taishan.h b/include/configs/taishan.h index faf9e20..12f35ae 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h index 9285c9d..011a683 100644 --- a/include/configs/tb0229.h +++ b/include/configs/tb0229.h @@ -142,7 +142,7 @@ #define PHYS_FLASH_1 0xbfc00000 /* Flash Bank #1 */ /* The following #defines are needed to get flash environment right */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h index 454e9b2..f423a0e 100644 --- a/include/configs/tnetv107x_evm.h +++ b/include/configs/tnetv107x_evm.h @@ -33,7 +33,7 @@ #define CONFIG_TNETV107X #define CONFIG_TNETV107X_EVM #define CONFIG_ARCH_CPU_INIT -#define CONFIG_SYS_UBOOT_BASE TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_DISABLE_TCM #define CONFIG_PERIPORT_REMAP #define CONFIG_PERIPORT_BASE 0x2000000 diff --git a/include/configs/uc100.h b/include/configs/uc100.h index 23f4c82..5392fb5 100644 --- a/include/configs/uc100.h +++ b/include/configs/uc100.h @@ -40,6 +40,8 @@ #define CONFIG_UC100 1 /* ...on a UC100 module */ +#define CONFIG_SYS_TEXT_BASE 0x40700000 + #define MPC8XX_FACT 4 /* Multiply by 4 */ #define MPC8XX_XIN 25000000 /* 25.0 MHz in */ #define CONFIG_8xx_GCLK_FREQ (MPC8XX_FACT * MPC8XX_XIN) @@ -499,14 +501,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_FEC_ENET 1 /* use FEC ethernet */ #define FEC_ENET #define CONFIG_MII diff --git a/include/configs/uc101.h b/include/configs/uc101.h index 1972261..483534c 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -32,6 +32,10 @@ #define CONFIG_UC101 1 /* UC101 board */ #define CONFIG_HOSTNAME uc101 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#endif + #include "manroland/common.h" #include "manroland/mpc5200-common.h" diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index 1a47aad..c027f46 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -49,6 +49,9 @@ #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_UTX8245 1 + +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define DEBUG 1 #define CONFIG_IDENT_STRING " [UTX5] " @@ -176,7 +179,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}" #define CONFIG_SYS_EUMB_ADDR 0xFC000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -425,13 +428,4 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}" # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/v37.h b/include/configs/v37.h index 7f1670e..c34b6e8 100644 --- a/include/configs/v37.h +++ b/include/configs/v37.h @@ -36,6 +36,8 @@ #define CONFIG_MPC823 1 /* This is a MPC823 CPU */ #define CONFIG_V37 1 /* ...on a Marel V37 board */ +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_LCD #define CONFIG_SHARP_LQ084V1DG21 #undef CONFIG_LCD_LOGO @@ -391,12 +393,4 @@ MAMR_AMA_TYPE_2 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A12 | \ MAMR_GPL_A4DIS | MAMR_RLFA_4X | MAMR_WLFA_3X | MAMR_TLFA_16X) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */ diff --git a/include/configs/v38b.h b/include/configs/v38b.h index 600ccfb..96ffc6a 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -29,6 +29,9 @@ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_V38B 1 /* ...on V38B board */ + +#define CONFIG_SYS_TEXT_BASE 0xFF000000 + #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ...running at 33.000000MHz */ #define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */ @@ -44,9 +47,6 @@ #define CONFIG_SYS_XLB_PIPELINING 1 /* gives better performance */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* @@ -233,7 +233,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif diff --git a/include/configs/vct.h b/include/configs/vct.h index 1b894a6..4894969 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -45,7 +45,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) #define CONFIG_STACKSIZE (256 << 10) #define CONFIG_SYS_MALLOC_LEN (1 << 20) diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 45976db..283b92c 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -38,6 +38,10 @@ #define CONFIG_MPC8313 1 #define CONFIG_VE8313 1 +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfe000000 +#endif + #define CONFIG_PCI 1 #define CONFIG_FSL_ELBC 1 @@ -159,7 +163,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -475,14 +479,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_NETDEV eth0 #define CONFIG_HOSTNAME ve8313 diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 7046e67..56fb5f7 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -37,6 +37,8 @@ #define CONFIG_VIRTLAB2 1 /* ...on a virtlab2 module */ #define CONFIG_TQM8xxL 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #define CONFIG_SYS_SMC_RXBUFLEN 128 #define CONFIG_SYS_MAXIDLE 10 @@ -475,15 +477,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /* Map peripheral control registers on CS4 */ #define CONFIG_SYS_PERIPHERAL_BASE 0xA0000000 #define CONFIG_SYS_PERIPHERAL_OR_AM 0xFFFF8000 /* 32 kB address mask */ diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 44a6f8b..a2ecbe5 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -29,8 +29,8 @@ #define CONFIG_MX51 /* in a mx51 */ #define CONFIG_L2_OFF -#define CONFIG_MX51_HCLK_FREQ 24000000 -#define CONFIG_MX51_CLK32 32768 +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index f2fb592..2c95c12 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -2,7 +2,7 @@ * esd vme8349 U-Boot configuration file * Copyright (c) 2008, 2009 esd gmbh Hannover Germany * - * (C) Copyright 2006 + * (C) Copyright 2006-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * reinhard.arlt@esd-electronics.de @@ -37,7 +37,7 @@ /* * Top level Makefile configuration choices */ -#ifdef CONFIG_MK_caddy2 +#ifdef CONFIG_CADDY2 #define VME_CADDY2 #endif @@ -50,21 +50,23 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_VME8349 1 /* ESD VME8349 board specific */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_MISC_INIT_R #define CONFIG_PCI /* Don't enable PCI2 on vme834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ -#define PCI_66M -#ifdef PCI_66M +#define CONFIG_PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #else #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ #endif #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_66M +#ifdef CONFIG_PCI_66M #define CONFIG_SYS_CLK_FREQ 66000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 #else @@ -149,7 +151,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -538,14 +540,6 @@ #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/configs/walnut.h b/include/configs/walnut.h index 3be489d..72ac4e3 100644 --- a/include/configs/walnut.h +++ b/include/configs/walnut.h @@ -36,7 +36,9 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_WALNUT 1 /* ...on a WALNUT board */ - /* ...and on a SYCAMORE board */ + /* ...or on a SYCAMORE board */ + +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 /* * Include common defines/options for all AMCC eval boards diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index 6efe342..b4a9675 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -28,7 +28,7 @@ /*Mem Map*/ #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 * 1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index ed0560a..0d450f5 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -42,6 +42,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFF80000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/yucca.h b/include/configs/yucca.h index 4e64eec..8d5d45f 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -45,6 +45,8 @@ #define EXTCLK_50 50000000 #define EXTCLK_83 83333333 +#define CONFIG_SYS_TEXT_BASE 0xfffb0000 + /* * Include common defines/options for all AMCC eval boards */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 06d4526..5ddec84 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -34,6 +34,8 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_405EP 1 /* Specifc 405EP support*/ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ @@ -302,14 +304,6 @@ #define CONFIG_SYS_TIME_POST 5000 #define CONFIG_SYS_TIME_FACTORY_RESET 10000 -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ diff --git a/include/fat.h b/include/fat.h index de48afd..afb2116 100644 --- a/include/fat.h +++ b/include/fat.h @@ -30,6 +30,10 @@ #include <asm/byteorder.h> #define CONFIG_SUPPORT_VFAT +/* Maximum Long File Name length supported here is 128 UTF-16 code units */ +#define VFAT_MAXLEN_BYTES 256 /* Maximum LFN buffer in bytes */ +#define VFAT_MAXSEQ 9 /* Up to 9 of 13 2-byte UTF-16 entries */ +#define LINEAR_PREFETCH_SIZE (SECTOR_SIZE*2) /* Prefetch buffer size */ #define SECTOR_SIZE FS_BLOCK_SIZE diff --git a/include/fdt_support.h b/include/fdt_support.h index fd94929..ce6817b 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -48,6 +48,7 @@ void do_fixup_by_compat(void *fdt, const char *compat, void do_fixup_by_compat_u32(void *fdt, const char *compat, const char *prop, u32 val, int create); int fdt_fixup_memory(void *blob, u64 start, u64 size); +int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks); void fdt_fixup_ethernet(void *fdt); int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, const void *val, int len, int create); @@ -87,6 +88,7 @@ u64 fdt_translate_address(void *blob, int node_offset, const u32 *in_addr); int fdt_node_offset_by_compat_reg(void *blob, const char *compat, phys_addr_t compat_off); int fdt_alloc_phandle(void *blob); +int fdt_add_edid(void *blob, const char *compat, unsigned char *buf); #endif /* ifdef CONFIG_OF_LIBFDT */ #endif /* ifndef __FDT_SUPPORT_H */ diff --git a/include/fpga.h b/include/fpga.h index 84d7b9f..ac24f2b 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -61,6 +61,7 @@ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ fpga_xilinx, /* Xilinx Family) */ fpga_altera, /* unimplemented */ + fpga_lattice, /* Lattice family */ fpga_undefined /* invalid range check value */ } fpga_type; /* end, typedef fpga_type */ diff --git a/include/image.h b/include/image.h index 18a9f0e..49d6280 100644 --- a/include/image.h +++ b/include/image.h @@ -340,14 +340,17 @@ int boot_relocate_fdt (struct lmb *lmb, ulong bootmap_base, char **of_flat_tree, ulong *of_size); #endif -#if defined(CONFIG_PPC) || defined(CONFIG_M68K) +#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len, ulong *initrd_start, ulong *initrd_end); - +#endif /* CONFIG_SYS_BOOT_RAMDISK_HIGH */ +#ifdef CONFIG_SYS_BOOT_GET_CMDLINE int boot_get_cmdline (struct lmb *lmb, ulong *cmd_start, ulong *cmd_end, ulong bootmap_base); +#endif /* CONFIG_SYS_BOOT_GET_CMDLINE */ +#ifdef CONFIG_SYS_BOOT_GET_KBD int boot_get_kbd (struct lmb *lmb, bd_t **kbd, ulong bootmap_base); -#endif /* CONFIG_PPC || CONFIG_M68K */ +#endif /* CONFIG_SYS_BOOT_GET_KBD */ #endif /* !USE_HOSTCC */ /*******************************************************************/ diff --git a/include/lattice.h b/include/lattice.h new file mode 100755 index 0000000..33d2ac3 --- /dev/null +++ b/include/lattice.h @@ -0,0 +1,319 @@ +/* + * Porting to U-Boot: + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * Lattice's ispVME Embedded Tool to load Lattice's FPGA: + * + * Lattice Semiconductor Corp. Copyright 2009 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _VME_OPCODE_H +#define _VME_OPCODE_H + +#define VME_VERSION_NUMBER "12.1" + +/* Maximum declarations. */ + +#define VMEHEXMAX 60000L /* The hex file is split 60K per file. */ +#define SCANMAX 64000L /* The maximum SDR/SIR burst. */ + +/* + * + * Supported JTAG state transitions. + * + */ + +#define RESET 0x00 +#define IDLE 0x01 +#define IRPAUSE 0x02 +#define DRPAUSE 0x03 +#define SHIFTIR 0x04 +#define SHIFTDR 0x05 +/* 11/15/05 Nguyen changed to support DRCAPTURE*/ +#define DRCAPTURE 0x06 + +/* + * Flow control register bit definitions. A set bit indicates + * that the register currently exhibits the corresponding mode. + */ + +#define INTEL_PRGM 0x0001 /* Intelligent programming is in effect. */ +#define CASCADE 0x0002 /* Currently splitting large SDR. */ +#define REPEATLOOP 0x0008 /* Currently executing a repeat loop. */ +#define SHIFTRIGHT 0x0080 /* The next data stream needs a right shift. */ +#define SHIFTLEFT 0x0100 /* The next data stream needs a left shift. */ +#define VERIFYUES 0x0200 /* Continue if fail is in effect. */ + +/* + * DataType register bit definitions. A set bit indicates + * that the register currently holds the corresponding type of data. + */ + +#define EXPRESS 0x0001 /* Simultaneous program and verify. */ +#define SIR_DATA 0x0002 /* SIR is the active SVF command. */ +#define SDR_DATA 0x0004 /* SDR is the active SVF command. */ +#define COMPRESS 0x0008 /* Data is compressed. */ +#define TDI_DATA 0x0010 /* TDI data is present. */ +#define TDO_DATA 0x0020 /* TDO data is present. */ +#define MASK_DATA 0x0040 /* MASK data is present. */ +#define HEAP_IN 0x0080 /* Data is from the heap. */ +#define LHEAP_IN 0x0200 /* Data is from intel data buffer. */ +#define VARIABLE 0x0400 /* Data is from a declared variable. */ +#define CRC_DATA 0x0800 /* CRC data is pressent. */ +#define CMASK_DATA 0x1000 /* CMASK data is pressent. */ +#define RMASK_DATA 0x2000 /* RMASK data is pressent. */ +#define READ_DATA 0x4000 /* READ data is pressent. */ +#define DMASK_DATA 0x8000 /* DMASK data is pressent. */ + +/* + * + * Pin opcodes. + * + */ + +#define signalENABLE 0x1C /* ispENABLE pin. */ +#define signalTMS 0x1D /* TMS pin. */ +#define signalTCK 0x1E /* TCK pin. */ +#define signalTDI 0x1F /* TDI pin. */ +#define signalTRST 0x20 /* TRST pin. */ + +/* + * + * Supported vendors. + * + */ + +#define VENDOR 0x56 +#define LATTICE 0x01 +#define ALTERA 0x02 +#define XILINX 0x03 + +/* + * Opcode definitions. + * + * Note: opcodes must be unique. + */ + +#define ENDDATA 0x00 /* The end of the current SDR data stream. */ +#define RUNTEST 0x01 /* The duration to stay at the stable state. */ +#define ENDDR 0x02 /* The stable state after SDR. */ +#define ENDIR 0x03 /* The stable state after SIR. */ +#define ENDSTATE 0x04 /* The stable state after RUNTEST. */ +#define TRST 0x05 /* Assert the TRST pin. */ +#define HIR 0x06 /* + * The sum of the IR bits of the + * leading devices. + */ +#define TIR 0x07 /* + * The sum of the IR bits of the trailing + * devices. + */ +#define HDR 0x08 /* The number of leading devices. */ +#define TDR 0x09 /* The number of trailing devices. */ +#define ispEN 0x0A /* Assert the ispEN pin. */ +#define FREQUENCY 0x0B /* + * The maximum clock rate to run the JTAG state + * machine. + */ +#define STATE 0x10 /* Move to the next stable state. */ +#define SIR 0x11 /* The instruction stream follows. */ +#define SDR 0x12 /* The data stream follows. */ +#define TDI 0x13 /* The following data stream feeds into + the device. */ +#define TDO 0x14 /* + * The following data stream is compared against + * the device. + */ +#define MASK 0x15 /* The following data stream is used as mask. */ +#define XSDR 0x16 /* + * The following data stream is for simultaneous + * program and verify. + */ +#define XTDI 0x17 /* The following data stream is for shift in + * only. It must be stored for the next + * XSDR. + */ +#define XTDO 0x18 /* + * There is not data stream. The data stream + * was stored from the previous XTDI. + */ +#define MEM 0x19 /* + * The maximum memory needed to allocate in + * order hold one row of data. + */ +#define WAIT 0x1A /* The duration of delay to observe. */ +#define TCK 0x1B /* The number of TCK pulses. */ +#define SHR 0x23 /* + * Set the flow control register for + * right shift + */ +#define SHL 0x24 /* + * Set the flow control register for left shift. + */ +#define HEAP 0x32 /* The memory size needed to hold one loop. */ +#define REPEAT 0x33 /* The beginning of the loop. */ +#define LEFTPAREN 0x35 /* The beginning of data following the loop. */ +#define VAR 0x55 /* Plac holder for loop data. */ +#define SEC 0x1C /* + * The delay time in seconds that must be + * observed. + */ +#define SMASK 0x1D /* The mask for TDI data. */ +#define MAX_WAIT 0x1E /* The absolute maximum wait time. */ +#define ON 0x1F /* Assert the targeted pin. */ +#define OFF 0x20 /* Dis-assert the targeted pin. */ +#define SETFLOW 0x30 /* Change the flow control register. */ +#define RESETFLOW 0x31 /* Clear the flow control register. */ + +#define CRC 0x47 /* + * The following data stream is used for CRC + * calculation. + */ +#define CMASK 0x48 /* + * The following data stream is used as mask + * for CRC calculation. + */ +#define RMASK 0x49 /* + * The following data stream is used as mask + * for read and save. + */ +#define READ 0x50 /* + * The following data stream is used for read + * and save. + */ +#define ENDLOOP 0x59 /* The end of the repeat loop. */ +#define SECUREHEAP 0x60 /* Used to secure the HEAP opcode. */ +#define VUES 0x61 /* Support continue if fail. */ +#define DMASK 0x62 /* + * The following data stream is used for dynamic + * I/O. + */ +#define COMMENT 0x63 /* Support SVF comments in the VME file. */ +#define HEADER 0x64 /* Support header in VME file. */ +#define FILE_CRC 0x65 /* Support crc-protected VME file. */ +#define LCOUNT 0x66 /* Support intelligent programming. */ +#define LDELAY 0x67 /* Support intelligent programming. */ +#define LSDR 0x68 /* Support intelligent programming. */ +#define LHEAP 0x69 /* + * Memory needed to hold intelligent data + * buffer + */ +#define CONTINUE 0x70 /* Allow continuation. */ +#define LVDS 0x71 /* Support LVDS. */ +#define ENDVME 0x7F /* End of the VME file. */ +#define ENDFILE 0xFF /* End of file. */ + +/* + * + * ispVM Embedded Return Codes. + * + */ + +#define VME_VERIFICATION_FAILURE -1 +#define VME_FILE_READ_FAILURE -2 +#define VME_VERSION_FAILURE -3 +#define VME_INVALID_FILE -4 +#define VME_ARGUMENT_FAILURE -5 +#define VME_CRC_FAILURE -6 + +#define g_ucPinTDI 0x01 +#define g_ucPinTCK 0x02 +#define g_ucPinTMS 0x04 +#define g_ucPinENABLE 0x08 +#define g_ucPinTRST 0x10 + +/* + * + * Type definitions. + * + */ + +/* Support LVDS */ +typedef struct { + unsigned short usPositiveIndex; + unsigned short usNegativeIndex; + unsigned char ucUpdate; +} LVDSPair; + +typedef enum { + min_lattice_iface_type, /* insert all new types after this */ + lattice_jtag_mode, /* jtag/tap */ + max_lattice_iface_type /* insert all new types before this */ +} Lattice_iface; + +typedef enum { + min_lattice_type, + Lattice_XP2, /* Lattice XP2 Family */ + max_lattice_type /* insert all new types before this */ +} Lattice_Family; + +typedef struct { + Lattice_Family family; /* part type */ + Lattice_iface iface; /* interface type */ + size_t size; /* bytes of data part can accept */ + void *iface_fns; /* interface function table */ + void *base; /* base interface address */ + int cookie; /* implementation specific cookie */ + char *desc; /* description string */ +} Lattice_desc; /* end, typedef Altera_desc */ + +/* Lattice Model Type */ +#define CONFIG_SYS_XP2 CONFIG_SYS_FPGA_DEV(0x1) + +/* Board specific implementation specific function types */ +typedef void (*Lattice_jtag_init)(void); +typedef void (*Lattice_jtag_set_tdi)(int v); +typedef void (*Lattice_jtag_set_tms)(int v); +typedef void (*Lattice_jtag_set_tck)(int v); +typedef int (*Lattice_jtag_get_tdo)(void); + +typedef struct { + Lattice_jtag_init jtag_init; + Lattice_jtag_set_tdi jtag_set_tdi; + Lattice_jtag_set_tms jtag_set_tms; + Lattice_jtag_set_tck jtag_set_tck; + Lattice_jtag_get_tdo jtag_get_tdo; +} lattice_board_specific_func; + +void writePort(unsigned char pins, unsigned char value); +unsigned char readPort(void); +void sclock(void); +void ispVMDelay(unsigned short int a_usMicroSecondDelay); +void calibration(void); + +int lattice_load(Lattice_desc *desc, void *buf, size_t bsize); +int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize); +int lattice_info(Lattice_desc *desc); + +void ispVMStart(void); +void ispVMEnd(void); +signed char ispVMCode(void); +void ispVMDelay(unsigned short int a_usMicroSecondDelay); +void ispVMCalculateCRC32(unsigned char a_ucData); +unsigned char GetByte(void); +void writePort(unsigned char pins, unsigned char value); +unsigned char readPort(void); +void sclock(void); +#endif + diff --git a/include/led-display.h b/include/led-display.h new file mode 100644 index 0000000..41c3744 --- /dev/null +++ b/include/led-display.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2005-2010 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _led_display_h_ +#define _led_display_h_ + +/* Display Commands */ +#define DISPLAY_CLEAR 0x1 /* Clear the display */ +#define DISPLAY_HOME 0x2 /* Set cursor at home position */ +#define DISPLAY_MARK 0x4 /* Enable the decimal point led, if implemented */ + +void display_set(int cmd); +int display_putc(char c); +#endif diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 16556c4..3b18d7d 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -208,10 +208,6 @@ struct mtd_info { int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); - /* Power Management functions */ - int (*suspend) (struct mtd_info *mtd); - void (*resume) (struct mtd_info *mtd); - /* Bad block management functions */ int (*block_isbad) (struct mtd_info *mtd, loff_t ofs); int (*block_markbad) (struct mtd_info *mtd, loff_t ofs); @@ -259,7 +255,9 @@ extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); extern struct mtd_info *get_mtd_device_nm(const char *name); extern void put_mtd_device(struct mtd_info *mtd); - +extern void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, + const uint64_t length, uint64_t *len_incl_bad, + int *truncated); /* XXX U-BOOT XXX */ #if 0 struct mtd_notifier { diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index 68e174e..5465562 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -154,6 +154,7 @@ struct onenand_chip { /* * OneNAND Flash Manufacturer ID Codes */ +#define ONENAND_MFR_NUMONYX 0x20 #define ONENAND_MFR_SAMSUNG 0xec /** diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index 2d343c7..859d696 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -160,11 +160,12 @@ #define MPC5XXX_WU_GPIO_DATA_O (MPC5XXX_WU_GPIO + 0x000c) #define MPC5XXX_WU_GPIO_DATA_I (MPC5XXX_WU_GPIO + 0x0020) -/* GPIO pins */ +/* GPIO pins, for Rev.B chip */ #define GPIO_WKUP_7 0x80000000UL #define GPIO_PSC6_0 0x10000000UL #define GPIO_PSC3_9 0x04000000UL #define GPIO_PSC1_4 0x01000000UL +#define GPIO_PSC2_4 0x02000000UL #define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL #define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL diff --git a/include/nand.h b/include/nand.h index 8bdf419..a452411 100644 --- a/include/nand.h +++ b/include/nand.h @@ -98,13 +98,16 @@ struct nand_read_options { typedef struct nand_read_options nand_read_options_t; struct nand_erase_options { - ulong length; /* number of bytes to erase */ - ulong offset; /* first address in NAND to erase */ + loff_t length; /* number of bytes to erase */ + loff_t offset; /* first address in NAND to erase */ int quiet; /* don't display progress messages */ int jffs2; /* if true: format for jffs2 usage * (write appropriate cleanmarker blocks) */ int scrub; /* if true, really clean NAND by erasing * bad blocks (UNSAFE) */ + + /* Don't include skipped bad blocks in size to be erased */ + int spread; }; typedef struct nand_erase_options nand_erase_options_t; diff --git a/include/netdev.h b/include/netdev.h index 94eedfe..7f66419 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -54,6 +54,8 @@ int designware_initialize(u32 id, ulong base_addr, u32 phy_addr); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); +int enc28j60_initialize(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode); int ep93xx_eth_initialize(u8 dev_num, int base_addr); int ethoc_initialize(u8 dev_num, int base_addr); int eth_3com_initialize (bd_t * bis); @@ -85,9 +87,9 @@ int skge_initialize(bd_t *bis); int smc911x_initialize(u8 dev_num, int base_addr); int smc91111_initialize(u8 dev_num, int base_addr); int tsi108_eth_initialize(bd_t *bis); -int uec_initialize(int index); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); +int xilinx_emaclite_initialize (bd_t *bis, int base_addr); int sh_eth_initialize(bd_t *bis); int dm9000_initialize(bd_t *bis); diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index f48945a..08691a0 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -35,12 +35,17 @@ #define PORT_PTS_ULPI (2 << 30) #define PORT_PTS_SERIAL (3 << 30) #define PORT_PTS_PTW (1 << 28) +#define PORT_PFSC (1 << 24) /* Defined on Page 39-44 of the mpc5151 ERM */ +#define PORT_PTS_PHCD (1 << 23) +#define PORT_PP (1 << 12) +#define PORT_PR (1 << 8) /* USBMODE Register bits */ #define CM_IDLE (0 << 0) #define CM_RESERVED (1 << 0) #define CM_DEVICE (2 << 0) #define CM_HOST (3 << 0) +#define ES_BE (1 << 2) /* Big Endian Select, default is LE */ #define USBMODE_RESERVED_2 (0 << 2) #define SLOM (1 << 3) #define SDIS (1 << 4) @@ -70,7 +75,78 @@ #define PHY_CLK_VALID (1 << 17) #define FSL_SOC_USB_PORTSC2 0x188 + +/* OTG Status Control Register bits */ +#define FSL_SOC_USB_OTGSC 0x1a4 +#define CTRL_VBUS_DISCHARGE (0x1<<0) +#define CTRL_VBUS_CHARGE (0x1<<1) +#define CTRL_OTG_TERMINATION (0x1<<3) +#define CTRL_DATA_PULSING (0x1<<4) +#define CTRL_ID_PULL_EN (0x1<<5) +#define HA_DATA_PULSE (0x1<<6) +#define HA_BA (0x1<<7) +#define STS_USB_ID (0x1<<8) +#define STS_A_VBUS_VALID (0x1<<9) +#define STS_A_SESSION_VALID (0x1<<10) +#define STS_B_SESSION_VALID (0x1<<11) +#define STS_B_SESSION_END (0x1<<12) +#define STS_1MS_TOGGLE (0x1<<13) +#define STS_DATA_PULSING (0x1<<14) +#define INTSTS_USB_ID (0x1<<16) +#define INTSTS_A_VBUS_VALID (0x1<<17) +#define INTSTS_A_SESSION_VALID (0x1<<18) +#define INTSTS_B_SESSION_VALID (0x1<<19) +#define INTSTS_B_SESSION_END (0x1<<20) +#define INTSTS_1MS (0x1<<21) +#define INTSTS_DATA_PULSING (0x1<<22) +#define INTR_USB_ID_EN (0x1<<24) +#define INTR_A_VBUS_VALID_EN (0x1<<25) +#define INTR_A_SESSION_VALID_EN (0x1<<26) +#define INTR_B_SESSION_VALID_EN (0x1<<27) +#define INTR_B_SESSION_END_EN (0x1<<28) +#define INTR_1MS_TIMER_EN (0x1<<29) +#define INTR_DATA_PULSING_EN (0x1<<30) +#define INTSTS_MASK (0x00ff0000) + +/* USBCMD Bits of interest */ +#define EHCI_FSL_USBCMD_RST (1 << 1) +#define EHCI_FSL_USBCMD_RS (1 << 0) + +#define INTERRUPT_ENABLE_BITS_MASK \ + (INTR_USB_ID_EN | \ + INTR_1MS_TIMER_EN | \ + INTR_A_VBUS_VALID_EN | \ + INTR_A_SESSION_VALID_EN | \ + INTR_B_SESSION_VALID_EN | \ + INTR_B_SESSION_END_EN | \ + INTR_DATA_PULSING_EN) + +#define INTERRUPT_STATUS_BITS_MASK \ + (INTSTS_USB_ID | \ + INTR_1MS_TIMER_EN | \ + INTSTS_A_VBUS_VALID | \ + INTSTS_A_SESSION_VALID | \ + INTSTS_B_SESSION_VALID | \ + INTSTS_B_SESSION_END | \ + INTSTS_DATA_PULSING) + #define FSL_SOC_USB_USBMODE 0x1a8 + +#define USBGENCTRL 0x200 /* NOTE: big endian */ +#define GC_WU_INT_CLR (1 << 5) /* Wakeup int clear */ +#define GC_ULPI_SEL (1 << 4) /* ULPI i/f select (usb0 only)*/ +#define GC_PPP (1 << 3) /* Port Power Polarity */ +#define GC_PFP (1 << 2) /* Power Fault Polarity */ +#define GC_WU_ULPI_EN (1 << 1) /* Wakeup on ULPI event */ +#define GC_WU_IE (1 << 1) /* Wakeup interrupt enable */ + +#define ISIPHYCTRL 0x204 /* NOTE: big endian */ +#define PHYCTRL_PHYE (1 << 4) /* On-chip UTMI PHY enable */ +#define PHYCTRL_BSENH (1 << 3) /* Bit Stuff Enable High */ +#define PHYCTRL_BSEN (1 << 2) /* Bit Stuff Enable */ +#define PHYCTRL_LSFE (1 << 1) /* Line State Filter Enable */ +#define PHYCTRL_PXE (1 << 0) /* PHY oscillator enable */ + #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ @@ -85,65 +161,85 @@ #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -#if defined(CONFIG_MPC83xx) -#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR +#if defined(CONFIG_MPC83XX) +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR #elif defined(CONFIG_MPC85xx) -#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR +#elif defined(CONFIG_MPC512X) +#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR #endif /* * USB Registers */ struct usb_ehci { - u8 res1[0x100]; + u32 id; /* 0x000 - Identification register */ + u32 hwgeneral; /* 0x004 - General hardware parameters */ + u32 hwhost; /* 0x008 - Host hardware parameters */ + u32 hwdevice; /* 0x00C - Device hardware parameters */ + u32 hwtxbuf; /* 0x010 - TX buffer hardware parameters */ + u32 hwrxbuf; /* 0x014 - RX buffer hardware parameters */ + u8 res1[0x68]; + u32 gptimer0_ld; /* 0x080 - General Purpose Timer 0 load value */ + u32 gptimer0_ctrl; /* 0x084 - General Purpose Timer 0 control */ + u32 gptimer1_ld; /* 0x088 - General Purpose Timer 1 load value */ + u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */ + u32 sbuscfg; /* 0x090 - System Bus Interface Control */ + u8 res2[0x6C]; u16 caplength; /* 0x100 - Capability Register Length */ u16 hciversion; /* 0x102 - Host Interface Version */ u32 hcsparams; /* 0x104 - Host Structural Parameters */ u32 hccparams; /* 0x108 - Host Capability Parameters */ - u8 res2[0x14]; + u8 res3[0x14]; u32 dciversion; /* 0x120 - Device Interface Version */ u32 dciparams; /* 0x124 - Device Controller Params */ - u8 res3[0x18]; + u8 res4[0x18]; u32 usbcmd; /* 0x140 - USB Command */ u32 usbsts; /* 0x144 - USB Status */ u32 usbintr; /* 0x148 - USB Interrupt Enable */ u32 frindex; /* 0x14C - USB Frame Index */ - u8 res4[0x4]; + u8 res5[0x4]; u32 perlistbase; /* 0x154 - Periodic List Base - USB Device Address */ u32 ep_list_addr; /* 0x158 - Next Asynchronous List - - Endpoint Address */ - u8 res5[0x4]; + - End Point Address */ + u8 res6[0x4]; u32 burstsize; /* 0x160 - Programmable Burst Size */ +#define FSL_EHCI_TXPBURST(X) ((X) << 8) +#define FSL_EHCI_RXPBURST(X) (X) u32 txfilltuning; /* 0x164 - Host TT Transmit pre-buffer packet tuning */ - u8 res6[0x8]; + u8 res7[0x8]; u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */ - u8 res7[0xc]; + u8 res8[0xc]; u32 config_flag; /* 0x180 - Configured Flag Register */ u32 portsc; /* 0x184 - Port status/control */ - u8 res8[0x20]; + u8 res9[0x1C]; + u32 otgsc; /* 0x1a4 - Oo-The-Go status and control */ u32 usbmode; /* 0x1a8 - USB Device Mode */ - u32 epsetupstat; /* 0x1ac - Endpoint Setup Status */ - u32 epprime; /* 0x1b0 - Endpoint Init Status */ - u32 epflush; /* 0x1b4 - Endpoint De-initlialize */ - u32 epstatus; /* 0x1b8 - Endpoint Status */ - u32 epcomplete; /* 0x1bc - Endpoint Complete */ - u32 epctrl0; /* 0x1c0 - Endpoint Control 0 */ - u32 epctrl1; /* 0x1c4 - Endpoint Control 1 */ - u32 epctrl2; /* 0x1c8 - Endpoint Control 2 */ - u32 epctrl3; /* 0x1cc - Endpoint Control 3 */ - u32 epctrl4; /* 0x1d0 - Endpoint Control 4 */ - u32 epctrl5; /* 0x1d4 - Endpoint Control 5 */ - u8 res9[0x228]; + u32 epsetupstat; /* 0x1ac - End Point Setup Status */ + u32 epprime; /* 0x1b0 - End Point Init Status */ + u32 epflush; /* 0x1b4 - End Point De-initlialize */ + u32 epstatus; /* 0x1b8 - End Point Status */ + u32 epcomplete; /* 0x1bc - End Point Complete */ + u32 epctrl0; /* 0x1c0 - End Point Control 0 */ + u32 epctrl1; /* 0x1c4 - End Point Control 1 */ + u32 epctrl2; /* 0x1c8 - End Point Control 2 */ + u32 epctrl3; /* 0x1cc - End Point Control 3 */ + u32 epctrl4; /* 0x1d0 - End Point Control 4 */ + u32 epctrl5; /* 0x1d4 - End Point Control 5 */ + u8 res10[0x28]; + u32 usbgenctrl; /* 0x200 - USB General Control */ + u32 isiphyctrl; /* 0x204 - On-Chip PHY Control */ + u8 res11[0x1F8]; u32 snoop1; /* 0x400 - Snoop 1 */ u32 snoop2; /* 0x404 - Snoop 2 */ u32 age_cnt_limit; /* 0x408 - Age Count Threshold */ u32 prictrl; /* 0x40c - Priority Control */ u32 sictrl; /* 0x410 - System Interface Control */ - u8 res10[0xEC]; + u8 res12[0xEC]; u32 control; /* 0x500 - Control */ - u8 res11[0xafc]; + u8 res13[0xafc]; }; #endif /* _EHCI_FSL_H */ diff --git a/lib/gunzip.c b/lib/gunzip.c index d2b7ad4..482a476 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -96,11 +96,6 @@ int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, s.zalloc = zalloc; s.zfree = zfree; -#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - s.outcb = (cb_func)WATCHDOG_RESET; -#else - s.outcb = Z_NULL; -#endif /* CONFIG_HW_WATCHDOG */ r = inflateInit2(&s, -MAX_WBITS); if (r != Z_OK) { @@ -29,6 +29,7 @@ #include <common.h> #include <compiler.h> #include <asm/unaligned.h> +#include <watchdog.h> #include "u-boot/zlib.h" #undef OFF /* avoid conflicts */ @@ -1075,8 +1076,7 @@ z_streamp strm; state->hold = 0; state->bits = 0; state->lencode = state->distcode = state->next = state->codes; - if (strm->outcb != Z_NULL) - (*strm->outcb)(Z_NULL, 0); + WATCHDOG_RESET(); Tracev((stderr, "inflate: reset\n")); return Z_OK; } @@ -1599,6 +1599,7 @@ int flush; strm->adler = state->check = adler32(0L, Z_NULL, 0); state->mode = TYPE; case TYPE: + WATCHDOG_RESET(); if (flush == Z_BLOCK) goto inf_leave; case TYPEDO: if (state->last) { @@ -1776,8 +1777,7 @@ int flush; Tracev((stderr, "inflate: codes ok\n")); state->mode = LEN; case LEN: - if (strm->outcb != Z_NULL) /* for watchdog (U-Boot) */ - (*strm->outcb)(Z_NULL, 0); + WATCHDOG_RESET(); if (have >= 6 && left >= 258) { RESTORE(); inflate_fast(strm, out); @@ -1990,8 +1990,7 @@ z_streamp strm; return Z_STREAM_ERROR; state = (struct inflate_state FAR *)strm->state; if (state->window != Z_NULL) { - if (strm->outcb != Z_NULL) - (*strm->outcb)(Z_NULL, 0); + WATCHDOG_RESET(); ZFREE(strm, state->window); } ZFREE(strm, strm->state); @@ -5,7 +5,7 @@ # # Parameters: Target Architecture CPU Board [VENDOR] [SOC] # -# (C) 2002-2006 DENX Software Engineering, Wolfgang Denk <wd@denx.de> +# (C) 2002-2010 DENX Software Engineering, Wolfgang Denk <wd@denx.de> # APPEND=no # Default: Create new config file @@ -17,6 +17,7 @@ cpu="" board="" vendor="" soc="" +options="" if [ \( $# -eq 2 \) -a \( "$1" = "-A" \) ] ; then # Automatic mode @@ -41,11 +42,12 @@ while [ $# -gt 0 ] ; do done [ $# -lt 4 ] && exit 1 -[ $# -gt 6 ] && exit 1 +[ $# -gt 7 ] && exit 1 +# Strip all options and/or _config suffixes CONFIG_NAME="${1%_config}" -[ "${BOARD_NAME}" ] || BOARD_NAME="${CONFIG_NAME}" +[ "${BOARD_NAME}" ] || BOARD_NAME="${1%_config}" arch="$2" cpu="$3" @@ -56,13 +58,34 @@ else fi [ $# -gt 4 ] && [ "$5" != "-" ] && vendor="$5" [ $# -gt 5 ] && [ "$6" != "-" ] && soc="$6" +[ $# -gt 6 ] && [ "$7" != "-" ] && { + # check if we have a board config name in the options field + # the options field mave have a board config name and a list + # of options, both separated by a colon (':'); the options are + # separated by commas (','). + # + # Check for board name + tmp="${7%:*}" + if [ "$tmp" ] ; then + CONFIG_NAME="$tmp" + fi + # Check if we only have a colon... + if [ "${tmp}" != "$7" ] ; then + options=${7#*:} + TARGETS="`echo ${options} | sed 's:,: :g'` ${TARGETS}" + fi +} if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then echo "Failed: \$ARCH=${ARCH}, should be '${arch}' for ${BOARD_NAME}" 1>&2 exit 1 fi -echo "Configuring for ${BOARD_NAME} board..." +if [ "$options" ] ; then + echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: ${options}" +else + echo "Configuring for ${BOARD_NAME} board..." +fi # # Create link to architecture specific headers @@ -126,7 +149,8 @@ fi echo "/* Automatically generated - do not edit */" >>config.h for i in ${TARGETS} ; do - echo "#define CONFIG_MK_${i} 1" >>config.h ; + i="`echo ${i} | sed '/=/ {s/=/\t/;q } ; { s/$/\t1/ }'`" + echo "#define CONFIG_${i}" >>config.h ; done cat << EOF >> config.h diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile index 46fbe3c..bee24bc 100644 --- a/nand_spl/board/amcc/acadia/Makefile +++ b/nand_spl/board/amcc/acadia/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/amcc/acadia/config.mk b/nand_spl/board/amcc/acadia/config.mk index fcc838a..75a065a 100644 --- a/nand_spl/board/amcc/acadia/config.mk +++ b/nand_spl/board/amcc/acadia/config.mk @@ -25,17 +25,17 @@ # # -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On 4xx platforms the SPL is located at 0xfffff000...0xffffffff, # in the last 4kBytes of memory space in cache. # We will copy this SPL into internal SRAM in start.S. So we set -# TEXT_BASE to starting address in internal SRAM here. +# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here. # -TEXT_BASE = 0xf8004000 +CONFIG_SYS_TEXT_BASE = 0xf8004000 # PAD_TO used to generate a 16kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x4000 +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000 PAD_TO = 0xf8008000 ifeq ($(debug),1) diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile index a114ca5..0288c58 100644 --- a/nand_spl/board/amcc/bamboo/Makefile +++ b/nand_spl/board/amcc/bamboo/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/amcc/bamboo/config.mk b/nand_spl/board/amcc/bamboo/config.mk index 6377b52..f81d03a 100644 --- a/nand_spl/board/amcc/bamboo/config.mk +++ b/nand_spl/board/amcc/bamboo/config.mk @@ -25,17 +25,17 @@ # # -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff, # in the last 4kBytes of memory space in cache. # We will copy this SPL into instruction-cache in start.S. So we set -# TEXT_BASE to starting address in i-cache here. +# CONFIG_SYS_TEXT_BASE to starting address in i-cache here. # -TEXT_BASE = 0x00800000 +CONFIG_SYS_TEXT_BASE = 0x00800000 # PAD_TO used to generate a 16kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x4000 +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000 PAD_TO = 0x00804000 PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile index e798237..ab98d6f 100644 --- a/nand_spl/board/amcc/canyonlands/Makefile +++ b/nand_spl/board/amcc/canyonlands/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/amcc/canyonlands/config.mk b/nand_spl/board/amcc/canyonlands/config.mk index 688c92b..6819265 100644 --- a/nand_spl/board/amcc/canyonlands/config.mk +++ b/nand_spl/board/amcc/canyonlands/config.mk @@ -25,17 +25,17 @@ # # -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On 460EX platforms the SPL is located at 0xfffff000...0xffffffff, # in the last 4kBytes of memory space in cache. # We will copy this SPL into internal SRAM in start.S. So we set -# TEXT_BASE to starting address in internal SRAM here. +# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here. # -TEXT_BASE = 0xE3003000 +CONFIG_SYS_TEXT_BASE = 0xE3003000 # PAD_TO used to generate a 128kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x20000 +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x20000 PAD_TO = 0xE3023000 PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile index a49ba07..78c67a2 100644 --- a/nand_spl/board/amcc/kilauea/Makefile +++ b/nand_spl/board/amcc/kilauea/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/amcc/kilauea/config.mk b/nand_spl/board/amcc/kilauea/config.mk index f6bcd21..6240277 100644 --- a/nand_spl/board/amcc/kilauea/config.mk +++ b/nand_spl/board/amcc/kilauea/config.mk @@ -25,18 +25,18 @@ # # -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On 4xx platforms the SPL is located at 0xfffff000...0xffffffff, # in the last 4kBytes of memory space in cache. # We will copy this SPL into SDRAM since we can't access the NAND # controller at CS0 while running from this location. So we set -# TEXT_BASE to starting address in SDRAM here. +# CONFIG_SYS_TEXT_BASE to starting address in SDRAM here. # -TEXT_BASE = 0x00800000 +CONFIG_SYS_TEXT_BASE = 0x00800000 # PAD_TO used to generate a 16kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x4000 +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000 PAD_TO = 0x00804000 ifeq ($(debug),1) diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile index 951fe46..d3e28ce 100644 --- a/nand_spl/board/amcc/sequoia/Makefile +++ b/nand_spl/board/amcc/sequoia/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/amcc/sequoia/config.mk b/nand_spl/board/amcc/sequoia/config.mk index e8c6333..52d150b 100644 --- a/nand_spl/board/amcc/sequoia/config.mk +++ b/nand_spl/board/amcc/sequoia/config.mk @@ -25,17 +25,17 @@ # # -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff, # in the last 4kBytes of memory space in cache. # We will copy this SPL into internal SRAM in start.S. So we set -# TEXT_BASE to starting address in internal SRAM here. +# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here. # -TEXT_BASE = 0xE0013000 +CONFIG_SYS_TEXT_BASE = 0xE0013000 # PAD_TO used to generate a 16kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x4000 +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000 PAD_TO = 0xE0017000 PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/nand_spl/board/freescale/mpc8313erdb/Makefile b/nand_spl/board/freescale/mpc8313erdb/Makefile index 98edb09..05cd2fd 100644 --- a/nand_spl/board/freescale/mpc8313erdb/Makefile +++ b/nand_spl/board/freescale/mpc8313erdb/Makefile @@ -23,13 +23,13 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 PAD_TO := 0xfff04000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/mpc8315erdb/Makefile b/nand_spl/board/freescale/mpc8315erdb/Makefile index 98edb09..05cd2fd 100644 --- a/nand_spl/board/freescale/mpc8315erdb/Makefile +++ b/nand_spl/board/freescale/mpc8315erdb/Makefile @@ -23,13 +23,13 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 PAD_TO := 0xfff04000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile index 3d0936a..d1c0ef8 100644 --- a/nand_spl/board/freescale/mpc8536ds/Makefile +++ b/nand_spl/board/freescale/mpc8536ds/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/mpc8569mds/Makefile b/nand_spl/board/freescale/mpc8569mds/Makefile index 3d0936a..d1c0ef8 100644 --- a/nand_spl/board/freescale/mpc8569mds/Makefile +++ b/nand_spl/board/freescale/mpc8569mds/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile index c1dcf05..3568e8c 100644 --- a/nand_spl/board/freescale/mx31pdk/Makefile +++ b/nand_spl/board/freescale/mx31pdk/Makefile @@ -4,7 +4,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile index 3d0936a..d1c0ef8 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/Makefile +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -24,13 +24,13 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 PAD_TO := 0xfff01000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds -LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/karo/tx25/Makefile b/nand_spl/board/karo/tx25/Makefile index 62aa583..140440d 100644 --- a/nand_spl/board/karo/tx25/Makefile +++ b/nand_spl/board/karo/tx25/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL diff --git a/nand_spl/board/samsung/smdk6400/Makefile b/nand_spl/board/samsung/smdk6400/Makefile index 9cb4853..2111e57 100644 --- a/nand_spl/board/samsung/smdk6400/Makefile +++ b/nand_spl/board/samsung/smdk6400/Makefile @@ -30,7 +30,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/board/samsung/smdk6400/config.mk b/nand_spl/board/samsung/smdk6400/config.mk index 4b16230..8bea498 100644 --- a/nand_spl/board/samsung/smdk6400/config.mk +++ b/nand_spl/board/samsung/smdk6400/config.mk @@ -23,17 +23,17 @@ # # Samsung S3C64xx Reference Platform (smdk6400) board -# TEXT_BASE for SPL: +# CONFIG_SYS_TEXT_BASE for SPL: # # On S3C64xx platforms the SPL is located in SRAM at 0. # -# TEXT_BASE = 0 +# CONFIG_SYS_TEXT_BASE = 0 include $(TOPDIR)/board/$(BOARDDIR)/config.mk # PAD_TO used to generate a 4kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 4096 -PAD_TO := $(shell expr $$[$(TEXT_BASE) + 4096]) +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 4096 +PAD_TO := $(shell expr $$[$(CONFIG_SYS_TEXT_BASE) + 4096]) ifeq ($(debug),1) PLATFORM_CPPFLAGS += -DDEBUG diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile index 2da6142..678c80b 100644 --- a/nand_spl/board/sheldon/simpc8313/Makefile +++ b/nand_spl/board/sheldon/simpc8313/Makefile @@ -24,12 +24,12 @@ # NAND_SPL := y -TEXT_BASE := 0xfff00000 +CONFIG_SYS_TEXT_BASE := 0xfff00000 include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds -LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_NAND_SPL CFLAGS += -DCONFIG_NAND_SPL diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 0580dbf..4d6db14 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -224,7 +224,7 @@ static int nand_load(struct mtd_info *mtd, unsigned int offs, #if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) void board_init_f (ulong bootflag) { - relocate_code (TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE); + relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE); } #endif diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c index f89d542..959f162 100644 --- a/nand_spl/nand_boot_fsl_nfc.c +++ b/nand_spl/nand_boot_fsl_nfc.c @@ -266,7 +266,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) #if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) void board_init_f (ulong bootflag) { - relocate_code (TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE); + relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, TEXT_BASE); } #endif diff --git a/net/Makefile b/net/Makefile index 4f819dd..216d1ec 100644 --- a/net/Makefile +++ b/net/Makefile @@ -32,7 +32,7 @@ COBJS-$(CONFIG_CMD_DNS) += dns.o COBJS-$(CONFIG_CMD_NET) += eth.o COBJS-$(CONFIG_CMD_NET) += net.o COBJS-$(CONFIG_CMD_NFS) += nfs.o -COBJS-$(CONFIG_CMD_NET) += rarp.o +COBJS-$(CONFIG_CMD_RARP) += rarp.o COBJS-$(CONFIG_CMD_SNTP) += sntp.o COBJS-$(CONFIG_CMD_NET) += tftp.o @@ -263,7 +263,6 @@ int eth_initialize(bd_t *bis) dev = dev->next; } while(dev != eth_devices); -#ifdef CONFIG_NET_MULTI /* update current ethernet name */ if (eth_current) { char *act = getenv("ethact"); @@ -271,7 +270,6 @@ int eth_initialize(bd_t *bis) setenv("ethact", eth_current->name); } else setenv("ethact", NULL); -#endif putc ('\n'); } @@ -441,7 +439,7 @@ int eth_receive(volatile void *packet, int length) void eth_try_another(int first_restart) { static struct eth_device *first_failed = NULL; - char *ethrotate; + char *ethrotate, *act; /* * Do not rotate between network interfaces when @@ -460,21 +458,16 @@ void eth_try_another(int first_restart) eth_current = eth_current->next; -#ifdef CONFIG_NET_MULTI /* update current ethernet name */ - { - char *act = getenv("ethact"); - if (act == NULL || strcmp(act, eth_current->name) != 0) - setenv("ethact", eth_current->name); - } -#endif + act = getenv("ethact"); + if (act == NULL || strcmp(act, eth_current->name) != 0) + setenv("ethact", eth_current->name); if (first_failed == eth_current) { NetRestartWrap = 1; } } -#ifdef CONFIG_NET_MULTI void eth_set_current(void) { static char *act = NULL; @@ -501,7 +494,6 @@ void eth_set_current(void) setenv("ethact", eth_current->name); } -#endif char *eth_get_name (void) { @@ -80,7 +80,9 @@ #include <net.h> #include "bootp.h" #include "tftp.h" +#ifdef CONFIG_CMD_RARP #include "rarp.h" +#endif #include "nfs.h" #ifdef CONFIG_STATUS_LED #include <status_led.h> @@ -401,11 +403,13 @@ restart: BootpRequest (); break; +#if defined(CONFIG_CMD_RARP) case RARP: RarpTry = 0; NetOurIP = 0; RarpRequest (); break; +#endif #if defined(CONFIG_CMD_PING) case PING: PingStart(); @@ -1492,6 +1496,7 @@ NetReceive(volatile uchar * inpkt, int len) } break; +#ifdef CONFIG_CMD_RARP case PROT_RARP: debug("Got RARP\n"); arp = (ARP_t *)ip; @@ -1515,7 +1520,7 @@ NetReceive(volatile uchar * inpkt, int len) (*packetHandler)(0,0,0,0); } break; - +#endif case PROT_IP: debug("Got IP\n"); /* Before we start poking the header, make sure it is there */ @@ -1729,10 +1734,12 @@ static int net_check_prereq (proto_t protocol) } /* Fall through */ - case DHCP: +#ifdef CONFIG_CMD_RARP case RARP: +#endif case BOOTP: case CDP: + case DHCP: if (memcmp (NetOurEther, "\0\0\0\0\0\0", 6) == 0) { #ifdef CONFIG_NET_MULTI extern int eth_get_dev_index (void); diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile index 6f1df01..5397186 100644 --- a/onenand_ipl/board/apollon/Makefile +++ b/onenand_ipl/board/apollon/Makefile @@ -3,7 +3,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds -LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL OBJCFLAGS += --gap-fill=0x00 diff --git a/onenand_ipl/board/apollon/config.mk b/onenand_ipl/board/apollon/config.mk index fd9c506..62956e8 100644 --- a/onenand_ipl/board/apollon/config.mk +++ b/onenand_ipl/board/apollon/config.mk @@ -11,4 +11,4 @@ # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 # (mem base + reserved) -TEXT_BASE = 0x00000000 +CONFIG_SYS_TEXT_BASE = 0x00000000 diff --git a/onenand_ipl/board/apollon/low_levelinit.S b/onenand_ipl/board/apollon/low_levelinit.S index 205170f..cab4227 100644 --- a/onenand_ipl/board/apollon/low_levelinit.S +++ b/onenand_ipl/board/apollon/low_levelinit.S @@ -65,7 +65,7 @@ #endif _TEXT_BASE: - .word TEXT_BASE /* sdram load addr from config.mk */ + .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ .globl lowlevel_init lowlevel_init: diff --git a/onenand_ipl/board/vpac270/Makefile b/onenand_ipl/board/vpac270/Makefile index 22d0410..ac7a8f0 100644 --- a/onenand_ipl/board/vpac270/Makefile +++ b/onenand_ipl/board/vpac270/Makefile @@ -2,7 +2,7 @@ IPL =onenand_ipl include $(TOPDIR)/config.mk LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds -LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +LDFLAGS = -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL OBJCFLAGS += --gap-fill=0x00 diff --git a/onenand_ipl/board/vpac270/config.mk b/onenand_ipl/board/vpac270/config.mk index f071dea..752836d 100644 --- a/onenand_ipl/board/vpac270/config.mk +++ b/onenand_ipl/board/vpac270/config.mk @@ -1 +1 @@ -TEXT_BASE = 0x5c03fc00 +CONFIG_SYS_TEXT_BASE = 0x5c03fc00 diff --git a/tools/Makefile b/tools/Makefile index 8ec92d2..619c9f2 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -145,7 +145,8 @@ HOSTCPPFLAGS = -idirafter $(SRCTREE)/include \ -idirafter $(OBJTREE)/include \ -I $(SRCTREE)/lib/libfdt \ -I $(SRCTREE)/tools \ - -DTEXT_BASE=$(TEXT_BASE) -DUSE_HOSTCC \ + -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ + -DUSE_HOSTCC \ -D__KERNEL_STRICT_NAMES diff --git a/tools/imls/Makefile b/tools/imls/Makefile index 8407277..0caa397 100644 --- a/tools/imls/Makefile +++ b/tools/imls/Makefile @@ -67,7 +67,7 @@ $(obj)imls: $(obj)imls.o $(obj)crc32.o $(obj)image.o $(obj)md5.o \ $(CC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ $(STRIP) $@ -# Some files complain if compiled with -pedantic, use FIT_CFLAGS +# Some files complain if compiled with -pedantic, use HOSTCFLAGS_NOPED $(obj)image.o: $(SRCTREE)/common/image.c $(CC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $< diff --git a/tools/scripts/define2mk.sed b/tools/scripts/define2mk.sed index af40bfa..13e2845 100644 --- a/tools/scripts/define2mk.sed +++ b/tools/scripts/define2mk.sed @@ -18,8 +18,12 @@ s/="\(.*\)"$/=\1/; # Concatenate string values s/" *"//g; - # Wrap non-numeral values with quotes - s/=\(.*\?[^0-9].*\)$/=\"\1\"/; + # Assume strings as default - add quotes around values + s/=\(..*\)/="\1"/; + # but remove again from decimal numbers + s/="\([0-9][0-9]*\)"/=\1/; + # ... and from hex numbers + s/="\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)"/=\1/; # Change '1' and empty values to "y" (not perfect, but # supports conditional compilation in the makefiles s/=$/=y/; |