diff options
| -rw-r--r-- | CHANGELOG | 186 | ||||
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | board/matrix_vision/common/Makefile | 54 | ||||
| -rw-r--r-- | board/matrix_vision/common/mv_common.c | 126 | ||||
| -rw-r--r-- | board/matrix_vision/common/mv_common.h | 25 | ||||
| -rw-r--r-- | board/matrix_vision/mvbc_p/mvbc_p.c | 97 | ||||
| -rw-r--r-- | board/matrix_vision/mvbc_p/mvbc_p.h | 2 | ||||
| -rw-r--r-- | board/matrix_vision/mvbc_p/mvbc_p_autoscript | 10 | ||||
| -rw-r--r-- | board/matrix_vision/mvblm7/mvblm7.c | 55 | ||||
| -rw-r--r-- | board/matrix_vision/mvblm7/mvblm7.h | 3 | ||||
| -rw-r--r-- | board/matrix_vision/mvblm7/pci.c | 35 | ||||
| -rw-r--r-- | common/console.c | 2 | ||||
| -rw-r--r-- | include/configs/MPC8349EMDS.h | 2 | ||||
| -rw-r--r-- | include/configs/MPC8349ITX.h | 6 | ||||
| -rw-r--r-- | include/configs/MPC8360ERDK.h | 2 | ||||
| -rw-r--r-- | include/configs/MVBC_P.h | 2 | ||||
| -rw-r--r-- | include/configs/MVBLM7.h | 49 |
17 files changed, 476 insertions, 182 deletions
@@ -1,3 +1,189 @@ +commit 632a6dd0b612eb7b143f789f2a0273917468c041 +Author: Andre Schwarz <andre.schwarz@matrix-vision.de> +Date: Mon Aug 31 16:18:24 2009 +0200 + + Add common code dir for Matrix Vision boards. + + This fixes current build failure. + + Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> + + mvblm7.c: fix warning: implicit declaration of function + 'mv_reset_environment' + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit 52f6c34c85d6c16f2a41433b5000490ecf374992 +Author: David Brownell <dbrownell@users.sourceforge.net> +Date: Sun Aug 30 11:05:29 2009 -0700 + + bugfix CONFIG_SYS_CONSOLE_INFO_QUIET + + The "console: unify printing current devices" patch goofed: + CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot + time noise, not add it. Said patch changed the #ifndefs + to #ifdef; this one restores them to the proper sense. + + Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> + +commit 28887d831b02c66ccc10d7f1379204b5a62f4543 +Author: André Schwarz <andre.schwarz@matrix-vision.de> +Date: Thu Aug 27 14:48:35 2009 +0200 + + Use common code for Matrix Vision boards + + Clean up existing boards (mvBC-P/MPC5200 and mvBL-M7/MPC8343) by + using common code. + + Signed-off-by: André Schwarz <andre.schwarz@matrix-vision.de> + +commit 05f91a65abc3180e2896cd8ddee7a34b1d1ce6e0 +Author: Kim Phillips <kim.phillips@freescale.com> +Date: Wed Aug 26 21:27:37 2009 -0500 + + mpc83xx: mpc8349itx - accommodate larger kernel sizes & unzero the bootdelay + + apparently the ITX was missed last round. + + Also make bootdelay consistent with other boards, so as to give on the + opportunity to fix mistakenly set bootcmd without having checked for an + bootdelay zero setting first. + + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> + +commit cc861f7127f200e704baaf061a7f508e3c93f2a3 +Author: Kim Phillips <kim.phillips@freescale.com> +Date: Wed Aug 26 21:25:46 2009 -0500 + + mpc83xx: match dtb filename references to their dts equivalents in the linux kernel + + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> + +commit 68e74567cf317318df52dbcb2ac170ffc5e7758a +Author: Feng Kan <fkan@amcc.com> +Date: Fri Aug 21 10:59:42 2009 -0700 + + ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver + + Fix ECC Correction bug where the byte offset location were double + flipped causing correction routine to toggle the wrong byte location + in the ECC segment. The ndfc_calculate_ecc routine change the order + of getting the ECC code. + /* The NDFC uses Smart Media (SMC) bytes order */ + ecc_code[0] = p[2]; + ecc_code[1] = p[1]; + ecc_code[2] = p[3]; + But in the Correction algorithm when calculating the byte offset + location, the s1 is used as the upper part of the address. Which + again reverse the order making the final byte offset address + location incorrect. + byteoffs = (s1 << 0) & 0x80; + . + . + byteoffs |= (s0 >> 4) & 0x08; + The order is change to read it in straight and let the correction + function to revert it to SMC order. + + Signed-off-by: Feng Kan <fkan@amcc.com> + Acked-by: Victor Gallardo <vgallardo@amcc.com> + Acked-by: Prodyut Hazarika <phazarika@amcc.com> + Signed-off-by: Stefan Roese <sr@denx.de> + +commit 30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075 +Author: Wolfgang Denk <wd@denx.de> +Date: Tue Aug 25 12:22:38 2009 +0200 + + include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declaration + + The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit e637385e69f63bc73b9dfd2ddd8d0f383790ca28 +Author: Mike Frysinger <vapier@gentoo.org> +Date: Thu Aug 20 19:17:59 2009 -0400 + + Blackfin: fix typos in gpio comments + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit c2fbcb6ae86c10621a386c13be57eaa766221ed5 +Author: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> +Date: Tue Aug 18 04:49:57 2009 -0400 + + Blackfin: cm-bf527/cm-bf537: increase flash sectors + + Newer revisions of these boards have slightly larger flashes, so increase + the configured number of sectors so that U-Boot works on all revisions. + + Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit a794f59a75bf9fd4a44f1ad2349cae903c42b89c +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Sun Aug 23 14:14:52 2009 +0200 + + sh/rsk7203: add missing include net.h + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 6ac9f47977a9fc1876979871eeb14f26ba1bdbe6 +Author: Mike Frysinger <vapier@gentoo.org> +Date: Sun Aug 23 02:47:59 2009 -0400 + + start a linker script helper file + + Start a common header file for common linker script code (such as + workarounds for older linkers) rather than doing this in the build system. + + As fallout, we no longer execute the linker every time config.mk is + included by a build file (which can easily be 70+ times), but rather only + execute it once. + + This also fixes a bug in the major version checking by creating a macro to + easily compare versions and keep people from making the same common + mistake (forgetting to check major and minor together). + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit 2ed0869d30602eb660569eababb8fedff36bd23a +Author: Mike Frysinger <vapier@gentoo.org> +Date: Sat Aug 22 19:50:22 2009 -0400 + + Blackfin: use common code to preprocess linker script + + Now that the common code preprocesses the linker script, the Blackfin code + no longer needs to do it. + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit 4d3758c835c7e96da2a291e7fb5acfc19bc06e8e +Author: Mike Frysinger <vapier@gentoo.org> +Date: Sat Aug 22 19:48:56 2009 -0400 + + .gitignore: ignore generated u-boot.lds + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit 79b91de958511840d2a7491be92d435b7ef43f17 +Author: Albin Tonnerre <albin.tonnerre@free-electrons.com> +Date: Sat Aug 22 14:21:53 2009 +0200 + + include/mmc.h: Fix typo in IS_SD() macro + + Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> + +commit 963f2f611741f8d9c38bd7caf20ae8c95cab7b3f +Author: Wolfgang Denk <wd@denx.de> +Date: Sat Aug 22 23:27:26 2009 +0200 + + Prepare 2009.08-rc3 + + Update CHANGELOG, minor Coding Style cleanup. + + Signed-off-by: Wolfgang Denk <wd@denx.de> + commit 5b2da6a309266f21cbb68f06fcfdf9ba141022e7 Author: Michal Simek <monstr@monstr.eu> Date: Fri Aug 21 06:52:25 2009 +1000 @@ -24,7 +24,7 @@ VERSION = 2009 PATCHLEVEL = 08 SUBLEVEL = -EXTRAVERSION = -rc3 +EXTRAVERSION = ifneq "$(SUBLEVEL)" "" U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) else diff --git a/board/matrix_vision/common/Makefile b/board/matrix_vision/common/Makefile new file mode 100644 index 0000000..b496258 --- /dev/null +++ b/board/matrix_vision/common/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)board/$(VENDOR)/common) +endif + +LIB = $(obj)lib$(VENDOR).a + +COBJS-y = mv_common.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/matrix_vision/common/mv_common.c b/board/matrix_vision/common/mv_common.c new file mode 100644 index 0000000..0afc535 --- /dev/null +++ b/board/matrix_vision/common/mv_common.c @@ -0,0 +1,126 @@ +/* + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <environment.h> +#include <fpga.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +static char* entries_to_keep[] = { + "serial#", "ethaddr", "eth1addr", "model_info", "sensor_cnt", + "fpgadatasize", "ddr_size", "use_dhcp", "use_static_ipaddr", + "static_ipaddr", "static_netmask", "static_gateway", + "syslog", "watchdog", "netboot", "evo8serialnumber" }; + +#define MV_MAX_ENV_ENTRY_LENGTH 64 +#define MV_KEEP_ENTRIES ARRAY_SIZE(entries_to_keep) + +void mv_reset_environment(void) +{ + int i; + char *s[MV_KEEP_ENTRIES]; + char entries[MV_KEEP_ENTRIES][MV_MAX_ENV_ENTRY_LENGTH]; + + printf("\n*** RESET ENVIRONMENT ***\n"); + + memset(entries, 0, MV_KEEP_ENTRIES * MV_MAX_ENV_ENTRY_LENGTH); + for (i = 0; i < MV_KEEP_ENTRIES; i++) { + s[i] = getenv(entries_to_keep[i]); + if (s[i]) { + printf("save '%s' : %s\n", entries_to_keep[i], s[i]); + strncpy(entries[i], s[i], MV_MAX_ENV_ENTRY_LENGTH); + } + } + + gd->env_valid = 0; + env_relocate(); + + for (i = 0; i < MV_KEEP_ENTRIES; i++) { + if (s[i]) { + printf("restore '%s' : %s\n", entries_to_keep[i], s[i]); + setenv(entries_to_keep[i], s[i]); + } + } + + saveenv(); +} + +int mv_load_fpga(void) +{ + int result; + size_t data_size = 0; + void *fpga_data = NULL; + char *datastr = getenv("fpgadata"); + char *sizestr = getenv("fpgadatasize"); + + if (getenv("skip_fpga")) { + printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); + return -1; + } + printf("loading FPGA\n"); + + if (datastr) + fpga_data = (void *)simple_strtoul(datastr, NULL, 16); + if (sizestr) + data_size = (size_t)simple_strtoul(sizestr, NULL, 16); + if (!data_size) { + printf("fpgadatasize invalid -> FPGA _not_ loaded !\n"); + return -1; + } + + result = fpga_load(0, fpga_data, data_size); + if (!result) + show_boot_progress(0); + + return result; +} + +u8 *dhcp_vendorex_prep(u8 *e) +{ + char *ptr; + + /* DHCP vendor-class-identifier = 60 */ + if ((ptr = getenv("dhcp_vendor-class-identifier"))) { + *e++ = 60; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + /* DHCP_CLIENT_IDENTIFIER = 61 */ + if ((ptr = getenv("dhcp_client_id"))) { + *e++ = 61; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + + return e; +} + +u8 *dhcp_vendorex_proc(u8 *popt) +{ + return NULL; +} diff --git a/board/matrix_vision/common/mv_common.h b/board/matrix_vision/common/mv_common.h new file mode 100644 index 0000000..046c038 --- /dev/null +++ b/board/matrix_vision/common/mv_common.h @@ -0,0 +1,25 @@ +/* + * Copyright 2008 Matrix Vision GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +extern int mv_load_fpga(void); +extern void mv_reset_environment(void); diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c b/board/matrix_vision/mvbc_p/mvbc_p.c index a300342..0cbe900 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.c +++ b/board/matrix_vision/mvbc_p/mvbc_p.c @@ -39,6 +39,7 @@ #include <asm/io.h> #include "fpga.h" #include "mvbc_p.h" +#include "../common/mv_common.h" #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 @@ -134,23 +135,6 @@ void mvbc_init_gpio(void) printf("sint_gpioe : 0x%08x\n", gpio->sint_gpioe); } -void reset_environment(void) -{ - char *s, sernr[64]; - - printf("\n*** RESET ENVIRONMENT ***\n"); - memset(sernr, 0, sizeof(sernr)); - s = getenv("serial#"); - if (s) { - printf("found serial# : %s\n", s); - strncpy(sernr, s, 64); - } - gd->env_valid = 0; - env_relocate(); - if (s) - setenv("serial#", sernr); -} - int misc_init_r(void) { char *s = getenv("reset_env"); @@ -166,7 +150,7 @@ int misc_init_r(void) return 0; } printf(" === FACTORY RESET ===\n"); - reset_environment(); + mv_reset_environment(); saveenv(); return -1; @@ -206,19 +190,28 @@ void flash_afterinit(ulong size) void pci_mvbc_fixup_irq(struct pci_controller *hose, pci_dev_t dev) { unsigned char line = 0xff; + char *s = getenv("pci_latency"); u32 base; + u8 val = 0; + + if (s) + val = simple_strtoul(s, NULL, 16); if (PCI_BUS(dev) == 0) { switch (PCI_DEV (dev)) { case 0xa: /* FPGA */ line = 3; pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &base); - printf("found FPA - enable arbitration\n"); + printf("found FPGA - enable arbitration\n"); writel(0x03, (u32*)(base + 0x80c0)); writel(0xf0, (u32*)(base + 0x8080)); + if (val) + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, val); break; case 0xb: /* LAN */ line = 2; + if (val) + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, val); break; case 0x1a: break; @@ -234,85 +227,31 @@ struct pci_controller hose = { fixup_irq:pci_mvbc_fixup_irq }; -int mvbc_p_load_fpga(void) -{ - size_t data_size = 0; - void *fpga_data = NULL; - char *datastr = getenv("fpgadata"); - char *sizestr = getenv("fpgadatasize"); - - if (datastr) - fpga_data = (void *)simple_strtoul(datastr, NULL, 16); - if (sizestr) - data_size = (size_t)simple_strtoul(sizestr, NULL, 16); - - return fpga_load(0, fpga_data, data_size); -} - extern void pci_mpc5xxx_init(struct pci_controller *); void pci_init_board(void) { - char *s; - int load_fpga = 1; - mvbc_p_init_fpga(); - s = getenv("skip_fpga"); - if (s) { - printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); - load_fpga = 0; - } - if (load_fpga) { - printf("loading FPGA ... "); - mvbc_p_load_fpga(); - printf("done\n"); - } + mv_load_fpga(); pci_mpc5xxx_init(&hose); } -u8 *dhcp_vendorex_prep(u8 *e) -{ - char *ptr; - - /* DHCP vendor-class-identifier = 60 */ - if ((ptr = getenv("dhcp_vendor-class-identifier"))) { - *e++ = 60; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - /* DHCP_CLIENT_IDENTIFIER = 61 */ - if ((ptr = getenv("dhcp_client_id"))) { - *e++ = 61; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - - return e; -} - -u8 *dhcp_vendorex_proc (u8 *popt) -{ - return NULL; -} - void show_boot_progress(int val) { struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO; switch(val) { case 0: /* FPGA ok */ - setbits_be32(&gpio->simple_dvo, 0x80); + setbits_be32(&gpio->simple_dvo, LED_G0); break; - case 1: - setbits_be32(&gpio->simple_dvo, 0x40); + case 65: + setbits_be32(&gpio->simple_dvo, LED_G1); break; case 12: - setbits_be32(&gpio->simple_dvo, 0x20); + setbits_be32(&gpio->simple_dvo, LED_Y); break; case 15: - setbits_be32(&gpio->simple_dvo, 0x10); + setbits_be32(&gpio->simple_dvo, LED_R); break; default: break; diff --git a/board/matrix_vision/mvbc_p/mvbc_p.h b/board/matrix_vision/mvbc_p/mvbc_p.h index 3330798..be1542b 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.h +++ b/board/matrix_vision/mvbc_p/mvbc_p.h @@ -23,7 +23,7 @@ #define SIMPLE_DDR (LED_G0 | LED_G1 | LED_Y | LED_R | \ FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI) #define SIMPLE_DVO (FPGA_CONFIG) -#define SIMPLE_ODE (FPGA_CONFIG) +#define SIMPLE_ODE (FPGA_CONFIG | LED_G0 | LED_G1 | LED_Y | LED_R) #define SIMPLE_GPIOEN (LED_G0 | LED_G1 | LED_Y | LED_R | \ FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\ WD_WDI | COP_PRESENT) diff --git a/board/matrix_vision/mvbc_p/mvbc_p_autoscript b/board/matrix_vision/mvbc_p/mvbc_p_autoscript index 5cee6c5..1102354 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p_autoscript +++ b/board/matrix_vision/mvbc_p/mvbc_p_autoscript @@ -5,7 +5,7 @@ setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram} setenv ramkernel setenv kernel_boot \${loadaddr} setenv flashkernel setenv kernel_boot \${mv_kernel_addr} setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length} -setenv bootfromflash run flashkernel cpird ramparam addcons e1000para bootdtb +setenv bootfromflash run flashkernel cpird ramparam addcons e1000para addprofile bootdtb setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name} setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000 setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup @@ -16,12 +16,16 @@ setenv addcons setenv bootargs \${bootargs} console=ttyPSC\${console_nr},\${baud else setenv addcons setenv bootargs \${bootargs} console=tty0 fi -setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=1500 e1000.SmartPowerDownEnable=1 +setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=256 e1000.SmartPowerDownEnable=1 setenv set_static_ip setenv ipaddr \${static_ipaddr} setenv set_static_nm setenv netmask \${static_netmask} setenv set_static_gw setenv gatewayip \${static_gateway} setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask} setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs +if test ${oprofile} = yes; +then +setenv addprofile setenv bootargs \${bootargs} profile=\${profile} +fi if test ${autoscr_boot} != no; then if test ${netboot} = yes; @@ -31,7 +35,7 @@ then then echo "=== bootp succeeded -> netboot ===" run set_ip - run getdtb rundtb bootfromnet ramparam addcons e1000para bootdtb + run getdtb rundtb bootfromnet ramparam addcons e1000para addprofile bootdtb else echo "=== netboot failed ===" fi diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c index 8fe5b4b..6a4ed52 100644 --- a/board/matrix_vision/mvblm7/mvblm7.c +++ b/board/matrix_vision/mvblm7/mvblm7.c @@ -34,6 +34,7 @@ #include <libfdt.h> #endif +#include "../common/mv_common.h" #include "mvblm7.h" int fixed_sdram(void) @@ -42,8 +43,15 @@ int fixed_sdram(void) u32 msize = 0; u32 ddr_size; u32 ddr_size_log2; + char *s = getenv("ddr_size"); msize = CONFIG_SYS_DDR_SIZE; + if (s) { + u32 env_ddr_size = simple_strtoul(s, NULL, 10); + if (env_ddr_size == 512) + msize = 512; + } + for (ddr_size = msize << 20, ddr_size_log2 = 0; (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) { @@ -63,14 +71,19 @@ int fixed_sdram(void) im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG; im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2; im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE; + im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2; im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; - im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; + im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; - udelay(300); + asm("sync;isync"); + udelay(600); im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; - return CONFIG_SYS_DDR_SIZE; + asm("sync;isync"); + udelay(500); + + return msize; } phys_size_t initdram(int board_type) @@ -88,40 +101,22 @@ phys_size_t initdram(int board_type) return msize * 1024 * 1024; } -int checkboard(void) +int misc_init_r(void) { - puts("Board: Matrix Vision mvBlueLYNX-M7\n"); - - return 0; -} + char *s = getenv("reset_env"); -u8 *dhcp_vendorex_prep(u8 *e) -{ - char *ptr; - - /* DHCP vendor-class-identifier = 60 */ - ptr = getenv("dhcp_vendor-class-identifier"); - if (ptr) { - *e++ = 60; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - /* DHCP_CLIENT_IDENTIFIER = 61 */ - ptr = getenv("dhcp_client_id"); - if (ptr) { - *e++ = 61; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; + if (s) { + mv_reset_environment(); } - return e; + return 0; } -u8 *dhcp_vendorex_proc(u8 *popt) +int checkboard(void) { - return NULL; + puts("Board: Matrix Vision mvBlueLYNX-M7\n"); + + return 0; } #ifdef CONFIG_HARD_SPI diff --git a/board/matrix_vision/mvblm7/mvblm7.h b/board/matrix_vision/mvblm7/mvblm7.h index 03e9f41..de9fec7 100644 --- a/board/matrix_vision/mvblm7/mvblm7.h +++ b/board/matrix_vision/mvblm7/mvblm7.h @@ -8,14 +8,13 @@ #define FPGA_DIN 0x20000000 #define FPGA_STATUS 0x10000000 #define FPGA_CONF_DONE 0x08000000 -#define MMC_CS 0x04000000 #define WD_WDI 0x00400000 #define WD_TS 0x00200000 #define MAN_RST 0x00100000 #define MV_GPIO_DAT (WD_TS) -#define MV_GPIO_OUT (FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|WD_TS|WD_WDI|MMC_CS) +#define MV_GPIO_OUT (FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|MVBLM7_MMC_CS) #define MV_GPIO_ODE (FPGA_CONFIG|MAN_RST) #endif diff --git a/board/matrix_vision/mvblm7/pci.c b/board/matrix_vision/mvblm7/pci.c index 4b74e6d..1cc524b 100644 --- a/board/matrix_vision/mvblm7/pci.c +++ b/board/matrix_vision/mvblm7/pci.c @@ -32,24 +32,10 @@ #include <fpga.h> #include "mvblm7.h" #include "fpga.h" +#include "../common/mv_common.h" DECLARE_GLOBAL_DATA_PTR; -int mvblm7_load_fpga(void) -{ - size_t data_size = 0; - void *fpga_data = NULL; - char *datastr = getenv("fpgadata"); - char *sizestr = getenv("fpgadatasize"); - - if (datastr) - fpga_data = (void *)simple_strtoul(datastr, NULL, 16); - if (sizestr) - data_size = (size_t)simple_strtoul(sizestr, NULL, 16); - - return fpga_load(0, fpga_data, data_size); -} - static struct pci_region pci_regions[] = { { bus_start: CONFIG_SYS_PCI1_MEM_BASE, @@ -73,10 +59,8 @@ static struct pci_region pci_regions[] = { void pci_init_board(void) { - char *s; int i; int warmboot; - int load_fpga; volatile immap_t *immr; volatile pcictrl83xx_t *pci_ctrl; volatile gpio83xx_t *gpio; @@ -84,32 +68,23 @@ void pci_init_board(void) volatile law83xx_t *pci_law; struct pci_region *reg[] = { pci_regions }; - load_fpga = 1; immr = (immap_t *) CONFIG_SYS_IMMR; clk = (clk83xx_t *) &immr->clk; pci_ctrl = immr->pci_ctrl; pci_law = immr->sysconf.pcilaw; gpio = (volatile gpio83xx_t *)&immr->gpio[0]; - s = getenv("skip_fpga"); - if (s) { - printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); - load_fpga = 0; - } - gpio->dat = MV_GPIO_DAT; gpio->odr = MV_GPIO_ODE; - if (load_fpga) - gpio->dir = MV_GPIO_OUT; - else - gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK); + gpio->dir = MV_GPIO_OUT; printf("SICRH / SICRL : 0x%08x / 0x%08x\n", immr->sysconf.sicrh, immr->sysconf.sicrl); mvblm7_init_fpga(); - if (load_fpga) - mvblm7_load_fpga(); + mv_load_fpga(); + + gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK); /* Enable PCI_CLK_OUTPUTs 0 and 1 with 1:1 clocking */ clk->occr = 0xc0000000; diff --git a/common/console.c b/common/console.c index 867c12c..dc0d13b 100644 --- a/common/console.c +++ b/common/console.c @@ -534,7 +534,7 @@ int console_init_f(void) void stdio_print_current_devices(void) { -#ifdef CONFIG_SYS_CONSOLE_INFO_QUIET +#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET /* Print information */ puts("In: "); if (stdio_devices[stdin] == NULL) { diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 1d736f3..9b2d25a 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -732,7 +732,7 @@ "era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \ "upd=run load update\0" \ "fdtaddr=780000\0" \ - "fdtfile=mpc8349emds.dtb\0" \ + "fdtfile=mpc834x_mds.dtb\0" \ "" #define CONFIG_NFSBOOTCOMMAND \ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index fd5ad70..3b4e344 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -515,7 +515,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */ +#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ #ifdef CONFIG_MPC8349ITX #define CONFIG_SYS_PROMPT "MPC8349E-mITX> " /* Monitor Command Prompt */ @@ -708,7 +708,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_FDTFILE mpc8349emitxgp.dtb #endif -#define CONFIG_BOOTDELAY 0 +#define CONFIG_BOOTDELAY 6 #define XMK_STR(x) #x #define MK_STR(x) XMK_STR(x) @@ -731,7 +731,7 @@ boards, we say we have two, but don't display a message if we find only one. */ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ - "fdtaddr=400000\0" \ + "fdtaddr=780000\0" \ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" #define CONFIG_NFSBOOTCOMMAND \ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 68d68bb..cb0535c 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -530,7 +530,7 @@ "consoledev=ttyS0\0"\ "loadaddr=a00000\0"\ "fdtaddr=900000\0"\ - "fdtfile=dtb\0"\ + "fdtfile=mpc836x_rdk.dtb\0"\ "fsfile=fs\0"\ "ubootfile=u-boot.bin\0"\ "mtdparts=mtdparts=60000000.nand-flash:4096k(kernel),128k(dtb),-(rootfs)\0"\ diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 867e8e0..0c228cb 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -67,7 +67,7 @@ #define MV_CI mvBlueCOUGAR-P #define MV_VCI mvBlueCOUGAR-P #define MV_FPGA_DATA 0xff860000 -#define MV_FPGA_SIZE 0x0003c886 +#define MV_FPGA_SIZE 0 #define MV_KERNEL_ADDR 0xffd00000 #define MV_INITRD_ADDR 0xff900000 #define MV_INITRD_LENGTH 0x00400000 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index aa91805..80334bd 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -46,10 +46,9 @@ #define CONFIG_MPC8XXX_SPI #define CONFIG_HARD_SPI #define MVBLM7_MMC_CS 0x04000000 +#define CONFIG_MISC_INIT_R /* I2C */ -#undef CONFIG_SOFT_I2C - #define CONFIG_FSL_I2C #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_OFFSET 0x3000 @@ -61,44 +60,36 @@ /* * DDR Setup */ +#undef CONFIG_SPD_EEPROM + #define CONFIG_SYS_DDR_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE #define CONFIG_SYS_83XX_DDR_USES_CS0 1 #define CONFIG_SYS_MEMTEST_START (60<<20) #define CONFIG_SYS_MEMTEST_END (70<<20) +#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ - DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 - -#define CONFIG_SYS_DDR_SIZE 256 +#define CONFIG_SYS_DDRCDR 0x22000001 +#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 -/* HC, 75Ohm, DDR-II, DRQ */ -#define CONFIG_SYS_DDRCDR 0x80000001 -/* EN, ODT_WR, 3BA, 14row, 10col */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014102 -#define CONFIG_SYS_DDR_CS1_CONFIG 0x0 -#define CONFIG_SYS_DDR_CS2_CONFIG 0x0 -#define CONFIG_SYS_DDR_CS3_CONFIG 0x0 +#define CONFIG_SYS_DDR_SIZE 512 -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f -#define CONFIG_SYS_DDR_CS1_BNDS 0x0 -#define CONFIG_SYS_DDR_CS2_BNDS 0x0 -#define CONFIG_SYS_DDR_CS3_BNDS 0x0 +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 -#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000 +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x2625b221 -#define CONFIG_SYS_DDR_TIMING_2 0x1f9820c7 -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 +#define CONFIG_SYS_DDR_TIMING_0 0x00260802 +#define CONFIG_SYS_DDR_TIMING_1 0x3837c322 +#define CONFIG_SYS_DDR_TIMING_2 0x0f9848c6 +#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -/* ~MEM_EN, SREN, DDR-II, 32_BE */ -#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080000 +#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080008 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_INTERVAL 0x04060100 +#define CONFIG_SYS_DDR_INTERVAL 0x02000100 -#define CONFIG_SYS_DDR_MODE 0x078e0232 +#define CONFIG_SYS_DDR_MODE 0x04040242 +#define CONFIG_SYS_DDR_MODE2 0x00800000 /* Flash */ #define CONFIG_SYS_FLASH_CFI @@ -404,8 +395,8 @@ #define MV_CI mvBL-M7 #define MV_VCI mvBL-M7 -#define MV_FPGA_DATA 0xfff80000 -#define MV_FPGA_SIZE 0x00076ca2 +#define MV_FPGA_DATA 0xfff40000 +#define MV_FPGA_SIZE 0 #define MV_KERNEL_ADDR 0xff810000 #define MV_INITRD_ADDR 0xffb00000 #define MV_SOURCE_ADDR 0xff804000 @@ -452,7 +443,7 @@ "static_ipaddr=192.168.90.10\0" \ "static_netmask=255.255.255.0\0" \ "static_gateway=0.0.0.0\0" \ - "initrd_name=uInitrd.mvblm7-xenorfs\0" \ + "initrd_name=uInitrd.mvBL-M7-rfs\0" \ "zcip=no\0" \ "netboot=yes\0" \ "mvtest=Ff\0" \ |