diff options
| -rw-r--r-- | board/amcc/canyonlands/canyonlands.c | 11 | ||||
| -rw-r--r-- | board/freescale/mpc8360erdk/nand.c | 24 | ||||
| -rw-r--r-- | common/env_nand.c | 3 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu.c | 2 | ||||
| -rw-r--r-- | include/asm-ppc/processor.h | 2 |
5 files changed, 37 insertions, 5 deletions
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index e0e0211..e9eba49 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -22,6 +22,7 @@ #include <ppc440.h> #include <libfdt.h> #include <fdt_support.h> +#include <i2c.h> #include <asm/processor.h> #include <asm/io.h> #include <asm/mmu.h> @@ -393,6 +394,7 @@ int misc_init_r(void) u32 sdr0_srst1 = 0; u32 eth_cfg; u32 pvr = get_pvr(); + u8 val; /* * Set EMAC mode/configuration (GMII, SGMII, RGMII...). @@ -420,6 +422,15 @@ int misc_init_r(void) sdr0_srst1 &= ~SDR0_SRST1_AHB; mtsdr(SDR0_SRST1, sdr0_srst1); + /* + * RTC/M41T62: + * Disable square wave output: Batterie will be drained + * quickly, when this output is not disabled + */ + val = i2c_reg_read(CFG_I2C_RTC_ADDR, 0xa); + val &= ~0x40; + i2c_reg_write(CFG_I2C_RTC_ADDR, 0xa, val); + return 0; } diff --git a/board/freescale/mpc8360erdk/nand.c b/board/freescale/mpc8360erdk/nand.c index e1e790b..8b44a0f 100644 --- a/board/freescale/mpc8360erdk/nand.c +++ b/board/freescale/mpc8360erdk/nand.c @@ -39,6 +39,24 @@ static const u32 upm_array[] = { 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 60 to 63 */ }; +static void upm_setup(struct fsl_upm *upm) +{ + int i; + + /* write upm array */ + out_be32(upm->mxmr, MxMR_OP_WARR); + + for (i = 0; i < 64; i++) { + out_be32(upm->mdr, upm_array[i]); + out_8(upm->io_addr, 0x0); + } + + /* normal operation */ + out_be32(upm->mxmr, MxMR_OP_NORM); + while (in_be32(upm->mxmr) != MxMR_OP_NORM) + eieio(); +} + static int dev_ready(void) { if (in_be32(&im->qepio.ioport[4].pdat) & 0x00002000) { @@ -52,10 +70,9 @@ static int dev_ready(void) static struct fsl_upm_nand fun = { .upm = { - .array = upm_array, .io_addr = (void *)CFG_NAND_BASE, }, - .width = 1, + .width = 8, .upm_cmd_offset = 8, .upm_addr_offset = 16, .dev_ready = dev_ready, @@ -68,5 +85,8 @@ int board_nand_init(struct nand_chip *nand) fun.upm.mxmr = &im->lbus.mamr; fun.upm.mdr = &im->lbus.mdr; fun.upm.mar = &im->lbus.mar; + + upm_setup(&fun.upm); + return fsl_upm_nand_init(nand, &fun); } diff --git a/common/env_nand.c b/common/env_nand.c index a48e98e..e21d2a3 100644 --- a/common/env_nand.c +++ b/common/env_nand.c @@ -230,7 +230,8 @@ int saveenv(void) { size_t total; int ret = 0; - + nand_erase_options_t nand_erase_options; + nand_erase_options.length = CFG_ENV_RANGE; nand_erase_options.quiet = 0; nand_erase_options.jffs2 = 0; diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2b7e753..baf8b81 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -59,7 +59,7 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8572, 8572_E), }; -struct cpu_type *identify_cpu(uint ver) +struct cpu_type *identify_cpu(u32 ver) { int i; for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 139e686..5b50679 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -968,7 +968,7 @@ struct cpu_type { u32 soc_ver; }; -struct cpu_type *identify_cpu(uint ver); +struct cpu_type *identify_cpu(u32 ver); #define CPU_TYPE_ENTRY(n, v) \ { .name = #n, .soc_ver = SVR_##v, } |