diff options
| -rw-r--r-- | board/spc1920/spc1920.c | 5 | ||||
| -rw-r--r-- | include/configs/spc1920.h | 15 |
2 files changed, 19 insertions, 1 deletions
diff --git a/board/spc1920/spc1920.c b/board/spc1920/spc1920.c index d69b915..06ec60e 100644 --- a/board/spc1920/spc1920.c +++ b/board/spc1920/spc1920.c @@ -176,6 +176,11 @@ long int initdram (int board_type) hpi_init(); /* PLD Setup */ + memctl->memc_or4 = CFG_OR4_PRELIM; + memctl->memc_br4 = CFG_BR4_PRELIM; + udelay(1000); + + /* PLD Setup */ memctl->memc_or5 = CFG_OR5_PRELIM; memctl->memc_br5 = CFG_BR5_PRELIM; udelay(1000); diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h index 8f5eace..0b07a45 100644 --- a/include/configs/spc1920.h +++ b/include/configs/spc1920.h @@ -392,10 +392,23 @@ #endif /* CONFIG_SPC1920_HPI_TEST */ /* + * Ramtron FM18L08 FRAM 32KB on CS4 + */ +#define CFG_SPC1920_FRAM_BASE 0x80100000 +#define CFG_PRELIM_OR4_AM 0xffff8000 +#define CFG_OR4_PRELIM (CFG_PRELIM_OR4_AM | \ + OR_ACS_DIV2 | \ + OR_BI | \ + OR_SCY_4_CLK | \ + OR_TRLX) + +#define CFG_BR4_PRELIM ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); + +/* * PLD CS5 */ #define CFG_SPC1920_PLD_BASE 0x80000000 -#define CFG_PRELIM_OR5_AM 0xfff00000 +#define CFG_PRELIM_OR5_AM 0xffff8000 #define CFG_OR5_PRELIM (CFG_PRELIM_OR5_AM | \ OR_CSNT_SAM | \ |