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-rw-r--r--cpu/blackfin/initcode.c10
-rw-r--r--cpu/blackfin/interrupts.c12
-rw-r--r--cpu/blackfin/serial.c26
-rw-r--r--cpu/blackfin/serial.h121
-rw-r--r--include/asm-blackfin/blackfin_local.h2
5 files changed, 91 insertions, 80 deletions
diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index ed43f85..5f80ad6 100644
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -34,7 +34,7 @@ static inline void serial_init(void)
size_t i;
/* force RTS rather than relying on auto RTS */
- bfin_write_UART1_MCR(bfin_read_UART1_MCR() | FCPOL);
+ bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) | FCPOL);
/* Wait for the line to clear up. We cannot rely on UART
* registers as none of them reflect the status of the RSR.
@@ -64,7 +64,7 @@ static inline void serial_init(void)
#endif
if (BFIN_DEBUG_EARLY_SERIAL) {
- int ucen = *pUART_GCTL & UCEN;
+ int ucen = bfin_read16(&pUART->gctl) & UCEN;
serial_early_init();
/* If the UART is off, that means we need to program
@@ -81,7 +81,7 @@ static inline void serial_deinit(void)
#ifdef __ADSPBF54x__
if (BFIN_UART_USE_RTS && CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
/* clear forced RTS rather than relying on auto RTS */
- bfin_write_UART1_MCR(bfin_read_UART1_MCR() & ~FCPOL);
+ bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) & ~FCPOL);
}
#endif
}
@@ -95,9 +95,9 @@ static inline void serial_putc(char c)
if (c == '\n')
serial_putc('\r');
- *pUART_THR = c;
+ bfin_write16(&pUART->thr, c);
- while (!(*pUART_LSR & TEMT))
+ while (!(bfin_read16(&pUART->lsr) & TEMT))
continue;
}
diff --git a/cpu/blackfin/interrupts.c b/cpu/blackfin/interrupts.c
index 921bfe0..54a67b4 100644
--- a/cpu/blackfin/interrupts.c
+++ b/cpu/blackfin/interrupts.c
@@ -97,12 +97,12 @@ void __udelay(unsigned long usec)
#define MAX_TIM_LOAD 0xFFFFFFFF
int timer_init(void)
{
- *pTCNTL = 0x1;
+ bfin_write_TCNTL(0x1);
CSYNC();
- *pTSCALE = 0x0;
- *pTCOUNT = MAX_TIM_LOAD;
- *pTPERIOD = MAX_TIM_LOAD;
- *pTCNTL = 0x7;
+ bfin_write_TSCALE(0x0);
+ bfin_write_TCOUNT(MAX_TIM_LOAD);
+ bfin_write_TPERIOD(MAX_TIM_LOAD);
+ bfin_write_TCNTL(0x7);
CSYNC();
timestamp = 0;
@@ -130,7 +130,7 @@ ulong get_timer(ulong base)
ulong milisec;
/* Number of clocks elapsed */
- ulong clocks = (MAX_TIM_LOAD - (*pTCOUNT));
+ ulong clocks = (MAX_TIM_LOAD - bfin_read_TCOUNT());
/*
* Find if the TCOUNT is reset
diff --git a/cpu/blackfin/serial.c b/cpu/blackfin/serial.c
index 2abda18..901cb97 100644
--- a/cpu/blackfin/serial.c
+++ b/cpu/blackfin/serial.c
@@ -44,10 +44,6 @@
#ifdef CONFIG_UART_CONSOLE
-#if defined(UART_LSR) && (CONFIG_UART_CONSOLE != 0)
-# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
-#endif
-
#include "serial.h"
#ifdef CONFIG_DEBUG_SERIAL
@@ -63,7 +59,7 @@ size_t cache_count;
static uint16_t uart_lsr_save;
static uint16_t uart_lsr_read(void)
{
- uint16_t lsr = *pUART_LSR;
+ uint16_t lsr = bfin_read16(&pUART->lsr);
uart_lsr_save |= (lsr & (OE|PE|FE|BI));
return lsr | uart_lsr_save;
}
@@ -71,15 +67,21 @@ static uint16_t uart_lsr_read(void)
static void uart_lsr_clear(void)
{
uart_lsr_save = 0;
- *pUART_LSR |= -1;
+ bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1);
}
#else
/* When debugging is disabled, we only care about the DR bit, so if other
* bits get set/cleared, we don't really care since we don't read them
* anyways (and thus anomaly 05000099 is irrelevant).
*/
-static inline uint16_t uart_lsr_read(void) { return *pUART_LSR; }
-static inline void uart_lsr_clear(void) { *pUART_LSR = -1; }
+static uint16_t uart_lsr_read(void)
+{
+ return bfin_read16(&pUART->lsr);
+}
+static void uart_lsr_clear(void)
+{
+ bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1);
+}
#endif
/* Symbol for our assembly to call. */
@@ -130,7 +132,7 @@ void serial_putc(const char c)
continue;
/* queue the character for transmission */
- *pUART_THR = c;
+ bfin_write16(&pUART->thr, c);
SSYNC();
WATCHDOG_RESET();
@@ -151,7 +153,7 @@ int serial_getc(void)
continue;
/* grab the new byte */
- uart_rbr_val = *pUART_RBR;
+ uart_rbr_val = bfin_read16(&pUART->rbr);
#ifdef CONFIG_DEBUG_SERIAL
/* grab & clear the LSR */
@@ -165,8 +167,8 @@ int serial_getc(void)
uint16_t dll, dlh;
printf("\n[SERIAL ERROR]\n");
ACCESS_LATCH();
- dll = *pUART_DLL;
- dlh = *pUART_DLH;
+ dll = bfin_read16(&pUART->dll);
+ dlh = bfin_read16(&pUART->dlh);
ACCESS_PORT_IER();
printf("\tDLL=0x%x DLH=0x%x\n", dll, dlh);
do {
diff --git a/cpu/blackfin/serial.h b/cpu/blackfin/serial.h
index 6cbc564..5f9be86 100644
--- a/cpu/blackfin/serial.h
+++ b/cpu/blackfin/serial.h
@@ -24,71 +24,80 @@
# define BFIN_DEBUG_EARLY_SERIAL 0
#endif
+#ifndef __ASSEMBLY__
+
#define LOB(x) ((x) & 0xFF)
#define HIB(x) (((x) >> 8) & 0xFF)
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits. So use a helper macro to streamline this.
+ */
+#define __BFP(m) u16 m; u16 __pad_##m
+struct bfin_mmr_serial {
+#ifdef __ADSPBF54x__
+ __BFP(dll);
+ __BFP(dlh);
+ __BFP(gctl);
+ __BFP(lcr);
+ __BFP(mcr);
+ __BFP(lsr);
+ __BFP(msr);
+ __BFP(scr);
+ __BFP(ier_set);
+ __BFP(ier_clear);
+ __BFP(thr);
+ __BFP(rbr);
+#else
+ union {
+ u16 dll;
+ u16 thr;
+ const u16 rbr;
+ };
+ const u16 __spad0;
+ union {
+ u16 dlh;
+ u16 ier;
+ };
+ const u16 __spad1;
+ const __BFP(iir);
+ __BFP(lcr);
+ __BFP(mcr);
+ __BFP(lsr);
+ __BFP(msr);
+ __BFP(scr);
+ const u32 __spad2;
+ __BFP(gctl);
+#endif
+};
+#undef __BFP
+
#ifndef UART_LSR
# if (CONFIG_UART_CONSOLE == 3)
-# define pUART_DLH pUART3_DLH
-# define pUART_DLL pUART3_DLL
-# define pUART_GCTL pUART3_GCTL
-# define pUART_IER pUART3_IER
-# define pUART_IERC pUART3_IER_CLEAR
-# define pUART_LCR pUART3_LCR
-# define pUART_LSR pUART3_LSR
-# define pUART_RBR pUART3_RBR
-# define pUART_THR pUART3_THR
-# define UART_THR UART3_THR
-# define UART_LSR UART3_LSR
+# define UART_BASE UART3_DLL
# elif (CONFIG_UART_CONSOLE == 2)
-# define pUART_DLH pUART2_DLH
-# define pUART_DLL pUART2_DLL
-# define pUART_GCTL pUART2_GCTL
-# define pUART_IER pUART2_IER
-# define pUART_IERC pUART2_IER_CLEAR
-# define pUART_LCR pUART2_LCR
-# define pUART_LSR pUART2_LSR
-# define pUART_RBR pUART2_RBR
-# define pUART_THR pUART2_THR
-# define UART_THR UART2_THR
-# define UART_LSR UART2_LSR
+# define UART_BASE UART2_DLL
# elif (CONFIG_UART_CONSOLE == 1)
-# define pUART_DLH pUART1_DLH
-# define pUART_DLL pUART1_DLL
-# define pUART_GCTL pUART1_GCTL
-# define pUART_IER pUART1_IER
-# define pUART_IERC pUART1_IER_CLEAR
-# define pUART_LCR pUART1_LCR
-# define pUART_LSR pUART1_LSR
-# define pUART_RBR pUART1_RBR
-# define pUART_THR pUART1_THR
-# define UART_THR UART1_THR
-# define UART_LSR UART1_LSR
+# define UART_BASE UART1_DLL
# elif (CONFIG_UART_CONSOLE == 0)
-# define pUART_DLH pUART0_DLH
-# define pUART_DLL pUART0_DLL
-# define pUART_GCTL pUART0_GCTL
-# define pUART_IER pUART0_IER
-# define pUART_IERC pUART0_IER_CLEAR
-# define pUART_LCR pUART0_LCR
-# define pUART_LSR pUART0_LSR
-# define pUART_RBR pUART0_RBR
-# define pUART_THR pUART0_THR
-# define UART_THR UART0_THR
-# define UART_LSR UART0_LSR
+# define UART_BASE UART0_DLL
+# endif
+#else
+# if CONFIG_UART_CONSOLE != 0
+# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
# endif
+# define UART_BASE UART_DLL
#endif
-
-#ifndef __ASSEMBLY__
+#define pUART ((volatile struct bfin_mmr_serial *)UART_BASE)
#ifdef __ADSPBF54x__
# define ACCESS_LATCH()
# define ACCESS_PORT_IER()
-# define CLEAR_IER() (*pUART_IERC = 0)
#else
-# define ACCESS_LATCH() (*pUART_LCR |= DLAB)
-# define ACCESS_PORT_IER() (*pUART_LCR &= ~DLAB)
-# define CLEAR_IER() (*pUART_IER = 0)
+# define ACCESS_LATCH() \
+ bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
+# define ACCESS_PORT_IER() \
+ bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
#endif
__attribute__((always_inline))
@@ -142,10 +151,10 @@ static inline void serial_early_init(void)
serial_do_portmux();
/* always enable UART -- avoids anomalies 05000309 and 05000350 */
- *pUART_GCTL = UCEN;
+ bfin_write16(&pUART->gctl, UCEN);
/* Set LCR to Word Lengh 8-bit word select */
- *pUART_LCR = WLS_8;
+ bfin_write16(&pUART->lcr, WLS_8);
SSYNC();
}
@@ -158,8 +167,8 @@ static inline void serial_early_put_div(uint16_t divisor)
SSYNC();
/* Program the divisor to get the baud rate we want */
- *pUART_DLL = LOB(divisor);
- *pUART_DLH = HIB(divisor);
+ bfin_write16(&pUART->dll, LOB(divisor));
+ bfin_write16(&pUART->dlh, HIB(divisor));
SSYNC();
/* Clear DLAB in LCR to Access THR RBR IER */
@@ -174,8 +183,8 @@ static inline uint16_t serial_early_get_div(void)
ACCESS_LATCH();
SSYNC();
- uint8_t dll = *pUART_DLL;
- uint8_t dlh = *pUART_DLH;
+ uint8_t dll = bfin_read16(&pUART->dll);
+ uint8_t dlh = bfin_read16(&pUART->dlh);
uint16_t divisor = (dlh << 8) | dll;
/* Clear DLAB in LCR to Access THR RBR IER */
diff --git a/include/asm-blackfin/blackfin_local.h b/include/asm-blackfin/blackfin_local.h
index 308014a..3fd34b3 100644
--- a/include/asm-blackfin/blackfin_local.h
+++ b/include/asm-blackfin/blackfin_local.h
@@ -61,7 +61,7 @@ extern u_long get_vco(void);
extern u_long get_cclk(void);
extern u_long get_sclk(void);
-# define bfin_revid() (*pCHIPID >> 28)
+# define bfin_revid() (bfin_read_CHIPID() >> 28)
extern bool bfin_os_log_check(void);
extern void bfin_os_log_dump(void);
generated by cgit v1.1 at 2024-11-24 13:51:57 +0000