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-rw-r--r--Makefile1
-rw-r--r--README20
-rw-r--r--common/cmd_mmc.c2
-rw-r--r--common/cmd_sata.c24
-rw-r--r--common/lcd.c39
-rw-r--r--config.mk4
-rw-r--r--drivers/block/ata_piix.c6
-rw-r--r--drivers/video/cfb_console.c36
-rw-r--r--drivers/video/mb862xx.c271
-rw-r--r--include/asm-microblaze/byteorder.h4
-rw-r--r--include/asm-ppc/config.h9
-rw-r--r--include/config_cmd_default.h6
-rw-r--r--include/mb862xx.h69
-rw-r--r--lib_microblaze/board.c4
-rw-r--r--tools/Makefile4
15 files changed, 336 insertions, 163 deletions
diff --git a/Makefile b/Makefile
index 090e645..9e6346f 100644
--- a/Makefile
+++ b/Makefile
@@ -483,6 +483,7 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
mv $@.tmp $@
sinclude $(obj)include/autoconf.mk.dep
+sinclude $(obj)include/autoconf.mk
#########################################################################
else # !config.mk
diff --git a/README b/README
index ca415d3..7e43c21 100644
--- a/README
+++ b/README
@@ -1074,6 +1074,26 @@ The following options need to be configured:
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
+ CONFIG_SPLASH_SCREEN_ALIGN
+
+ If this option is set the splash image can be freely positioned
+ on the screen. Environment variable "splashpos" specifies the
+ position as "x,y". If a positive number is given it is used as
+ number of pixel from left/top. If a negative number is given it
+ is used as number of pixel from right/bottom. You can also
+ specify 'm' for centering the image.
+
+ Example:
+ setenv splashpos m,m
+ => image at center of screen
+
+ setenv splashpos 30,20
+ => image at x = 30 and y = 20
+
+ setenv splashpos -10,m
+ => vertically centered image
+ at x = dspWidth - bmpWidth - 9
+
- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
If this option is set, additionally to standard BMP
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 32fe49b..0e3393b 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -26,7 +26,7 @@
#include <mmc.h>
#ifndef CONFIG_GENERIC_MMC
-int curr_device = -1;
+static int curr_device = -1;
int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
diff --git a/common/cmd_sata.c b/common/cmd_sata.c
index a8147e0..1693a7e 100644
--- a/common/cmd_sata.c
+++ b/common/cmd_sata.c
@@ -28,7 +28,7 @@
#include <part.h>
#include <sata.h>
-int curr_device = -1;
+int sata_curr_device = -1;
block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
int __sata_initialize(void)
@@ -52,7 +52,7 @@ int __sata_initialize(void)
if ((sata_dev_desc[i].lba > 0) && (sata_dev_desc[i].blksz > 0))
init_part(&sata_dev_desc[i]);
}
- curr_device = 0;
+ sata_curr_device = 0;
return rc;
}
int sata_initialize(void) __attribute__((weak,alias("__sata_initialize")));
@@ -70,7 +70,7 @@ int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return sata_initialize();
/* If the user has not yet run `sata init`, do it now */
- if (curr_device == -1)
+ if (sata_curr_device == -1)
if (sata_initialize())
return 1;
@@ -91,12 +91,12 @@ int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
return 0;
} else if (strncmp(argv[1],"dev", 3) == 0) {
- if ((curr_device < 0) || (curr_device >= CONFIG_SYS_SATA_MAX_DEVICE)) {
+ if ((sata_curr_device < 0) || (sata_curr_device >= CONFIG_SYS_SATA_MAX_DEVICE)) {
puts("\nno SATA devices available\n");
return 1;
}
- printf("\nSATA device %d: ", curr_device);
- dev_print(&sata_dev_desc[curr_device]);
+ printf("\nSATA device %d: ", sata_curr_device);
+ dev_print(&sata_dev_desc[sata_curr_device]);
return 0;
} else if (strncmp(argv[1],"part",4) == 0) {
int dev, ok;
@@ -131,7 +131,7 @@ int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (sata_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
return 1;
- curr_device = dev;
+ sata_curr_device = dev;
puts("... is now current device\n");
@@ -158,12 +158,12 @@ int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
printf("\nSATA read: device %d block # %ld, count %ld ... ",
- curr_device, blk, cnt);
+ sata_curr_device, blk, cnt);
- n = sata_read(curr_device, blk, cnt, (u32 *)addr);
+ n = sata_read(sata_curr_device, blk, cnt, (u32 *)addr);
/* flush cache after read */
- flush_cache(addr, cnt * sata_dev_desc[curr_device].blksz);
+ flush_cache(addr, cnt * sata_dev_desc[sata_curr_device].blksz);
printf("%ld blocks read: %s\n",
n, (n==cnt) ? "OK" : "ERROR");
@@ -176,9 +176,9 @@ int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
printf("\nSATA write: device %d block # %ld, count %ld ... ",
- curr_device, blk, cnt);
+ sata_curr_device, blk, cnt);
- n = sata_write(curr_device, blk, cnt, (u32 *)addr);
+ n = sata_write(sata_curr_device, blk, cnt, (u32 *)addr);
printf("%ld blocks written: %s\n",
n, (n == cnt) ? "OK" : "ERROR");
diff --git a/common/lcd.c b/common/lcd.c
index 74a5c77..b9a698d 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -620,6 +620,11 @@ void bitmap_plot (int x, int y)
* Display the BMP file located at address bmp_image.
* Only uncompressed.
*/
+
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+#define BMP_ALIGN_CENTER 0x7FFF
+#endif
+
int lcd_display_bitmap(ulong bmp_image, int x, int y)
{
#if !defined(CONFIG_MCC200)
@@ -731,6 +736,19 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
#endif
padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
+
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ if (x == BMP_ALIGN_CENTER)
+ x = max(0, (pwidth - width) / 2);
+ else if (x < 0)
+ x = max(0, pwidth - width + x + 1);
+
+ if (y == BMP_ALIGN_CENTER)
+ y = max(0, (panel_info.vl_row - height) / 2);
+ else if (y < 0)
+ y = max(0, panel_info.vl_row - height + y + 1);
+#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
+
if ((x + width)>pwidth)
width = pwidth - x;
if ((y + height)>panel_info.vl_row)
@@ -809,9 +827,26 @@ static void *lcd_logo (void)
static int do_splash = 1;
if (do_splash && (s = getenv("splashimage")) != NULL) {
- addr = simple_strtoul(s, NULL, 16);
+ int x = 0, y = 0;
do_splash = 0;
+ addr = simple_strtoul (s, NULL, 16);
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ if ((s = getenv ("splashpos")) != NULL) {
+ if (s[0] == 'm')
+ x = BMP_ALIGN_CENTER;
+ else
+ x = simple_strtol (s, NULL, 0);
+
+ if ((s = strchr (s + 1, ',')) != NULL) {
+ if (s[1] == 'm')
+ y = BMP_ALIGN_CENTER;
+ else
+ y = simple_strtol (s + 1, NULL, 0);
+ }
+ }
+#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
+
#ifdef CONFIG_VIDEO_BMP_GZIP
bmp_image_t *bmp = (bmp_image_t *)addr;
unsigned long len;
@@ -822,7 +857,7 @@ static void *lcd_logo (void)
}
#endif
- if (lcd_display_bitmap (addr, 0, 0) == 0) {
+ if (lcd_display_bitmap (addr, x, y) == 0) {
return ((void *)lcd_base);
}
}
diff --git a/config.mk b/config.mk
index 7fc0453..f2c2c6c 100644
--- a/config.mk
+++ b/config.mk
@@ -194,10 +194,6 @@ BFD_ROOT_DIR = /opt/powerpc
endif
endif
-ifeq ($(PCI_CLOCK),PCI_66M)
-CFLAGS := $(CFLAGS) -DPCI_66M
-endif
-
#########################################################################
export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
diff --git a/drivers/block/ata_piix.c b/drivers/block/ata_piix.c
index ec37687..549de31 100644
--- a/drivers/block/ata_piix.c
+++ b/drivers/block/ata_piix.c
@@ -36,7 +36,7 @@
#include <ata.h>
extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
-extern int curr_device;
+extern int sata_curr_device;
#define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */
@@ -204,8 +204,8 @@ init_sata (int dev)
dev_print (&sata_dev_desc[devno]);
/* initialize partition type */
init_part (&sata_dev_desc[devno]);
- if (curr_device < 0)
- curr_device =
+ if (sata_curr_device < 0)
+ sata_curr_device =
i * CONFIG_SYS_SATA_DEVS_PER_BUS + j;
}
}
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index bcafb27..6adce19 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -193,6 +193,11 @@ CONFIG_VIDEO_HW_CURSOR: - Uses the hardware cursor capability of the
#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
#include <watchdog.h>
#include <bmp_layout.h>
+
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+#define BMP_ALIGN_CENTER 0x7FFF
+#endif
+
#endif
/*****************************************************************************/
@@ -877,6 +882,18 @@ int video_display_bitmap (ulong bmp_image, int x, int y)
padded_line = (((width * bpp + 7) / 8) + 3) & ~0x3;
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ if (x == BMP_ALIGN_CENTER)
+ x = max(0, (VIDEO_VISIBLE_COLS - width) / 2);
+ else if (x < 0)
+ x = max(0, VIDEO_VISIBLE_COLS - width + x + 1);
+
+ if (y == BMP_ALIGN_CENTER)
+ y = max(0, (VIDEO_VISIBLE_ROWS - height) / 2);
+ else if (y < 0)
+ y = max(0, VIDEO_VISIBLE_ROWS - height + y + 1);
+#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
+
if ((x + width) > VIDEO_VISIBLE_COLS)
width = VIDEO_VISIBLE_COLS - x;
if ((y + height) > VIDEO_VISIBLE_ROWS)
@@ -1188,9 +1205,26 @@ static void *video_logo (void)
ulong addr;
if ((s = getenv ("splashimage")) != NULL) {
+ int x = 0, y = 0;
+
addr = simple_strtoul (s, NULL, 16);
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ if ((s = getenv ("splashpos")) != NULL) {
+ if (s[0] == 'm')
+ x = BMP_ALIGN_CENTER;
+ else
+ x = simple_strtol (s, NULL, 0);
+
+ if ((s = strchr (s + 1, ',')) != NULL) {
+ if (s[1] == 'm')
+ y = BMP_ALIGN_CENTER;
+ else
+ y = simple_strtol (s + 1, NULL, 0);
+ }
+ }
+#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
- if (video_display_bitmap (addr, 0, 0) == 0) {
+ if (video_display_bitmap (addr, x, y) == 0) {
return ((void *) (video_fb_address));
}
}
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index 01eda55..a8676cc 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -37,6 +37,7 @@
#if defined(CONFIG_POST)
#include <post.h>
#endif
+
/*
* Graphic Device
*/
@@ -65,74 +66,74 @@ unsigned int fr_div[] = { 0x00000f00, 0x00000900, 0x00000500 };
#define rd_io in32r
#define wr_io out32r
#else
-#define rd_io(addr) in_be32((volatile unsigned*)(addr))
-#define wr_io(addr,val) out_be32((volatile unsigned*)(addr), (val))
+#define rd_io(addr) in_be32((volatile unsigned *)(addr))
+#define wr_io(addr, val) out_be32((volatile unsigned *)(addr), (val))
#endif
-#define HOST_RD_REG(off) rd_io((pGD->frameAdrs + 0x01fc0000 + (off)))
-#define HOST_WR_REG(off, val) wr_io((pGD->frameAdrs + 0x01fc0000 + (off)), (val))
-#define DISP_RD_REG(off) rd_io((pGD->frameAdrs + 0x01fd0000 + (off)))
-#define DISP_WR_REG(off, val) wr_io((pGD->frameAdrs + 0x01fd0000 + (off)), (val))
-#define DE_RD_REG(off) rd_io((pGD->dprBase + (off)))
-#define DE_WR_REG(off, val) wr_io((pGD->dprBase + (off)), (val))
+#define HOST_RD_REG(off) rd_io((dev->frameAdrs + GC_HOST_BASE + (off)))
+#define HOST_WR_REG(off, val) wr_io((dev->frameAdrs + GC_HOST_BASE + (off)), \
+ (val))
+#define DISP_RD_REG(off) rd_io((dev->frameAdrs + GC_DISP_BASE + (off)))
+#define DISP_WR_REG(off, val) wr_io((dev->frameAdrs + GC_DISP_BASE + (off)), \
+ (val))
+#define DE_RD_REG(off) rd_io((dev->dprBase + (off)))
+#define DE_WR_REG(off, val) wr_io((dev->dprBase + (off)), (val))
#if defined(CONFIG_VIDEO_CORALP)
-#define DE_WR_FIFO(val) wr_io((pGD->dprBase + (0x8400)), (val))
+#define DE_WR_FIFO(val) wr_io((dev->dprBase + (GC_GEO_FIFO)), (val))
#else
-#define DE_WR_FIFO(val) wr_io((pGD->dprBase + (0x04a0)), (val))
+#define DE_WR_FIFO(val) wr_io((dev->dprBase + (GC_FIFO)), (val))
#endif
-#define L0PAL_RD_REG(idx, val) rd_io((pGD->frameAdrs + 0x01fd0400 + ((idx)<<2)))
-#define L0PAL_WR_REG(idx, val) wr_io((pGD->frameAdrs + 0x01fd0400 + ((idx)<<2)), (val))
-#define L1PAL_RD_REG(idx, val) rd_io((pGD->frameAdrs + 0x01fd0800 + ((idx)<<2)))
-#define L1PAL_WR_REG(idx, val) wr_io((pGD->frameAdrs + 0x01fd0800 + ((idx)<<2)), (val))
-#define L2PAL_RD_REG(idx, val) rd_io((pGD->frameAdrs + 0x01fd1000 + ((idx)<<2)))
-#define L2PAL_WR_REG(idx, val) wr_io((pGD->frameAdrs + 0x01fd1000 + ((idx)<<2)), (val))
-#define L3PAL_RD_REG(idx, val) rd_io((pGD->frameAdrs + 0x01fd1400 + ((idx)<<2)))
-#define L3PAL_WR_REG(idx, val) wr_io((pGD->frameAdrs + 0x01fd1400 + ((idx)<<2)), (val))
+#define L0PAL_WR_REG(idx, val) wr_io((dev->frameAdrs + \
+ (GC_DISP_BASE | GC_L0PAL0) + \
+ ((idx) << 2)), (val))
-static void gdc_sw_reset(void)
+static void gdc_sw_reset (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
- HOST_WR_REG (0x002c, 0x00000001);
+ GraphicDevice *dev = &mb862xx;
+
+ HOST_WR_REG (GC_SRST, 0x1);
udelay (500);
video_hw_init ();
}
-static void de_wait(void)
+static void de_wait (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
int lc = 0x10000;
- /* Sync with software writes to framebuffer,
- try to reset if engine locked */
- while (DE_RD_REG (0x0400) & 0x00000131)
+ /*
+ * Sync with software writes to framebuffer,
+ * try to reset if engine locked
+ */
+ while (DE_RD_REG (GC_CTR) & 0x00000131)
if (lc-- < 0) {
gdc_sw_reset ();
- printf ("gdc reset done after drawing engine lock...\n");
+ puts ("gdc reset done after drawing engine lock.\n");
break;
}
}
-static void de_wait_slots(int slots)
+static void de_wait_slots (int slots)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
int lc = 0x10000;
/* Wait for free fifo slots */
- while (DE_RD_REG (0x0408) < slots)
+ while (DE_RD_REG (GC_IFCNT) < slots)
if (lc-- < 0) {
gdc_sw_reset ();
- printf ("gdc reset done after drawing engine lock...\n");
+ puts ("gdc reset done after drawing engine lock.\n");
break;
}
}
#if !defined(CONFIG_VIDEO_CORALP)
-static void board_disp_init(void)
+static void board_disp_init (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
const gdc_regs *regs = board_get_regs ();
while (regs->index) {
@@ -147,69 +148,69 @@ static void board_disp_init(void)
*/
static void de_init (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
- int cf = (pGD->gdfBytesPP == 1) ? 0x0000 : 0x8000;
+ GraphicDevice *dev = &mb862xx;
+ int cf = (dev->gdfBytesPP == 1) ? 0x0000 : 0x8000;
- pGD->dprBase = pGD->frameAdrs + 0x01ff0000;
+ dev->dprBase = dev->frameAdrs + GC_DRAW_BASE;
/* Setup mode and fbbase, xres, fg, bg */
de_wait_slots (2);
DE_WR_FIFO (0xf1010108);
DE_WR_FIFO (cf | 0x0300);
- DE_WR_REG (0x0440, 0x0000);
- DE_WR_REG (0x0444, pGD->winSizeX);
- DE_WR_REG (0x0480, 0x0000);
- DE_WR_REG (0x0484, 0x0000);
+ DE_WR_REG (GC_FBR, 0x0);
+ DE_WR_REG (GC_XRES, dev->winSizeX);
+ DE_WR_REG (GC_FC, 0x0);
+ DE_WR_REG (GC_BC, 0x0);
/* Reset clipping */
- DE_WR_REG (0x0454, 0x0000);
- DE_WR_REG (0x0458, pGD->winSizeX);
- DE_WR_REG (0x045c, 0x0000);
- DE_WR_REG (0x0460, pGD->winSizeY);
+ DE_WR_REG (GC_CXMIN, 0x0);
+ DE_WR_REG (GC_CXMAX, dev->winSizeX);
+ DE_WR_REG (GC_CYMIN, 0x0);
+ DE_WR_REG (GC_CYMAX, dev->winSizeY);
/* Clear framebuffer using drawing engine */
de_wait_slots (3);
DE_WR_FIFO (0x09410000);
DE_WR_FIFO (0x00000000);
- DE_WR_FIFO (pGD->winSizeY<<16 | pGD->winSizeX);
+ DE_WR_FIFO (dev->winSizeY << 16 | dev->winSizeX);
/* sync with SW access to framebuffer */
de_wait ();
}
#if defined(CONFIG_VIDEO_CORALP)
-unsigned int pci_video_init(void)
+unsigned int pci_video_init (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
pci_dev_t devbusfn;
- if ((devbusfn = pci_find_devices(supported, 0)) < 0)
- {
- printf ("PCI video controller not found!\n");
+ if ((devbusfn = pci_find_devices (supported, 0)) < 0) {
+ puts ("PCI video controller not found!\n");
return 0;
}
/* PCI setup */
- pci_write_config_dword (devbusfn, PCI_COMMAND, (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pGD->frameAdrs);
- pGD->frameAdrs = pci_mem_to_phys (devbusfn, pGD->frameAdrs);
+ pci_write_config_dword (devbusfn, PCI_COMMAND,
+ (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &dev->frameAdrs);
+ dev->frameAdrs = pci_mem_to_phys (devbusfn, dev->frameAdrs);
- if (pGD->frameAdrs == 0) {
- printf ("PCI config: failed to get base address\n");
+ if (dev->frameAdrs == 0) {
+ puts ("PCI config: failed to get base address\n");
return 0;
}
- pGD->pciBase = pGD->frameAdrs;
+ dev->pciBase = dev->frameAdrs;
/* Setup clocks and memory mode for Coral-P Eval. Board */
- HOST_WR_REG (0x0038, 0x00090000);
+ HOST_WR_REG (GC_CCF, 0x00090000);
udelay (200);
- HOST_WR_REG (0xfffc, 0x11d7fa13);
+ HOST_WR_REG (GC_MMR, 0x11d7fa13);
udelay (100);
- return pGD->frameAdrs;
+ return dev->frameAdrs;
}
unsigned int card_init (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
unsigned int cf, videomode, div = 0;
unsigned long t1, hsync, vsync;
char *penv;
@@ -217,19 +218,18 @@ unsigned int card_init (void)
struct ctfb_res_modes *res_mode;
struct ctfb_res_modes var_mode;
- memset (pGD, 0, sizeof (GraphicDevice));
+ memset (dev, 0, sizeof (GraphicDevice));
- if (!pci_video_init ()) {
+ if (!pci_video_init ())
return 0;
- }
- printf ("CoralP\n");
+ puts ("CoralP\n");
tmp = 0;
videomode = 0x310;
/* get video mode via environment */
if ((penv = getenv ("videomode")) != NULL) {
- /* deceide if it is a string */
+ /* decide if it is a string */
if (penv[0] <= '9') {
videomode = (int) simple_strtoul (penv, NULL, 16);
tmp = 1;
@@ -237,28 +237,28 @@ unsigned int card_init (void)
} else {
tmp = 1;
}
+
if (tmp) {
- /* parameter are vesa modes */
- /* search params */
+ /* parameter are vesa modes, search params */
for (i = 0; i < VESA_MODES_COUNT; i++) {
if (vesa_modes[i].vesanr == videomode)
break;
}
if (i == VESA_MODES_COUNT) {
- printf ("\tno VESA Mode found, switching to mode 0x%x \n", videomode);
+ printf ("\tno VESA Mode found, fallback to mode 0x%x\n",
+ videomode);
i = 0;
}
- res_mode =
- (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].resindex];
+ res_mode = (struct ctfb_res_modes *)
+ &res_mode_init[vesa_modes[i].resindex];
if (vesa_modes[i].resindex > 2) {
- printf ("\tUnsupported resolution, switching to default\n");
+ puts ("\tUnsupported resolution, using default\n");
bpp = vesa_modes[1].bits_per_pixel;
div = fr_div[1];
}
bpp = vesa_modes[i].bits_per_pixel;
div = fr_div[vesa_modes[i].resindex];
} else {
-
res_mode = (struct ctfb_res_modes *) &var_mode;
bpp = video_get_params (res_mode, penv);
}
@@ -276,85 +276,97 @@ unsigned int card_init (void)
vsync = 1000000000L / t1;
/* fill in Graphic device struct */
- sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
+ sprintf (dev->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
res_mode->yres, bpp, (hsync / 1000), (vsync / 1000));
- printf ("\t%s\n", pGD->modeIdent);
- pGD->winSizeX = res_mode->xres;
- pGD->winSizeY = res_mode->yres;
- pGD->memSize = VIDEO_MEM_SIZE;
+ printf ("\t%s\n", dev->modeIdent);
+ dev->winSizeX = res_mode->xres;
+ dev->winSizeY = res_mode->yres;
+ dev->memSize = VIDEO_MEM_SIZE;
switch (bpp) {
case 8:
- pGD->gdfIndex = GDF__8BIT_INDEX;
- pGD->gdfBytesPP = 1;
+ dev->gdfIndex = GDF__8BIT_INDEX;
+ dev->gdfBytesPP = 1;
break;
case 15:
case 16:
- pGD->gdfIndex = GDF_15BIT_555RGB;
- pGD->gdfBytesPP = 2;
+ dev->gdfIndex = GDF_15BIT_555RGB;
+ dev->gdfBytesPP = 2;
break;
default:
- printf ("\t%d bpp configured, but only 8,15 and 16 supported.\n", bpp);
- printf ("\tSwitching back to 15bpp\n");
- pGD->gdfIndex = GDF_15BIT_555RGB;
- pGD->gdfBytesPP = 2;
+ printf ("\t%d bpp configured, but only 8,15 and 16 supported\n",
+ bpp);
+ puts ("\tfallback to 15bpp\n");
+ dev->gdfIndex = GDF_15BIT_555RGB;
+ dev->gdfBytesPP = 2;
}
/* Setup dot clock (internal pll, division rate) */
- DISP_WR_REG (0x0100, div);
+ DISP_WR_REG (GC_DCM1, div);
/* L0 init */
- cf = (pGD->gdfBytesPP == 1) ? 0x00000000 : 0x80000000;
- DISP_WR_REG (0x0020, ((pGD->winSizeX * pGD->gdfBytesPP)/64)<<16 |
- (pGD->winSizeY-1) |
- cf);
- DISP_WR_REG (0x0024, 0x00000000);
- DISP_WR_REG (0x0028, 0x00000000);
- DISP_WR_REG (0x002c, 0x00000000);
- DISP_WR_REG (0x0110, 0x00000000);
- DISP_WR_REG (0x0114, 0x00000000);
- DISP_WR_REG (0x0118, (pGD->winSizeY-1)<<16 | pGD->winSizeX);
+ cf = (dev->gdfBytesPP == 1) ? 0x00000000 : 0x80000000;
+ DISP_WR_REG (GC_L0M, ((dev->winSizeX * dev->gdfBytesPP) / 64) << 16 |
+ (dev->winSizeY - 1) | cf);
+ DISP_WR_REG (GC_L0OA0, 0x0);
+ DISP_WR_REG (GC_L0DA0, 0x0);
+ DISP_WR_REG (GC_L0DY_L0DX, 0x0);
+ DISP_WR_REG (GC_L0EM, 0x0);
+ DISP_WR_REG (GC_L0WY_L0WX, 0x0);
+ DISP_WR_REG (GC_L0WH_L0WW, (dev->winSizeY - 1) << 16 | dev->winSizeX);
/* Display timing init */
- DISP_WR_REG (0x0004, (pGD->winSizeX+res_mode->left_margin+res_mode->right_margin+res_mode->hsync_len-1)<<16);
- DISP_WR_REG (0x0008, (pGD->winSizeX-1) << 16 | (pGD->winSizeX-1));
- DISP_WR_REG (0x000c, (res_mode->vsync_len-1)<<24|(res_mode->hsync_len-1)<<16|(pGD->winSizeX+res_mode->right_margin-1));
- DISP_WR_REG (0x0010, (pGD->winSizeY+res_mode->lower_margin+res_mode->upper_margin+res_mode->vsync_len-1)<<16);
- DISP_WR_REG (0x0014, (pGD->winSizeY-1) << 16 | (pGD->winSizeY+res_mode->lower_margin-1));
- DISP_WR_REG (0x0018, 0x00000000);
- DISP_WR_REG (0x001c, pGD->winSizeY << 16 | pGD->winSizeX);
+ DISP_WR_REG (GC_HTP_A, (dev->winSizeX +
+ res_mode->left_margin +
+ res_mode->right_margin +
+ res_mode->hsync_len - 1) << 16);
+ DISP_WR_REG (GC_HDB_HDP_A, (dev->winSizeX - 1) << 16 |
+ (dev->winSizeX - 1));
+ DISP_WR_REG (GC_VSW_HSW_HSP_A, (res_mode->vsync_len - 1) << 24 |
+ (res_mode->hsync_len - 1) << 16 |
+ (dev->winSizeX +
+ res_mode->right_margin - 1));
+ DISP_WR_REG (GC_VTR_A, (dev->winSizeY + res_mode->lower_margin +
+ res_mode->upper_margin +
+ res_mode->vsync_len - 1) << 16);
+ DISP_WR_REG (GC_VDP_VSP_A, (dev->winSizeY-1) << 16 |
+ (dev->winSizeY +
+ res_mode->lower_margin - 1));
+ DISP_WR_REG (GC_WY_WX, 0x0);
+ DISP_WR_REG (GC_WH_WW, dev->winSizeY << 16 | dev->winSizeX);
/* Display enable, L0 layer */
- DISP_WR_REG (0x0100, 0x80010000 | div);
+ DISP_WR_REG (GC_DCM1, 0x80010000 | div);
- return pGD->frameAdrs;
+ return dev->frameAdrs;
}
#endif
void *video_hw_init (void)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
- printf ("Video: Fujitsu ");
+ puts ("Video: Fujitsu ");
- memset (pGD, 0, sizeof (GraphicDevice));
+ memset (dev, 0, sizeof (GraphicDevice));
#if defined(CONFIG_VIDEO_CORALP)
- if (card_init () == 0) {
- return (NULL);
- }
+ if (card_init () == 0)
+ return NULL;
#else
- /* Preliminary init of the onboard graphic controller,
- retrieve base address */
- if ((pGD->frameAdrs = board_video_init ()) == 0) {
- printf ("Controller not found!\n");
- return (NULL);
+ /*
+ * Preliminary init of the onboard graphic controller,
+ * retrieve base address
+ */
+ if ((dev->frameAdrs = board_video_init ()) == 0) {
+ puts ("Controller not found!\n");
+ return NULL;
} else
- printf("Lime\n");
+ puts ("Lime\n");
#endif
de_init ();
#if !defined(CONFIG_VIDEO_CORALP)
- board_disp_init();
+ board_disp_init ();
#endif
#if (defined(CONFIG_LWMON5) || \
@@ -363,15 +375,16 @@ void *video_hw_init (void)
board_backlight_switch (1);
#endif
- return pGD;
+ return dev;
}
/*
* Set a RGB color in the LUT
*/
-void video_set_lut (unsigned int index, unsigned char r, unsigned char g, unsigned char b)
+void video_set_lut (unsigned int index, unsigned char r,
+ unsigned char g, unsigned char b)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
L0PAL_WR_REG (index, (r << 16) | (g << 8) | (b));
}
@@ -379,24 +392,26 @@ void video_set_lut (unsigned int index, unsigned char r, unsigned char g, unsign
/*
* Drawing engine Fill and BitBlt screen region
*/
-void video_hw_rectfill (unsigned int bpp, unsigned int dst_x, unsigned int dst_y,
- unsigned int dim_x, unsigned int dim_y, unsigned int color)
+void video_hw_rectfill (unsigned int bpp, unsigned int dst_x,
+ unsigned int dst_y, unsigned int dim_x,
+ unsigned int dim_y, unsigned int color)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
de_wait_slots (3);
- DE_WR_REG (0x0480, color);
+ DE_WR_REG (GC_FC, color);
DE_WR_FIFO (0x09410000);
DE_WR_FIFO ((dst_y << 16) | dst_x);
DE_WR_FIFO ((dim_y << 16) | dim_x);
de_wait ();
}
-void video_hw_bitblt (unsigned int bpp, unsigned int src_x, unsigned int src_y,
- unsigned int dst_x, unsigned int dst_y, unsigned int width,
+void video_hw_bitblt (unsigned int bpp, unsigned int src_x,
+ unsigned int src_y, unsigned int dst_x,
+ unsigned int dst_y, unsigned int width,
unsigned int height)
{
- GraphicDevice *pGD = (GraphicDevice *)&mb862xx;
+ GraphicDevice *dev = &mb862xx;
unsigned int ctrl = 0x0d000000L;
if (src_x >= dst_x && src_y >= dst_y)
diff --git a/include/asm-microblaze/byteorder.h b/include/asm-microblaze/byteorder.h
index 51cacb0..a4a75b7 100644
--- a/include/asm-microblaze/byteorder.h
+++ b/include/asm-microblaze/byteorder.h
@@ -27,7 +27,9 @@
I think this is a symptom of a bug in mb-gcc. JW 20040303
*/
-static __inline__ __const__ __u16 ___arch__swab16 (__u16 half_word)
+
+
+static __inline__ __u16 ___arch__swab16 (__u16 half_word)
{
/* 32 bit temp to cast result, forcing clearing of high word */
__u32 temp;
diff --git a/include/asm-ppc/config.h b/include/asm-ppc/config.h
index ca143c7..c9ba805 100644
--- a/include/asm-ppc/config.h
+++ b/include/asm-ppc/config.h
@@ -29,10 +29,11 @@
#endif
#endif
-#ifndef CONFIG_FSL_DMA
-#if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) || \
- (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)))
+/* Check if boards need to enable FSL DMA engine for SDRAM init */
+#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
+#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
+ ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
+ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
#define CONFIG_FSL_DMA
#endif
#endif
diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h
index 0376e44..a5d87a6 100644
--- a/include/config_cmd_default.h
+++ b/include/config_cmd_default.h
@@ -20,14 +20,13 @@
#define CONFIG_CMD_BOOTD /* bootd */
#define CONFIG_CMD_CONSOLE /* coninfo */
#define CONFIG_CMD_ECHO /* echo arguments */
-#define CONFIG_CMD_SAVEENV /* saveenv */
-#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
#define CONFIG_CMD_FPGA /* FPGA configuration Support */
#define CONFIG_CMD_IMI /* iminfo */
+#define CONFIG_CMD_ITEST /* Integer (and string) test */
#ifndef CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
#define CONFIG_CMD_IMLS /* List all found images */
#endif
-#define CONFIG_CMD_ITEST /* Integer (and string) test */
#define CONFIG_CMD_LOADB /* loadb */
#define CONFIG_CMD_LOADS /* loads */
#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
@@ -35,6 +34,7 @@
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_RUN /* run command in env variable */
+#define CONFIG_CMD_SAVEENV /* saveenv */
#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
#define CONFIG_CMD_SOURCE /* "source" command support */
#define CONFIG_CMD_XIMG /* Load part of Multi Image */
diff --git a/include/mb862xx.h b/include/mb862xx.h
index 164305f..43f01e7 100644
--- a/include/mb862xx.h
+++ b/include/mb862xx.h
@@ -32,6 +32,75 @@
#define PCI_DEVICE_ID_CORAL_P 0x2019
#define PCI_DEVICE_ID_CORAL_PA 0x201E
+#define GC_HOST_BASE 0x01fc0000
+#define GC_DISP_BASE 0x01fd0000
+#define GC_DRAW_BASE 0x01ff0000
+
+/* Host interface registers */
+#define GC_SRST 0x0000002c
+#define GC_CCF 0x00000038
+#define GC_MMR 0x0000fffc
+
+/*
+ * Display Controller registers
+ * _A means the offset is aligned, we use these for boards
+ * with 8-/16-bit GDC access not working or buggy.
+ */
+#define GC_DCM0 0x00000000
+#define GC_HTP_A 0x00000004
+#define GC_HTP 0x00000006
+#define GC_HDB_HDP_A 0x00000008
+#define GC_HDP 0x00000008
+#define GC_HDB 0x0000000a
+#define GC_VSW_HSW_HSP_A 0x0000000c
+#define GC_HSP 0x0000000c
+#define GC_HSW 0x0000000e
+#define GC_VSW 0x0000000f
+#define GC_VTR_A 0x00000010
+#define GC_VTR 0x00000012
+#define GC_VDP_VSP_A 0x00000014
+#define GC_VSP 0x00000014
+#define GC_VDP 0x00000016
+#define GC_WY_WX 0x00000018
+#define GC_WH_WW 0x0000001c
+#define GC_L0M 0x00000020
+#define GC_L0OA0 0x00000024
+#define GC_L0DA0 0x00000028
+#define GC_L0DY_L0DX 0x0000002c
+#define GC_L2M 0x00000040
+#define GC_L2OA0 0x00000044
+#define GC_L2DA0 0x00000048
+#define GC_L2OA1 0x0000004c
+#define GC_L2DA1 0x00000050
+#define GC_L2DX 0x00000054
+#define GC_L2DY 0x00000056
+#define GC_DCM1 0x00000100
+#define GC_DCM2 0x00000104
+#define GC_DCM3 0x00000108
+#define GC_L0EM 0x00000110
+#define GC_L0WY_L0WX 0x00000114
+#define GC_L0WH_L0WW 0x00000118
+#define GC_L2EM 0x00000130
+#define GC_L2WX 0x00000134
+#define GC_L2WY 0x00000136
+#define GC_L2WW 0x00000138
+#define GC_L2WH 0x0000013a
+#define GC_L0PAL0 0x00000400
+
+/* Drawing registers */
+#define GC_CTR 0x00000400
+#define GC_IFCNT 0x00000408
+#define GC_FBR 0x00000440
+#define GC_XRES 0x00000444
+#define GC_CXMIN 0x00000454
+#define GC_CXMAX 0x00000458
+#define GC_CYMIN 0x0000045c
+#define GC_CYMAX 0x00000460
+#define GC_FC 0x00000480
+#define GC_BC 0x00000484
+#define GC_FIFO 0x000004a0
+#define GC_GEO_FIFO 0x00008400
+
typedef struct {
unsigned int index;
unsigned int value;
diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c
index 1a42640..cfed5fe 100644
--- a/lib_microblaze/board.c
+++ b/lib_microblaze/board.c
@@ -112,10 +112,6 @@ void board_init (void)
#if defined(CONFIG_CMD_FLASH)
ulong flash_size = 0;
#endif
-#if defined(CONFIG_CMD_NET)
- char *s, *e;
- int i;
-#endif
asm ("nop"); /* FIXME gd is not initialize - wait */
memset ((void *)gd, 0, CONFIG_SYS_GBL_DATA_SIZE);
gd->bd = (bd_t *) (gd + 1); /* At end of global data */
diff --git a/tools/Makefile b/tools/Makefile
index 43c284c..5c764bb 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -69,9 +69,13 @@ include $(TOPDIR)/config.mk
BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX)
BIN_FILES-y += mkimage$(SFX)
BIN_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc$(SFX)
+BIN_FILES-$(CONFIG_ENV_IS_IN_DATAFLASH) += envcrc$(SFX)
BIN_FILES-$(CONFIG_ENV_IS_IN_EEPROM) += envcrc$(SFX)
BIN_FILES-$(CONFIG_ENV_IS_IN_FLASH) += envcrc$(SFX)
+BIN_FILES-$(CONFIG_ENV_IS_IN_ONENAND) += envcrc$(SFX)
+BIN_FILES-$(CONFIG_ENV_IS_IN_NAND) += envcrc$(SFX)
BIN_FILES-$(CONFIG_ENV_IS_IN_NVRAM) += envcrc$(SFX)
+BIN_FILES-$(CONFIG_ENV_IS_IN_SPI_FLASH) += envcrc$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX)
BIN_FILES-$(CONFIG_LCD_LOGO) += bmp_logo$(SFX)
generated by cgit v1.1 at 2024-12-30 18:37:31 +0000