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-rw-r--r--Makefile3
-rw-r--r--cpu/mcf52x2/cpu.c6
-rw-r--r--cpu/mcf52x2/cpu.h33
-rw-r--r--cpu/mcf532x/speed.c3
-rw-r--r--cpu/mcf532x/start.S6
-rw-r--r--cpu/mpc83xx/cpu.c8
-rw-r--r--include/asm-m68k/unaligned.h15
-rw-r--r--include/asm-ppc/ppc4xx-ebc.h24
-rw-r--r--include/asm-sh/unaligned-sh4a.h258
-rw-r--r--include/asm-sh/unaligned.h25
-rw-r--r--include/configs/MPC8313ERDB.h7
-rw-r--r--include/configs/MPC8315ERDB.h2
-rw-r--r--include/configs/MPC8323ERDB.h6
-rw-r--r--include/configs/MPC832XEMDS.h2
-rw-r--r--include/configs/MPC8349EMDS.h8
-rw-r--r--include/configs/MPC8349ITX.h12
-rw-r--r--include/configs/MPC8360EMDS.h2
-rw-r--r--include/configs/MPC8360ERDK.h8
-rw-r--r--include/configs/MPC837XEMDS.h2
-rw-r--r--include/configs/MPC837XERDB.h12
-rw-r--r--include/configs/sbc8349.h8
-rw-r--r--include/configs/vme8349.h4
-rw-r--r--nand_spl/board/freescale/mpc8315erdb/Makefile108
-rw-r--r--nand_spl/board/freescale/mpc8315erdb/u-boot.lds52
24 files changed, 528 insertions, 86 deletions
diff --git a/Makefile b/Makefile
index 524b9da..16b549c 100644
--- a/Makefile
+++ b/Makefile
@@ -2272,9 +2272,6 @@ MPC8313ERDB_NAND_66_config: unconfig
MPC8315ERDB_NAND_config \
MPC8315ERDB_config: unconfig
- @if [ "$(findstring _NAND_,$@)" ] ; then \
- ln -sf mpc8313erdb nand_spl/board/freescale/mpc8315erdb ; \
- fi ;
@$(MKCONFIG) -t $(@:_config=) MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
MPC8323ERDB_config: unconfig
diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 2cfe631..c4c5d50 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -33,6 +33,7 @@
#include <command.h>
#include <asm/immap.h>
#include <netdev.h>
+#include "cpu.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -143,6 +144,11 @@ int checkcpu(void)
int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
{
+ /* Call the board specific reset actions first. */
+ if(board_reset) {
+ board_reset();
+ }
+
mbar_writeByte(MCF_RCM_RCR,
MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
return 0;
diff --git a/cpu/mcf52x2/cpu.h b/cpu/mcf52x2/cpu.h
new file mode 100644
index 0000000..c1227eb
--- /dev/null
+++ b/cpu/mcf52x2/cpu.h
@@ -0,0 +1,33 @@
+/*
+ * cpu.h
+ *
+ * Copyright (c) 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CPU_H_
+#define _CPU_H_
+
+#include <command.h>
+
+/* Use this to create board specific reset functions */
+void board_reset(void) __attribute__((__weak__));
+
+#endif /* _CPU_H_ */
diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c
index 0d378e6..67f08c7 100644
--- a/cpu/mcf532x/speed.c
+++ b/cpu/mcf532x/speed.c
@@ -204,6 +204,8 @@ int clock_pll(int fsys, int flags)
fout = ((fref * mfd) / (BUSDIV * 4));
#endif
+/* must not tamper with SDRAMC if running from SDRAM */
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
/*
* Check to see if the SDRAM has already been initialized.
* If it has then the SDRAM needs to be put into self refresh
@@ -254,6 +256,7 @@ int clock_pll(int fsys, int flags)
/* wait for DQS logic to relock */
for (i = 0; i < 0x200; i++) ;
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
return fout;
}
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index a46c47a..5b134aa 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -45,6 +45,7 @@
addl #60,%sp; /* space for 15 regs */ \
rte;
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
.text
/*
* Vector table. This is used for initial platform startup.
@@ -121,6 +122,7 @@ vector192_255:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
.text
@@ -130,9 +132,11 @@ _start:
nop
move.w #0x2700,%sr /* Mask off Interrupt */
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
/* Set vector base register at the beginning of the Flash */
move.l #CONFIG_SYS_FLASH_BASE, %d0
movec %d0, %VBR
+#endif
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
@@ -280,7 +284,7 @@ _int_handler:
icache_enable:
move.l #0x01000000, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
- move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
+ move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
movec %d0, %ACR0 /* Enable cache */
move.l #0x80000200, %d0 /* Setup cache mask */
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index e38a372..51180d6 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -199,7 +199,10 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+ puts("Resetting the board.\n");
+
#ifdef MPC83xx_RESET
+
/* Interrupts and MMU off */
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
@@ -214,9 +217,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
/* confirm Reset Control Reg is enabled */
while(!((immap->reset.rcer) & RCER_CRE));
- printf("Resetting the board.");
- printf("\n");
-
udelay(200);
/* perform reset, only one bit */
@@ -238,8 +238,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
*/
addr = CONFIG_SYS_RESET_ADDRESS;
- printf("resetting the board.");
- printf("\n");
((void (*)(void)) addr) ();
#endif /* MPC83xx_RESET */
diff --git a/include/asm-m68k/unaligned.h b/include/asm-m68k/unaligned.h
new file mode 100644
index 0000000..328aa0c
--- /dev/null
+++ b/include/asm-m68k/unaligned.h
@@ -0,0 +1,15 @@
+#ifndef _ASM_M68K_UNALIGNED_H
+#define _ASM_M68K_UNALIGNED_H
+
+#ifdef CONFIG_COLDFIRE
+#include <linux/unaligned/be_byteshift.h>
+#else
+#include <linux/unaligned/access_ok.h>
+#endif
+
+#include <linux/unaligned/generic.h>
+
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+
+#endif /* _ASM_M68K_UNALIGNED_H */
diff --git a/include/asm-ppc/ppc4xx-ebc.h b/include/asm-ppc/ppc4xx-ebc.h
index 9680f70..9c17e46 100644
--- a/include/asm-ppc/ppc4xx-ebc.h
+++ b/include/asm-ppc/ppc4xx-ebc.h
@@ -25,14 +25,24 @@
#define _PPC4xx_EBC_H_
/*
- * Currently there are two register layout versions for the
- * IBM EBC core used on 4xx PPC's:
+ * Currently there are two register layout versions for the IBM EBC core
+ * used on 4xx PPC's. The following grouping lists the first layout.
+ * Within this group there is a slight variation concerning the bit field
+ * position of the EMPL and EMPH fields:
*/
#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || \
defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define CONFIG_EBC_PPC4xx_IBM_VER1
+#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
+ defined(CONFIG_405EP)
+#define EBC_CFG_EMPH_POS 8
+#define EBC_CFG_EMPL_POS 6
+#else
+#define EBC_CFG_EMPH_POS 6
+#define EBC_CFG_EMPL_POS 8
+#endif
#endif
/*
@@ -143,10 +153,12 @@
#define EBC_CFG_EBTC_MASK PPC_REG_VAL(0, 0x1)
#define EBC_CFG_EBTC_HI PPC_REG_VAL(0, 0x0)
#define EBC_CFG_EBTC_DRIVEN PPC_REG_VAL(0, 0x1)
-#define EBC_CFG_EMPH_MASK PPC_REG_VAL(6, 0x3)
-#define EBC_CFG_EMPH_ENCODE(n) PPC_REG_VAL(6, (static_cast(u32, n)) & 0x3)
-#define EBC_CFG_EMPL_MASK PPC_REG_VAL(8, 0x3)
-#define EBC_CFG_EMPL_ENCODE(n) PPC_REG_VAL(8, (static_cast(u32, n)) & 0x3)
+#define EBC_CFG_EMPH_MASK PPC_REG_VAL(EBC_CFG_EMPH_POS, 0x3)
+#define EBC_CFG_EMPH_ENCODE(n) PPC_REG_VAL(EBC_CFG_EMPH_POS, \
+ (static_cast(u32, n)) & 0x3)
+#define EBC_CFG_EMPL_MASK PPC_REG_VAL(EBC_CFG_EMPL_POS, 0x3)
+#define EBC_CFG_EMPL_ENCODE(n) PPC_REG_VAL(EBC_CFG_EMPH_POS, \
+ (static_cast(u32, n)) & 0x3)
#define EBC_CFG_CSTC_MASK PPC_REG_VAL(9, 0x1)
#define EBC_CFG_CSTC_HI PPC_REG_VAL(9, 0x0)
#define EBC_CFG_CSTC_DRIVEN PPC_REG_VAL(9, 0x1)
diff --git a/include/asm-sh/unaligned-sh4a.h b/include/asm-sh/unaligned-sh4a.h
new file mode 100644
index 0000000..9f4dd25
--- /dev/null
+++ b/include/asm-sh/unaligned-sh4a.h
@@ -0,0 +1,258 @@
+#ifndef __ASM_SH_UNALIGNED_SH4A_H
+#define __ASM_SH_UNALIGNED_SH4A_H
+
+/*
+ * SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
+ * Support for 64-bit accesses are done through shifting and masking
+ * relative to the endianness. Unaligned stores are not supported by the
+ * instruction encoding, so these continue to use the packed
+ * struct.
+ *
+ * The same note as with the movli.l/movco.l pair applies here, as long
+ * as the load is gauranteed to be inlined, nothing else will hook in to
+ * r0 and we get the return value for free.
+ *
+ * NOTE: Due to the fact we require r0 encoding, care should be taken to
+ * avoid mixing these heavily with other r0 consumers, such as the atomic
+ * ops. Failure to adhere to this can result in the compiler running out
+ * of spill registers and blowing up when building at low optimization
+ * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
+ */
+#include <linux/types.h>
+#include <asm/byteorder.h>
+
+static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
+{
+ unsigned long unaligned;
+
+ __asm__ __volatile__ (
+ "movua.l @%1, %0\n\t"
+ : "=z" (unaligned)
+ : "r" (p)
+ );
+
+ return unaligned;
+}
+
+struct __una_u16 { u16 x __attribute__((packed)); };
+struct __una_u32 { u32 x __attribute__((packed)); };
+struct __una_u64 { u64 x __attribute__((packed)); };
+
+static inline u16 __get_unaligned_cpu16(const u8 *p)
+{
+#ifdef __LITTLE_ENDIAN
+ return p[0] | p[1] << 8;
+#else
+ return p[0] << 8 | p[1];
+#endif
+}
+
+/*
+ * Even though movua.l supports auto-increment on the read side, it can
+ * only store to r0 due to instruction encoding constraints, so just let
+ * the compiler sort it out on its own.
+ */
+static inline u64 __get_unaligned_cpu64(const u8 *p)
+{
+#ifdef __LITTLE_ENDIAN
+ return (u64)__get_unaligned_cpu32(p + 4) << 32 |
+ __get_unaligned_cpu32(p);
+#else
+ return (u64)__get_unaligned_cpu32(p) << 32 |
+ __get_unaligned_cpu32(p + 4);
+#endif
+}
+
+static inline u16 get_unaligned_le16(const void *p)
+{
+ return le16_to_cpu(__get_unaligned_cpu16(p));
+}
+
+static inline u32 get_unaligned_le32(const void *p)
+{
+ return le32_to_cpu(__get_unaligned_cpu32(p));
+}
+
+static inline u64 get_unaligned_le64(const void *p)
+{
+ return le64_to_cpu(__get_unaligned_cpu64(p));
+}
+
+static inline u16 get_unaligned_be16(const void *p)
+{
+ return be16_to_cpu(__get_unaligned_cpu16(p));
+}
+
+static inline u32 get_unaligned_be32(const void *p)
+{
+ return be32_to_cpu(__get_unaligned_cpu32(p));
+}
+
+static inline u64 get_unaligned_be64(const void *p)
+{
+ return be64_to_cpu(__get_unaligned_cpu64(p));
+}
+
+static inline void __put_le16_noalign(u8 *p, u16 val)
+{
+ *p++ = val;
+ *p++ = val >> 8;
+}
+
+static inline void __put_le32_noalign(u8 *p, u32 val)
+{
+ __put_le16_noalign(p, val);
+ __put_le16_noalign(p + 2, val >> 16);
+}
+
+static inline void __put_le64_noalign(u8 *p, u64 val)
+{
+ __put_le32_noalign(p, val);
+ __put_le32_noalign(p + 4, val >> 32);
+}
+
+static inline void __put_be16_noalign(u8 *p, u16 val)
+{
+ *p++ = val >> 8;
+ *p++ = val;
+}
+
+static inline void __put_be32_noalign(u8 *p, u32 val)
+{
+ __put_be16_noalign(p, val >> 16);
+ __put_be16_noalign(p + 2, val);
+}
+
+static inline void __put_be64_noalign(u8 *p, u64 val)
+{
+ __put_be32_noalign(p, val >> 32);
+ __put_be32_noalign(p + 4, val);
+}
+
+static inline void put_unaligned_le16(u16 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+ ((struct __una_u16 *)p)->x = val;
+#else
+ __put_le16_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_le32(u32 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+ ((struct __una_u32 *)p)->x = val;
+#else
+ __put_le32_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_le64(u64 val, void *p)
+{
+#ifdef __LITTLE_ENDIAN
+ ((struct __una_u64 *)p)->x = val;
+#else
+ __put_le64_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be16(u16 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+ ((struct __una_u16 *)p)->x = val;
+#else
+ __put_be16_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be32(u32 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+ ((struct __una_u32 *)p)->x = val;
+#else
+ __put_be32_noalign(p, val);
+#endif
+}
+
+static inline void put_unaligned_be64(u64 val, void *p)
+{
+#ifdef __BIG_ENDIAN
+ ((struct __una_u64 *)p)->x = val;
+#else
+ __put_be64_noalign(p, val);
+#endif
+}
+
+/*
+ * Cause a link-time error if we try an unaligned access other than
+ * 1,2,4 or 8 bytes long
+ */
+extern void __bad_unaligned_access_size(void);
+
+#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
+ __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
+ __bad_unaligned_access_size())))); \
+ }))
+
+#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
+ __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
+ __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
+ __bad_unaligned_access_size())))); \
+ }))
+
+#define __put_unaligned_le(val, ptr) ({ \
+ void *__gu_p = (ptr); \
+ switch (sizeof(*(ptr))) { \
+ case 1: \
+ *(u8 *)__gu_p = (__force u8)(val); \
+ break; \
+ case 2: \
+ put_unaligned_le16((__force u16)(val), __gu_p); \
+ break; \
+ case 4: \
+ put_unaligned_le32((__force u32)(val), __gu_p); \
+ break; \
+ case 8: \
+ put_unaligned_le64((__force u64)(val), __gu_p); \
+ break; \
+ default: \
+ __bad_unaligned_access_size(); \
+ break; \
+ } \
+ (void)0; })
+
+#define __put_unaligned_be(val, ptr) ({ \
+ void *__gu_p = (ptr); \
+ switch (sizeof(*(ptr))) { \
+ case 1: \
+ *(u8 *)__gu_p = (__force u8)(val); \
+ break; \
+ case 2: \
+ put_unaligned_be16((__force u16)(val), __gu_p); \
+ break; \
+ case 4: \
+ put_unaligned_be32((__force u32)(val), __gu_p); \
+ break; \
+ case 8: \
+ put_unaligned_be64((__force u64)(val), __gu_p); \
+ break; \
+ default: \
+ __bad_unaligned_access_size(); \
+ break; \
+ } \
+ (void)0; })
+
+#ifdef __LITTLE_ENDIAN
+# define get_unaligned __get_unaligned_le
+# define put_unaligned __put_unaligned_le
+#else
+# define get_unaligned __get_unaligned_be
+# define put_unaligned __put_unaligned_be
+#endif
+
+#endif /* __ASM_SH_UNALIGNED_SH4A_H */
diff --git a/include/asm-sh/unaligned.h b/include/asm-sh/unaligned.h
new file mode 100644
index 0000000..2e0d164
--- /dev/null
+++ b/include/asm-sh/unaligned.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SH_UNALIGNED_H
+#define _ASM_SH_UNALIGNED_H
+
+/* Copy from linux-kernel. */
+
+#ifdef CONFIG_CPU_SH4A
+/* SH-4A can handle unaligned loads in a relatively neutered fashion. */
+#include <asm/unaligned-sh4a.h>
+#else
+/* Otherwise, SH can't handle unaligned accesses. */
+#include <compiler.h>
+#if defined(__BIG_ENDIAN__)
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+#elif defined(__LITTLE_ENDIAN__)
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+#endif
+
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+#endif
+
+#endif /* _ASM_SH_UNALIGNED_H */
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 0a4ba29..1478ec8 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -580,13 +580,6 @@
*/
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ETHADDR 00:E0:0C:00:95:01
-#define CONFIG_ETH1ADDR 00:E0:0C:00:95:02
-
-#define CONFIG_IPADDR 10.0.0.2
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_NETDEV eth1
#define CONFIG_HOSTNAME mpc8313erdb
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index cfed4ca..a8570ce 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -616,9 +616,7 @@
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 04:00:00:00:00:0A
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 04:00:00:00:00:0B
#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 8e6f7ce..4046f80 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -525,17 +525,11 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_HAS_ETH0 /* add support for "ethaddr" */
-#define CONFIG_ETHADDR 00:04:9f:ef:03:01
#define CONFIG_HAS_ETH1 /* add support for "eth1addr" */
-#define CONFIG_ETH1ADDR 00:04:9f:ef:03:02
/* use mac_read_from_eeprom() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
#define CONFIG_SYS_I2C_MAC_OFFSET 0x7f00 /* MAC address offset in I2C EEPROM */
-#define CONFIG_IPADDR 10.0.0.2
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_NETDEV eth1
#define CONFIG_HOSTNAME mpc8323erdb
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 1adac64..2ad5f60 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -544,9 +544,7 @@
#if defined(CONFIG_UEC_ETH)
#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:04:9f:ef:03:01
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:04:9f:ef:03:02
#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 6361c45..bf28d9e 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -685,22 +685,14 @@
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_ETHADDR 00:04:9f:ef:23:33
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH0
-#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21
#endif
-#define CONFIG_IPADDR 192.168.1.253
-
#define CONFIG_HOSTNAME mpc8349emds
#define CONFIG_ROOTPATH /nfsroot/rootfs
#define CONFIG_BOOTFILE uImage
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.255.0
-
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index eaa59fd..52e2851 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -678,18 +678,6 @@ boards, we say we have two, but don't display a message if we find only one. */
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
-#endif
-
-#ifdef CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
-#endif
-
-#define CONFIG_IPADDR 192.168.1.253
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.252.0
#define CONFIG_NETDEV eth0
#ifdef CONFIG_MPC8349ITX
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 6fa7287..b9b5eab 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -587,9 +587,7 @@
#if defined(CONFIG_UEC_ETH)
#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:04:9f:ef:01:01
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02
#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index c6f1409..c7bc9cd 100644
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -506,10 +506,6 @@
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
#define CONFIG_HAS_ETH3
-#define CONFIG_ETHADDR 00:04:9f:ef:01:01
-#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02
-#define CONFIG_ETH2ADDR 00:04:9f:ef:01:03
-#define CONFIG_ETH3ADDR 00:04:9f:ef:01:04
#endif
#define CONFIG_BAUDRATE 115200
@@ -518,10 +514,6 @@
#define CONFIG_HOSTNAME mpc8360erdk
#define CONFIG_BOOTFILE uImage
-#define CONFIG_IPADDR 10.0.0.99
-#define CONFIG_SERVERIP 10.0.0.2
-#define CONFIG_GATEWAYIP 10.0.0.2
-#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_ROOTPATH /nfsroot/
#define CONFIG_BOOTDELAY 2 /* -1 disables auto-boot */
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 63f1d85..65d49ec 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -637,9 +637,7 @@ extern int board_pci_host_broken(void);
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:E0:0C:00:83:79
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:E0:0C:00:83:78
#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 913184c..ca60272 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -643,20 +643,8 @@
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:04:9f:ef:04:01
-#endif
-
-#ifdef CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:04:9f:ef:04:02
-#endif
-
#define CONFIG_HAS_FSL_DR_USB
-#define CONFIG_IPADDR 10.0.0.2
-#define CONFIG_SERVERIP 10.0.0.1
-#define CONFIG_GATEWAYIP 10.0.0.1
-#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_NETDEV eth1
#define CONFIG_HOSTNAME mpc837x_rdb
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 7bef119..4ea65ce 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -631,21 +631,13 @@
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e
#endif
-#define CONFIG_IPADDR 192.168.1.234
-
#define CONFIG_HOSTNAME SBC8349
#define CONFIG_ROOTPATH /tftpboot/rootfs
#define CONFIG_BOOTFILE uImage
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.255.0
-
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index dbc15b2..7603300 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -118,7 +118,7 @@
#define CONFIG_SYS_FLASH_BASE 0xffc00000 /* start of FLASH */
#define CONFIG_SYS_FLASH_SIZE 4 /* flash size in MB */
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
- (2 << BR_PS_SHIFT) | /* 32bit */ \
+ (2 << BR_PS_SHIFT) | /* 16bit */ \
BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM 0xffc06ff7 /* 4 MB flash size */
@@ -128,7 +128,7 @@
#define CONFIG_SYS_FLASH_BASE 0xf8000000 /* start of FLASH */
#define CONFIG_SYS_FLASH_SIZE 128 /* flash size in MB */
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
- (2 << BR_PS_SHIFT) | /* 32bit */ \
+ (2 << BR_PS_SHIFT) | /* 16bit */ \
BR_V) /* valid */
#define CONFIG_SYS_OR0_PRELIM 0xf8006ff7 /* 128 MB flash size */
diff --git a/nand_spl/board/freescale/mpc8315erdb/Makefile b/nand_spl/board/freescale/mpc8315erdb/Makefile
new file mode 100644
index 0000000..a13e7e2
--- /dev/null
+++ b/nand_spl/board/freescale/mpc8315erdb/Makefile
@@ -0,0 +1,108 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+# (C) Copyright 2008 Freescale Semiconductor
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+NAND_SPL := y
+TEXT_BASE := 0xfff00000
+PAD_TO := 0xfff04000
+
+include $(TOPDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL
+
+SOBJS = start.o ticks.o
+COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
+ time.o cache.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj := $(OBJTREE)/nand_spl/
+
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+$(nandobj)u-boot.lds: $(LDSCRIPT)
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+# create symbolic links for common files
+
+$(obj)start.S:
+ ln -sf $(SRCTREE)/cpu/mpc83xx/start.S $(obj)start.S
+
+$(obj)nand_boot_fsl_elbc.c:
+ ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
+ $(obj)nand_boot_fsl_elbc.c
+
+$(obj)sdram.c:
+ ln -sf $(SRCTREE)/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
+
+$(obj)$(BOARD).c:
+ ln -sf $(SRCTREE)/board/$(BOARDDIR)/$(BOARD).c $(obj)$(BOARD).c
+
+$(obj)ns16550.c:
+ ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
+
+$(obj)nand_init.c:
+ ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+
+$(obj)cache.c:
+ ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+
+$(obj)time.c:
+ ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
+
+$(obj)ticks.S:
+ ln -sf $(SRCTREE)/lib_ppc/ticks.S $(obj)ticks.S
+
+#########################################################################
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/freescale/mpc8315erdb/u-boot.lds b/nand_spl/board/freescale/mpc8315erdb/u-boot.lds
new file mode 100644
index 0000000..ad82589
--- /dev/null
+++ b/nand_spl/board/freescale/mpc8315erdb/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+ . = 0xfff00000;
+ .text : {
+ *(.text*)
+ . = ALIGN(16);
+ *(.eh_frame)
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ . = ALIGN(8);
+ .data : {
+ *(.data*)
+ *(.sdata*)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ __got2_entries = (. - _GOT2_TABLE_) >> 2;
+ }
+
+ . = ALIGN(8);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.*bss) }
+ _end = .;
+}
+ENTRY(_start)
+ASSERT(_end <= 0xfff01000, "NAND bootstrap too big");
generated by cgit v1.1 at 2025-02-17 22:33:39 +0000