47 files changed, 998 insertions, 733 deletions

diff --git a/Makefile b/Makefile
index d68b03d..e8c223b 100644
--- a/Makefile
+++ b/Makefile
@@ -339,10 +339,12 @@ $(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(ONENAND_IPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
-		$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
+		$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
 
 $(U_BOOT_ONENAND):	$(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
+		$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
 		cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
+		cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
 
 $(VERSION_FILE):
 		@( echo -n "#define U_BOOT_VERSION \"U-Boot " ; \
@@ -1609,7 +1611,7 @@ PQ2FADS-ZU_66MHz_config	\
 PQ2FADS-ZU_66MHz_lowboot_config	\
 	:		unconfig
 	@mkdir -p $(obj)include
-	@mkdir -p $(obj)board/mpc8260ads
+	@mkdir -p $(obj)board/freescale/mpc8260ads
 	$(if $(findstring PQ2FADS,$@), \
 	@echo "#define CONFIG_ADSTYPE CFG_PQ2FADS" > $(obj)include/config.h, \
 	@echo "#define CONFIG_ADSTYPE CFG_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h)
@@ -1618,13 +1620,13 @@ PQ2FADS-ZU_66MHz_lowboot_config	\
 	$(if $(findstring VR,$@), \
 	@echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
 	@[ -z "$(findstring lowboot_,$@)" ] || \
-		{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/mpc8260ads/config.tmp ; \
+		{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \
 		  $(XECHO) "... with lowboot configuration" ; \
 		}
-	@$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads
+	@$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads freescale
 
 MPC8266ADS_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads
+	@$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads freescale
 
 # PM825/PM826 default configuration:  small (= 8 MB) Flash / boot from 64-bit flash
 PM825_config	\
@@ -2243,7 +2245,7 @@ EVB64260_750CX_config:	unconfig
 	@$(MKCONFIG) EVB64260 ppc 74xx_7xx evb64260
 
 mpc7448hpc2_config:  unconfig
-	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2
+	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2 freescale
 
 P3G4_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
@@ -2873,7 +2875,7 @@ clean:
 	       $(obj)board/{integratorap,integratorcp}/u-boot.lds	  \
 	       $(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds
 	@rm -f $(obj)include/bmp_logo.h $(obj)nand_spl/{u-boot-spl,u-boot-spl.map}
-	@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl.map}
+	@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
 	@rm -f $(obj)api_examples/demo $(VERSION_FILE)
 	@find $(OBJTREE) -type f \
 		\( -name 'core' -o -name '*.bak' -o -name '*~' \
diff --git a/board/adder/adder.c b/board/adder/adder.c
index aa781584..817c864 100644
--- a/board/adder/adder.c
+++ b/board/adder/adder.c
@@ -26,6 +26,9 @@
 
 #include <common.h>
 #include <mpc8xx.h>
+#if defined(CONFIG_OF_LIBFDT)
+	#include <libfdt.h>
+#endif
 
 /*
  * SDRAM is single Samsung K4S643232F-T70   chip (8MB)
@@ -111,3 +114,11 @@ int checkboard( void )
 
 	return 0;
 }
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+
+}
+#endif
diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile
index cdffc33..5d22393 100644
--- a/board/bf537-stamp/Makefile
+++ b/board/bf537-stamp/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o ether_bf537.o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
+COBJS	:= $(BOARD).o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/mpc7448hpc2/Makefile b/board/freescale/mpc7448hpc2/Makefile
index e3d757d..e3d757d 100644
--- a/board/mpc7448hpc2/Makefile
+++ b/board/freescale/mpc7448hpc2/Makefile
diff --git a/board/mpc7448hpc2/asm_init.S b/board/freescale/mpc7448hpc2/asm_init.S
index a7a40a1..a7a40a1 100644
--- a/board/mpc7448hpc2/asm_init.S
+++ b/board/freescale/mpc7448hpc2/asm_init.S
diff --git a/board/mpc7448hpc2/config.mk b/board/freescale/mpc7448hpc2/config.mk
index 2e58858..2e58858 100644
--- a/board/mpc7448hpc2/config.mk
+++ b/board/freescale/mpc7448hpc2/config.mk
diff --git a/board/mpc7448hpc2/mpc7448hpc2.c b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
index 81846eb..81846eb 100644
--- a/board/mpc7448hpc2/mpc7448hpc2.c
+++ b/board/freescale/mpc7448hpc2/mpc7448hpc2.c
diff --git a/board/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c
index 30ae17d..30ae17d 100644
--- a/board/mpc7448hpc2/tsi108_init.c
+++ b/board/freescale/mpc7448hpc2/tsi108_init.c
diff --git a/board/mpc7448hpc2/u-boot.lds b/board/freescale/mpc7448hpc2/u-boot.lds
index 05f0269..05f0269 100644
--- a/board/mpc7448hpc2/u-boot.lds
+++ b/board/freescale/mpc7448hpc2/u-boot.lds
diff --git a/board/mpc8260ads/Makefile b/board/freescale/mpc8260ads/Makefile
index de7d847..de7d847 100644
--- a/board/mpc8260ads/Makefile
+++ b/board/freescale/mpc8260ads/Makefile
diff --git a/board/mpc8260ads/config.mk b/board/freescale/mpc8260ads/config.mk
index e99e181..e99e181 100644
--- a/board/mpc8260ads/config.mk
+++ b/board/freescale/mpc8260ads/config.mk
diff --git a/board/mpc8260ads/flash.c b/board/freescale/mpc8260ads/flash.c
index 59997aa..59997aa 100644
--- a/board/mpc8260ads/flash.c
+++ b/board/freescale/mpc8260ads/flash.c
diff --git a/board/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c
index 93550e2..93550e2 100644
--- a/board/mpc8260ads/mpc8260ads.c
+++ b/board/freescale/mpc8260ads/mpc8260ads.c
diff --git a/board/mpc8266ads/Makefile b/board/freescale/mpc8266ads/Makefile
index 291a1c9..291a1c9 100644
--- a/board/mpc8266ads/Makefile
+++ b/board/freescale/mpc8266ads/Makefile
diff --git a/board/mpc8266ads/config.mk b/board/freescale/mpc8266ads/config.mk
index ecc2a7d..ecc2a7d 100644
--- a/board/mpc8266ads/config.mk
+++ b/board/freescale/mpc8266ads/config.mk
diff --git a/board/mpc8266ads/flash.c b/board/freescale/mpc8266ads/flash.c
index 9512c72..9512c72 100644
--- a/board/mpc8266ads/flash.c
+++ b/board/freescale/mpc8266ads/flash.c
diff --git a/board/mpc8266ads/mpc8266ads.c b/board/freescale/mpc8266ads/mpc8266ads.c
index 8f7273c..8f7273c 100644
--- a/board/mpc8266ads/mpc8266ads.c
+++ b/board/freescale/mpc8266ads/mpc8266ads.c
diff --git a/common/Makefile b/common/Makefile
index 56d0581..56176ca 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -88,6 +88,7 @@ COBJS-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
 COBJS-$(CONFIG_CMD_REISER) += cmd_reiser.o
 COBJS-y += cmd_sata.o
 COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
+COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
 COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
 COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
 COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 9deb781..5a85726 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -984,20 +984,6 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 				"must RESET the board to recover.\n");
 			do_reset (cmdtp, flag, argc, argv);
 		}
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
-		if (fdt_env(of_flat_tree) < 0) {
-			puts ("ERROR: /u-boot-env node create failed - "
-				"must RESET the board to recover.\n");
-			do_reset (cmdtp, flag, argc, argv);
-		}
-#endif
-#ifdef CONFIG_OF_HAS_BD_T
-		if (fdt_bd_t(of_flat_tree) < 0) {
-			puts ("ERROR: /bd_t node create failed - "
-				"must RESET the board to recover.\n");
-			do_reset (cmdtp, flag, argc, argv);
-		}
-#endif
 #ifdef CONFIG_OF_BOARD_SETUP
 		/* Call the board-specific fixup routine */
 		ft_board_setup(of_flat_tree, gd->bd);
diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c
index 14c3fa0..a52284e 100644
--- a/common/cmd_fdt.c
+++ b/common/cmd_fdt.c
@@ -410,17 +410,6 @@ int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	/* Create a chosen node */
 	else if (argv[1][0] == 'c')
 		fdt_chosen(fdt, 0, 0, 1);
-
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
-	/* Create a u-boot-env node */
-	else if (argv[1][0] == 'e')
-		fdt_env(fdt);
-#endif
-#ifdef CONFIG_OF_HAS_BD_T
-	/* Create a bd_t node */
-	else if (argv[1][0] == 'b')
-		fdt_bd_t(fdt);
-#endif
 	else {
 		/* Unrecognized command */
 		printf ("Usage:\n%s\n", cmdtp->usage);
@@ -801,12 +790,6 @@ U_BOOT_CMD(
 	"fdt rsvmem add <addr> <size>        - Add a mem reserve\n"
 	"fdt rsvmem delete <index>           - Delete a mem reserves\n"
 	"fdt chosen - Add/update the /chosen branch in the tree\n"
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
-	"fdt env    - Add/replace the /u-boot-env branch in the tree\n"
-#endif
-#ifdef CONFIG_OF_HAS_BD_T
-	"fdt bd_t   - Add/replace the /bd_t branch in the tree\n"
-#endif
 	"NOTE: If the path or property you are setting/printing has a '#' character\n"
 	"     or spaces, you MUST escape it with a \\ character or quote it with \".\n"
 );
diff --git a/common/cmd_setexpr.c b/common/cmd_setexpr.c
new file mode 100644
index 0000000..2e49b6d
--- /dev/null
+++ b/common/cmd_setexpr.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file provides a shell like 'expr' function to return.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+
+int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	ulong a, b;
+	char buf[16];
+
+	/* Validate arguments */
+	if ((argc != 5) || (strlen(argv[3]) != 1)) {
+		printf("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+
+	a = simple_strtoul(argv[2], NULL, 16);
+	b = simple_strtoul(argv[4], NULL, 16);
+
+	switch (argv[3][0]) {
+	case '|': sprintf(buf, "%lx", (a | b)); break;
+	case '&': sprintf(buf, "%lx", (a & b)); break;
+	case '+': sprintf(buf, "%lx", (a + b)); break;
+	case '^': sprintf(buf, "%lx", (a ^ b)); break;
+	case '-': sprintf(buf, "%lx", (a - b)); break;
+	case '*': sprintf(buf, "%lx", (a * b)); break;
+	case '/': sprintf(buf, "%lx", (a / b)); break;
+	case '%': sprintf(buf, "%lx", (a % b)); break;
+	default:
+		printf("invalid op\n");
+		return 1;
+	}
+
+	setenv(argv[1], buf);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	setexpr, 5, 0, do_setexpr,
+	"setexpr - set environment variable as the result of eval expression\n",
+	"name value1 <op> value2\n"
+	"    - set environment variable 'name' to the result of the evaluated\n"
+	"      express specified by <op>.  <op> can be &, |, ^, +, -, *, /, %\n"
+);
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 69eb667..36e1469 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -40,7 +40,6 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 struct fdt_header *fdt;
 
-/********************************************************************/
 
 /**
  * fdt_find_and_setprop: Find a node and set it's property
@@ -218,198 +217,6 @@ int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force)
 	return err;
 }
 
-/********************************************************************/
-
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
-
-/* Function that returns a character from the environment */
-extern uchar(*env_get_char) (int);
-
-
-int fdt_env(void *fdt)
-{
-	int   nodeoffset;
-	int   err;
-	int   k, nxt;
-	int i;
-	static char tmpenv[256];
-
-	err = fdt_check_header(fdt);
-	if (err < 0) {
-		printf("fdt_env: %s\n", fdt_strerror(err));
-		return err;
-	}
-
-	/*
-	 * See if we already have a "u-boot-env" node, delete it if so.
-	 * Then create a new empty node.
-	 */
-	nodeoffset = fdt_path_offset (fdt, "/u-boot-env");
-	if (nodeoffset >= 0) {
-		err = fdt_del_node(fdt, nodeoffset);
-		if (err < 0) {
-			printf("fdt_env: %s\n", fdt_strerror(err));
-			return err;
-		}
-	}
-	/*
-	 * Create a new node "/u-boot-env" (offset 0 is root level)
-	 */
-	nodeoffset = fdt_add_subnode(fdt, 0, "u-boot-env");
-	if (nodeoffset < 0) {
-		printf("WARNING: could not create /u-boot-env %s.\n",
-			fdt_strerror(nodeoffset));
-		return nodeoffset;
-	}
-
-	for (i = 0; env_get_char(i) != '\0'; i = nxt + 1) {
-		char *s, *lval, *rval;
-
-		/*
-		 * Find the end of the name=definition
-		 */
-		for (nxt = i; env_get_char(nxt) != '\0'; ++nxt)
-			;
-		s = tmpenv;
-		for (k = i; k < nxt && s < &tmpenv[sizeof(tmpenv) - 1]; ++k)
-			*s++ = env_get_char(k);
-		*s++ = '\0';
-		lval = tmpenv;
-		/*
-		 * Find the first '=': it separates the name from the value
-		 */
-		s = strchr(tmpenv, '=');
-		if (s != NULL) {
-			*s++ = '\0';
-			rval = s;
-		} else
-			continue;
-		err = fdt_setprop(fdt, nodeoffset, lval, rval, strlen(rval)+1);
-		if (err < 0) {
-			printf("WARNING: could not set %s %s.\n",
-				lval, fdt_strerror(err));
-			return err;
-		}
-	}
-	return 0;
-}
-#endif /* ifdef CONFIG_OF_HAS_UBOOT_ENV */
-
-/********************************************************************/
-
-#ifdef CONFIG_OF_HAS_BD_T
-
-#define BDM(x)	{	.name = #x, .offset = offsetof(bd_t, bi_ ##x ) }
-
-static const struct {
-	const char *name;
-	int offset;
-} bd_map[] = {
-	BDM(memstart),
-	BDM(memsize),
-	BDM(flashstart),
-	BDM(flashsize),
-	BDM(flashoffset),
-	BDM(sramstart),
-	BDM(sramsize),
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
-	|| defined(CONFIG_E500)
-	BDM(immr_base),
-#endif
-#if defined(CONFIG_MPC5xxx)
-	BDM(mbar_base),
-#endif
-#if defined(CONFIG_MPC83XX)
-	BDM(immrbar),
-#endif
-#if defined(CONFIG_MPC8220)
-	BDM(mbar_base),
-	BDM(inpfreq),
-	BDM(pcifreq),
-	BDM(pevfreq),
-	BDM(flbfreq),
-	BDM(vcofreq),
-#endif
-	BDM(bootflags),
-	BDM(ip_addr),
-	BDM(intfreq),
-	BDM(busfreq),
-#ifdef CONFIG_CPM2
-	BDM(cpmfreq),
-	BDM(brgfreq),
-	BDM(sccfreq),
-	BDM(vco),
-#endif
-#if defined(CONFIG_MPC5xxx)
-	BDM(ipbfreq),
-	BDM(pcifreq),
-#endif
-	BDM(baudrate),
-};
-
-
-int fdt_bd_t(void *fdt)
-{
-	bd_t *bd = gd->bd;
-	int   nodeoffset;
-	int   err;
-	u32   tmp;		/* used to set 32 bit integer properties */
-	int i;
-
-	err = fdt_check_header(fdt);
-	if (err < 0) {
-		printf("fdt_bd_t: %s\n", fdt_strerror(err));
-		return err;
-	}
-
-	/*
-	 * See if we already have a "bd_t" node, delete it if so.
-	 * Then create a new empty node.
-	 */
-	nodeoffset = fdt_path_offset (fdt, "/bd_t");
-	if (nodeoffset >= 0) {
-		err = fdt_del_node(fdt, nodeoffset);
-		if (err < 0) {
-			printf("fdt_bd_t: %s\n", fdt_strerror(err));
-			return err;
-		}
-	}
-	/*
-	 * Create a new node "/bd_t" (offset 0 is root level)
-	 */
-	nodeoffset = fdt_add_subnode(fdt, 0, "bd_t");
-	if (nodeoffset < 0) {
-		printf("WARNING: could not create /bd_t %s.\n",
-			fdt_strerror(nodeoffset));
-		printf("fdt_bd_t: %s\n", fdt_strerror(nodeoffset));
-		return nodeoffset;
-	}
-	/*
-	 * Use the string/pointer structure to create the entries...
-	 */
-	for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) {
-		tmp = cpu_to_be32(getenv("bootargs"));
-		err = fdt_setprop(fdt, nodeoffset,
-			bd_map[i].name, &tmp, sizeof(tmp));
-		if (err < 0)
-			printf("WARNING: could not set %s %s.\n",
-				bd_map[i].name, fdt_strerror(err));
-	}
-	/*
-	 * Add a couple of oddball entries...
-	 */
-	err = fdt_setprop(fdt, nodeoffset, "enetaddr", &bd->bi_enetaddr, 6);
-	if (err < 0)
-		printf("WARNING: could not set enetaddr %s.\n",
-			fdt_strerror(err));
-	err = fdt_setprop(fdt, nodeoffset, "ethspeed", &bd->bi_ethspeed, 4);
-	if (err < 0)
-		printf("WARNING: could not set ethspeed %s.\n",
-			fdt_strerror(err));
-	return 0;
-}
-#endif /* ifdef CONFIG_OF_HAS_BD_T */
-
 void do_fixup_by_path(void *fdt, const char *path, const char *prop,
 		      const void *val, int len, int create)
 {
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index e4d6168..dbfdd97 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -119,7 +119,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 {
 	int div = in_8((void*)CFG_MBAR + 0x204) & 0x0020 ? 8 : 4;
 	char * cpu_path = "/cpus/" OF_CPU;
+#ifdef CONFIG_MPC5xxx_FEC
 	char * eth_path = "/" OF_SOC "/ethernet@3000";
+#endif
 
 	do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
 	do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
@@ -127,7 +129,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
 	do_fixup_by_path_u32(blob, "/" OF_SOC, "system-frequency",
 				bd->bi_busfreq*div, 1);
+#ifdef CONFIG_MPC5xxx_FEC
 	do_fixup_by_path(blob, eth_path, "mac-address", bd->bi_enetaddr, 6, 0);
 	do_fixup_by_path(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0);
+#endif
 }
 #endif
diff --git a/cpu/mpc8xx/Makefile b/cpu/mpc8xx/Makefile
index 223b30c..dbdc2e0 100644
--- a/cpu/mpc8xx/Makefile
+++ b/cpu/mpc8xx/Makefile
@@ -29,7 +29,7 @@ LIB	= $(obj)lib$(CPU).a
 
 START	= start.o kgdb.o
 COBJS	= bedbug_860.o commproc.o cpu.o cpu_init.o	\
-	  fec.o i2c.o interrupts.o lcd.o scc.o		\
+	  fec.o fdt.o i2c.o interrupts.o lcd.o scc.o	\
 	  serial.o speed.o spi.o \
 	  traps.o upatch.o video.o
 SOBJS	= plprcr_write.o
diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index c878352..a86598e 100644
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -637,14 +637,3 @@ void reset_8xx_watchdog (volatile immap_t * immr)
 
 #endif /* CONFIG_WATCHDOG */
 
-/* ------------------------------------------------------------------------- */
-#if defined(CONFIG_OF_LIBFDT)
-void ft_cpu_setup (void *blob, bd_t *bd)
-{
-	char * cpu_path = "/cpus/" OF_CPU;
-
-	do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
-	do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
-	do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
-}
-#endif /* CONFIG_OF_LIBFDT */
diff --git a/cpu/mpc8xx/fdt.c b/cpu/mpc8xx/fdt.c
new file mode 100644
index 0000000..567094a
--- /dev/null
+++ b/cpu/mpc8xx/fdt.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2008 (C) Bryan O'Donoghue
+ *
+ * Code copied & edited from Freescale mpc85xx stuff.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+		"timebase-frequency", get_tbclk(), 1);
+	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+		"bus-frequency", bd->bi_busfreq, 1);
+	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+		"clock-frequency", bd->bi_intfreq, 1);
+	do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
+		gd->brg_clk, 1);
+
+	/* Fixup ethernet MAC addresses */
+	fdt_fixup_ethernet(blob, bd);
+
+	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}
diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c
index 11b0893..070babc 100644
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -174,6 +174,27 @@ unsigned long measure_gclk(void)
 
 #endif
 
+void get_brgclk(uint sccr)
+{
+	uint divider = 0;
+
+	switch((sccr&SCCR_DFBRG11)>>11){
+		case 0:
+			divider = 1;
+			break;
+		case 1:
+			divider = 4;
+			break;
+		case 2:
+			divider = 16;
+			break;
+		case 3:
+			divider = 64;
+			break;
+	}
+	gd->brg_clk = gd->cpu_clk/divider;
+}
+
 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
 
 /*
@@ -223,6 +244,8 @@ int get_clocks (void)
 		gd->bus_clk = gd->cpu_clk / 2;
 	}
 
+	get_brgclk(sccr);
+
 	return (0);
 }
 
@@ -254,6 +277,8 @@ int get_clocks_866 (void)
 	gd->cpu_clk = measure_gclk ();
 #endif
 
+	get_brgclk(immr->im_clkrst.car_sccr);
+
 	/* if cpu clock <= 66 MHz then set bus division factor to 1,
 	 * otherwise set it to 2
 	 */
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index d4003a2..3b828fb 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -1180,6 +1180,12 @@ static int onenand_probe(struct mtd_info *mtd)
 	if (maf_id != bram_maf_id || dev_id != bram_dev_id)
 		return -ENXIO;
 
+	/* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
+	if (dev_id & (1 << 9)) {
+		printk("Not yet support Flex-OneNAND\n");
+		return -ENXIO;
+	}
+
 	/* Flash device information */
 	onenand_print_device_info(dev_id, 0);
 	this->device_id = dev_id;
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b9723fa..7d7df9c 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -27,6 +27,7 @@ LIB 	:= $(obj)libnet.a
 
 COBJS-y += 3c589.o
 COBJS-y += bcm570x.o bcm570x_autoneg.o 5701rls.o
+COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o
 COBJS-y += cs8900.o
 COBJS-y += dc2114x.o
 COBJS-y += dm9000x.o
@@ -40,7 +41,7 @@ COBJS-y += lan91c96.o
 COBJS-y += macb.o
 COBJS-y += mcffec.o
 COBJS-y += natsemi.o
-COBJS-y += ne2000.o
+COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o
 COBJS-y += netarm_eth.o
 COBJS-y += netconsole.o
 COBJS-y += ns7520_eth.o
diff --git a/drivers/net/ax88796.h b/drivers/net/ax88796.h
new file mode 100644
index 0000000..069ae80
--- /dev/null
+++ b/drivers/net/ax88796.h
@@ -0,0 +1,217 @@
+/*
+ * AX88796L(NE2000) support
+ *
+ * (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __DRIVERS_AX88796L_H__
+#define __DRIVERS_AX88796L_H__
+
+#define DP_DATA     (0x10 << 1)
+#define START_PG    0x40    /* First page of TX buffer */
+#define START_PG2   0x48
+#define STOP_PG     0x80    /* Last page +1 of RX ring */
+#define TX_PAGES    12
+#define RX_START    (START_PG+TX_PAGES)
+#define RX_END      STOP_PG
+
+#define AX88796L_BASE_ADDRESS	CONFIG_DRIVER_NE2000_BASE
+#define AX88796L_BYTE_ACCESS    0x00001000
+#define AX88796L_OFFSET         0x00000400
+#define AX88796L_ADDRESS_BYTE   AX88796L_BASE_ADDRESS + \
+		AX88796L_BYTE_ACCESS + AX88796L_OFFSET
+#define AX88796L_REG_MEMR       AX88796L_ADDRESS_BYTE + (0x14<<1)
+#define AX88796L_REG_CR         AX88796L_ADDRESS_BYTE + (0x00<<1)
+
+#define AX88796L_CR		(*(vu_short *)(AX88796L_REG_CR))
+#define AX88796L_MEMR	(*(vu_short *)(AX88796L_REG_MEMR))
+
+#define EECS_HIGH		(AX88796L_MEMR |= 0x10)
+#define EECS_LOW		(AX88796L_MEMR &= 0xef)
+#define EECLK_HIGH		(AX88796L_MEMR |= 0x80)
+#define EECLK_LOW		(AX88796L_MEMR &= 0x7f)
+#define EEDI_HIGH		(AX88796L_MEMR |= 0x20)
+#define EEDI_LOW		(AX88796L_MEMR &= 0xdf)
+#define EEDO			((AX88796L_MEMR & 0x40)>>6)
+
+#define PAGE0_SET		(AX88796L_CR &= 0x3f)
+#define PAGE1_SET		(AX88796L_CR = (AX88796L_CR & 0x3f) | 0x40)
+
+#define BIT_DUMMY		0
+#define MAC_EEP_READ	1
+#define MAC_EEP_WRITE	2
+#define MAC_EEP_ERACE	3
+#define MAC_EEP_EWEN	4
+#define MAC_EEP_EWDS	5
+
+/* R7780MP Specific code */
+#if defined(CONFIG_R7780MP)
+#define ISA_OFFSET  0x1400
+#define DP_IN(_b_, _o_, _d_)  (_d_) = \
+	*( (vu_short *) ((_b_) + ((_o_) * 2) + ISA_OFFSET))
+#define DP_OUT(_b_, _o_, _d_) \
+	*((vu_short *)((_b_) + ((_o_) * 2) + ISA_OFFSET)) = (_d_)
+#define DP_IN_DATA(_b_, _d_)  (_d_) = *( (vu_short *) ((_b_) + ISA_OFFSET))
+#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
+#else
+/* Please change for your target boards */
+#define ISA_OFFSET  0x0000
+#define DP_IN(_b_, _o_, _d_)  (_d_) = *( (vu_short *)((_b_)+(_o_ )+ISA_OFFSET))
+#define DP_OUT(_b_, _o_, _d_) *((vu_short *)((_b_)+(_o_)+ISA_OFFSET)) = (_d_)
+#define DP_IN_DATA(_b_, _d_)  (_d_) = *( (vu_short *) ((_b_)+ISA_OFFSET))
+#define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
+#endif
+
+
+/*
+ * Set 1 bit data
+ */
+static void ax88796_bitset(u32 bit)
+{
+	/* DATA1 */
+	if( bit )
+		EEDI_HIGH;
+	else
+		EEDI_LOW;
+
+	EECLK_LOW;
+	udelay(1000);
+	EECLK_HIGH;
+	udelay(1000);
+	EEDI_LOW;
+}
+
+/*
+ * Get 1 bit data
+ */
+static u8 ax88796_bitget(void)
+{
+	u8 bit;
+
+	EECLK_LOW;
+	udelay(1000);
+	/* DATA */
+	bit = EEDO;
+	EECLK_HIGH;
+	udelay(1000);
+
+	return bit;
+}
+
+/*
+ * Send COMMAND to EEPROM
+ */
+static void ax88796_eep_cmd(u8 cmd)
+{
+	ax88796_bitset(BIT_DUMMY);
+	switch(cmd){
+		case MAC_EEP_READ:
+			ax88796_bitset(1);
+			ax88796_bitset(1);
+			ax88796_bitset(0);
+			break;
+
+		case MAC_EEP_WRITE:
+			ax88796_bitset(1);
+			ax88796_bitset(0);
+			ax88796_bitset(1);
+			break;
+
+		case MAC_EEP_ERACE:
+			ax88796_bitset(1);
+			ax88796_bitset(1);
+			ax88796_bitset(1);
+			break;
+
+		case MAC_EEP_EWEN:
+			ax88796_bitset(1);
+			ax88796_bitset(0);
+			ax88796_bitset(0);
+			break;
+
+		case MAC_EEP_EWDS:
+			ax88796_bitset(1);
+			ax88796_bitset(0);
+			ax88796_bitset(0);
+			break;
+		default:
+			break;
+	}
+}
+
+static void ax88796_eep_setaddr(u16 addr)
+{
+	int i ;
+	for( i = 7 ; i >= 0 ; i-- )
+		ax88796_bitset(addr & (1 << i));
+}
+
+/*
+ * Get data from EEPROM
+ */
+static u16 ax88796_eep_getdata(void)
+{
+	ushort data = 0;
+	int i;
+
+	ax88796_bitget();	/* DUMMY */
+	for( i = 0 ; i < 16 ; i++ ){
+		data <<= 1;
+		data |= ax88796_bitget();
+	}
+	return data;
+}
+
+static void ax88796_mac_read(u8 *buff)
+{
+	int i ;
+	u16 data, addr = 0;
+
+	for( i = 0 ; i < 3; i++ )
+	{
+		EECS_HIGH;
+		EEDI_LOW;
+		udelay(1000);
+		/* READ COMMAND */
+		ax88796_eep_cmd(MAC_EEP_READ);
+		/* ADDRESS */
+		ax88796_eep_setaddr(addr++);
+		/* GET DATA */
+		data = ax88796_eep_getdata();
+		*buff++ = (uchar)(data & 0xff);
+		*buff++ = (uchar)((data >> 8) & 0xff);
+		EECLK_LOW;
+		EEDI_LOW;
+		EECS_LOW;
+	}
+}
+
+int get_prom(u8* mac_addr)
+{
+	u8 prom[32];
+	int i;
+
+	ax88796_mac_read(prom);
+	for (i = 0; i < 6; i++){
+		mac_addr[i] = prom[i];
+	}
+	return 1;
+}
+
+#endif /* __DRIVERS_AX88796L_H__ */
diff --git a/board/bf537-stamp/ether_bf537.c b/drivers/net/bfin_mac.c
index 6c514c6..afe122a 100644
--- a/board/bf537-stamp/ether_bf537.c
+++ b/drivers/net/bfin_mac.c
@@ -1,39 +1,24 @@
 /*
- * ADI Blackfin 537 MAC Ethernet
+ * Driver for Blackfin On-Chip MAC device
  *
- * Copyright (c) 2005 Analog Device, Inc.
+ * Copyright (c) 2005-2008 Analog Device, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Licensed under the GPL-2 or later.
  */
 
 #include <common.h>
 #include <config.h>
-#include <asm/blackfin.h>
 #include <net.h>
 #include <command.h>
 #include <malloc.h>
-#include "ether_bf537.h"
 
+#include <asm/blackfin.h>
 #include <asm/mach-common/bits/dma.h>
 #include <asm/mach-common/bits/emac.h>
 #include <asm/mach-common/bits/pll.h>
 
+#include "bfin_mac.h"
+
 #ifdef CONFIG_POST
 #include <post.h>
 #endif
@@ -41,66 +26,50 @@
 #undef DEBUG_ETHERNET
 
 #ifdef DEBUG_ETHERNET
-#define DEBUGF(fmt,args...) printf(fmt,##args)
+#define DEBUGF(fmt, args...) printf(fmt, ##args)
 #else
-#define DEBUGF(fmt,args...)
+#define DEBUGF(fmt, args...)
 #endif
 
-#if defined(CONFIG_CMD_NET)
-
 #define RXBUF_BASE_ADDR		0xFF900000
 #define TXBUF_BASE_ADDR		0xFF800000
 #define TX_BUF_CNT		1
 
-#define TOUT_LOOP		1000000
+#define TOUT_LOOP 		1000000
 
 ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
 ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
 static u16 txIdx;		/* index of the current RX buffer */
 static u16 rxIdx;		/* index of the current TX buffer */
 
-u8 SrcAddr[6];
 u16 PHYregs[NO_PHY_REGS];	/* u16 PHYADDR; */
 
 /* DMAx_CONFIG values at DMA Restart */
-const ADI_DMA_CONFIG_REG rxdmacfg = { 1, 1, 2, 0, 0, 0, 0, 5, 7 };
-
-#if 0
-	rxdmacfg.b_DMA_EN = 1;	/* enabled */
-	rxdmacfg.b_WNR    = 1;	/* write to memory */
-	rxdmacfg.b_WDSIZE = 2;	/* wordsize is 32 bits */
-	rxdmacfg.b_DMA2D  = 0;	/* N/A */
-	rxdmacfg.b_RESTART= 0;	/* N/A */
-	rxdmacfg.b_DI_SEL = 0;	/* N/A */
-	rxdmacfg.b_DI_EN  = 0;	/* no interrupt */
-	rxdmacfg.b_NDSIZE = 5;	/* 5 half words is desc size. */
-	rxdmacfg.b_FLOW   = 7;	/* large desc flow  */
-#endif
-
-const ADI_DMA_CONFIG_REG txdmacfg = { 1, 0, 2, 0, 0, 0, 0, 5, 7 };
-
-#if 0
-	txdmacfg.b_DMA_EN = 1;	/* enabled */
-	txdmacfg.b_WNR    = 0;	/* read from memory */
-	txdmacfg.b_WDSIZE = 2;	/* wordsize is 32 bits */
-	txdmacfg.b_DMA2D  = 0;	/* N/A */
-	txdmacfg.b_RESTART= 0;	/* N/A */
-	txdmacfg.b_DI_SEL = 0;	/* N/A */
-	txdmacfg.b_DI_EN  = 0;	/* no interrupt */
-	txdmacfg.b_NDSIZE = 5;	/* 5 half words is desc size. */
-	txdmacfg.b_FLOW   = 7;	/* large desc flow */
-#endif
-
-ADI_ETHER_BUFFER *SetupRxBuffer(int no);
-ADI_ETHER_BUFFER *SetupTxBuffer(int no);
-
-static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd);
-static void bfin_EMAC_halt(struct eth_device *dev);
-static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
-			  int length);
-static int bfin_EMAC_recv(struct eth_device *dev);
-
-int bfin_EMAC_initialize(bd_t * bis)
+const ADI_DMA_CONFIG_REG rxdmacfg = {
+	.b_DMA_EN  = 1,	/* enabled */
+	.b_WNR     = 1,	/* write to memory */
+	.b_WDSIZE  = 2,	/* wordsize is 32 bits */
+	.b_DMA2D   = 0,
+	.b_RESTART = 0,
+	.b_DI_SEL  = 0,
+	.b_DI_EN   = 0,	/* no interrupt */
+	.b_NDSIZE  = 5,	/* 5 half words is desc size */
+	.b_FLOW    = 7	/* large desc flow */
+};
+
+const ADI_DMA_CONFIG_REG txdmacfg = {
+	.b_DMA_EN  = 1,	/* enabled */
+	.b_WNR     = 0,	/* read from memory */
+	.b_WDSIZE  = 2,	/* wordsize is 32 bits */
+	.b_DMA2D   = 0,
+	.b_RESTART = 0,
+	.b_DI_SEL  = 0,
+	.b_DI_EN   = 0,	/* no interrupt */
+	.b_NDSIZE  = 5,	/* 5 half words is desc size */
+	.b_FLOW    = 7	/* large desc flow */
+};
+
+int bfin_EMAC_initialize(bd_t *bis)
 {
 	struct eth_device *dev;
 	dev = (struct eth_device *)malloc(sizeof(*dev));
@@ -108,7 +77,7 @@ int bfin_EMAC_initialize(bd_t * bis)
 		hang();
 
 	memset(dev, 0, sizeof(*dev));
-	sprintf(dev->name, "BF537 ETHERNET");
+	sprintf(dev->name, "Blackfin EMAC");
 
 	dev->iobase = 0;
 	dev->priv = 0;
@@ -165,7 +134,7 @@ static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
 		txIdx = 0;
 	else
 		txIdx++;
-      out:
+ out:
 	DEBUGF("BFIN EMAC send: length = %d\n", length);
 	return result;
 }
@@ -212,7 +181,7 @@ static int bfin_EMAC_recv(struct eth_device *dev)
  *
  *************************************************************/
 
-static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd)
+static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)
 {
 	u32 opmode;
 	int dat;
@@ -227,7 +196,7 @@ static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd)
 		return -1;
 
 /* Initialize EMAC address */
-	SetupMacAddr(SrcAddr);
+	bfin_EMAC_setup_addr(bd);
 
 /* Initialize TX and RX buffer */
 	for (i = 0; i < PKTBUFSRX; i++) {
@@ -289,37 +258,25 @@ static void bfin_EMAC_halt(struct eth_device *dev)
 
 }
 
-void SetupMacAddr(u8 * MACaddr)
+void bfin_EMAC_setup_addr(bd_t *bd)
 {
-	char *tmp, *end;
-	int i;
-	/* this depends on a little-endian machine */
-	tmp = getenv("ethaddr");
-	if (tmp) {
-		for (i = 0; i < 6; i++) {
-			MACaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
-			if (tmp)
-				tmp = (*end) ? end + 1 : end;
-		}
-
-#ifndef CONFIG_NETCONSOLE
-		printf("Using MAC Address %02X:%02X:%02X:%02X:%02X:%02X\n",
-		       MACaddr[0], MACaddr[1],
-		       MACaddr[2], MACaddr[3], MACaddr[4], MACaddr[5]);
-#endif
-		*pEMAC_ADDRLO = MACaddr[0] | MACaddr[1] << 8 |
-		    MACaddr[2] << 16 | MACaddr[3] << 24;
-		*pEMAC_ADDRHI = MACaddr[4] | MACaddr[5] << 8;
-	}
+	*pEMAC_ADDRLO =
+		bd->bi_enetaddr[0] |
+		bd->bi_enetaddr[1] << 8 |
+		bd->bi_enetaddr[2] << 16 |
+		bd->bi_enetaddr[3] << 24;
+	*pEMAC_ADDRHI =
+		bd->bi_enetaddr[4] |
+		bd->bi_enetaddr[5] << 8;
 }
 
-void PollMdcDone(void)
+static void PollMdcDone(void)
 {
 	/* poll the STABUSY bit */
 	while (*pEMAC_STAADD & STABUSY) ;
 }
 
-void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
+static void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
 {
 	PollMdcDone();
 
@@ -332,7 +289,7 @@ void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
 /*********************************************************************************
  *		Read an off-chip register in a PHY through the MDC/MDIO port     *
  *********************************************************************************/
-u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
+static u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
 {
 	u16 Data;
 
@@ -350,7 +307,8 @@ u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
 	return Data;
 }
 
-void SoftResetPHY(void)
+#if 0 /* dead code ? */
+static void SoftResetPHY(void)
 {
 	u16 phydat;
 	/* set the reset bit */
@@ -362,13 +320,30 @@ void SoftResetPHY(void)
 		phydat = RdPHYReg(PHYADDR, PHY_MODECTL);
 	} while ((phydat & PHY_RESET) != 0);
 }
+#endif
 
-int SetupSystemRegs(int *opmode)
+static int SetupSystemRegs(int *opmode)
 {
 	u16 sysctl, phydat;
 	int count = 0;
 	/* Enable PHY output */
 	*pVR_CTL |= CLKBUFOE;
+	/* Set all the pins to peripheral mode */
+
+#ifndef CONFIG_BFIN_MAC_RMII
+	*pPORTH_FER = 0xFFFF;
+#ifdef __ADSPBF52x__
+	*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2 | PORT_x_MUX_2_FUNC_2;
+#endif
+#else
+#if defined(__ADSPBF536__) || defined(__ADSPBF537__)
+	*pPORTH_FER = 0xC373;
+#endif
+#ifdef __ADSPBF52x__
+	*pPORTH_FER = 0x01FF;
+	*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2;
+#endif
+#endif
 	/* MDC  = 2.5 MHz */
 	sysctl = SET_MDCDIV(24);
 	/* Odd word alignment for Receive Frame DMA word */
@@ -546,4 +521,3 @@ int ether_post_test(int flags)
 	return 0;
 }
 #endif
-#endif
diff --git a/board/bf537-stamp/ether_bf537.h b/drivers/net/bfin_mac.h
index 22fc392..c8a94d0 100644
--- a/board/bf537-stamp/ether_bf537.h
+++ b/drivers/net/bfin_mac.h
@@ -1,3 +1,14 @@
+/*
+ * bfin_mac.h - some defines/structures for the Blackfin on-chip MAC.
+ *
+ * Copyright (c) 2005-2008 Analog Device, Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __BFIN_MAC_H__
+#define __BFIN_MAC_H__
+
 #define PHYADDR			0x01
 #define NO_PHY_REGS		0x20
 
@@ -60,12 +71,19 @@ typedef struct adi_ether_buffer {
 } ADI_ETHER_BUFFER;
 /* 40 bytes/struct in 44 bytes */
 
-void SetupMacAddr(u8 * MACaddr);
+static ADI_ETHER_BUFFER *SetupRxBuffer(int no);
+static ADI_ETHER_BUFFER *SetupTxBuffer(int no);
+
+static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd);
+static void bfin_EMAC_halt(struct eth_device *dev);
+static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet, int length);
+static int bfin_EMAC_recv(struct eth_device *dev);
+
+static void PollMdcDone(void);
+static void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data);
+static u16 RdPHYReg(u16 PHYAddr, u16 RegAddr);
+static int SetupSystemRegs(int *opmode);
 
-void PollMdcDone(void);
-void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data);
-u16 RdPHYReg(u16 PHYAddr, u16 RegAddr);
-void SoftResetPHY(void);
-void DumpPHYRegs(void);
+static void bfin_EMAC_setup_addr(bd_t *bd);
 
-int SetupSystemRegs(int *opmode);
+#endif
diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c
index b100657..abf910c 100644
--- a/drivers/net/ne2000.c
+++ b/drivers/net/ne2000.c
@@ -80,27 +80,11 @@ Add SNMP
 #include <net.h>
 #include <malloc.h>
 
-#ifdef CONFIG_DRIVER_NE2000
-
-/* wor around udelay resetting OCR */
-static void my_udelay(long us) {
-	long tmo;
-
-	tmo = get_timer (0) + us * CFG_HZ / 1000000; /* will this be much greater than 0 ? */
-	while (get_timer (0) < tmo);
-}
-
-#define mdelay(n)       my_udelay((n)*1000)
-
+#define mdelay(n)       udelay((n)*1000)
 /* forward definition of function used for the uboot interface */
 void uboot_push_packet_len(int len);
 void uboot_push_tx_done(int key, int val);
 
-/* timeout for tx/rx in s */
-#define TOUT 5
-
-#define ETHER_ADDR_LEN 6
-
 /*
   ------------------------------------------------------------------------
   Debugging details
@@ -118,17 +102,22 @@ void uboot_push_tx_done(int key, int val);
 #if DEBUG & 1
 #define DEBUG_FUNCTION() do { printf("%s\n", __FUNCTION__); } while (0)
 #define DEBUG_LINE() do { printf("%d\n", __LINE__); } while (0)
+#define PRINTK(args...) printf(args)
 #else
 #define DEBUG_FUNCTION() do {} while(0)
 #define DEBUG_LINE() do {} while(0)
+#define PRINTK(args...)
 #endif
 
-#include "ne2000.h"
+/* NE2000 base header file */
+#include "ne2000_base.h"
 
-#if DEBUG & 1
-#define PRINTK(args...) printf(args)
+#if defined(CONFIG_DRIVER_AX88796L)
+/* AX88796L support */
+#include "ax88796.h"
 #else
-#define PRINTK(args...)
+/* Basic NE2000 chip support */
+#include "ne2000.h"
 #endif
 
 static dp83902a_priv_data_t nic; /* just one instance of the card supported */
@@ -137,8 +126,7 @@ static bool
 dp83902a_init(void)
 {
 	dp83902a_priv_data_t *dp = &nic;
-	cyg_uint8* base;
-	int i;
+	u8* base;
 
 	DEBUG_FUNCTION();
 
@@ -147,6 +135,8 @@ dp83902a_init(void)
 
 	DEBUG_LINE();
 
+#if defined(NE2000_BASIC_INIT)
+	/* AX88796L doesn't need */
 	/* Prepare ESA */
 	DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1);  /* Select page 1 */
 	/* Use the address from the serial EEPROM */
@@ -163,6 +153,7 @@ dp83902a_init(void)
 	       dp->esa[4],
 	       dp->esa[5] );
 
+#endif	/* NE2000_BASIC_INIT */
 	return true;
 }
 
@@ -170,7 +161,7 @@ static void
 dp83902a_stop(void)
 {
 	dp83902a_priv_data_t *dp = &nic;
-	cyg_uint8 *base = dp->base;
+	u8 *base = dp->base;
 
 	DEBUG_FUNCTION();
 
@@ -188,10 +179,10 @@ dp83902a_stop(void)
   the hardware ready to send/receive packets.
 */
 static void
-dp83902a_start(unsigned char * enaddr)
+dp83902a_start(u8 * enaddr)
 {
 	dp83902a_priv_data_t *dp = &nic;
-	cyg_uint8 *base = dp->base;
+	u8 *base = dp->base;
 	int i;
 
 	DEBUG_FUNCTION();
@@ -206,15 +197,20 @@ dp83902a_start(unsigned char * enaddr)
 	dp->tx1 = dp->tx2 = 0;
 	dp->tx_next = dp->tx_buf1;
 	dp->tx_started = false;
+	dp->running = true;
 	DP_OUT(base, DP_PSTART, dp->rx_buf_start); /* Receive ring start page */
 	DP_OUT(base, DP_BNDRY, dp->rx_buf_end-1); /* Receive ring boundary */
 	DP_OUT(base, DP_PSTOP, dp->rx_buf_end);	/* Receive ring end page */
 	dp->rx_next = dp->rx_buf_start-1;
+	dp->running = true;
 	DP_OUT(base, DP_ISR, 0xFF);		/* Clear any pending interrupts */
 	DP_OUT(base, DP_IMR, DP_IMR_All);	/* Enable all interrupts */
 	DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1 | DP_CR_STOP);  /* Select page 1 */
 	DP_OUT(base, DP_P1_CURP, dp->rx_buf_start);   /* Current page - next free page for Rx */
+	dp->running = true;
 	for (i = 0;  i < ETHER_ADDR_LEN;  i++) {
+		/* FIXME */
+		//*((vu_short*)( base + ((DP_P1_PAR0 + i) * 2) +  0x1400)) = enaddr[i];
 		DP_OUT(base, DP_P1_PAR0+i, enaddr[i]);
 	}
 	/* Enable and start device */
@@ -222,6 +218,7 @@ dp83902a_start(unsigned char * enaddr)
 	DP_OUT(base, DP_TCR, DP_TCR_NORMAL); /* Normal transmit operations */
 	DP_OUT(base, DP_RCR, DP_RCR_AB);  /* Accept broadcast, no errors, no multicast */
 	dp->running = true;
+
 }
 
 /*
@@ -234,7 +231,7 @@ static void
 dp83902a_start_xmit(int start_page, int len)
 {
 	dp83902a_priv_data_t *dp = (dp83902a_priv_data_t *) &nic;
-	cyg_uint8 *base = dp->base;
+	u8 *base = dp->base;
 
 	DEBUG_FUNCTION();
 
@@ -259,10 +256,10 @@ dp83902a_start_xmit(int start_page, int len)
   that there is free buffer space (dp->tx_next).
 */
 static void
-dp83902a_send(unsigned char *data, int total_len, unsigned long key)
+dp83902a_send(u8 *data, int total_len, u32 key)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
+	u8 *base = dp->base;
 	int len, start_page, pkt_len, i, isr;
 #if DEBUG & 4
 	int dx;
@@ -296,7 +293,7 @@ dp83902a_send(unsigned char *data, int total_len, unsigned long key)
 		/* but the code is extended a bit to do what Hitachi's monitor */
 		/* does (i.e., also read data). */
 
-		cyg_uint16 tmp;
+		u16 tmp;
 		int len = 1;
 
 		DP_OUT(base, DP_RSAL, 0x100-len);
@@ -322,7 +319,7 @@ dp83902a_send(unsigned char *data, int total_len, unsigned long key)
 
 	/* Put data into buffer */
 #if DEBUG & 4
-	printf(" sg buf %08lx len %08x\n ", (unsigned long) data, len);
+	printf(" sg buf %08lx len %08x\n ", (u32)data, len);
 	dx = 0;
 #endif
 	while (len > 0) {
@@ -330,6 +327,7 @@ dp83902a_send(unsigned char *data, int total_len, unsigned long key)
 		printf(" %02x", *data);
 		if (0 == (++dx % 16)) printf("\n ");
 #endif
+
 		DP_OUT_DATA(dp->data, *data++);
 		len--;
 	}
@@ -358,6 +356,7 @@ dp83902a_send(unsigned char *data, int total_len, unsigned long key)
 	do {
 		DP_IN(base, DP_ISR, isr);
 	} while ((isr & DP_ISR_RDC) == 0);
+
 	/* Then disable DMA */
 	DP_OUT(base, DP_CR, DP_CR_PAGE0 | DP_CR_NODMA | DP_CR_START);
 
@@ -383,9 +382,9 @@ static void
 dp83902a_RxEvent(void)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
-	unsigned char rsr;
-	unsigned char rcv_hdr[4];
+	u8 *base = dp->base;
+	u8 rsr;
+	u8 rcv_hdr[4];
 	int i, len, pkt, cur;
 
 	DEBUG_FUNCTION();
@@ -423,6 +422,7 @@ dp83902a_RxEvent(void)
 		CYGACC_CALL_IF_DELAY_US(10);
 #endif
 
+		/* read header (get data size)*/
 		for (i = 0;  i < sizeof(rcv_hdr);) {
 			DP_IN_DATA(dp->data, rcv_hdr[i++]);
 		}
@@ -432,7 +432,10 @@ dp83902a_RxEvent(void)
 		       rcv_hdr[0], rcv_hdr[1], rcv_hdr[2], rcv_hdr[3]);
 #endif
 		len = ((rcv_hdr[3] << 8) | rcv_hdr[2]) - sizeof(rcv_hdr);
+
+		/* data read */
 		uboot_push_packet_len(len);
+
 		if (rcv_hdr[1] == dp->rx_buf_start)
 			DP_OUT(base, DP_BNDRY, dp->rx_buf_end-1);
 		else
@@ -448,12 +451,12 @@ dp83902a_RxEvent(void)
   efficient processing in the upper layers of the stack.
 */
 static void
-dp83902a_recv(unsigned char *data, int len)
+dp83902a_recv(u8 *data, int len)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
+	u8 *base = dp->base;
 	int i, mlen;
-	cyg_uint8 saved_char = 0;
+	u8 saved_char = 0;
 	bool saved;
 #if DEBUG & 4
 	int dx;
@@ -482,7 +485,7 @@ dp83902a_recv(unsigned char *data, int len)
 		if (data) {
 			mlen = len;
 #if DEBUG & 4
-			printf(" sg buf %08lx len %08x \n", (unsigned long) data, mlen);
+			printf(" sg buf %08lx len %08x \n", (u32) data, mlen);
 			dx = 0;
 #endif
 			while (0 < mlen) {
@@ -495,7 +498,7 @@ dp83902a_recv(unsigned char *data, int len)
 				}
 
 				{
-					cyg_uint8 tmp;
+					u8 tmp;
 					DP_IN_DATA(dp->data, tmp);
 #if DEBUG & 4
 					printf(" %02x", tmp);
@@ -516,9 +519,9 @@ static void
 dp83902a_TxEvent(void)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
-	unsigned char tsr;
-	unsigned long key;
+	u8 *base = dp->base;
+	u8 tsr;
+	u32 key;
 
 	DEBUG_FUNCTION();
 
@@ -551,8 +554,8 @@ static void
 dp83902a_ClearCounters(void)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
-	cyg_uint8 cnt1, cnt2, cnt3;
+	u8 *base = dp->base;
+	u8 cnt1, cnt2, cnt3;
 
 	DP_IN(base, DP_FER, cnt1);
 	DP_IN(base, DP_CER, cnt2);
@@ -566,8 +569,8 @@ static void
 dp83902a_Overflow(void)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *)&nic;
-	cyg_uint8 *base = dp->base;
-	cyg_uint8 isr;
+	u8 *base = dp->base;
+	u8 isr;
 
 	/* Issue a stop command and wait 1.6ms for it to complete. */
 	DP_OUT(base, DP_CR, DP_CR_STOP | DP_CR_NODMA);
@@ -603,8 +606,8 @@ static void
 dp83902a_poll(void)
 {
 	struct dp83902a_priv_data *dp = (struct dp83902a_priv_data *) &nic;
-	cyg_uint8 *base = dp->base;
-	unsigned char isr;
+	u8 *base = dp->base;
+	u8 isr;
 
 	DP_OUT(base, DP_CR, DP_CR_NODMA | DP_CR_PAGE0 | DP_CR_START);
 	DP_IN(base, DP_ISR, isr);
@@ -642,13 +645,13 @@ dp83902a_poll(void)
 /* find prom (taken from pc_net_cs.c from Linux) */
 
 #include "8390.h"
-
+/*
 typedef struct hw_info_t {
 	u_int	offset;
 	u_char	a0, a1, a2;
 	u_int	flags;
 } hw_info_t;
-
+*/
 #define DELAY_OUTPUT	0x01
 #define HAS_MISC_REG	0x02
 #define USE_BIG_BUF	0x04
@@ -731,102 +734,17 @@ static hw_info_t hw_info[] = {
 
 static hw_info_t default_info = { 0, 0, 0, 0, 0 };
 
-unsigned char dev_addr[6];
+u8 dev_addr[6];
 
 #define PCNET_CMD	0x00
 #define PCNET_DATAPORT	0x10	/* NatSemi-defined port window offset. */
 #define PCNET_RESET	0x1f	/* Issue a read to reset, a write to clear. */
 #define PCNET_MISC	0x18	/* For IBM CCAE and Socket EA cards */
 
-unsigned long nic_base;
-
-static void pcnet_reset_8390(void)
-{
-	int i, r;
-
-	PRINTK("nic base is %lx\n", nic_base);
-
-	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
-	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
-	n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
-	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
-	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
-	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
-	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
-
-	n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
-
-	for (i = 0; i < 100; i++) {
-		if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
-			break;
-		PRINTK("got %x in reset\n", r);
-		my_udelay(100);
-	}
-	n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
-
-	if (i == 100)
-		printf("pcnet_reset_8390() did not complete.\n");
-} /* pcnet_reset_8390 */
-
-static hw_info_t * get_prom(void ) {
-	unsigned char prom[32];
-	int i, j;
-	struct {
-		u_char value, offset;
-	} program_seq[] = {
-		{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
-		{0x48,	EN0_DCFG},	/* Set byte-wide (0x48) access. */
-		{0x00,	EN0_RCNTLO},	/* Clear the count regs. */
-		{0x00,	EN0_RCNTHI},
-		{0x00,	EN0_IMR},	/* Mask completion irq. */
-		{0xFF,	EN0_ISR},
-		{E8390_RXOFF, EN0_RXCR},	/* 0x20  Set to monitor */
-		{E8390_TXOFF, EN0_TXCR},	/* 0x02  and loopback mode. */
-		{32,	EN0_RCNTLO},
-		{0x00,	EN0_RCNTHI},
-		{0x00,	EN0_RSARLO},	/* DMA starting at 0x0000. */
-		{0x00,	EN0_RSARHI},
-		{E8390_RREAD+E8390_START, E8390_CMD},
-	};
-
-	PRINTK("trying to get MAC via prom reading\n");
-
-	pcnet_reset_8390();
-
-	mdelay(10);
-
-	for (i = 0; i < sizeof(program_seq)/sizeof(program_seq[0]); i++)
-		n2k_outb(program_seq[i].value, program_seq[i].offset);
-
-	PRINTK("PROM:");
-	for (i = 0; i < 32; i++) {
-		prom[i] = n2k_inb(PCNET_DATAPORT);
-		PRINTK(" %02x", prom[i]);
-	}
-	PRINTK("\n");
-	for (i = 0; i < NR_INFO; i++) {
-		if ((prom[0] == hw_info[i].a0) &&
-		    (prom[2] == hw_info[i].a1) &&
-		    (prom[4] == hw_info[i].a2)) {
-			PRINTK("matched board %d\n", i);
-			break;
-		}
-	}
-	if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
-		for (j = 0; j < 6; j++)
-			dev_addr[j] = prom[j<<1];
-		PRINTK("on exit i is %d/%ld\n", i, NR_INFO);
-		PRINTK("MAC address is %02x:%02x:%02x:%02x:%02x:%02x\n",
-		       dev_addr[0],dev_addr[1],dev_addr[2],dev_addr[3],dev_addr[4],dev_addr[5]);
-		return (i < NR_INFO) ? hw_info+i : &default_info;
-	}
-	return NULL;
-}
+u32 nic_base;
 
 /* U-boot specific routines */
-
-
-static unsigned char *pbuf = NULL;
+static u8 *pbuf = NULL;
 
 static int pkey = -1;
 static int initialized=0;
@@ -839,7 +757,7 @@ void uboot_push_packet_len(int len) {
 	}
 	dp83902a_recv(&pbuf[0], len);
 
-	/* Just pass it to the upper layer */
+	/*Just pass it to the upper layer*/
 	NetReceive(&pbuf[0], len);
 }
 
@@ -864,7 +782,7 @@ int eth_init(bd_t *bd) {
 
 #ifdef CONFIG_DRIVER_NE2000_CCR
 	{
-		volatile unsigned char *p =  (volatile unsigned char *) CONFIG_DRIVER_NE2000_CCR;
+		vu_char *p =  (vu_char *) CONFIG_DRIVER_NE2000_CCR;
 
 		PRINTK("CCR before is %x\n", *p);
 		*p = CONFIG_DRIVER_NE2000_VAL;
@@ -873,9 +791,9 @@ int eth_init(bd_t *bd) {
 #endif
 
 	nic_base = CONFIG_DRIVER_NE2000_BASE;
-	nic.base = (cyg_uint8 *) CONFIG_DRIVER_NE2000_BASE;
+	nic.base = (u8 *) CONFIG_DRIVER_NE2000_BASE;
 
-	r = get_prom();
+	r = get_prom(dev_addr);
 	if (!r)
 		return -1;
 
@@ -886,22 +804,23 @@ int eth_init(bd_t *bd) {
 	PRINTK("Set environment from HW MAC addr = \"%s\"\n", ethaddr);
 	setenv ("ethaddr", ethaddr);
 
-
-#define DP_DATA		0x10
 	nic.data = nic.base + DP_DATA;
-	nic.tx_buf1 = 0x40;
-	nic.tx_buf2 = 0x48;
-	nic.rx_buf_start = 0x50;
-	nic.rx_buf_end = 0x80;
+	nic.tx_buf1 = START_PG;
+	nic.tx_buf2 = START_PG2;
+	nic.rx_buf_start = RX_START;
+	nic.rx_buf_end = RX_END;
 
 	if (dp83902a_init() == false)
 		return -1;
+
 	dp83902a_start(dev_addr);
 	initialized=1;
+
 	return 0;
 }
 
 void eth_halt() {
+
 	PRINTK("### eth_halt\n");
 	if(initialized)
 		dp83902a_stop();
@@ -920,7 +839,7 @@ int eth_send(volatile void *packet, int length) {
 
 	pkey = -1;
 
-	dp83902a_send((unsigned char *) packet, length, 666);
+	dp83902a_send((u8 *) packet, length, 666);
 	tmo = get_timer (0) + TOUT * CFG_HZ;
 	while(1) {
 		dp83902a_poll();
@@ -936,4 +855,3 @@ int eth_send(volatile void *packet, int length) {
 	}
 	return 0;
 }
-#endif
diff --git a/drivers/net/ne2000.h b/drivers/net/ne2000.h
index c13d9f0..06e9a28 100644
--- a/drivers/net/ne2000.h
+++ b/drivers/net/ne2000.h
@@ -71,209 +71,113 @@ are GPL, so this is, of course, GPL.
 */
 
 /*
- ------------------------------------------------------------------------
- Macros for accessing DP registers
- These can be overridden by the platform header
-*/
-
-#define DP_IN(_b_, _o_, _d_)  (_d_) = *( (volatile unsigned char *) ((_b_)+(_o_)))
-#define DP_OUT(_b_, _o_, _d_) *( (volatile unsigned char *) ((_b_)+(_o_))) = (_d_)
-
-#define DP_IN_DATA(_b_, _d_)  (_d_) = *( (volatile unsigned char *) ((_b_)))
-#define DP_OUT_DATA(_b_, _d_) *( (volatile unsigned char *) ((_b_))) = (_d_)
-
-
-/* here is all the data */
-
-#define cyg_uint8 unsigned char
-#define cyg_uint16 unsigned short
-#define bool int
-
-#define false 0
-#define true 1
-
-#define CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA 1
-#define CYGACC_CALL_IF_DELAY_US(X) my_udelay(X)
-
-typedef struct dp83902a_priv_data {
-    cyg_uint8* base;
-    cyg_uint8* data;
-    cyg_uint8* reset;
-    int tx_next;           /* First free Tx page */
-    int tx_int;            /* Expecting interrupt from this buffer */
-    int rx_next;           /* First free Rx page */
-    int tx1, tx2;          /* Page numbers for Tx buffers */
-    unsigned long tx1_key, tx2_key;   /* Used to ack when packet sent */
-    int tx1_len, tx2_len;
-    bool tx_started, running, hardwired_esa;
-    cyg_uint8 esa[6];
-    void* plf_priv;
-
-    /* Buffer allocation */
-    int tx_buf1, tx_buf2;
-    int rx_buf_start, rx_buf_end;
-} dp83902a_priv_data_t;
-
-/*
- ------------------------------------------------------------------------
- Some forward declarations
-*/
-static void dp83902a_poll(void);
-
-/* ------------------------------------------------------------------------ */
-/* Register offsets */
-
-#define DP_CR          0x00
-#define DP_CLDA0       0x01
-#define DP_PSTART      0x01             /* write */
-#define DP_CLDA1       0x02
-#define DP_PSTOP       0x02             /* write */
-#define DP_BNDRY       0x03
-#define DP_TSR         0x04
-#define DP_TPSR        0x04             /* write */
-#define DP_NCR         0x05
-#define DP_TBCL        0x05             /* write */
-#define DP_FIFO        0x06
-#define DP_TBCH        0x06             /* write */
-#define DP_ISR         0x07
-#define DP_CRDA0       0x08
-#define DP_RSAL        0x08             /* write */
-#define DP_CRDA1       0x09
-#define DP_RSAH        0x09             /* write */
-#define DP_RBCL        0x0a             /* write */
-#define DP_RBCH        0x0b             /* write */
-#define DP_RSR         0x0c
-#define DP_RCR         0x0c             /* write */
-#define DP_FER         0x0d
-#define DP_TCR         0x0d             /* write */
-#define DP_CER         0x0e
-#define DP_DCR         0x0e             /* write */
-#define DP_MISSED      0x0f
-#define DP_IMR         0x0f             /* write */
-#define DP_DATAPORT    0x10             /* "eprom" data port */
-
-#define DP_P1_CR       0x00
-#define DP_P1_PAR0     0x01
-#define DP_P1_PAR1     0x02
-#define DP_P1_PAR2     0x03
-#define DP_P1_PAR3     0x04
-#define DP_P1_PAR4     0x05
-#define DP_P1_PAR5     0x06
-#define DP_P1_CURP     0x07
-#define DP_P1_MAR0     0x08
-#define DP_P1_MAR1     0x09
-#define DP_P1_MAR2     0x0a
-#define DP_P1_MAR3     0x0b
-#define DP_P1_MAR4     0x0c
-#define DP_P1_MAR5     0x0d
-#define DP_P1_MAR6     0x0e
-#define DP_P1_MAR7     0x0f
-
-#define DP_P2_CR       0x00
-#define DP_P2_PSTART   0x01
-#define DP_P2_CLDA0    0x01             /* write */
-#define DP_P2_PSTOP    0x02
-#define DP_P2_CLDA1    0x02             /* write */
-#define DP_P2_RNPP     0x03
-#define DP_P2_TPSR     0x04
-#define DP_P2_LNPP     0x05
-#define DP_P2_ACH      0x06
-#define DP_P2_ACL      0x07
-#define DP_P2_RCR      0x0c
-#define DP_P2_TCR      0x0d
-#define DP_P2_DCR      0x0e
-#define DP_P2_IMR      0x0f
-
-/* Command register - common to all pages */
-
-#define DP_CR_STOP    0x01   /* Stop: software reset */
-#define DP_CR_START   0x02   /* Start: initialize device */
-#define DP_CR_TXPKT   0x04   /* Transmit packet */
-#define DP_CR_RDMA    0x08   /* Read DMA  (recv data from device) */
-#define DP_CR_WDMA    0x10   /* Write DMA (send data to device) */
-#define DP_CR_SEND    0x18   /* Send packet */
-#define DP_CR_NODMA   0x20   /* Remote (or no) DMA */
-#define DP_CR_PAGE0   0x00   /* Page select */
-#define DP_CR_PAGE1   0x40
-#define DP_CR_PAGE2   0x80
-#define DP_CR_PAGEMSK 0x3F   /* Used to mask out page bits */
-
-/* Data configuration register */
-
-#define DP_DCR_WTS    0x01   /* 1=16 bit word transfers */
-#define DP_DCR_BOS    0x02   /* 1=Little Endian */
-#define DP_DCR_LAS    0x04   /* 1=Single 32 bit DMA mode */
-#define DP_DCR_LS     0x08   /* 1=normal mode, 0=loopback */
-#define DP_DCR_ARM    0x10   /* 0=no send command (program I/O) */
-#define DP_DCR_FIFO_1 0x00   /* FIFO threshold */
-#define DP_DCR_FIFO_2 0x20
-#define DP_DCR_FIFO_4 0x40
-#define DP_DCR_FIFO_6 0x60
-
-#define DP_DCR_INIT   (DP_DCR_LS|DP_DCR_FIFO_4)
-
-/* Interrupt status register */
-
-#define DP_ISR_RxP    0x01   /* Packet received */
-#define DP_ISR_TxP    0x02   /* Packet transmitted */
-#define DP_ISR_RxE    0x04   /* Receive error */
-#define DP_ISR_TxE    0x08   /* Transmit error */
-#define DP_ISR_OFLW   0x10   /* Receive overflow */
-#define DP_ISR_CNT    0x20   /* Tally counters need emptying */
-#define DP_ISR_RDC    0x40   /* Remote DMA complete */
-#define DP_ISR_RESET  0x80   /* Device has reset (shutdown, error) */
-
-/* Interrupt mask register */
-
-#define DP_IMR_RxP    0x01   /* Packet received */
-#define DP_IMR_TxP    0x02   /* Packet transmitted */
-#define DP_IMR_RxE    0x04   /* Receive error */
-#define DP_IMR_TxE    0x08   /* Transmit error */
-#define DP_IMR_OFLW   0x10   /* Receive overflow */
-#define DP_IMR_CNT    0x20   /* Tall counters need emptying */
-#define DP_IMR_RDC    0x40   /* Remote DMA complete */
-
-#define DP_IMR_All    0x3F   /* Everything but remote DMA */
-
-/* Receiver control register */
-
-#define DP_RCR_SEP    0x01   /* Save bad(error) packets */
-#define DP_RCR_AR     0x02   /* Accept runt packets */
-#define DP_RCR_AB     0x04   /* Accept broadcast packets */
-#define DP_RCR_AM     0x08   /* Accept multicast packets */
-#define DP_RCR_PROM   0x10   /* Promiscuous mode */
-#define DP_RCR_MON    0x20   /* Monitor mode - 1=accept no packets */
-
-/* Receiver status register */
-
-#define DP_RSR_RxP    0x01   /* Packet received */
-#define DP_RSR_CRC    0x02   /* CRC error */
-#define DP_RSR_FRAME  0x04   /* Framing error */
-#define DP_RSR_FO     0x08   /* FIFO overrun */
-#define DP_RSR_MISS   0x10   /* Missed packet */
-#define DP_RSR_PHY    0x20   /* 0=pad match, 1=mad match */
-#define DP_RSR_DIS    0x40   /* Receiver disabled */
-#define DP_RSR_DFR    0x80   /* Receiver processing deferred */
-
-/* Transmitter control register */
-
-#define DP_TCR_NOCRC  0x01   /* 1=inhibit CRC */
-#define DP_TCR_NORMAL 0x00   /* Normal transmitter operation */
-#define DP_TCR_LOCAL  0x02   /* Internal NIC loopback */
-#define DP_TCR_INLOOP 0x04   /* Full internal loopback */
-#define DP_TCR_OUTLOOP 0x08  /* External loopback */
-#define DP_TCR_ATD    0x10   /* Auto transmit disable */
-#define DP_TCR_OFFSET 0x20   /* Collision offset adjust */
-
-/* Transmit status register */
-
-#define DP_TSR_TxP    0x01   /* Packet transmitted */
-#define DP_TSR_COL    0x04   /* Collision (at least one) */
-#define DP_TSR_ABT    0x08   /* Aborted because of too many collisions */
-#define DP_TSR_CRS    0x10   /* Lost carrier */
-#define DP_TSR_FU     0x20   /* FIFO underrun */
-#define DP_TSR_CDH    0x40   /* Collision Detect Heartbeat */
-#define DP_TSR_OWC    0x80   /* Collision outside normal window */
-
-#define IEEE_8023_MAX_FRAME         1518    /* Largest possible ethernet frame */
-#define IEEE_8023_MIN_FRAME           64    /* Smallest possible ethernet frame */
+ * NE2000 support header file.
+ *		Created by Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ */
+
+#ifndef __DRIVERS_NE2000_H__
+#define __DRIVERS_NE2000_H__
+
+/* Enable NE2000 basic init function */
+#define NE2000_BASIC_INIT
+
+#define DP_DATA     0x10
+#define START_PG    0x50    /* First page of TX buffer */
+#define STOP_PG     0x80    /* Last page +1 of RX ring */
+
+#define RX_START    0x50
+#define RX_END      0x80
+
+#define DP_IN(_b_, _o_, _d_)  (_d_) = *( (vu_char *) ((_b_)+(_o_)))
+#define DP_OUT(_b_, _o_, _d_) *( (vu_char *) ((_b_)+(_o_))) = (_d_)
+#define DP_IN_DATA(_b_, _d_)  (_d_) = *( (vu_char *) ((_b_)))
+#define DP_OUT_DATA(_b_, _d_) *( (vu_char *) ((_b_))) = (_d_)
+
+static void pcnet_reset_8390(void)
+{
+	int i, r;
+
+	PRINTK("nic base is %lx\n", nic_base);
+
+	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
+	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
+	n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
+	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
+	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
+	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
+	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
+
+	n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
+
+	for (i = 0; i < 100; i++) {
+		if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
+			break;
+		PRINTK("got %x in reset\n", r);
+		udelay(100);
+	}
+	n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
+
+	if (i == 100)
+		printf("pcnet_reset_8390() did not complete.\n");
+} /* pcnet_reset_8390 */
+
+int get_prom(u8* mac_addr)
+{
+	u8 prom[32];
+	int i, j;
+	struct {
+		u_char value, offset;
+	} program_seq[] = {
+		{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
+		{0x48,  EN0_DCFG},  /* Set byte-wide (0x48) access. */
+		{0x00,  EN0_RCNTLO},    /* Clear the count regs. */
+		{0x00,  EN0_RCNTHI},
+		{0x00,  EN0_IMR},   /* Mask completion irq. */
+		{0xFF,  EN0_ISR},
+		{E8390_RXOFF, EN0_RXCR},    /* 0x20  Set to monitor */
+		{E8390_TXOFF, EN0_TXCR},    /* 0x02  and loopback mode. */
+		{32,    EN0_RCNTLO},
+		{0x00,  EN0_RCNTHI},
+		{0x00,  EN0_RSARLO},    /* DMA starting at 0x0000. */
+		{0x00,  EN0_RSARHI},
+		{E8390_RREAD+E8390_START, E8390_CMD},
+	};
+
+    PRINTK("trying to get MAC via prom reading\n");
+
+    pcnet_reset_8390();
+
+    mdelay(10);
+
+    for (i = 0; i < sizeof(program_seq)/sizeof(program_seq[0]); i++)
+        n2k_outb(program_seq[i].value, program_seq[i].offset);
+
+    PRINTK("PROM:");
+    for (i = 0; i < 32; i++) {
+        prom[i] = n2k_inb(PCNET_DATAPORT);
+        PRINTK(" %02x", prom[i]);
+    }
+    PRINTK("\n");
+    for (i = 0; i < NR_INFO; i++) {
+        if ((prom[0] == hw_info[i].a0) &&
+            (prom[2] == hw_info[i].a1) &&
+            (prom[4] == hw_info[i].a2)) {
+            PRINTK("matched board %d\n", i);
+            break;
+        }
+    }
+    if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
+        PRINTK("on exit i is %d/%ld\n", i, NR_INFO);
+        PRINTK("MAC address is ");
+        for (j = 0; j < 6; j++){
+            mac_addr[j] = prom[j<<1];
+            PRINTK("%02x:",mac_addr[i]);
+        }
+        PRINTK("\n");
+        return (i < NR_INFO) ? i : 0;
+    }
+    return NULL;
+}
+
+
+#endif /* __DRIVERS_NE2000_H__ */
diff --git a/drivers/net/ne2000_base.h b/drivers/net/ne2000_base.h
new file mode 100644
index 0000000..1badf62
--- /dev/null
+++ b/drivers/net/ne2000_base.h
@@ -0,0 +1,282 @@
+/*
+Ported to U-Boot  by Christian Pellegrin <chri@ascensit.com>
+
+Based on sources from the Linux kernel (pcnet_cs.c, 8390.h) and
+eCOS(if_dp83902a.c, if_dp83902a.h). Both of these 2 wonderful world
+are GPL, so this is, of course, GPL.
+
+
+==========================================================================
+
+      dev/dp83902a.h
+
+      National Semiconductor DP83902a ethernet chip
+
+==========================================================================
+####ECOSGPLCOPYRIGHTBEGIN####
+ -------------------------------------------
+ This file is part of eCos, the Embedded Configurable Operating System.
+ Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+
+ eCos is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 2 or (at your option) any later version.
+
+ eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with eCos; if not, write to the Free Software Foundation, Inc.,
+ 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+
+ As a special exception, if other files instantiate templates or use macros
+ or inline functions from this file, or you compile this file and link it
+ with other works to produce a work based on this file, this file does not
+ by itself cause the resulting work to be covered by the GNU General Public
+ License. However the source code for this file must still be made available
+ in accordance with section (3) of the GNU General Public License.
+
+ This exception does not invalidate any other reasons why a work based on
+ this file might be covered by the GNU General Public License.
+
+ Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+ at http://sources.redhat.com/ecos/ecos-license/
+ -------------------------------------------
+####ECOSGPLCOPYRIGHTEND####
+####BSDCOPYRIGHTBEGIN####
+
+ -------------------------------------------
+
+ Portions of this software may have been derived from OpenBSD or other sources,
+ and are covered by the appropriate copyright disclaimers included herein.
+
+ -------------------------------------------
+
+####BSDCOPYRIGHTEND####
+==========================================================================
+#####DESCRIPTIONBEGIN####
+
+ Author(s):    gthomas
+ Contributors: gthomas, jskov
+ Date:         2001-06-13
+ Purpose:
+ Description:
+
+####DESCRIPTIONEND####
+
+==========================================================================
+
+*/
+
+/*
+ ------------------------------------------------------------------------
+ Macros for accessing DP registers
+ These can be overridden by the platform header
+*/
+
+#define bool int
+
+#define false 0
+#define true 1
+
+/* timeout for tx/rx in s */
+#define TOUT 5
+/* Ether MAC address size */
+#define ETHER_ADDR_LEN 6
+
+
+#define CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA 1
+#define CYGACC_CALL_IF_DELAY_US(X) udelay(X)
+
+/* H/W infomation struct */
+typedef struct hw_info_t {
+    u32   offset;
+    u8  a0, a1, a2;
+    u32   flags;
+} hw_info_t;
+
+typedef struct dp83902a_priv_data {
+    u8* base;
+    u8* data;
+    u8* reset;
+    int tx_next;           /* First free Tx page */
+    int tx_int;            /* Expecting interrupt from this buffer */
+    int rx_next;           /* First free Rx page */
+    int tx1, tx2;          /* Page numbers for Tx buffers */
+    u32 tx1_key, tx2_key;   /* Used to ack when packet sent */
+    int tx1_len, tx2_len;
+    bool tx_started, running, hardwired_esa;
+    u8 esa[6];
+    void* plf_priv;
+
+    /* Buffer allocation */
+    int tx_buf1, tx_buf2;
+    int rx_buf_start, rx_buf_end;
+} dp83902a_priv_data_t;
+
+/*
+ ------------------------------------------------------------------------
+ Some forward declarations
+*/
+int get_prom( u8* mac_addr);
+static void dp83902a_poll(void);
+
+/* ------------------------------------------------------------------------ */
+/* Register offsets */
+
+#define DP_CR          0x00
+#define DP_CLDA0       0x01
+#define DP_PSTART      0x01             /* write */
+#define DP_CLDA1       0x02
+#define DP_PSTOP       0x02             /* write */
+#define DP_BNDRY       0x03
+#define DP_TSR         0x04
+#define DP_TPSR        0x04             /* write */
+#define DP_NCR         0x05
+#define DP_TBCL        0x05             /* write */
+#define DP_FIFO        0x06
+#define DP_TBCH        0x06             /* write */
+#define DP_ISR         0x07
+#define DP_CRDA0       0x08
+#define DP_RSAL        0x08             /* write */
+#define DP_CRDA1       0x09
+#define DP_RSAH        0x09             /* write */
+#define DP_RBCL        0x0a             /* write */
+#define DP_RBCH        0x0b             /* write */
+#define DP_RSR         0x0c
+#define DP_RCR         0x0c             /* write */
+#define DP_FER         0x0d
+#define DP_TCR         0x0d             /* write */
+#define DP_CER         0x0e
+#define DP_DCR         0x0e             /* write */
+#define DP_MISSED      0x0f
+#define DP_IMR         0x0f             /* write */
+#define DP_DATAPORT    0x10             /* "eprom" data port */
+
+#define DP_P1_CR       0x00
+#define DP_P1_PAR0     0x01
+#define DP_P1_PAR1     0x02
+#define DP_P1_PAR2     0x03
+#define DP_P1_PAR3     0x04
+#define DP_P1_PAR4     0x05
+#define DP_P1_PAR5     0x06
+#define DP_P1_CURP     0x07
+#define DP_P1_MAR0     0x08
+#define DP_P1_MAR1     0x09
+#define DP_P1_MAR2     0x0a
+#define DP_P1_MAR3     0x0b
+#define DP_P1_MAR4     0x0c
+#define DP_P1_MAR5     0x0d
+#define DP_P1_MAR6     0x0e
+#define DP_P1_MAR7     0x0f
+
+#define DP_P2_CR       0x00
+#define DP_P2_PSTART   0x01
+#define DP_P2_CLDA0    0x01             /* write */
+#define DP_P2_PSTOP    0x02
+#define DP_P2_CLDA1    0x02             /* write */
+#define DP_P2_RNPP     0x03
+#define DP_P2_TPSR     0x04
+#define DP_P2_LNPP     0x05
+#define DP_P2_ACH      0x06
+#define DP_P2_ACL      0x07
+#define DP_P2_RCR      0x0c
+#define DP_P2_TCR      0x0d
+#define DP_P2_DCR      0x0e
+#define DP_P2_IMR      0x0f
+
+/* Command register - common to all pages */
+
+#define DP_CR_STOP    0x01   /* Stop: software reset */
+#define DP_CR_START   0x02   /* Start: initialize device */
+#define DP_CR_TXPKT   0x04   /* Transmit packet */
+#define DP_CR_RDMA    0x08   /* Read DMA  (recv data from device) */
+#define DP_CR_WDMA    0x10   /* Write DMA (send data to device) */
+#define DP_CR_SEND    0x18   /* Send packet */
+#define DP_CR_NODMA   0x20   /* Remote (or no) DMA */
+#define DP_CR_PAGE0   0x00   /* Page select */
+#define DP_CR_PAGE1   0x40
+#define DP_CR_PAGE2   0x80
+#define DP_CR_PAGEMSK 0x3F   /* Used to mask out page bits */
+
+/* Data configuration register */
+
+#define DP_DCR_WTS    0x01   /* 1=16 bit word transfers */
+#define DP_DCR_BOS    0x02   /* 1=Little Endian */
+#define DP_DCR_LAS    0x04   /* 1=Single 32 bit DMA mode */
+#define DP_DCR_LS     0x08   /* 1=normal mode, 0=loopback */
+#define DP_DCR_ARM    0x10   /* 0=no send command (program I/O) */
+#define DP_DCR_FIFO_1 0x00   /* FIFO threshold */
+#define DP_DCR_FIFO_2 0x20
+#define DP_DCR_FIFO_4 0x40
+#define DP_DCR_FIFO_6 0x60
+
+#define DP_DCR_INIT   (DP_DCR_LS|DP_DCR_FIFO_4)
+
+/* Interrupt status register */
+
+#define DP_ISR_RxP    0x01   /* Packet received */
+#define DP_ISR_TxP    0x02   /* Packet transmitted */
+#define DP_ISR_RxE    0x04   /* Receive error */
+#define DP_ISR_TxE    0x08   /* Transmit error */
+#define DP_ISR_OFLW   0x10   /* Receive overflow */
+#define DP_ISR_CNT    0x20   /* Tally counters need emptying */
+#define DP_ISR_RDC    0x40   /* Remote DMA complete */
+#define DP_ISR_RESET  0x80   /* Device has reset (shutdown, error) */
+
+/* Interrupt mask register */
+
+#define DP_IMR_RxP    0x01   /* Packet received */
+#define DP_IMR_TxP    0x02   /* Packet transmitted */
+#define DP_IMR_RxE    0x04   /* Receive error */
+#define DP_IMR_TxE    0x08   /* Transmit error */
+#define DP_IMR_OFLW   0x10   /* Receive overflow */
+#define DP_IMR_CNT    0x20   /* Tall counters need emptying */
+#define DP_IMR_RDC    0x40   /* Remote DMA complete */
+
+#define DP_IMR_All    0x3F   /* Everything but remote DMA */
+
+/* Receiver control register */
+
+#define DP_RCR_SEP    0x01   /* Save bad(error) packets */
+#define DP_RCR_AR     0x02   /* Accept runt packets */
+#define DP_RCR_AB     0x04   /* Accept broadcast packets */
+#define DP_RCR_AM     0x08   /* Accept multicast packets */
+#define DP_RCR_PROM   0x10   /* Promiscuous mode */
+#define DP_RCR_MON    0x20   /* Monitor mode - 1=accept no packets */
+
+/* Receiver status register */
+
+#define DP_RSR_RxP    0x01   /* Packet received */
+#define DP_RSR_CRC    0x02   /* CRC error */
+#define DP_RSR_FRAME  0x04   /* Framing error */
+#define DP_RSR_FO     0x08   /* FIFO overrun */
+#define DP_RSR_MISS   0x10   /* Missed packet */
+#define DP_RSR_PHY    0x20   /* 0=pad match, 1=mad match */
+#define DP_RSR_DIS    0x40   /* Receiver disabled */
+#define DP_RSR_DFR    0x80   /* Receiver processing deferred */
+
+/* Transmitter control register */
+
+#define DP_TCR_NOCRC  0x01   /* 1=inhibit CRC */
+#define DP_TCR_NORMAL 0x00   /* Normal transmitter operation */
+#define DP_TCR_LOCAL  0x02   /* Internal NIC loopback */
+#define DP_TCR_INLOOP 0x04   /* Full internal loopback */
+#define DP_TCR_OUTLOOP 0x08  /* External loopback */
+#define DP_TCR_ATD    0x10   /* Auto transmit disable */
+#define DP_TCR_OFFSET 0x20   /* Collision offset adjust */
+
+/* Transmit status register */
+
+#define DP_TSR_TxP    0x01   /* Packet transmitted */
+#define DP_TSR_COL    0x04   /* Collision (at least one) */
+#define DP_TSR_ABT    0x08   /* Aborted because of too many collisions */
+#define DP_TSR_CRS    0x10   /* Lost carrier */
+#define DP_TSR_FU     0x20   /* FIFO underrun */
+#define DP_TSR_CDH    0x40   /* Collision Detect Heartbeat */
+#define DP_TSR_OWC    0x80   /* Collision outside normal window */
+
+#define IEEE_8023_MAX_FRAME         1518    /* Largest possible ethernet frame */
+#define IEEE_8023_MIN_FRAME           64    /* Smallest possible ethernet frame */
diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h
index d03cbc3..8dcbb3e 100644
--- a/drivers/net/smc91111.h
+++ b/drivers/net/smc91111.h
@@ -186,7 +186,7 @@ typedef unsigned long int 		dword;
 #ifdef CONFIG_ADNPESC1
 #define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
 #elif CONFIG_BLACKFIN
-#define	SMC_inw(r) 	({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); asm("ssync;"); __v;})
+#define	SMC_inw(r) 	({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); SSYNC(); __v;})
 #else
 #define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+(r))))
 #endif
@@ -195,7 +195,7 @@ typedef unsigned long int 		dword;
 #ifdef CONFIG_ADNPESC1
 #define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
 #elif CONFIG_BLACKFIN
-#define	SMC_outw(d,r)	{(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d);asm("ssync;");}
+#define	SMC_outw(d,r)	{(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d); SSYNC();}
 #else
 #define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
 #endif
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 9be2130..800ab99 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -43,7 +43,6 @@ COBJS-$(CONFIG_RTC_ISL1208) += isl1208.o
 COBJS-y += m41t11.o
 COBJS-y += m41t60.o
 COBJS-$(CONFIG_RTC_M41T62) += m41t62.o
-COBJS-y += max6900.o
 COBJS-y += m48t35ax.o
 COBJS-y += max6900.o
 COBJS-y += mc146818.o
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index e07092b..ff6624a 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -40,8 +40,11 @@ typedef	struct	global_data {
 	bd_t		*bd;
 	unsigned long	flags;
 	unsigned long	baudrate;
-	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/
+	unsigned long	cpu_clk;	/* CPU clock in Hz! */
 	unsigned long	bus_clk;
+#if defined(CONFIG_8xx)
+	unsigned long	brg_clk;
+#endif
 #if defined(CONFIG_CPM2)
 	/* There are many clocks on the MPC8260 - see page 9-5 */
 	unsigned long	vco_out;
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index f3965ef..69276a3 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -70,6 +70,7 @@
 #define CONFIG_CMD_SAVES	/* save S record dump		*/
 #define CONFIG_CMD_SCSI		/* SCSI Support			*/
 #define CONFIG_CMD_SDRAM	/* SDRAM DIMM SPD info printout */
+#define CONFIG_CMD_SETEXPR	/* setexpr support 		*/
 #define CONFIG_CMD_SETGETDCR	/* DCR support on 4xx		*/
 #define CONFIG_CMD_SNTP		/* SNTP support			*/
 #define CONFIG_CMD_SPI		/* SPI utility			*/
diff --git a/include/configs/Adder.h b/include/configs/Adder.h
index 4304ecc..7919991 100644
--- a/include/configs/Adder.h
+++ b/include/configs/Adder.h
@@ -37,6 +37,8 @@
 
 #define CONFIG_ETHER_ON_FEC1
 #define CONFIG_ETHER_ON_FEC2
+#define CONFIG_HAS_ETH0
+#define CONFIG_HAS_ETH1
 
 #if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2)
 #define CFG_DISCOVER_PHY
@@ -212,4 +214,8 @@
 #define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from flash	*/
 #define BOOTFLAG_WARM		0x02	/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index b035857..f12765d 100644
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -594,7 +594,5 @@ typedef unsigned int led_id_t;
 
 #define OF_CPU			"PowerPC,MPC870@0"
 #define OF_TBCLK		(MPC8XX_HZ / 16)
-#define CONFIG_OF_HAS_BD_T	1
-#define CONFIG_OF_HAS_UBOOT_ENV	1
 
 #endif	/* __CONFIG_H */
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 7836f28..5ef6983 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -50,14 +50,6 @@ int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
 			 const void *val, int len, int create);
 void fdt_fixup_qe_firmware(void *fdt);
 
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
-int fdt_env(void *fdt);
-#endif
-
-#ifdef CONFIG_OF_HAS_BD_T
-int fdt_bd_t(void *fdt);
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 void ft_board_setup(void *blob, bd_t *bd);
 void ft_cpu_setup(void *blob, bd_t *bd);
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index ee0213e..3ab22f8 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -433,7 +433,18 @@ void board_init_f (ulong bootflag)
 	 */
 	len = (ulong)&_end - CFG_MONITOR_BASE;
 
+#ifndef CONFIG_MAX_MEM_MAPPED
+#define CONFIG_MAX_MEM_MAPPED (256 << 20)
+#endif
+
+#ifndef	CONFIG_VERY_BIG_RAM
 	addr = CFG_SDRAM_BASE + get_effective_memsize();
+#else
+	/* only allow stack below 256M */
+	addr = CFG_SDRAM_BASE +
+		(gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
+		CONFIG_MAX_MEM_MAPPED : get_effective_memsize();
+#endif
 
 #ifdef CONFIG_LOGBUFFER
 #ifndef CONFIG_ALT_LB_ADDR
diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile
index 66a0959..f10ed02 100644
--- a/onenand_ipl/board/apollon/Makefile
+++ b/onenand_ipl/board/apollon/Makefile
@@ -9,7 +9,7 @@ AFLAGS	+= -DCONFIG_ONENAND_IPL
 CFLAGS	+= -DCONFIG_ONENAND_IPL
 OBJCLFAGS += --gap-fill=0x00
 
-SOBJS	= start.o low_levelinit.o # _memcpy32.o
+SOBJS	= start.o low_levelinit.o
 COBJS	= apollon.o onenand_read.o onenand_boot.o
 
 SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -19,13 +19,16 @@ LNDIR	:= $(OBJTREE)/onenand_ipl/board/$(BOARDDIR)
 
 onenandobj	:= $(OBJTREE)/onenand_ipl/
 
-ALL	= $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin $(onenandobj)onenand-ipl-2k.bin
+ALL	= $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin $(onenandobj)onenand-ipl-2k.bin $(onenandobj)onenand-ipl-4k.bin
 
 all:	$(obj).depend $(ALL)
 
 $(onenandobj)onenand-ipl-2k.bin:	$(onenandobj)onenand-ipl
 	$(OBJCOPY) ${OBJCFLAGS} --pad-to=0x800 -O binary $< $@
 
+$(onenandobj)onenand-ipl-4k.bin:	$(onenandobj)onenand-ipl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=0x1000 -O binary $< $@
+
 $(onenandobj)onenand-ipl.bin:	$(onenandobj)onenand-ipl
 	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
 
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
index f30deae..35668ac 100644
--- a/onenand_ipl/onenand_boot.c
+++ b/onenand_ipl/onenand_boot.c
@@ -60,7 +60,7 @@ void start_oneboot(void)
 
 	buf = (uchar *) CFG_LOAD_ADDR;
 
-	if (!onenand_read_block(buf, ONENAND_START_BLOCK))
+	if (!onenand_read_block0(buf))
 		buf += ONENAND_BLOCK_SIZE;
 
 	if (buf == (uchar *)CFG_LOAD_ADDR)
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
index b9c6669..9188b96 100644
--- a/onenand_ipl/onenand_ipl.h
+++ b/onenand_ipl/onenand_ipl.h
@@ -23,7 +23,6 @@
 
 #include <linux/mtd/onenand_regs.h>
 
-#define ONENAND_START_BLOCK             0
 #define ONENAND_BLOCK_SIZE              2048
 
 #ifndef CFG_PRINTF
@@ -40,5 +39,5 @@
 
 #define ONENAND_PAGE_SIZE                       2048
 
-extern int onenand_read_block(unsigned char *buf, ulong block);
+extern int onenand_read_block0(unsigned char *buf);
 #endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index f553220..669b1ef 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -33,8 +33,13 @@
 #define onenand_buffer_address()		((1 << 3) << 8)
 #define onenand_bufferram_address(block)	(0)
 
+#ifdef __HAVE_ARCH_MEMCPY32
+extern void *memcpy32(void *dest, void *src, int size);
+#endif
+
 /* read a page with ECC */
-static inline int onenand_read_page(ulong block, ulong page, u_char *buf)
+static inline int onenand_read_page(ulong block, ulong page,
+				u_char * buf, int pagesize)
 {
 	unsigned long *base;
 
@@ -46,15 +51,15 @@ static inline int onenand_read_page(ulong block, ulong page, u_char *buf)
 	onenand_writew(onenand_block_address(block),
 		THIS_ONENAND(ONENAND_REG_START_ADDRESS1));
 
+	onenand_writew(onenand_bufferram_address(block),
+		THIS_ONENAND(ONENAND_REG_START_ADDRESS2));
+
 	onenand_writew(onenand_sector_address(page),
 		THIS_ONENAND(ONENAND_REG_START_ADDRESS8));
 
 	onenand_writew(onenand_buffer_address(),
 		THIS_ONENAND(ONENAND_REG_START_BUFFER));
 
-	onenand_writew(onenand_bufferram_address(block),
-		THIS_ONENAND(ONENAND_REG_START_ADDRESS2));
-
 	onenand_writew(ONENAND_INT_CLEAR, THIS_ONENAND(ONENAND_REG_INTERRUPT));
 
 	onenand_writew(ONENAND_CMD_READ, THIS_ONENAND(ONENAND_REG_COMMAND));
@@ -69,9 +74,9 @@ static inline int onenand_read_page(ulong block, ulong page, u_char *buf)
 
 #ifdef __HAVE_ARCH_MEMCPY32
 	/* 32 bytes boundary memory copy */
-	memcpy32(buf, base, ONENAND_PAGE_SIZE);
+	memcpy32(buf, base, pagesize);
 #else
-	for (offset = 0; offset < (ONENAND_PAGE_SIZE >> 2); offset++) {
+	for (offset = 0; offset < (pagesize >> 2); offset++) {
 		value = *(base + offset);
 		*p++ = value;
 	}
@@ -87,18 +92,22 @@ static inline int onenand_read_page(ulong block, ulong page, u_char *buf)
  * onenand_read_block - Read a block data to buf
  * @return 0 on success
  */
-int onenand_read_block(unsigned char *buf, ulong block)
+int onenand_read_block0(unsigned char *buf)
 {
 	int page, offset = 0;
+	int pagesize = ONENAND_PAGE_SIZE;
+
+	/* MLC OneNAND has 4KiB page size */
+	if (onenand_readw(THIS_ONENAND(ONENAND_REG_TECHNOLOGY)))
+		pagesize <<= 1;
 
 	/* NOTE: you must read page from page 1 of block 0 */
 	/* read the block page by page*/
 	for (page = ONENAND_START_PAGE;
 	    page < ONENAND_PAGES_PER_BLOCK; page++) {
 
-		onenand_read_page(block, page, buf + offset);
-
-		offset += ONENAND_PAGE_SIZE;
+		onenand_read_page(0, page, buf + offset, pagesize);
+		offset += pagesize;
 	}
 
 	return 0;