diff options
| -rw-r--r-- | CHANGELOG | 3 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 17 |
2 files changed, 19 insertions, 1 deletions
@@ -1,6 +1,9 @@ ====================================================================== Changes for U-Boot 1.1.3: ====================================================================== +* Patch by Jon Loeliger 2005-02-08 + Determine L2 Cache size dynamically on 85XX boards. + * Patch by Jon Loeliger, Kumar Gala 2005-02-08 - Convert the CPM2 based functionality to use new CONFIG_CPM2 option rather than a myriad of CONFIG_MPC8560-like variants. diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 4d6438f..79ea91f 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -189,6 +189,21 @@ int cpu_init_r (void) volatile uint temp; asm("msync;isync"); + temp = l2cache->l2ctl; + temp &= 0x30000000; + switch ( temp ) { + case 0x20000000: + printf ("L2 cache 256KB:"); + break; + case 0x00000000: + case 0x10000000: + case 0x30000000: + default: + printf ("L2 cache unknown size. Check the silicon!\n"); + return -1; + } + + asm("msync;isync"); l2cache->l2ctl = 0x68000000; /* invalidate */ temp = l2cache->l2ctl; asm("msync;isync"); @@ -196,7 +211,7 @@ int cpu_init_r (void) temp = l2cache->l2ctl; asm("msync;isync"); - printf("L2: 256 kB enabled\n"); + printf("enabled\n"); #else printf("L2: disabled.\n"); #endif |