diff options
| -rw-r--r-- | CHANGELOG | 4 | ||||
| -rw-r--r-- | Makefile | 4 | ||||
| -rw-r--r-- | board/funkwerk/vovpn-gw/flash.c | 6 | ||||
| -rw-r--r-- | board/funkwerk/vovpn-gw/m88e6060.h | 6 | ||||
| -rw-r--r-- | board/hmi1001/Makefile | 46 | ||||
| -rw-r--r-- | board/hmi1001/config.mk | 41 | ||||
| -rw-r--r-- | board/hmi1001/hmi1001.c | 172 | ||||
| -rw-r--r-- | board/hmi1001/u-boot.lds | 133 | ||||
| -rw-r--r-- | common/cmd_jffs2.c | 13 | ||||
| -rw-r--r-- | cpu/mpc5xxx/fec.c | 7 | ||||
| -rw-r--r-- | include/configs/TQM866M.h | 4 | ||||
| -rw-r--r-- | include/configs/VoVPN-GW.h | 8 | ||||
| -rw-r--r-- | include/configs/hmi1001.h | 251 |
13 files changed, 669 insertions, 26 deletions
@@ -2,6 +2,10 @@ Changes for U-Boot 1.1.3: ====================================================================== +* Add support for HMI1001 board + +* Disable "date" and "sntp" commands on TQM866M + * Fix watchdog reset problems on LWMON board * Patch by Juergen Selent, 17 May 2005: @@ -227,6 +227,10 @@ PATI_config: unconfig ######################################################################### ## MPC5xxx Systems ######################################################################### + +hmi1001_config: unconfig + @./mkconfig hmi1001 ppc mpc5xxx hmi1001 + Lite5200_config \ Lite5200_LOWBOOT_config \ Lite5200_LOWBOOT08_config \ diff --git a/board/funkwerk/vovpn-gw/flash.c b/board/funkwerk/vovpn-gw/flash.c index 1e53d45..4073453 100644 --- a/board/funkwerk/vovpn-gw/flash.c +++ b/board/funkwerk/vovpn-gw/flash.c @@ -5,7 +5,7 @@ * Support for the Elmeg VoVPN Gateway Module * ------------------------------------------ * This is a signle bank flashdriver for INTEL 28F320J3, 28F640J3 - * and 28F128J3A flashs working in 8 Bit mode. + * and 28F128J3A flashs working in 8 Bit mode. * * Most of this code is taken from existing u-boot source code. * @@ -286,8 +286,8 @@ flash_erase(flash_info_t *info, int s_first, int s_last) static int write_buff2( volatile FLASH_WORD_SIZE *dst, - volatile FLASH_WORD_SIZE *src, - unsigned long cnt ) + volatile FLASH_WORD_SIZE *src, + unsigned long cnt ) { unsigned long start; FLASH_WORD_SIZE status; diff --git a/board/funkwerk/vovpn-gw/m88e6060.h b/board/funkwerk/vovpn-gw/m88e6060.h index 563a5e0..15d4583 100644 --- a/board/funkwerk/vovpn-gw/m88e6060.h +++ b/board/funkwerk/vovpn-gw/m88e6060.h @@ -71,8 +71,6 @@ /* misc */ #define M88E6060_ID ((M88X_PHY_ID0_VALUE<<16) | M88X_PHY_ID1_VALUE) - - /* ************************************************************************** */ /* *** TYPEDEFS ************************************************************* */ @@ -82,13 +80,9 @@ typedef struct { unsigned short val; } m88x_regCfg_t; - - /* ************************************************************************** */ /* *** PROTOTYPES *********************************************************** */ extern int m88e6060_initialize( int ); - - #endif /* _INC_m88e6060_h_ */ diff --git a/board/hmi1001/Makefile b/board/hmi1001/Makefile new file mode 100644 index 0000000..ed36ea7 --- /dev/null +++ b/board/hmi1001/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2003-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := $(BOARD).o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk new file mode 100644 index 0000000..51e8e84c --- /dev/null +++ b/board/hmi1001/config.mk @@ -0,0 +1,41 @@ +# +# (C) Copyright 2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# INKA 4X0 board: +# +# Valid values for TEXT_BASE are: +# +# 0xFFE00000 boot high +# +# 0x00100000 boot from RAM (for testing only) +# + +ifndef TEXT_BASE +## Standard: boot high +TEXT_BASE = 0xFFF00000 +## For testing: boot from RAM +#TEXT_BASE = 0x00100000 +endif + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c new file mode 100644 index 0000000..8980209 --- /dev/null +++ b/board/hmi1001/hmi1001.c @@ -0,0 +1,172 @@ +/* + * (C) Copyright 2003-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * (C) Copyright 2004 + * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc5xxx.h> +#include <pci.h> + +#ifndef CFG_RAMBOOT +static void sdram_start (int hi_addr) +{ + long hi_addr_bit = hi_addr ? 0x01000000 : 0; + + /* unlock mode register */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; + __asm__ volatile ("sync"); + +#if SDRAM_DDR + /* set mode register: extended mode */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE; + __asm__ volatile ("sync"); + + /* set mode register: reset DLL */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000; + __asm__ volatile ("sync"); +#endif + + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* auto refresh */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* set mode register */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; + __asm__ volatile ("sync"); + + /* normal operation */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; + __asm__ volatile ("sync"); +} +#endif + +/* + * ATTENTION: Although partially referenced initdram does NOT make real use + * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE + * is something else than 0x00000000. + */ + +long int initdram (int board_type) +{ + ulong dramsize = 0; +#ifndef CFG_RAMBOOT + ulong test1, test2; + + /* setup SDRAM chip selects */ + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */ + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */ + __asm__ volatile ("sync"); + + /* setup config registers */ + *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; + *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; + __asm__ volatile ("sync"); + +#if SDRAM_DDR + /* set tap delay */ + *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY; + __asm__ volatile ("sync"); +#endif + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000); + sdram_start(1); + test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else { + dramsize = test2; + } + + /* memory smaller than 1MB is impossible */ + if (dramsize < (1 << 20)) { + dramsize = 0; + } + + /* set SDRAM CS0 size according to the amount of RAM found */ + if (dramsize > 0) { + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + + __builtin_ffs(dramsize >> 20) - 1; + } else { + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ + } + + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */ +#else /* CFG_RAMBOOT */ + + /* retrieve size of memory connected to SDRAM CS0 */ + dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; + if (dramsize >= 0x13) { + dramsize = (1 << (dramsize - 0x13)) << 20; + } else { + dramsize = 0; + } + + /* retrieve size of memory connected to SDRAM CS1 */ + dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF; + if (dramsize2 >= 0x13) { + dramsize2 = (1 << (dramsize2 - 0x13)) << 20; + } else { + dramsize2 = 0; + } + +#endif /* CFG_RAMBOOT */ + +/* return dramsize + dramsize2; */ + return dramsize; +} + +int checkboard (void) +{ + puts ("Board: HMI1001\n"); + return 0; +} + +int misc_init_f (void) +{ + return 0; +} + +int board_early_init_r (void) +{ + *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ + *(vu_long *)MPC5XXX_BOOTCS_START = + *(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE); + *(vu_long *)MPC5XXX_BOOTCS_STOP = + *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE); + return 0; +} diff --git a/board/hmi1001/u-boot.lds b/board/hmi1001/u-boot.lds new file mode 100644 index 0000000..fda4977 --- /dev/null +++ b/board/hmi1001/u-boot.lds @@ -0,0 +1,133 @@ +/* + * (C) Copyright 2003-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc5xxx/start.o (.text) + cpu/mpc5xxx/traps.o (.text) + lib_generic/crc32.o (.text) + lib_ppc/cache.o (.text) + lib_ppc/time.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o (.ppcenv) + + *(.text) + *(.fixup) + *(.got1) + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 63fddf6..45713a3 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -175,10 +175,9 @@ do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - struct part_info* jffs2_part_info(int); - int jffs2_1pass_ls(struct part_info *,char *); - - char *filename = "/"; + struct part_info* jffs2_part_info(int); + int jffs2_1pass_ls(struct part_info *,char *); + char *filename = "/"; int ret; struct part_info *part; @@ -235,11 +234,11 @@ do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int tmp_part; char str_part_num[3]; - struct part_info* jffs2_part_info(int); + struct part_info* jffs2_part_info(int); - if (argc >= 2) { + if (argc >= 2) { tmp_part = simple_strtoul(argv[1], NULL, 16); - }else{ + } else { puts ("Need partition number in argument list\n"); return 0; diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c index 064cee5..d293107 100644 --- a/cpu/mpc5xxx/fec.c +++ b/cpu/mpc5xxx/fec.c @@ -869,9 +869,10 @@ int mpc5xxx_fec_initialize(bd_t * bis) fec->eth = (ethernet_regs *)MPC5XXX_FEC; fec->tbdBase = (FEC_TBD *)FEC_BD_BASE; fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD)); -#if defined(CONFIG_CANMB) || defined(CONFIG_ICECUBE) || \ - defined(CONFIG_INKA4X0) || defined(CONFIG_PM520) || \ - defined(CONFIG_TOP5200) || defined(CONFIG_TQM5200) +#if defined(CONFIG_CANMB) || defined(CONFIG_HMI1001) || \ + defined(CONFIG_ICECUBE) || defined(CONFIG_INKA4X0) || \ + defined(CONFIG_PM520) || defined(CONFIG_TOP5200) || \ + defined(CONFIG_TQM5200) # ifndef CONFIG_FEC_10MBIT fec->xcv_type = MII100; # else diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 4b85013..ea51e89 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -136,13 +136,11 @@ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_ASKENV | \ - CFG_CMD_DATE | \ CFG_CMD_DHCP | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_IDE | \ - CFG_CMD_NFS | \ - CFG_CMD_SNTP ) + CFG_CMD_NFS ) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h index 05f6f18..d7f8749 100644 --- a/include/configs/VoVPN-GW.h +++ b/include/configs/VoVPN-GW.h @@ -261,7 +261,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CFG_BOOTMAPSZ (8 << 20) +#define CFG_BOOTMAPSZ (8 << 20) /* hard reset configuration words */ #ifdef CONFIG_CLKIN_66MHz @@ -342,13 +342,13 @@ /* TMCNTSC - time counter status and control */ /* clear interrupts XXX jse */ -//#define CFG_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR) +/*#define CFG_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR) */ #define CFG_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR|\ TMCNTSC_TCF|TMCNTSC_TCE) /* PISCR - periodic interrupt status and control */ /* clear interrupts XXX jse */ -//#define CFG_PISCR (PISCR_PS) +/*#define CFG_PISCR (PISCR_PS) */ #define CFG_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE) /* SCCR - system clock control */ @@ -397,7 +397,7 @@ #define CFG_OR7_PRELIM 0xffff8104 #define CFG_MPTPR 0x2700 #define CFG_PSDMR 0x822a2452 /* optimal */ -//#define CFG_PSDMR 0x822a48a3 /* relaxed */ +/*#define CFG_PSDMR 0x822a48a3 */ /* relaxed */ #define CFG_PSRT 0x1a /* "bad" address */ diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h new file mode 100644 index 0000000..9e5a0ab --- /dev/null +++ b/include/configs/hmi1001.h @@ -0,0 +1,251 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_HMI1001 1 /* HMI1001 board */ + +#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ + +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ +#endif + +#define CONFIG_BOARD_EARLY_INIT_R + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* + * Supported commands + */ +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ + CFG_CMD_DHCP | \ + CFG_CMD_NFS | \ + CFG_CMD_SNTP) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <cmd_confdefs.h> + +#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ + +#if (TEXT_BASE == 0xFFF00000) /* Boot low */ +# define CFG_LOWBOOT 1 +#endif + +/* + * Autobooting + */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath)\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):$(netdev):off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm $(kernel_addr)\0" \ + "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ + "rootpath=/opt/eldk/ppc_82xx\0" \ + "" + +#define CONFIG_BOOTCOMMAND "run net_nfs" + +/* + * IPB Bus clocking configuration. + */ +#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ + +/* + * Flash configuration + */ +#define CFG_FLASH_BASE 0xFF800000 + +#define CFG_FLASH_SIZE 0x00800000 /* 8 MByte */ +#define CFG_MAX_FLASH_SECT 67 /* max num of sects on one chip */ + +#define CFG_ENV_ADDR (TEXT_BASE+0x40000) /* second sector */ +#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks + (= chip selects) */ +#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ + +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI +#define CFG_FLASH_EMPTY_INFO +#define CFG_FLASH_CFI_AMD_RESET +#define CFG_FLASH_PROTECTION + +/* + * Environment settings + */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x4000 +#define CFG_ENV_SECT_SIZE 0x20000 + +/* + * Memory map + */ +#define CFG_MBAR 0xF0000000 +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_DEFAULT_MBAR 0x80000000 + +/* Settings for XLB = 132 MHz */ +#define SDRAM_DDR 1 +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x714f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 +#define SDRAM_TAPDELAY 0x10000000 + +/* Use ON-Chip SRAM until RAM will be available */ +#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM +#ifdef CONFIG_POST +/* preserve space for the post_word at end of on-chip SRAM */ +#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE +#else +#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE +#endif + + +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +# define CFG_RAMBOOT 1 +#endif + +#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_PHY_ADDR 0x00 + +/* + * GPIO configuration + */ +#define CFG_GPS_PORT_CONFIG 0x01051004 + +/* + * RTC configuration + */ +#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +/* Enable an alternate, more extensive memory test */ +#define CFG_ALT_MEMTEST + +#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +/* + * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined, + * which is normally part of the default commands (CFV_CMD_DFL) + */ +#define CONFIG_LOOPW + +/* + * Various low-level settings + */ +#if defined(CONFIG_MPC5200) +#define CFG_HID0_INIT HID0_ICE | HID0_ICFI +#define CFG_HID0_FINAL HID0_ICE +#else +#define CFG_HID0_INIT 0 +#define CFG_HID0_FINAL 0 +#endif + +#define CFG_BOOTCS_START CFG_FLASH_BASE +#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE +#define CFG_BOOTCS_CFG 0x0004FB00 +#define CFG_CS0_START CFG_FLASH_BASE +#define CFG_CS0_SIZE CFG_FLASH_SIZE + +/* 8Mbit SRAM @0x80100000 */ +#define CFG_CS1_START 0x80100000 +#define CFG_CS1_SIZE 0x00100000 +#define CFG_CS1_CFG 0x19B00 + +/* FRAM 32Kbyte @0x80700000 */ +#define CFG_CS2_START 0x80700000 +#define CFG_CS2_SIZE 0x00008000 +#define CFG_CS2_CFG 0x19800 + +/* Display H1, Status Inputs, EPLD @0x80600000 */ +#define CFG_CS3_START 0x80600000 +#define CFG_CS3_SIZE 0x00000210 +#define CFG_CS3_CFG 0x9800 + +#define CFG_CS_BURST 0x00000000 +#define CFG_CS_DEADCYCLE 0x33333333 + +#endif /* __CONFIG_H */ |