diff options
| -rw-r--r-- | arch/nios2/cpu/cpu.c | 4 | ||||
| -rw-r--r-- | arch/nios2/cpu/start.S | 5 | ||||
| -rw-r--r-- | arch/nios2/include/asm/global_data.h | 2 | ||||
| -rw-r--r-- | arch/nios2/include/asm/io.h | 19 | ||||
| -rw-r--r-- | common/board_f.c | 4 | ||||
| -rw-r--r-- | common/cmd_bdinfo.c | 9 | ||||
| -rw-r--r-- | configs/nios2-generic_defconfig | 1 | ||||
| -rw-r--r-- | drivers/misc/altera_sysid.c | 4 | ||||
| -rw-r--r-- | drivers/net/altera_tse.c | 30 | ||||
| -rw-r--r-- | drivers/net/altera_tse.h | 234 | ||||
| -rw-r--r-- | drivers/serial/altera_jtag_uart.c | 33 | ||||
| -rw-r--r-- | drivers/serial/altera_uart.c | 23 | ||||
| -rw-r--r-- | drivers/spi/altera_spi.c | 4 | ||||
| -rw-r--r-- | drivers/timer/altera_timer.c | 14 | ||||
| -rw-r--r-- | include/configs/nios2-generic.h | 19 |
15 files changed, 158 insertions, 247 deletions
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index ff0fa20..f6d5cd3 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -117,7 +117,9 @@ static int altera_nios2_probe(struct udevice *dev) "altr,has-initda", 0); gd->arch.has_mmu = fdtdec_get_int(blob, node, "altr,has-mmu", 0); - gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x8000000; + gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000; + gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000; + gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff; return 0; } diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S index 8758e7e..54787c5 100644 --- a/arch/nios2/cpu/start.S +++ b/arch/nios2/cpu/start.S @@ -81,6 +81,7 @@ _cur: movhi r5, %hi(_cur - _start) mov r8, r4 movhi r5, %hi(_start) ori r5, r5, %lo(_start) /* r5 <- linked _start */ + mov sp, r5 /* initial stack below u-boot code */ beq r4, r5, 3f movhi r6, %hi(CONFIG_SYS_MONITOR_LEN) @@ -100,8 +101,6 @@ _cur: movhi r5, %hi(_cur - _start) _reloc: /* STACK INIT -- zero top two words for call back chain. */ - movhi sp, %hi(CONFIG_SYS_INIT_SP) - ori sp, sp, %lo(CONFIG_SYS_INIT_SP) addi sp, sp, -8 stw r0, 0(sp) stw r0, 4(sp) @@ -159,7 +158,7 @@ relocate_code: ori r6, r6, %lo(__bss_end) beq r5, r6, 5f -4: stwio r0, 0(r5) +4: stw r0, 0(r5) addi r5, r5, 4 bne r5, r6, 4b 5: diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index d6a2cfa..9863fd9 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -18,6 +18,8 @@ struct arch_global_data { int has_initda; int has_mmu; u32 io_region_base; + u32 mem_region_base; + u32 physaddr_mask; }; #include <asm-generic/global_data.h> diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h index e7da35b..03a3418 100644 --- a/arch/nios2/include/asm/io.h +++ b/arch/nios2/include/asm/io.h @@ -18,15 +18,19 @@ static inline void sync(void) * that can be used to access the memory range with the caching * properties specified by "flags". */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) +#define MAP_NOCACHE 1 +#define MAP_WRCOMBINE 0 +#define MAP_WRBACK 0 +#define MAP_WRTHROUGH 0 static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { - return (void *)paddr; + DECLARE_GLOBAL_DATA_PTR; + if (flags) + return (void *)(paddr | gd->arch.io_region_base); + else + return (void *)(paddr | gd->arch.mem_region_base); } /* @@ -40,10 +44,7 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) static inline phys_addr_t virt_to_phys(void * vaddr) { DECLARE_GLOBAL_DATA_PTR; - if (gd->arch.has_mmu) - return (phys_addr_t)vaddr & 0x1fffffff; - else - return (phys_addr_t)vaddr & 0x7fffffff; + return (phys_addr_t)vaddr & gd->arch.physaddr_mask; } static inline void *ioremap(unsigned long physaddr, unsigned long size) diff --git a/common/board_f.c b/common/board_f.c index a12ac28..725eb18 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -896,7 +896,7 @@ static init_fnc_t init_sequence_f[] = { * - board info struct */ setup_dest_addr, -#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) +#if defined(CONFIG_BLACKFIN) /* Blackfin u-boot monitor should be on top of the ram */ reserve_uboot, #endif @@ -921,7 +921,7 @@ static init_fnc_t init_sequence_f[] = { !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) reserve_video, #endif -#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) +#if !defined(CONFIG_BLACKFIN) reserve_uboot, #endif #ifndef CONFIG_SPL_BUILD diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index ed3b935..adda55a 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -157,10 +157,15 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + int i; bd_t *bd = gd->bd; - print_num("mem start", (ulong)bd->bi_memstart); - print_lnum("mem size", (u64)bd->bi_memsize); + for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { + print_num("DRAM bank", i); + print_num("-> start", bd->bi_dram[i].start); + print_num("-> size", bd->bi_dram[i].size); + } + print_num("flash start", (ulong)bd->bi_flashstart); print_num("flash size", (ulong)bd->bi_flashsize); print_num("flash offset", (ulong)bd->bi_flashoffset); diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig index fbc27ea..e42a15e 100644 --- a/configs/nios2-generic_defconfig +++ b/configs/nios2-generic_defconfig @@ -10,7 +10,6 @@ CONFIG_CMD_CPU=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c index 249b273..737520f 100644 --- a/drivers/misc/altera_sysid.c +++ b/drivers/misc/altera_sysid.c @@ -87,8 +87,8 @@ static const struct misc_ops altera_sysid_ops = { }; static const struct udevice_id altera_sysid_ids[] = { - { .compatible = "altr,sysid-1.0", }, - { } + { .compatible = "altr,sysid-1.0" }, + {} }; U_BOOT_DRIVER(altera_sysid) = { diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index 319983c..b2002f4 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -27,12 +27,12 @@ static inline void alt_sgdma_construct_descriptor( struct alt_sgdma_descriptor *next, void *read_addr, void *write_addr, - unsigned short length_or_eop, + u16 length_or_eop, int generate_eop, int read_fixed, int write_fixed_or_sop) { - unsigned char val; + u8 val; /* * Mark the "next" descriptor as "not" owned by hardware. This prevents @@ -100,7 +100,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs, struct alt_sgdma_descriptor *desc) { - unsigned int val; + u32 val; /* Point the controller at the descriptor */ writel(virt_to_phys(desc), ®s->next_descriptor_pointer); @@ -121,7 +121,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, struct phy_device *phydev) { struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int refvar; + u32 refvar; if (!phydev->link) { debug("%s: No link.\n", phydev->dev->name); @@ -230,7 +230,7 @@ static void altera_tse_stop(struct udevice *dev) struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; - unsigned int status; + u32 status; int ret; ulong ctime; @@ -266,7 +266,7 @@ static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) { struct altera_tse_priv *priv = bus->priv; struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int value; + u32 value; /* set mdio address */ writel(addr, &mac_dev->mdio_phy1_addr); @@ -337,7 +337,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) struct alt_tse_mac *mac_dev = priv->mac_dev; struct eth_pdata *pdata = dev_get_platdata(dev); u8 *hwaddr = pdata->enetaddr; - unsigned int mac_lo, mac_hi; + u32 mac_lo, mac_hi; mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | (hwaddr[1] << 8) | hwaddr[0]; @@ -362,7 +362,7 @@ static int altera_tse_start(struct udevice *dev) { struct altera_tse_priv *priv = dev_get_priv(dev); struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int val; + u32 val; int ret; /* need to create sgdma */ @@ -409,20 +409,22 @@ static int altera_tse_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct altera_tse_priv *priv = dev_get_priv(dev); - const void *blob = gd->fdt_blob; + void *blob = (void *)gd->fdt_blob; int node = dev->of_offset; const char *list, *end; const fdt32_t *cell; void *base, *desc_mem = NULL; unsigned long addr, size; + int parent, addrc, sizec; int len, idx; int ret; /* - * decode regs, assume address-cells and size-cells are both one. - * there are multiple reg tuples, and they need to match with - * reg-names. + * decode regs. there are multiple reg tuples, and they need to + * match with reg-names. */ + parent = fdt_parent_offset(blob, node); + of_bus_default_count_cells(blob, parent, &addrc, &sizec); list = fdt_getprop(blob, node, "reg-names", &len); if (!list) return -ENOENT; @@ -434,7 +436,7 @@ static int altera_tse_probe(struct udevice *dev) while (list < end) { addr = fdt_translate_address((void *)blob, node, cell + idx); - size = fdt_addr_to_cpu(cell[idx + 1]); + size = fdt_addr_to_cpu(cell[idx + addrc]); base = ioremap(addr, size); len = strlen(list); if (strcmp(list, "control_port") == 0) @@ -445,7 +447,7 @@ static int altera_tse_probe(struct udevice *dev) priv->sgdma_tx = base; else if (strcmp(list, "s1") == 0) desc_mem = base; - idx += 2; + idx += addrc + sizec; list += (len + 1); } /* decode fifo depth */ diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 08c4f66..471a880 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -11,22 +11,14 @@ #ifndef _ALTERA_TSE_H_ #define _ALTERA_TSE_H_ -#define __packed_1_ __attribute__ ((packed, aligned(1))) +#define __packed_1_ __packed __aligned(1) /* SGDMA Stuff */ -#define ALT_SGDMA_STATUS_ERROR_MSK (0x00000001) -#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK (0x00000002) -#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK (0x00000004) -#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK (0x00000008) -#define ALT_SGDMA_STATUS_BUSY_MSK (0x00000010) +#define ALT_SGDMA_STATUS_BUSY_MSK BIT(4) -#define ALT_SGDMA_CONTROL_RUN_MSK (0x00000020) -#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK (0x00000040) -#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK (0x00010000) - -#define ALTERA_TSE_SGDMA_INTR_MASK (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \ - | ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \ - | ALT_SGDMA_CONTROL_IE_GLOBAL_MSK) +#define ALT_SGDMA_CONTROL_RUN_MSK BIT(5) +#define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK BIT(6) +#define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK BIT(16) /* * Descriptor control bit masks & offsets @@ -35,11 +27,10 @@ * The following bit-offsets are expressed relative to the LSB of * the control register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK (0x00000080) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK BIT(0) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK BIT(1) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK BIT(2) +#define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK BIT(7) /* * Descriptor status bit masks & offsets @@ -48,15 +39,7 @@ * The following bit-offsets are expressed relative to the LSB of * the status register bitfield. */ -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK (0x00000001) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK (0x00000002) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK (0x00000004) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK (0x00000008) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK (0x00000010) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK (0x00000020) -#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK (0x00000040) -#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK (0x00000080) -#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK (0x0000007F) +#define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK BIT(7) /* * The SGDMA controller buffer descriptor allocates @@ -71,70 +54,43 @@ * */ struct alt_sgdma_descriptor { - unsigned int source; /* the address of data to be read. */ - unsigned int source_pad; + u32 source; /* the address of data to be read. */ + u32 source_pad; - unsigned int destination; /* the address to write data */ - unsigned int destination_pad; + u32 destination; /* the address to write data */ + u32 destination_pad; - unsigned int next; /* the next descriptor in the list. */ - unsigned int next_pad; + u32 next; /* the next descriptor in the list. */ + u32 next_pad; - unsigned short bytes_to_transfer; /* the number of bytes to transfer */ - unsigned char read_burst; - unsigned char write_burst; + u16 bytes_to_transfer; /* the number of bytes to transfer */ + u8 read_burst; + u8 write_burst; - unsigned short actual_bytes_transferred;/* bytes transferred by DMA */ - unsigned char descriptor_status; - unsigned char descriptor_control; + u16 actual_bytes_transferred;/* bytes transferred by DMA */ + u8 descriptor_status; + u8 descriptor_control; } __packed_1_; /* SG-DMA Control/Status Slave registers map */ struct alt_sgdma_registers { - unsigned int status; - unsigned int status_pad[3]; - unsigned int control; - unsigned int control_pad[3]; - unsigned int next_descriptor_pointer; - unsigned int descriptor_pad[3]; + u32 status; + u32 status_pad[3]; + u32 control; + u32 control_pad[3]; + u32 next_descriptor_pointer; + u32 descriptor_pad[3]; }; /* TSE Stuff */ -#define ALTERA_TSE_CMD_TX_ENA_MSK (0x00000001) -#define ALTERA_TSE_CMD_RX_ENA_MSK (0x00000002) -#define ALTERA_TSE_CMD_XON_GEN_MSK (0x00000004) -#define ALTERA_TSE_CMD_ETH_SPEED_MSK (0x00000008) -#define ALTERA_TSE_CMD_PROMIS_EN_MSK (0x00000010) -#define ALTERA_TSE_CMD_PAD_EN_MSK (0x00000020) -#define ALTERA_TSE_CMD_CRC_FWD_MSK (0x00000040) -#define ALTERA_TSE_CMD_PAUSE_FWD_MSK (0x00000080) -#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK (0x00000100) -#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK (0x00000200) -#define ALTERA_TSE_CMD_HD_ENA_MSK (0x00000400) -#define ALTERA_TSE_CMD_EXCESS_COL_MSK (0x00000800) -#define ALTERA_TSE_CMD_LATE_COL_MSK (0x00001000) -#define ALTERA_TSE_CMD_SW_RESET_MSK (0x00002000) -#define ALTERA_TSE_CMD_MHASH_SEL_MSK (0x00004000) -#define ALTERA_TSE_CMD_LOOPBACK_MSK (0x00008000) -/* Bits (18:16) = address select */ -#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK (0x00070000) -#define ALTERA_TSE_CMD_MAGIC_ENA_MSK (0x00080000) -#define ALTERA_TSE_CMD_SLEEP_MSK (0x00100000) -#define ALTERA_TSE_CMD_WAKEUP_MSK (0x00200000) -#define ALTERA_TSE_CMD_XOFF_GEN_MSK (0x00400000) -#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK (0x00800000) -#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK (0x01000000) -#define ALTERA_TSE_CMD_ENA_10_MSK (0x02000000) -#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK (0x04000000) -/* Bits (30..27) reserved */ -#define ALTERA_TSE_CMD_CNT_RESET_MSK (0x80000000) - -#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 (0x00040000) -#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC (0x00020000) - -#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16 (0x02000000) +#define ALTERA_TSE_CMD_TX_ENA_MSK BIT(0) +#define ALTERA_TSE_CMD_RX_ENA_MSK BIT(1) +#define ALTERA_TSE_CMD_ETH_SPEED_MSK BIT(3) +#define ALTERA_TSE_CMD_HD_ENA_MSK BIT(10) +#define ALTERA_TSE_CMD_SW_RESET_MSK BIT(13) +#define ALTERA_TSE_CMD_ENA_10_MSK BIT(25) #define ALT_TSE_SW_RESET_TIMEOUT (3 * CONFIG_SYS_HZ) #define ALT_TSE_SGDMA_BUSY_TIMEOUT (3 * CONFIG_SYS_HZ) @@ -142,101 +98,47 @@ struct alt_sgdma_registers { /* MAC register Space */ struct alt_tse_mac { - unsigned int megacore_revision; - unsigned int scratch_pad; - unsigned int command_config; - unsigned int mac_addr_0; - unsigned int mac_addr_1; - unsigned int max_frame_length; - unsigned int pause_quanta; - unsigned int rx_sel_empty_threshold; - unsigned int rx_sel_full_threshold; - unsigned int tx_sel_empty_threshold; - unsigned int tx_sel_full_threshold; - unsigned int rx_almost_empty_threshold; - unsigned int rx_almost_full_threshold; - unsigned int tx_almost_empty_threshold; - unsigned int tx_almost_full_threshold; - unsigned int mdio_phy0_addr; - unsigned int mdio_phy1_addr; - - /* only if 100/1000 BaseX PCS, reserved otherwise */ - unsigned int reservedx44[5]; - - unsigned int reg_read_access_status; - unsigned int min_tx_ipg_length; - - /* IEEE 802.3 oEntity Managed Object Support */ - unsigned int aMACID_1; /*The MAC addresses */ - unsigned int aMACID_2; - unsigned int aFramesTransmittedOK; - unsigned int aFramesReceivedOK; - unsigned int aFramesCheckSequenceErrors; - unsigned int aAlignmentErrors; - unsigned int aOctetsTransmittedOK; - unsigned int aOctetsReceivedOK; - - /* IEEE 802.3 oPausedEntity Managed Object Support */ - unsigned int aTxPAUSEMACCtrlFrames; - unsigned int aRxPAUSEMACCtrlFrames; - - /* IETF MIB (MIB-II) Object Support */ - unsigned int ifInErrors; - unsigned int ifOutErrors; - unsigned int ifInUcastPkts; - unsigned int ifInMulticastPkts; - unsigned int ifInBroadcastPkts; - unsigned int ifOutDiscards; - unsigned int ifOutUcastPkts; - unsigned int ifOutMulticastPkts; - unsigned int ifOutBroadcastPkts; - - /* IETF RMON MIB Object Support */ - unsigned int etherStatsDropEvent; - unsigned int etherStatsOctets; - unsigned int etherStatsPkts; - unsigned int etherStatsUndersizePkts; - unsigned int etherStatsOversizePkts; - unsigned int etherStatsPkts64Octets; - unsigned int etherStatsPkts65to127Octets; - unsigned int etherStatsPkts128to255Octets; - unsigned int etherStatsPkts256to511Octets; - unsigned int etherStatsPkts512to1023Octets; - unsigned int etherStatsPkts1024to1518Octets; - - unsigned int etherStatsPkts1519toXOctets; - unsigned int etherStatsJabbers; - unsigned int etherStatsFragments; - - unsigned int reservedxE4; + u32 megacore_revision; + u32 scratch_pad; + u32 command_config; + u32 mac_addr_0; + u32 mac_addr_1; + u32 max_frame_length; + u32 pause_quanta; + u32 rx_sel_empty_threshold; + u32 rx_sel_full_threshold; + u32 tx_sel_empty_threshold; + u32 tx_sel_full_threshold; + u32 rx_almost_empty_threshold; + u32 rx_almost_full_threshold; + u32 tx_almost_empty_threshold; + u32 tx_almost_full_threshold; + u32 mdio_phy0_addr; + u32 mdio_phy1_addr; + + u32 reserved1[0x29]; /*FIFO control register. */ - unsigned int tx_cmd_stat; - unsigned int rx_cmd_stat; - - unsigned int ipaccTxConf; - unsigned int ipaccRxConf; - unsigned int ipaccRxStat; - unsigned int ipaccRxStatSum; + u32 tx_cmd_stat; + u32 rx_cmd_stat; - /*Multicast address resolution table */ - unsigned int hash_table[64]; + u32 reserved2[0x44]; /*Registers 0 to 31 within PHY device 0/1 */ - unsigned int mdio_phy0[0x20]; - unsigned int mdio_phy1[0x20]; + u32 mdio_phy0[0x20]; + u32 mdio_phy1[0x20]; /*4 Supplemental MAC Addresses */ - unsigned int supp_mac_addr_0_0; - unsigned int supp_mac_addr_0_1; - unsigned int supp_mac_addr_1_0; - unsigned int supp_mac_addr_1_1; - unsigned int supp_mac_addr_2_0; - unsigned int supp_mac_addr_2_1; - unsigned int supp_mac_addr_3_0; - unsigned int supp_mac_addr_3_1; - - unsigned int reservedx320[56]; + u32 supp_mac_addr_0_0; + u32 supp_mac_addr_0_1; + u32 supp_mac_addr_1_0; + u32 supp_mac_addr_1_1; + u32 supp_mac_addr_2_0; + u32 supp_mac_addr_2_1; + u32 supp_mac_addr_3_0; + u32 supp_mac_addr_3_1; + + u32 reserved3[0x38]; }; struct altera_tse_priv { diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index 39d4a4e..c77bea3 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -8,9 +8,20 @@ #include <common.h> #include <dm.h> #include <errno.h> -#include <asm/io.h> -#include <linux/compiler.h> #include <serial.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* data register */ +#define ALTERA_JTAG_RVALID BIT(15) /* Read valid */ + +/* control register */ +#define ALTERA_JTAG_AC BIT(10) /* activity indicator */ +#define ALTERA_JTAG_RRDY BIT(12) /* read available */ +#define ALTERA_JTAG_WSPACE(d) ((d) >> 16) /* Write space avail */ +/* Write fifo size. FIXME: this should be extracted with sopc2dts */ +#define ALTERA_JTAG_WRITE_DEPTH 64 struct altera_jtaguart_regs { u32 data; /* Data register */ @@ -21,18 +32,6 @@ struct altera_jtaguart_platdata { struct altera_jtaguart_regs *regs; }; -/* data register */ -#define ALTERA_JTAG_RVALID (1<<15) /* Read valid */ - -/* control register */ -#define ALTERA_JTAG_AC (1 << 10) /* activity indicator */ -#define ALTERA_JTAG_RRDY (1 << 12) /* read available */ -#define ALTERA_JTAG_WSPACE(d) ((d)>>16) /* Write space avail */ -/* Write fifo size. FIXME: this should be extracted with sopc2dts */ -#define ALTERA_JTAG_WRITE_DEPTH 64 - -DECLARE_GLOBAL_DATA_PTR; - static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate) { return 0; @@ -112,8 +111,8 @@ static const struct dm_serial_ops altera_jtaguart_ops = { }; static const struct udevice_id altera_jtaguart_ids[] = { - { .compatible = "altr,juart-1.0", }, - { } + { .compatible = "altr,juart-1.0" }, + {} }; U_BOOT_DRIVER(altera_jtaguart) = { @@ -131,7 +130,7 @@ U_BOOT_DRIVER(altera_jtaguart) = { #include <debug_uart.h> -void debug_uart_init(void) +static inline void _debug_uart_init(void) { } diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index 4ff9fe2..5d76c33 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -8,9 +8,15 @@ #include <common.h> #include <dm.h> #include <errno.h> -#include <asm/io.h> -#include <linux/compiler.h> #include <serial.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* status register */ +#define ALTERA_UART_TMT BIT(5) /* tx empty */ +#define ALTERA_UART_TRDY BIT(6) /* tx ready */ +#define ALTERA_UART_RRDY BIT(7) /* rx ready */ struct altera_uart_regs { u32 rxdata; /* Rx data reg */ @@ -26,13 +32,6 @@ struct altera_uart_platdata { unsigned int uartclk; }; -/* status register */ -#define ALTERA_UART_TMT (1 << 5) /* tx empty */ -#define ALTERA_UART_TRDY (1 << 6) /* tx ready */ -#define ALTERA_UART_RRDY (1 << 7) /* rx ready */ - -DECLARE_GLOBAL_DATA_PTR; - static int altera_uart_setbrg(struct udevice *dev, int baudrate) { struct altera_uart_platdata *plat = dev->platdata; @@ -106,8 +105,8 @@ static const struct dm_serial_ops altera_uart_ops = { }; static const struct udevice_id altera_uart_ids[] = { - { .compatible = "altr,uart-1.0", }, - { } + { .compatible = "altr,uart-1.0" }, + {} }; U_BOOT_DRIVER(altera_uart) = { @@ -125,7 +124,7 @@ U_BOOT_DRIVER(altera_uart) = { #include <debug_uart.h> -void debug_uart_init(void) +static inline void _debug_uart_init(void) { struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; u32 div; diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c index e49949b..3e09592 100644 --- a/drivers/spi/altera_spi.c +++ b/drivers/spi/altera_spi.c @@ -193,8 +193,8 @@ static const struct dm_spi_ops altera_spi_ops = { }; static const struct udevice_id altera_spi_ids[] = { - { .compatible = "altr,spi-1.0", }, - { } + { .compatible = "altr,spi-1.0" }, + {} }; U_BOOT_DRIVER(altera_spi) = { diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c index 2ef9ad6..46a598a 100644 --- a/drivers/timer/altera_timer.c +++ b/drivers/timer/altera_timer.c @@ -16,6 +16,11 @@ DECLARE_GLOBAL_DATA_PTR; +/* control register */ +#define ALTERA_TIMER_CONT BIT(1) /* Continuous mode */ +#define ALTERA_TIMER_START BIT(2) /* Start timer */ +#define ALTERA_TIMER_STOP BIT(3) /* Stop timer */ + struct altera_timer_regs { u32 status; /* Timer status reg */ u32 control; /* Timer control reg */ @@ -30,11 +35,6 @@ struct altera_timer_platdata { unsigned long clock_rate; }; -/* control register */ -#define ALTERA_TIMER_CONT (1 << 1) /* Continuous mode */ -#define ALTERA_TIMER_START (1 << 2) /* Start timer */ -#define ALTERA_TIMER_STOP (1 << 3) /* Stop timer */ - static int altera_timer_get_count(struct udevice *dev, unsigned long *count) { struct altera_timer_platdata *plat = dev->platdata; @@ -88,8 +88,8 @@ static const struct timer_ops altera_timer_ops = { }; static const struct udevice_id altera_timer_ids[] = { - { .compatible = "altr,timer-1.0", }, - { } + { .compatible = "altr,timer-1.0" }, + {} }; U_BOOT_DRIVER(altera_timer) = { diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index b38513e..dbd39d6 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -36,10 +36,10 @@ /* * MII/PHY */ -#define CONFIG_CMD_MII 1 -#define CONFIG_PHY_GIGE 1 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 -#define CONFIG_PHY_MARVELL 1 +#define CONFIG_CMD_MII +#define CONFIG_PHY_GIGE +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHY_MARVELL /* * BOOTP options @@ -77,15 +77,13 @@ */ #define CONFIG_SYS_SDRAM_BASE 0xD0000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_MONITOR_IS_IN_RAM #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_SDRAM_SIZE - \ CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x20000) -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - \ - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_INIT_SP CONFIG_SYS_MALLOC_BASE +#define CONFIG_SYS_MALLOC_LEN 0x20000 /* * MISC @@ -99,7 +97,10 @@ 16) /* Print buf size */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - 0x20000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MONITOR_BASE - \ + CONFIG_ENV_SIZE - \ + CONFIG_SYS_MALLOC_LEN - \ + 0x10000) #define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_GPIO |