diff options
51 files changed, 1212 insertions, 206 deletions
@@ -152,6 +152,16 @@ config SPL_STACK_R_MALLOC_SIMPLE_LEN to give board_init_r() a larger heap then the initial heap in SRAM which is limited to SYS_MALLOC_F_LEN bytes. +config SPL_SEPARATE_BSS + depends on SPL + bool "BSS section is in a different memory region from text" + help + Some platforms need a large BSS region in SPL and can provide this + because RAM is already set up. In this case BSS can be moved to RAM. + This option should then be enabled so that the correct device tree + location is used. Normally we put the device tree at the end of BSS + but with this option enabled, it goes at _image_binary_end. + config TPL bool depends on SPL && SUPPORT_TPL diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3992f69..0d756cb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -543,13 +543,20 @@ config ARCH_ZYNQ select CPU_V7 select SUPPORT_SPL select OF_CONTROL + select SPL_OF_CONTROL select DM + select SPL_DM select DM_SPI + select DM_SERIAL select DM_SPI_FLASH + select SPL_SEPARATE_BSS config ARCH_ZYNQMP bool "Support Xilinx ZynqMP Platform" select ARM64 + select DM + select OF_CONTROL + select DM_SERIAL config TEGRA bool "NVIDIA Tegra" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ddc6a05..910648c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -65,6 +65,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-zc770-xm011.dtb \ zynq-zc770-xm012.dtb \ zynq-zc770-xm013.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += \ + zynqmp-ep108.dtb dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-evm.dtb dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 84c15b5..83be51a 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -54,6 +54,7 @@ }; amba: amba { + u-boot,dm-pre-reloc; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts index d5e0050..e841a1d 100644 --- a/arch/arm/dts/zynq-microzed.dts +++ b/arch/arm/dts/zynq-microzed.dts @@ -26,3 +26,8 @@ &qspi { status = "okay"; }; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; diff --git a/arch/arm/dts/zynq-picozed.dts b/arch/arm/dts/zynq-picozed.dts index 686b98f..3408df8 100644 --- a/arch/arm/dts/zynq-picozed.dts +++ b/arch/arm/dts/zynq-picozed.dts @@ -21,3 +21,8 @@ reg = <0 0x40000000>; }; }; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 4d86960..c417236 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -376,6 +376,7 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index fc336ea..5088cfe 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -297,6 +297,7 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index cf56ac8..07e2b7a 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -88,6 +88,7 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index f73c0dd..77e3bb0 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -55,6 +55,7 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts index 4289e31..3e1769a 100644 --- a/arch/arm/dts/zynq-zc770-xm012.dts +++ b/arch/arm/dts/zynq-zc770-xm012.dts @@ -62,5 +62,6 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 5124cdc..288e248 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -75,5 +75,6 @@ }; &uart0 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index 3630490..51d67d9 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -54,6 +54,7 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts index 10f7815..dcfc00e 100644 --- a/arch/arm/dts/zynq-zybo.dts +++ b/arch/arm/dts/zynq-zybo.dts @@ -49,5 +49,6 @@ }; &uart1 { + u-boot,dm-pre-reloc; status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-ep108-clk.dtsi b/arch/arm/dts/zynqmp-ep108-clk.dtsi new file mode 100644 index 0000000..f864526 --- /dev/null +++ b/arch/arm/dts/zynqmp-ep108-clk.dtsi @@ -0,0 +1,119 @@ +/* + * clock specification for Xilinx ZynqMP ep108 development board + * + * (C) Copyright 2015, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&amba { + misc_clk: misc_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + i2c_clk: i2c_clk { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <111111111>; + }; + + sata_clk: sata_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <75000000>; + }; + + dp_aclk: clock0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-accuracy = <100>; + }; + + dp_aud_clk: clock1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <22579200>; + clock-accuracy = <100>; + }; +}; + +&can0 { + clocks = <&misc_clk &misc_clk>; +}; + +&gem0 { + clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; +}; + +&gpio { + clocks = <&misc_clk>; +}; + +&i2c0 { + clocks = <&i2c_clk>; +}; + +&i2c1 { + clocks = <&i2c_clk>; +}; + +&qspi { + clocks = <&misc_clk &misc_clk>; +}; + +&sata { + clocks = <&sata_clk>; +}; + +&sdhci0 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&sdhci1 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&spi0 { + clocks = <&misc_clk &misc_clk>; +}; + +&spi1 { + clocks = <&misc_clk &misc_clk>; +}; + +&uart0 { + clocks = <&misc_clk &misc_clk>; +}; + +&usb0 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&usb1 { + clocks = <&misc_clk>, <&misc_clk>; +}; + +&watchdog0 { + clocks= <&misc_clk>; +}; + +&xilinx_drm { + clocks = <&misc_clk>; +}; + +&xlnx_dp { + clocks = <&dp_aclk>, <&dp_aud_clk>; +}; + +&xlnx_dp_snd_codec0 { + clocks = <&dp_aud_clk>; +}; + +&xlnx_dpdma { + clocks = <&misc_clk>; +}; diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts new file mode 100644 index 0000000..4481bd0 --- /dev/null +++ b/arch/arm/dts/zynqmp-ep108.dts @@ -0,0 +1,174 @@ +/* + * dts file for Xilinx ZynqMP ep108 development board + * + * (C) Copyright 2014 - 2015, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/include/ "zynqmp.dtsi" +/include/ "zynqmp-ep108-clk.dtsi" + +/ { + model = "ZynqMP EP108"; + + aliases { + serial0 = &uart0; + spi0 = &qspi; + spi1 = &spi0; + spi2 = &spi1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0 0x40000000>; + }; +}; + +&can0 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + phy0: phy@0{ + reg = <0>; + max-speed = <100>; + }; +}; + +&gpio { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + eeprom@54 { + compatible = "at,24c64"; + reg = <0x54>; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + eeprom@55 { + compatible = "at,24c64"; + reg = <0x55>; + }; +}; + +&qspi { + status = "okay"; + flash@0 { + compatible = "n25q512a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <10000000>; + partition@qspi-fsbl-uboot { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@qspi-linux { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@qspi-device-tree { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@qspi-rootfs { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; + }; +}; + +&sata { + status = "okay"; + ceva,broken-gen2; +}; + +&sdhci0 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + num-cs = <1>; + spi0_flash0: spi0_flash0@0 { + compatible = "m25p80"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + spi0_flash0@00000000 { + label = "spi0_flash0"; + reg = <0x0 0x100000>; + }; + }; +}; + +&spi1 { + status = "okay"; + num-cs = <1>; + spi1_flash0: spi1_flash0@0 { + compatible = "m25p80"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + spi1_flash0@00000000 { + label = "spi1_flash0"; + reg = <0x0 0x100000>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "peripheral"; + maximum-speed = "high-speed"; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; +}; + +&watchdog0 { + status = "okay"; +}; + +&xlnx_dp { + xlnx,max-pclock-frequency = <200000>; +}; + +&xlnx_dpdma { + xlnx,axi-clock-freq = <200000000>; +}; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi new file mode 100644 index 0000000..24a34e6 --- /dev/null +++ b/arch/arm/dts/zynqmp.dtsi @@ -0,0 +1,668 @@ +/* + * dts file for Xilinx ZynqMP + * + * (C) Copyright 2014 - 2015, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/ { + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x0>; + }; + + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x1>; + }; + + cpu@2 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x2>; + }; + + cpu@3 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x3>; + }; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0 143 4>, + <0 144 4>, + <0 145 4>, + <0 146 4>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + firmware { + compatible = "xlnx,zynqmp-pm"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <1 13 0xf01>, + <1 14 0xf01>, + <1 11 0xf01>, + <1 10 0xf01>; + }; + + amba_apu: amba_apu { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + gic: interrupt-controller@f9010000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + reg = <0x0 0xf9010000 0x10000>, + <0x0 0xf902f000 0x2000>, + <0x0 0xf9040000 0x20000>, + <0x0 0xf906f000 0x2000>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <1 9 0xf04>; + }; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + can0: can@ff060000 { + compatible = "xlnx,zynq-can-1.0"; + status = "disabled"; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff060000 0x1000>; + interrupts = <0 23 4>; + interrupt-parent = <&gic>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + + can1: can@ff070000 { + compatible = "xlnx,zynq-can-1.0"; + status = "disabled"; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff070000 0x1000>; + interrupts = <0 24 4>; + interrupt-parent = <&gic>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + + /* GDMA */ + fpd_dma_chan1: dma@fd500000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd500000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 124 4>; + xlnx,id = <0>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan2: dma@fd510000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd510000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 125 4>; + xlnx,id = <1>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan3: dma@fd520000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd520000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 126 4>; + xlnx,id = <2>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan4: dma@fd530000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd530000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 127 4>; + xlnx,id = <3>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan5: dma@fd540000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd540000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 128 4>; + xlnx,id = <4>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan6: dma@fd550000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd550000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 129 4>; + xlnx,id = <5>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan7: dma@fd560000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd560000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 130 4>; + xlnx,id = <6>; + xlnx,bus-width = <128>; + }; + + fpd_dma_chan8: dma@fd570000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd570000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 131 4>; + xlnx,id = <7>; + xlnx,bus-width = <128>; + }; + + gpu: gpu@fd4b0000 { + status = "disabled"; + compatible = "arm,mali-400", "arm,mali-utgard"; + reg = <0x0 0xfd4b0000 0x30000>; + interrupt-parent = <&gic>; + interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; + interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + }; + + /* ADMA */ + lpd_dma_chan1: dma@ffa80000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffa80000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 77 4>; + xlnx,id = <0>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan2: dma@ffa90000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffa90000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 78 4>; + xlnx,id = <1>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan3: dma@ffaa0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffaa0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 79 4>; + xlnx,id = <2>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan4: dma@ffab0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffab0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 80 4>; + xlnx,id = <3>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan5: dma@ffac0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffac0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 81 4>; + xlnx,id = <4>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan6: dma@ffad0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffad0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 82 4>; + xlnx,id = <5>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan7: dma@ffae0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffae0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 83 4>; + xlnx,id = <6>; + xlnx,bus-width = <64>; + }; + + lpd_dma_chan8: dma@ffaf0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffaf0000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 84 4>; + xlnx,id = <7>; + xlnx,bus-width = <64>; + }; + + nand0: nand@ff100000 { + compatible = "arasan,nfc-v3p10"; + status = "disabled"; + reg = <0x0 0xff100000 0x1000>; + clock-names = "clk_sys", "clk_flash"; + interrupt-parent = <&gic>; + interrupts = <0 14 4>; + #address-cells = <2>; + #size-cells = <1>; + }; + + gem0: ethernet@ff0b0000 { + compatible = "cdns,gem"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 57 4>, <0 57 4>; + reg = <0x0 0xff0b0000 0x1000>; + clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; + jumbo-max-len = <10240>; + jumbo-supported; + }; + + gem1: ethernet@ff0c0000 { + compatible = "cdns,gem"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 59 4>, <0 59 4>; + reg = <0x0 0xff0c0000 0x1000>; + clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; + jumbo-max-len = <10240>; + jumbo-supported; + }; + + gem2: ethernet@ff0d0000 { + compatible = "cdns,gem"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 61 4>, <0 61 4>; + reg = <0x0 0xff0d0000 0x1000>; + clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; + jumbo-max-len = <10240>; + jumbo-supported; + }; + + gem3: ethernet@ff0e0000 { + compatible = "cdns,gem"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 63 4>, <0 63 4>; + reg = <0x0 0xff0e0000 0x1000>; + clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; + jumbo-max-len = <10240>; + jumbo-supported; + }; + + gpio: gpio@ff0a0000 { + compatible = "xlnx,zynqmp-gpio-1.0"; + status = "disabled"; + #gpio-cells = <0x2>; + interrupt-parent = <&gic>; + interrupts = <0 16 4>; + reg = <0x0 0xff0a0000 0x1000>; + }; + + i2c0: i2c@ff020000 { + compatible = "cdns,i2c-r1p10"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 17 4>; + reg = <0x0 0xff020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@ff030000 { + compatible = "cdns,i2c-r1p10"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 18 4>; + reg = <0x0 0xff030000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pcie: pcie@fd0e0000 { + compatible = "xlnx,nwl-pcie-2.11"; + status = "disabled"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + interrupt-parent = <&gic>; + interrupts = < 0 118 4>, + < 0 116 4>, + < 0 115 4>, /* MSI_1 [63...32] */ + < 0 114 4 >; /* MSI_0 [31...0] */ + interrupt-names = "misc", "intx", "msi_1", "msi_0"; + reg = <0x0 0xfd0e0000 0x1000>, + <0x0 0xfd480000 0x1000>, + <0x0 0xe0000000 0x1000000>; + reg-names = "breg", "pcireg", "cfg"; + ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; + }; + + qspi: spi@ff0f0000 { + compatible = "xlnx,zynqmp-qspi-1.0"; + status = "disabled"; + clock-names = "ref_clk", "pclk"; + interrupts = <0 15 4>; + interrupt-parent = <&gic>; + num-cs = <1>; + reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + rtc: rtc@ffa60000 { + compatible = "xlnx,zynqmp-rtc"; + status = "disabled"; + reg = <0x0 0xffa60000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 26 4>, <0 27 4>; + interrupt-names = "alarm", "sec"; + }; + + sata: ahci@fd0c0000 { + compatible = "ceva,ahci-1v84"; + status = "disabled"; + reg = <0x0 0xfd0c0000 0x2000>; + interrupt-parent = <&gic>; + interrupts = <0 133 4>; + }; + + sdhci0: sdhci@ff160000 { + compatible = "arasan,sdhci-8.9a"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 48 4>; + reg = <0x0 0xff160000 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + }; + + sdhci1: sdhci@ff170000 { + compatible = "arasan,sdhci-8.9a"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 49 4>; + reg = <0x0 0xff170000 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + }; + + smmu: smmu@fd800000 { + compatible = "arm,mmu-500"; + reg = <0x0 0xfd800000 0x20000>; + #global-interrupts = <1>; + interrupt-parent = <&gic>; + interrupts = <0 157 4>, + <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, + <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, + <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, + <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>; + }; + + spi0: spi@ff040000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 19 4>; + reg = <0x0 0xff040000 0x1000>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@ff050000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 20 4>; + reg = <0x0 0xff050000 0x1000>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + + ttc0: timer@ff110000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 36 4>, <0 37 4>, <0 38 4>; + reg = <0x0 0xff110000 0x1000>; + timer-width = <32>; + }; + + ttc1: timer@ff120000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 39 4>, <0 40 4>, <0 41 4>; + reg = <0x0 0xff120000 0x1000>; + timer-width = <32>; + }; + + ttc2: timer@ff130000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 42 4>, <0 43 4>, <0 44 4>; + reg = <0x0 0xff130000 0x1000>; + timer-width = <32>; + }; + + ttc3: timer@ff140000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 45 4>, <0 46 4>, <0 47 4>; + reg = <0x0 0xff140000 0x1000>; + timer-width = <32>; + }; + + uart0: serial@ff000000 { + compatible = "cdns,uart-r1p8"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 21 4>; + reg = <0x0 0xff000000 0x1000>; + clock-names = "uart_clk", "pclk"; + }; + + uart1: serial@ff010000 { + compatible = "cdns,uart-r1p8"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 22 4>; + reg = <0x0 0xff010000 0x1000>; + clock-names = "uart_clk", "pclk"; + }; + + usb0: usb@fe200000 { + compatible = "snps,dwc3"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 65 4>; + reg = <0x0 0xfe200000 0x40000>; + clock-names = "clk_xin", "clk_ahb"; + }; + + usb1: usb@fe300000 { + compatible = "snps,dwc3"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 70 4>; + reg = <0x0 0xfe300000 0x40000>; + clock-names = "clk_xin", "clk_ahb"; + }; + + watchdog0: watchdog@fd4d0000 { + compatible = "cdns,wdt-r1p2"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 52 1>; + reg = <0x0 0xfd4d0000 0x1000>; + timeout-sec = <10>; + }; + + xilinx_drm: xilinx_drm { + compatible = "xlnx,drm"; + status = "disabled"; + xlnx,encoder-slave = <&xlnx_dp>; + xlnx,connector-type = "DisplayPort"; + xlnx,dp-sub = <&xlnx_dp_sub>; + planes { + xlnx,pixel-format = "rgb565"; + plane0 { + dmas = <&xlnx_dpdma 3>; + dma-names = "dma"; + }; + plane1 { + dmas = <&xlnx_dpdma 0>; + dma-names = "dma"; + }; + }; + }; + + xlnx_dp: dp@43c00000 { + compatible = "xlnx,v-dp"; + status = "disabled"; + reg = <0x0 0xfd4a0000 0x1000>; + interrupts = <0 119 4>; + interrupt-parent = <&gic>; + clock-names = "aclk", "aud_clk"; + xlnx,dp-version = "v1.2"; + xlnx,max-lanes = <2>; + xlnx,max-link-rate = <540000>; + xlnx,max-bpc = <16>; + xlnx,enable-ycrcb; + xlnx,colormetry = "rgb"; + xlnx,bpc = <8>; + xlnx,audio-chan = <2>; + xlnx,dp-sub = <&xlnx_dp_sub>; + }; + + xlnx_dp_snd_card: dp_snd_card { + compatible = "xlnx,dp-snd-card"; + status = "disabled"; + xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>; + }; + + xlnx_dp_snd_codec0: dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + status = "disabled"; + clock-names = "aud_clk"; + }; + + xlnx_dp_snd_pcm0: dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm"; + status = "disabled"; + dmas = <&xlnx_dpdma 4>; + dma-names = "tx"; + }; + + xlnx_dp_snd_pcm1: dp_snd_pcm1 { + compatible = "xlnx,dp-snd-pcm"; + status = "disabled"; + dmas = <&xlnx_dpdma 5>; + dma-names = "tx"; + }; + + xlnx_dp_sub: dp_sub@43c0a000 { + compatible = "xlnx,dp-sub"; + status = "disabled"; + reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>; + reg-names = "blend", "av_buf", "aud"; + xlnx,output-fmt = "rgb"; + }; + + xlnx_dpdma: dma@fd4c0000 { + compatible = "xlnx,dpdma"; + status = "disabled"; + reg = <0x0 0xfd4c0000 0x1000>; + interrupts = <0 122 4>; + interrupt-parent = <&gic>; + clock-names = "axi_clk"; + dma-channels = <6>; + #dma-cells = <1>; + dma-video0channel@43c10000 { + compatible = "xlnx,video0"; + }; + dma-video1channel@43c10000 { + compatible = "xlnx,video1"; + }; + dma-video2channel@43c10000 { + compatible = "xlnx,video2"; + }; + dma-graphicschannel@43c10000 { + compatible = "xlnx,graphics"; + }; + dma-audio0channel@43c10000 { + compatible = "xlnx,audio0"; + }; + dma-audio1channel@43c10000 { + compatible = "xlnx,audio1"; + }; + }; + }; +}; diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index 7a1aec4..afe6cc3 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -21,13 +21,6 @@ config TARGET_ZYNQ_MICROZED config TARGET_ZYNQ_PICOZED bool "Zynq PicoZed" -config TARGET_ZYNQ_ZC70X - bool "Zynq ZC702/ZC706 Board (deprecated)" - select ZYNQ_CUSTOM_INIT - help - This option is deprecated. Use TARGET_ZYNQ_ZC702 - or TARGET_ZYNQ_706. - config TARGET_ZYNQ_ZC702 bool "Zynq ZC702 Board" @@ -57,8 +50,7 @@ config SYS_CONFIG_NAME default "zynq_zed" if TARGET_ZYNQ_ZED default "zynq_microzed" if TARGET_ZYNQ_MICROZED default "zynq_picozed" if TARGET_ZYNQ_PICOZED - default "zynq_zc70x" if TARGET_ZYNQ_ZC702 || TARGET_ZYNQ_ZC706 \ - || TARGET_ZYNQ_ZC70X + default "zynq_zc70x" if TARGET_ZYNQ_ZC702 || TARGET_ZYNQ_ZC706 default "zynq_zc770" if TARGET_ZYNQ_ZC770 default "zynq_zybo" if TARGET_ZYNQ_ZYBO diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 7bdac3b..723019d 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -4,11 +4,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> +#include <debug_uart.h> #include <spl.h> #include <asm/io.h> -#include <asm/arch/hardware.h> #include <asm/spl.h> +#include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> DECLARE_GLOBAL_DATA_PTR; @@ -17,11 +18,12 @@ void board_init_f(ulong dummy) { ps7_init(); - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - arch_cpu_init(); - board_init_r(NULL, 0); + /* + * The debug UART can be used from this point: + * debug_uart_init(); + * printch('x'); + */ } #ifdef CONFIG_SPL_BOARD_INIT diff --git a/arch/arm/mach-zynq/u-boot-spl.lds b/arch/arm/mach-zynq/u-boot-spl.lds index 0f2f756..ecdf6a0 100644 --- a/arch/arm/mach-zynq/u-boot-spl.lds +++ b/arch/arm/mach-zynq/u-boot-spl.lds @@ -38,10 +38,18 @@ SECTIONS } > .sram . = ALIGN(4); +#ifdef CONFIG_SPL_DM + .u_boot_list : { + KEEP(*(SORT(.u_boot_list_*_driver_*))); + KEEP(*(SORT(.u_boot_list_*_uclass_*))); + } > .sram + + . = ALIGN(4); +#endif . = .; - __image_copy_end = .; + _image_binary_end = .; _end = .; diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile index fd5d6fe..88047ec 100644 --- a/board/xilinx/zynq/Makefile +++ b/board/xilinx/zynq/Makefile @@ -36,13 +36,3 @@ CFLAGS_REMOVE_ps7_init_gpl.o := -Wstrict-prototypes # To include xil_io.h CFLAGS_ps7_init_gpl.o := -I$(srctree)/$(src) - -# Warn if CONFIG_TARGET_ZYNQ_ZC70X is enabled -ifeq ($(CONFIG_TARGET_ZYNQ_ZC70X),y) -ifeq ($(CONFIG_SPL_BUILD),y) -$(warning CONFIG_TARGET_ZYNQ_ZC70X is deprecated.) -$(warning Enable CONFIG_TARGET_ZYNQ_ZC702 or CONFIG_TARGET_ZYNQ_706 instead.) -$(warning "make zynq_zc70x_defconfig" is also deprecated.) -$(warning Use "make zynq_zc702_defconfig" or "make zynq_zc706_defconfig".) -endif -endif diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 770c797..79304c1 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQMP=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep" +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_IMLS is not set @@ -20,5 +20,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y +CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_REGEX is not set diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 9cb2ca1..74ca3a9 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -9,7 +9,7 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index f2b71e9..3a42efb 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -6,5 +6,5 @@ CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index c4922f3..3e488be 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -8,7 +8,7 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index b4c076c..edd3635 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -9,7 +9,7 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc70x_defconfig b/configs/zynq_zc70x_defconfig deleted file mode 100644 index 97f8a5d..0000000 --- a/configs/zynq_zc70x_defconfig +++ /dev/null @@ -1,15 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_ZYNQ=y -CONFIG_TARGET_ZYNQ_ZC70X=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702" -CONFIG_SPL=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_FIT_SIGNATURE=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y -CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 61106df..69a0a9c 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -10,7 +10,7 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 46d043b..2a61fe3 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -10,5 +10,5 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 34d479f..eb98a39 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -8,5 +8,5 @@ CONFIG_FIT_VERBOSE=y CONFIG_FIT_SIGNATURE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index c59599f..8d65c05 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -10,5 +10,5 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 5e128fb..df5e25a 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -9,7 +9,7 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPI_FLASH=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 77b9409..b7531d6 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -9,5 +9,9 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 53b4e1b..d462244 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -91,6 +91,13 @@ config DEBUG_UART_S5P will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_ZYNQ + bool "Xilinx Zynq" + help + Select this to enable a debug UART using the serial_s5p driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + endchoice config DEBUG_UART_BASE diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 55011cc..842f78b 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -29,14 +29,34 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE; static void serial_find_console_or_panic(void) { + const void *blob = gd->fdt_blob; struct udevice *dev; int node; - if (CONFIG_IS_ENABLED(OF_CONTROL) && gd->fdt_blob) { + if (CONFIG_IS_ENABLED(OF_CONTROL) && blob) { /* Check for a chosen console */ - node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); + node = fdtdec_get_chosen_node(blob, "stdout-path"); + if (node < 0) { + const char *str, *p, *name; + + /* + * Deal with things like + * stdout-path = "serial0:115200n8"; + * + * We need to look up the alias and then follow it to + * the correct node. + */ + str = fdtdec_get_chosen_prop(blob, "stdout-path"); + if (str) { + p = strchr(str, ':'); + name = fdt_get_alias_namelen(blob, str, + p ? p - str : strlen(str)); + if (name) + node = fdt_path_offset(blob, name); + } + } if (node < 0) - node = fdt_path_offset(gd->fdt_blob, "console"); + node = fdt_path_offset(blob, "console"); if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, &dev)) { gd->cur_serial_dev = dev; @@ -48,14 +68,14 @@ static void serial_find_console_or_panic(void) * bind it anyway. */ if (node > 0 && - !lists_bind_fdt(gd->dm_root, gd->fdt_blob, node, &dev)) { + !lists_bind_fdt(gd->dm_root, blob, node, &dev)) { if (!device_probe(dev)) { gd->cur_serial_dev = dev; return; } } } - if (!SPL_BUILD || !CONFIG_IS_ENABLED(OF_CONTROL) || !gd->fdt_blob) { + if (!SPL_BUILD || !CONFIG_IS_ENABLED(OF_CONTROL) || !blob) { /* * Try to use CONFIG_CONS_INDEX if available (it is numbered * from 1!). diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 9d84290..88bebed 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -6,6 +6,9 @@ */ #include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <errno.h> #include <fdtdec.h> #include <watchdog.h> #include <asm/io.h> @@ -17,6 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_UART_SR_TXFULL 0x00000010 /* TX FIFO full */ +#define ZYNQ_UART_SR_TXACTIVE (1 << 11) /* TX active */ #define ZYNQ_UART_SR_RXEMPTY 0x00000002 /* RX FIFO empty */ #define ZYNQ_UART_CR_TX_EN 0x00000010 /* TX enabled */ @@ -37,26 +41,21 @@ struct uart_zynq { u32 baud_rate_divider; /* 0x34 - Baud Rate Divider [7:0] */ }; -static struct uart_zynq *uart_zynq_ports[2] = { - [0] = (struct uart_zynq *)ZYNQ_SERIAL_BASEADDR0, - [1] = (struct uart_zynq *)ZYNQ_SERIAL_BASEADDR1, +struct zynq_uart_priv { + struct uart_zynq *regs; }; /* Set up the baud rate in gd struct */ -static void uart_zynq_serial_setbrg(const int port) +static void _uart_zynq_serial_setbrg(struct uart_zynq *regs, + unsigned long clock, unsigned long baud) { /* Calculation results. */ unsigned int calc_bauderror, bdiv, bgen; unsigned long calc_baud = 0; - unsigned long baud; - unsigned long clock = get_uart_clk(port); - struct uart_zynq *regs = uart_zynq_ports[port]; /* Covering case where input clock is so slow */ - if (clock < 1000000 && gd->baudrate > 4800) - gd->baudrate = 4800; - - baud = gd->baudrate; + if (clock < 1000000 && baud > 4800) + baud = 4800; /* master clock * Baud rate = ------------------ @@ -88,133 +87,131 @@ static void uart_zynq_serial_setbrg(const int port) } /* Initialize the UART, with...some settings. */ -static int uart_zynq_serial_init(const int port) +static void _uart_zynq_serial_init(struct uart_zynq *regs) { - struct uart_zynq *regs = uart_zynq_ports[port]; - - if (!regs) - return -1; - /* RX/TX enabled & reset */ writel(ZYNQ_UART_CR_TX_EN | ZYNQ_UART_CR_RX_EN | ZYNQ_UART_CR_TXRST | \ ZYNQ_UART_CR_RXRST, ®s->control); writel(ZYNQ_UART_MR_PARITY_NONE, ®s->mode); /* 8 bit, no parity */ - uart_zynq_serial_setbrg(port); - - return 0; } -static void uart_zynq_serial_putc(const char c, const int port) +static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c) { - struct uart_zynq *regs = uart_zynq_ports[port]; + if (readl(®s->channel_sts) & ZYNQ_UART_SR_TXFULL) + return -EAGAIN; - while ((readl(®s->channel_sts) & ZYNQ_UART_SR_TXFULL) != 0) - WATCHDOG_RESET(); - - if (c == '\n') { - writel('\r', ®s->tx_rx_fifo); - while ((readl(®s->channel_sts) & ZYNQ_UART_SR_TXFULL) != 0) - WATCHDOG_RESET(); - } writel(c, ®s->tx_rx_fifo); + + return 0; } -static void uart_zynq_serial_puts(const char *s, const int port) +int zynq_serial_setbrg(struct udevice *dev, int baudrate) { - while (*s) - uart_zynq_serial_putc(*s++, port); + struct zynq_uart_priv *priv = dev_get_priv(dev); + unsigned long clock = get_uart_clk(0); + + _uart_zynq_serial_setbrg(priv->regs, clock, baudrate); + + return 0; } -static int uart_zynq_serial_tstc(const int port) +static int zynq_serial_probe(struct udevice *dev) { - struct uart_zynq *regs = uart_zynq_ports[port]; + struct zynq_uart_priv *priv = dev_get_priv(dev); + + _uart_zynq_serial_init(priv->regs); - return (readl(®s->channel_sts) & ZYNQ_UART_SR_RXEMPTY) == 0; + return 0; } -static int uart_zynq_serial_getc(const int port) +static int zynq_serial_getc(struct udevice *dev) { - struct uart_zynq *regs = uart_zynq_ports[port]; + struct zynq_uart_priv *priv = dev_get_priv(dev); + struct uart_zynq *regs = priv->regs; + + if (readl(®s->channel_sts) & ZYNQ_UART_SR_RXEMPTY) + return -EAGAIN; - while (!uart_zynq_serial_tstc(port)) - WATCHDOG_RESET(); return readl(®s->tx_rx_fifo); } -/* Multi serial device functions */ -#define DECLARE_PSSERIAL_FUNCTIONS(port) \ - static int uart_zynq##port##_init(void) \ - { return uart_zynq_serial_init(port); } \ - static void uart_zynq##port##_setbrg(void) \ - { return uart_zynq_serial_setbrg(port); } \ - static int uart_zynq##port##_getc(void) \ - { return uart_zynq_serial_getc(port); } \ - static int uart_zynq##port##_tstc(void) \ - { return uart_zynq_serial_tstc(port); } \ - static void uart_zynq##port##_putc(const char c) \ - { uart_zynq_serial_putc(c, port); } \ - static void uart_zynq##port##_puts(const char *s) \ - { uart_zynq_serial_puts(s, port); } - -/* Serial device descriptor */ -#define INIT_PSSERIAL_STRUCTURE(port, __name) { \ - .name = __name, \ - .start = uart_zynq##port##_init, \ - .stop = NULL, \ - .setbrg = uart_zynq##port##_setbrg, \ - .getc = uart_zynq##port##_getc, \ - .tstc = uart_zynq##port##_tstc, \ - .putc = uart_zynq##port##_putc, \ - .puts = uart_zynq##port##_puts, \ -} +static int zynq_serial_putc(struct udevice *dev, const char ch) +{ + struct zynq_uart_priv *priv = dev_get_priv(dev); -DECLARE_PSSERIAL_FUNCTIONS(0); -static struct serial_device uart_zynq_serial0_device = - INIT_PSSERIAL_STRUCTURE(0, "ttyPS0"); -DECLARE_PSSERIAL_FUNCTIONS(1); -static struct serial_device uart_zynq_serial1_device = - INIT_PSSERIAL_STRUCTURE(1, "ttyPS1"); + return _uart_zynq_serial_putc(priv->regs, ch); +} -#if CONFIG_IS_ENABLED(OF_CONTROL) -__weak struct serial_device *default_serial_console(void) +static int zynq_serial_pending(struct udevice *dev, bool input) { - const void *blob = gd->fdt_blob; - int node; - unsigned int base_addr; + struct zynq_uart_priv *priv = dev_get_priv(dev); + struct uart_zynq *regs = priv->regs; - node = fdt_path_offset(blob, "serial0"); - if (node < 0) - return NULL; + if (input) + return !(readl(®s->channel_sts) & ZYNQ_UART_SR_RXEMPTY); + else + return !!(readl(®s->channel_sts) & ZYNQ_UART_SR_TXACTIVE); +} - base_addr = fdtdec_get_addr(blob, node, "reg"); - if (base_addr == FDT_ADDR_T_NONE) - return NULL; +static int zynq_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct zynq_uart_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; - if (base_addr == ZYNQ_SERIAL_BASEADDR0) - return &uart_zynq_serial0_device; + addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; - if (base_addr == ZYNQ_SERIAL_BASEADDR1) - return &uart_zynq_serial1_device; + priv->regs = (struct uart_zynq *)addr; - return NULL; + return 0; } -#else -__weak struct serial_device *default_serial_console(void) + +static const struct dm_serial_ops zynq_serial_ops = { + .putc = zynq_serial_putc, + .pending = zynq_serial_pending, + .getc = zynq_serial_getc, + .setbrg = zynq_serial_setbrg, +}; + +static const struct udevice_id zynq_serial_ids[] = { + { .compatible = "xlnx,xuartps" }, + { .compatible = "cdns,uart-r1p8" }, + { } +}; + +U_BOOT_DRIVER(serial_s5p) = { + .name = "serial_zynq", + .id = UCLASS_SERIAL, + .of_match = zynq_serial_ids, + .ofdata_to_platdata = zynq_serial_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct zynq_uart_priv), + .probe = zynq_serial_probe, + .ops = &zynq_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +#ifdef CONFIG_DEBUG_UART_ZYNQ + +#include <debug_uart.h> + +void _debug_uart_init(void) { -#if defined(CONFIG_ZYNQ_SERIAL_UART0) - if (uart_zynq_ports[0]) - return &uart_zynq_serial0_device; -#endif -#if defined(CONFIG_ZYNQ_SERIAL_UART1) - if (uart_zynq_ports[1]) - return &uart_zynq_serial1_device; -#endif - return NULL; + struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE; + + _uart_zynq_serial_init(regs); + _uart_zynq_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); } -#endif -void zynq_serial_initialize(void) +static inline void _debug_uart_putc(int ch) { - serial_register(&uart_zynq_serial0_device); - serial_register(&uart_zynq_serial1_device); + struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE; + + while (_uart_zynq_serial_putc(regs, ch) == -EAGAIN) + WATCHDOG_RESET(); } + +DEBUG_UART_FUNCS + +#endif diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 458952f..328bc62 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -71,6 +71,7 @@ extern char __bss_start[]; extern char __bss_end[]; extern char __image_copy_start[]; extern char __image_copy_end[]; +extern char _image_binary_end[]; extern char __rel_dyn_start[]; extern char __rel_dyn_end[]; diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 32ee0fc..36c1100 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -55,9 +55,7 @@ # define CONFIG_ARM_DCC # define CONFIG_CPU_ARMV8 #else -# if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) -# define CONFIG_ZYNQ_SERIAL -# endif +# define CONFIG_ZYNQ_SERIAL #endif #define CONFIG_CONS_INDEX 0 diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index e476eb1..ed6023a 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -18,7 +18,6 @@ #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 -#define CONFIG_ZYNQ_SERIAL_UART0 #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 #define CONFIG_SYS_I2C_ZYNQ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index ca5ef04..f98101f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -179,7 +179,10 @@ # define CONFIG_CMD_FS_GENERIC #endif +#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) #define CONFIG_SYS_I2C_ZYNQ +#endif + /* I2C */ #if defined(CONFIG_SYS_I2C_ZYNQ) # define CONFIG_CMD_I2C @@ -329,7 +332,11 @@ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#ifdef CONFIG_OF_CONTROL +# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" +#else +# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#endif #endif /* Disable dcache for SPL just for sure */ diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h index 549a664..b5ffafb 100644 --- a/include/configs/zynq_microzed.h +++ b/include/configs/zynq_microzed.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 diff --git a/include/configs/zynq_picozed.h b/include/configs/zynq_picozed.h index d116e05..ffc73bd 100644 --- a/include/configs/zynq_picozed.h +++ b/include/configs/zynq_picozed.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index b659054..468a6bc 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) -#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 7a1b872..63224dd 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -15,26 +15,20 @@ #define CONFIG_SYS_NO_FLASH #if defined(CONFIG_ZC770_XM010) -# define CONFIG_ZYNQ_SERIAL_UART1 # define CONFIG_ZYNQ_GEM0 # define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI #elif defined(CONFIG_ZC770_XM011) -# define CONFIG_ZYNQ_SERIAL_UART1 #elif defined(CONFIG_ZC770_XM012) -# define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH #elif defined(CONFIG_ZC770_XM013) -# define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 # define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 -#else -# define CONFIG_ZYNQ_SERIAL_UART0 #endif #include <configs/zynq-common.h> diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 946de95..6ec6117 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h index 191f2a5..e2270cd 100644 --- a/include/configs/zynq_zybo.h +++ b/include/configs/zynq_zybo.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 diff --git a/include/fdtdec.h b/include/fdtdec.h index 2de6dda..9fcc7a1 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -628,7 +628,16 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int node, int *seqp); /** - * Get the offset of the given chosen node + * Get a property from the /chosen node + * + * @param blob Device tree blob (if NULL, then NULL is returned) + * @param name Property name to look up + * @return Value of property, or NULL if it does not exist + */ +const char *fdtdec_get_chosen_prop(const void *blob, const char *name); + +/** + * Get the offset of the given /chosen node * * This looks up a property in /chosen containing the path to another node, * then finds the offset of that node. diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 9db033a..c1b5177 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -601,16 +601,21 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, return -ENOENT; } -int fdtdec_get_chosen_node(const void *blob, const char *name) +const char *fdtdec_get_chosen_prop(const void *blob, const char *name) { - const char *prop; int chosen_node; - int len; if (!blob) - return -FDT_ERR_NOTFOUND; + return NULL; chosen_node = fdt_path_offset(blob, "/chosen"); - prop = fdt_getprop(blob, chosen_node, name, &len); + return fdt_getprop(blob, chosen_node, name, NULL); +} + +int fdtdec_get_chosen_node(const void *blob, const char *name) +{ + const char *prop; + + prop = fdtdec_get_chosen_prop(blob, name); if (!prop) return -FDT_ERR_NOTFOUND; return fdt_path_offset(blob, prop); @@ -1217,8 +1222,11 @@ int fdtdec_setup(void) gd->fdt_blob = __dtb_dt_begin; # elif defined CONFIG_OF_SEPARATE # ifdef CONFIG_SPL_BUILD - /* FDT is at end of BSS */ - gd->fdt_blob = (ulong *)&__bss_end; + /* FDT is at end of BSS unless it is in a different memory region */ + if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) + gd->fdt_blob = (ulong *)&_image_binary_end; + else + gd->fdt_blob = (ulong *)&__bss_end; # else /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c index 9fea775..747d8bb 100644 --- a/lib/libfdt/fdt_region.c +++ b/lib/libfdt/fdt_region.c @@ -101,7 +101,7 @@ int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count, continue; next = fdt_next_property_offset(fdt, offset); if (next < 0) - next = node_end - sizeof(fdt32_t); + next = node_end; if (!did_alias_header) { fdt_add_region(info, base + node, 12); diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 2df93c8..dd235b9 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -129,7 +129,9 @@ boot.bin: $(obj)/u-boot-spl.bin ALL-y += $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).cfg +ifdef CONFIG_SPL_OF_CONTROL ALL-$(CONFIG_OF_SEPARATE) += $(obj)/$(SPL_BIN)-pad.bin $(obj)/$(SPL_BIN)-dtb.bin +endif ifdef CONFIG_SAMSUNG ALL-y += $(obj)/$(BOARD)-spl.bin diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c index caaf600..67aa41a 100644 --- a/tools/fdtgrep.c +++ b/tools/fdtgrep.c @@ -667,28 +667,16 @@ static int fdtgrep_find_regions(const void *fdt, new_count = fdt_add_alias_regions(fdt, region, count, max_regions, &state); - if (new_count > max_regions) { - region = malloc(new_count * sizeof(struct fdt_region)); - if (!region) { - fprintf(stderr, - "Out of memory for %d regions\n", - count); - return -1; - } - memcpy(region, state.region, - count * sizeof(struct fdt_region)); - free(state.region); - new_count = fdt_add_alias_regions(fdt, region, count, - max_regions, &state); + if (new_count <= max_regions) { + /* + * The alias regions will now be at the end of the list. + * Sort the regions by offset to get things into the + * right order + */ + count = new_count; + qsort(region, count, sizeof(struct fdt_region), + h_cmp_region); } - - /* - * The alias regions will now be at the end of the list. Sort - * the regions by offset to get things into the right order - */ - qsort(region, new_count, sizeof(struct fdt_region), - h_cmp_region); - count = new_count; } if (ret != -FDT_ERR_NOTFOUND) @@ -805,7 +793,7 @@ static int do_fdtgrep(struct display_info *disp, const char *filename) * The first pass will count the regions, but if it is too many, * we do another pass to actually record them. */ - for (i = 0; i < 2; i++) { + for (i = 0; i < 3; i++) { region = malloc(count * sizeof(struct fdt_region)); if (!region) { fprintf(stderr, "Out of memory for %d regions\n", |