summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts87
-rw-r--r--arch/arm/dts/sun8i-h3.dtsi4
-rw-r--r--board/sunxi/MAINTAINERS1
-rw-r--r--configs/orangepi_pc_defconfig2
-rw-r--r--configs/orangepi_pc_plus_defconfig17
-rw-r--r--configs/pine64_plus_defconfig1
-rw-r--r--drivers/net/sun8i_emac.c13
8 files changed, 111 insertions, 15 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c97e3f6..7e21083 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -248,6 +248,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
sun8i-h3-orangepi-pc.dtb \
+ sun8i-h3-orangepi-pc-plus.dtb \
sun8i-h3-orangepi-plus.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts
new file mode 100644
index 0000000..9a8cdd4
--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* The Orange Pi PC Plus is an extended version of the regular PC */
+#include "sun8i-h3-orangepi-pc.dts"
+
+/ {
+ model = "Xunlong Orange Pi PC / PC Plus";
+
+ aliases {
+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet1 = &rtl8189ftv;
+ };
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ /*
+ * Explicitly define the sdio device, so that we can add an ethernet
+ * alias for it (which e.g. makes u-boot set a mac-address).
+ */
+ rtl8189ftv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ /* eMMC is missing pull-ups */
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+};
diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
index 72c0920..84e52b9 100644
--- a/arch/arm/dts/sun8i-h3.dtsi
+++ b/arch/arm/dts/sun8i-h3.dtsi
@@ -48,6 +48,10 @@
/ {
interrupt-parent = <&gic>;
+ aliases {
+ ethernet0 = <&emac>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 0dc84f6..de719cd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -59,6 +59,7 @@ F: configs/orangepi_2_defconfig
F: configs/orangepi_lite_defconfig
F: configs/orangepi_one_defconfig
F: configs/orangepi_pc_defconfig
+F: configs/orangepi_pc_plus_defconfig
F: configs/orangepi_plus_defconfig
F: configs/polaroid_mid2407pxe03_defconfig
F: configs/polaroid_mid2809pxe04_defconfig
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index 43ec927..366fa08 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -5,7 +5,6 @@ CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_MMC0_CD_PIN="PF6"
-CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_VIDEO is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -15,4 +14,3 @@ CONFIG_SPL=y
# CONFIG_CMD_FPGA is not set
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig
new file mode 100644
index 0000000..c78aec3
--- /dev/null
+++ b/configs/orangepi_pc_plus_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_VIDEO is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SY8106A_POWER=y
+CONFIG_USB_EHCI_HCD=y
diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
index 5c97de1..0bf79bf 100644
--- a/configs/pine64_plus_defconfig
+++ b/configs/pine64_plus_defconfig
@@ -10,4 +10,3 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus"
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
-CONFIG_SUN8I_EMAC=y
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 4bed50d..7c088c3 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -22,10 +22,6 @@
#include <miiphy.h>
#include <net.h>
-#define SCTL_EMAC_TX_CLK_SRC_MII BIT(0)
-#define SCTL_EMAC_EPIT_MII BIT(2)
-#define SCTL_EMAC_CLK_SEL BIT(18) /* 25 Mhz */
-
#define MDIO_CMD_MII_BUSY BIT(0)
#define MDIO_CMD_MII_WRITE BIT(1)
@@ -589,9 +585,6 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
/* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
- /* Set Tx clock source as MII with rate 25 MZ */
- setbits_le32(priv->sysctl_reg, SCTL_EMAC_TX_CLK_SRC_MII |
- SCTL_EMAC_EPIT_MII | SCTL_EMAC_CLK_SEL);
/* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
}
@@ -599,9 +592,6 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
- /* Set EMAC clock */
- setbits_le32(&ccm->axi_gate, (BIT(1) | BIT(0)));
-
/* De-assert EMAC */
setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC));
}
@@ -696,12 +686,11 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
priv->mac_reg = (void *)pdata->iobase;
sun8i_emac_board_setup(priv);
+ sun8i_emac_set_syscon(priv);
sun8i_mdio_init(dev->name, priv);
priv->bus = miiphy_get_dev_by_name(dev->name);
- sun8i_emac_set_syscon(priv);
-
return sun8i_phy_init(priv, dev);
}
generated by cgit v1.1 at 2024-11-28 10:54:49 +0000