diff options
| -rw-r--r-- | arch/arm/cpu/armv7/omap4/board.c | 53 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap4/omap4_mux_data.h | 76 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap4/sys_proto.h | 4 | ||||
| -rw-r--r-- | board/ti/panda/panda.c | 25 | ||||
| -rw-r--r-- | board/ti/panda/panda_mux_data.h (renamed from board/ti/sdp4430/sdp.h) | 76 | ||||
| -rw-r--r-- | board/ti/sdp4430/sdp.c | 25 | ||||
| -rw-r--r-- | board/ti/sdp4430/sdp4430_mux_data.h (renamed from board/ti/panda/panda.h) | 128 |
7 files changed, 209 insertions, 178 deletions
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index de4cc2a..3fd6f84 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -31,17 +31,65 @@ #include <asm/arch/cpu.h> #include <asm/arch/sys_proto.h> #include <asm/sizes.h> +#include "omap4_mux_data.h" DECLARE_GLOBAL_DATA_PTR; +void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *) array; + + for (i = 0; i < size; i++, pad++) + writew(pad->val, base + pad->offset); +} + +static void set_muxconf_regs_essential(void) +{ + do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential, + sizeof(core_padconf_array_essential) / + sizeof(struct pad_conf_entry)); + + do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential, + sizeof(wkup_padconf_array_essential) / + sizeof(struct pad_conf_entry)); +} + +static void set_mux_conf_regs(void) +{ + switch (omap4_hw_init_context()) { + case OMAP_INIT_CONTEXT_SPL: + set_muxconf_regs_essential(); + break; + case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL: + set_muxconf_regs_non_essential(); + break; + case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR: + case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH: + set_muxconf_regs_essential(); + set_muxconf_regs_non_essential(); + break; + } +} + /* * Routine: s_init - * Description: Does early system init of muxing and clocks. - * - Called path is with SRAM stack. + * Description: Does early system init of watchdog, muxing, andclocks + * Watchdog disable is done always. For the rest what gets done + * depends on the boot mode in which this function is executed + * 1. s_init of SPL running from SRAM + * 2. s_init of U-Boot running from FLASH + * 3. s_init of U-Boot loaded to SDRAM by SPL + * 4. s_init of U-Boot loaded to SDRAM by ROM code using the + * Configuration Header feature + * Please have a look at the respective functions to see what gets + * done in each of these cases + * This function is called with SRAM stack. */ void s_init(void) { watchdog_init(); + set_mux_conf_regs(); } /* @@ -124,7 +172,6 @@ int checkboard(void) */ int arch_cpu_init(void) { - set_muxconf_regs(); return 0; } diff --git a/arch/arm/cpu/armv7/omap4/omap4_mux_data.h b/arch/arm/cpu/armv7/omap4/omap4_mux_data.h new file mode 100644 index 0000000..00c52f8 --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/omap4_mux_data.h @@ -0,0 +1,76 @@ + /* + * (C) Copyright 2010 + * Texas Instruments Incorporated, <www.ti.com> + * + * Balaji Krishnamoorthy <balajitk@ti.com> + * Aneesh V <aneesh@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _OMAP4_MUX_DATA_H_ +#define _OMAP4_MUX_DATA_H_ + +#include <asm/arch/mux_omap4.h> + +const struct pad_conf_entry core_padconf_array_essential[] = { + +{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ +{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ +{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ +{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ +{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ +{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ +{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ +{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ +{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ +{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ +{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ +{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ +{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ +{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ +{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ +{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ +{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ +{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ +{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ +{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ +{I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ +{I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ +{I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ +{I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ +{I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ +{I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ +{I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ +{I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ +{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ +{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ +{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ +{UART3_TX_IRTX, (M0)} /* uart3_tx */ + +}; + +const struct pad_conf_entry wkup_padconf_array_essential[] = { + +{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ +{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ +{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ + +}; + +#endif /* _OMAP4_MUX_DATA_H_ */ diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index 6b596b4..3624378 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -24,6 +24,7 @@ #include <asm/arch/omap4.h> #include <asm/io.h> #include <asm/omap_common.h> +#include <asm/arch/mux_omap4.h> struct omap_sysinfo { char *board_string; @@ -33,7 +34,8 @@ extern const struct omap_sysinfo sysinfo; void gpmc_init(void); void watchdog_init(void); u32 get_device_type(void); -void set_muxconf_regs(void); +void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); +void set_muxconf_regs_non_essential(void); void sr32(void *, u32, u32, u32); u32 wait_on_value(u32, u32, void *, u32); void sdelay(unsigned long); diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 78e1910..9afed80 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -25,7 +25,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> -#include "panda.h" +#include "panda_mux_data.h" DECLARE_GLOBAL_DATA_PTR; @@ -65,27 +65,14 @@ int misc_init_r(void) return 0; } -void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +void set_muxconf_regs_non_essential(void) { - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *) array; - - for (i = 0; i < size; i++, pad++) - writew(pad->val, base + pad->offset); -} - -/** - * @brief set_muxconf_regs Setting up the configuration Mux registers - * specific to the board. - */ -void set_muxconf_regs(void) -{ - do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array, - sizeof(core_padconf_array) / + do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, + sizeof(core_padconf_array_non_essential) / sizeof(struct pad_conf_entry)); - do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array, - sizeof(wkup_padconf_array) / + do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, + sizeof(wkup_padconf_array_non_essential) / sizeof(struct pad_conf_entry)); } diff --git a/board/ti/sdp4430/sdp.h b/board/ti/panda/panda_mux_data.h index bf41067..16cc0ad 100644 --- a/board/ti/sdp4430/sdp.h +++ b/board/ti/panda/panda_mux_data.h @@ -23,22 +23,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ +#ifndef _SDP4430_MUX_DATA_H +#define _SDP4430_MUX_DATA_H -#ifndef _SDP_H_ -#define _SDP_H_ - -#include <asm/io.h> #include <asm/arch/mux_omap4.h> -const struct pad_conf_entry core_padconf_array[] = { - {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ - {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ - {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ - {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ - {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ - {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ - {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ - {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ +const struct pad_conf_entry core_padconf_array_non_essential[] = { {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ @@ -64,8 +54,6 @@ const struct pad_conf_entry core_padconf_array[] = { {GPMC_NWP, (M3)}, /* gpio_54 */ {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ - {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ - {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ @@ -96,14 +84,14 @@ const struct pad_conf_entry core_padconf_array[] = { {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ - {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ - {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ - {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ - {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ - {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ - {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ - {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ - {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ + {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cawake */ + {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cadata */ + {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caflag */ + {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /* hsi1_acready */ + {USBB1_ULPITLL_DAT0, (OFF_EN | M1)}, /* hsi1_acwake */ + {USBB1_ULPITLL_DAT1, (OFF_EN | M1)}, /* hsi1_acdata */ + {USBB1_ULPITLL_DAT2, (OFF_EN | M1)}, /* hsi1_acflag */ + {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caready */ {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ @@ -112,22 +100,12 @@ const struct pad_conf_entry core_padconf_array[] = { {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ - {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ - {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ - {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ - {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ - {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ - {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ - {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ - {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ - {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ - {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ - {ABE_MCBSP1_CLKX, (IEN | M1)}, /* abe_slimbus1_clock */ - {ABE_MCBSP1_DR, (IEN | M1)}, /* abe_slimbus1_data */ + {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_clkx */ + {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dr */ {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ @@ -144,14 +122,6 @@ const struct pad_conf_entry core_padconf_array[] = { {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ {UART2_TX, (M0)}, /* uart2_tx */ {HDQ_SIO, (M3)}, /* gpio_127 */ - {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ - {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ - {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ - {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ - {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ - {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ - {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ - {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ @@ -159,10 +129,6 @@ const struct pad_conf_entry core_padconf_array[] = { {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ - {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ - {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ - {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ - {UART3_TX_IRTX, (M0)}, /* uart3_tx */ {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ @@ -175,7 +141,7 @@ const struct pad_conf_entry core_padconf_array[] = { {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ {UART4_RX, (IEN | M0)}, /* uart4_rx */ {UART4_TX, (M0)}, /* uart4_tx */ - {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */ + {USBB2_ULPITLL_CLK, (PTD | IEN | M3)}, /* gpio_157 */ {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ @@ -207,11 +173,11 @@ const struct pad_conf_entry core_padconf_array[] = { {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ - {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ + {SYS_NIRQ2, (M7)}, /* sys_nirq2 */ {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ {SYS_BOOT1, (M3)}, /* gpio_185 */ {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ - {SYS_BOOT3, (M3)}, /* gpio_187 */ + {SYS_BOOT3, (PTD | IEN | M3)}, /* gpio_187 */ {SYS_BOOT4, (M3)}, /* gpio_188 */ {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ @@ -236,14 +202,12 @@ const struct pad_conf_entry core_padconf_array[] = { {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ }; -const struct pad_conf_entry wkup_padconf_array[] = { +const struct pad_conf_entry wkup_padconf_array_non_essential[] = { {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ {PAD1_SIM_CLK, (M0)}, /* sim_clk */ {PAD0_SIM_RESET, (M0)}, /* sim_reset */ {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ - {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ - {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ {PAD1_FREF_XTAL_IN, (M0)}, /* # */ {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ @@ -252,13 +216,15 @@ const struct pad_conf_entry wkup_padconf_array[] = { {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */ {PAD0_FREF_CLK4_OUT, (M0)}, /* # */ - {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ + {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 */ + {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 */ + {PAD0_FREF_CLK4_OUT, (M3)}, /* gpio_wk8 */ }; -#endif +#endif /* _SDP4430_MUX_DATA_H */ diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index b13c4c5..a5ea682 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -27,7 +27,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> -#include "sdp.h" +#include "sdp4430_mux_data.h" DECLARE_GLOBAL_DATA_PTR; @@ -70,27 +70,14 @@ int misc_init_r(void) return 0; } -void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +void set_muxconf_regs_non_essential(void) { - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *) array; - - for (i = 0; i < size; i++, pad++) - writew(pad->val, base + pad->offset); -} - -/** - * @brief set_muxconf_regs Setting up the configuration Mux registers - * specific to the board. - */ -void set_muxconf_regs(void) -{ - do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array, - sizeof(core_padconf_array) / + do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, + sizeof(core_padconf_array_non_essential) / sizeof(struct pad_conf_entry)); - do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array, - sizeof(wkup_padconf_array) / + do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, + sizeof(wkup_padconf_array_non_essential) / sizeof(struct pad_conf_entry)); } diff --git a/board/ti/panda/panda.h b/board/ti/sdp4430/sdp4430_mux_data.h index e3d090e..16cc0ad 100644 --- a/board/ti/panda/panda.h +++ b/board/ti/sdp4430/sdp4430_mux_data.h @@ -23,22 +23,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ +#ifndef _SDP4430_MUX_DATA_H +#define _SDP4430_MUX_DATA_H -#ifndef _PANDA_H_ -#define _PANDA_H_ - -#include <asm/io.h> #include <asm/arch/mux_omap4.h> -const struct pad_conf_entry core_padconf_array[] = { - {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ - {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ - {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ - {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ - {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ - {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ - {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ - {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ +const struct pad_conf_entry core_padconf_array_non_essential[] = { {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ @@ -53,7 +43,7 @@ const struct pad_conf_entry core_padconf_array[] = { {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */ {GPMC_A20, (IEN | M3)}, /* gpio_44 */ {GPMC_A21, (M3)}, /* gpio_45 */ - {GPMC_A22, (M3)}, /* gpio_46 */ + {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */ {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */ {GPMC_A24, (PTD | M3)}, /* gpio_48 */ {GPMC_A25, (PTD | M3)}, /* gpio_49 */ @@ -64,14 +54,12 @@ const struct pad_conf_entry core_padconf_array[] = { {GPMC_NWP, (M3)}, /* gpio_54 */ {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ - {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ - {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ - {GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */ + {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */ {C2C_DATA11, (PTD | M3)}, /* gpio_100 */ - {C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101 */ + {C2C_DATA12, (M1)}, /* dsi1_te0 */ {C2C_DATA13, (PTD | M3)}, /* gpio_102 */ {C2C_DATA14, (M1)}, /* dsi2_te0 */ {C2C_DATA15, (PTD | M3)}, /* gpio_104 */ @@ -96,14 +84,14 @@ const struct pad_conf_entry core_padconf_array[] = { {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ - {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ - {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ - {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ - {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ - {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ - {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ - {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ - {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ + {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cawake */ + {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cadata */ + {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caflag */ + {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /* hsi1_acready */ + {USBB1_ULPITLL_DAT0, (OFF_EN | M1)}, /* hsi1_acwake */ + {USBB1_ULPITLL_DAT1, (OFF_EN | M1)}, /* hsi1_acdata */ + {USBB1_ULPITLL_DAT2, (OFF_EN | M1)}, /* hsi1_acflag */ + {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caready */ {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ @@ -112,22 +100,12 @@ const struct pad_conf_entry core_padconf_array[] = { {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ - {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ - {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ - {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ - {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ - {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ - {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ - {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ - {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ - {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ - {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ - {ABE_MCBSP1_CLKX, (IEN | M1)}, /* abe_slimbus1_clock */ - {ABE_MCBSP1_DR, (IEN | M1)}, /* abe_slimbus1_data */ + {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_clkx */ + {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dr */ {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ @@ -144,14 +122,6 @@ const struct pad_conf_entry core_padconf_array[] = { {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ {UART2_TX, (M0)}, /* uart2_tx */ {HDQ_SIO, (M3)}, /* gpio_127 */ - {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ - {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ - {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ - {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ - {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ - {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ - {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ - {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ @@ -159,10 +129,6 @@ const struct pad_conf_entry core_padconf_array[] = { {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ - {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ - {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ - {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ - {UART3_TX_IRTX, (M0)}, /* uart3_tx */ {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ @@ -175,7 +141,7 @@ const struct pad_conf_entry core_padconf_array[] = { {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ {UART4_RX, (IEN | M0)}, /* uart4_rx */ {UART4_TX, (M0)}, /* uart4_tx */ - {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */ + {USBB2_ULPITLL_CLK, (PTD | IEN | M3)}, /* gpio_157 */ {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ @@ -189,12 +155,12 @@ const struct pad_conf_entry core_padconf_array[] = { {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */ {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */ - {UNIPRO_TX0, (PTD | IEN | M3)}, /* gpio_171 */ + {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ - {UNIPRO_TX2, (PTU | IEN | M3)}, /* gpio_0 */ - {UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */ + {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col4 */ + {UNIPRO_TY2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col5 */ {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ @@ -205,13 +171,13 @@ const struct pad_conf_entry core_padconf_array[] = { {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ - {FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */ + {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ - {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ + {SYS_NIRQ2, (M7)}, /* sys_nirq2 */ {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ {SYS_BOOT1, (M3)}, /* gpio_185 */ {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ - {SYS_BOOT3, (M3)}, /* gpio_187 */ + {SYS_BOOT3, (PTD | IEN | M3)}, /* gpio_187 */ {SYS_BOOT4, (M3)}, /* gpio_188 */ {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ @@ -236,29 +202,29 @@ const struct pad_conf_entry core_padconf_array[] = { {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ }; -const struct pad_conf_entry wkup_padconf_array[] = { - {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ - {PAD1_SIM_CLK, (M0)}, /* sim_clk */ - {PAD0_SIM_RESET, (M0)}, /* sim_reset */ - {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ - {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ - {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ - {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ - {PAD1_FREF_XTAL_IN, (M0)}, /* # */ - {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ - {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ - {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ - {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 */ - {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ - {PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* led status_1 */ - {PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* led status_2 */ - {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ - {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ - {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ - {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ - {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ - {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ - {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ +const struct pad_conf_entry wkup_padconf_array_non_essential[] = { + {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ + {PAD1_SIM_CLK, (M0)}, /* sim_clk */ + {PAD0_SIM_RESET, (M0)}, /* sim_reset */ + {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ + {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ + {PAD1_FREF_XTAL_IN, (M0)}, /* # */ + {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ + {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ + {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ + {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ + {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK4_OUT, (M0)}, /* # */ + {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ + {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ + {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ + {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ + {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ + {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ + {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 */ + {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 */ + {PAD0_FREF_CLK4_OUT, (M3)}, /* gpio_wk8 */ }; -#endif +#endif /* _SDP4430_MUX_DATA_H */ |