diff options
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 71d3fc4..29e1043 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -489,6 +489,19 @@ int arch_cpu_init(void) } #endif +#ifdef CONFIG_MX6ULL + /* + * GPBIT[1:0] is suggested to set to 2'b11: + * 2'b00 : always PUP100K + * 2'b01 : PUP100K when PMIC_ON_REQ or SOC_NOT_FAIL + * 2'b10 : always disable PUP100K + * 2'b11 : PDN100K when SOC_FAIL, PUP100K when SOC_NOT_FAIL + * register offset is different from i.MX6UL, since + * i.MX6UL is fixed by ECO. + */ + writel(readl(SNVS_LP_BASE_ADDR) | 0x3, SNVS_LP_BASE_ADDR); +#endif + /* Set perclk to source from OSC 24MHz */ #if defined(CONFIG_MX6SL) set_preclk_from_osc(); |