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-rw-r--r--arch/x86/cpu/coreboot/coreboot.c5
-rw-r--r--include/configs/chromebook_link.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 6d06d5a..4cdd0d4 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -99,3 +99,8 @@ void panic_puts(const char *str)
while (*str)
NS16550_putc(port, *str++);
}
+
+int misc_init_r(void)
+{
+ return 0;
+}
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 7e6d239..6e8b9ef 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -20,6 +20,7 @@
#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_X86_MRC_ADDR 0xfffa0000