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-rw-r--r--board/freescale/mx6qsabreauto/mx6qsabreauto.c2
-rw-r--r--board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg154
-rw-r--r--board/freescale/mx6sabresd/mx6sabresd.c2
-rw-r--r--boards.cfg6
-rw-r--r--include/configs/mx6qsabreauto.h4
-rw-r--r--include/configs/mx6sabresd.h8
6 files changed, 161 insertions, 15 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 5e277aa..43e90b0 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -59,7 +59,7 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+ gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
return 0;
}
diff --git a/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg b/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg
new file mode 100644
index 0000000..a2b7e48
--- /dev/null
+++ b/board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Jason Liu <r64343@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not write to the Free Software
+ * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
+ * MA 02110-1301 USA
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+#define __ASSEMBLY__
+#include <config.h>
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of spi, sd, sata
+ * the board has no nand and eimnor
+ * spinor: flash_offset: 0x0400
+ * sata: flash_offset: 0x0400
+ * sd/mmc: flash_offset: 0x0400
+ */
+
+/* the same flash_offset as sd */
+BOOT_FROM sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type Address Value
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+DATA 4, 0x020e0774, 0x000C0000
+DATA 4, 0x020e0754, 0x00000000
+DATA 4, 0x020e04ac, 0x00000030
+DATA 4, 0x020e04b0, 0x00000030
+DATA 4, 0x020e0464, 0x00000030
+DATA 4, 0x020e0490, 0x00000030
+DATA 4, 0x020e074c, 0x00000030
+DATA 4, 0x020e0494, 0x00000030
+DATA 4, 0x020e04a0, 0x00000000
+DATA 4, 0x020e04b4, 0x00000030
+DATA 4, 0x020e04b8, 0x00000030
+DATA 4, 0x020e076c, 0x00000030
+DATA 4, 0x020e0750, 0x00020000
+DATA 4, 0x020e04bc, 0x00000030
+DATA 4, 0x020e04c0, 0x00000030
+DATA 4, 0x020e04c4, 0x00000030
+DATA 4, 0x020e04c8, 0x00000030
+DATA 4, 0x020e04cc, 0x00000030
+DATA 4, 0x020e04d0, 0x00000030
+DATA 4, 0x020e04d4, 0x00000030
+DATA 4, 0x020e04d8, 0x00000030
+DATA 4, 0x020e0760, 0x00020000
+DATA 4, 0x020e0764, 0x00000030
+DATA 4, 0x020e0770, 0x00000030
+DATA 4, 0x020e0778, 0x00000030
+DATA 4, 0x020e077c, 0x00000030
+DATA 4, 0x020e0780, 0x00000030
+DATA 4, 0x020e0784, 0x00000030
+DATA 4, 0x020e078c, 0x00000030
+DATA 4, 0x020e0748, 0x00000030
+DATA 4, 0x020e0470, 0x00000030
+DATA 4, 0x020e0474, 0x00000030
+DATA 4, 0x020e0478, 0x00000030
+DATA 4, 0x020e047c, 0x00000030
+DATA 4, 0x020e0480, 0x00000030
+DATA 4, 0x020e0484, 0x00000030
+DATA 4, 0x020e0488, 0x00000030
+DATA 4, 0x020e048c, 0x00000030
+DATA 4, 0x021b0800, 0xa1390003
+DATA 4, 0x021b080c, 0x001F001F
+DATA 4, 0x021b0810, 0x001F001F
+DATA 4, 0x021b480c, 0x001F001F
+DATA 4, 0x021b4810, 0x001F001F
+DATA 4, 0x021b083c, 0x4220021F
+DATA 4, 0x021b0840, 0x0207017E
+DATA 4, 0x021b483c, 0x4201020C
+DATA 4, 0x021b4840, 0x01660172
+DATA 4, 0x021b0848, 0x4A4D4E4D
+DATA 4, 0x021b4848, 0x4A4F5049
+DATA 4, 0x021b0850, 0x3F3C3D31
+DATA 4, 0x021b4850, 0x3238372B
+DATA 4, 0x021b081c, 0x33333333
+DATA 4, 0x021b0820, 0x33333333
+DATA 4, 0x021b0824, 0x33333333
+DATA 4, 0x021b0828, 0x33333333
+DATA 4, 0x021b481c, 0x33333333
+DATA 4, 0x021b4820, 0x33333333
+DATA 4, 0x021b4824, 0x33333333
+DATA 4, 0x021b4828, 0x33333333
+DATA 4, 0x021b08b8, 0x00000800
+DATA 4, 0x021b48b8, 0x00000800
+DATA 4, 0x021b0004, 0x0002002D
+DATA 4, 0x021b0008, 0x00333030
+DATA 4, 0x021b000c, 0x3F435313
+DATA 4, 0x021b0010, 0xB66E8B63
+DATA 4, 0x021b0014, 0x01FF00DB
+DATA 4, 0x021b0018, 0x00001740
+DATA 4, 0x021b001c, 0x00008000
+DATA 4, 0x021b002c, 0x000026d2
+DATA 4, 0x021b0030, 0x00431023
+DATA 4, 0x021b0040, 0x00000027
+DATA 4, 0x021b0000, 0x831A0000
+DATA 4, 0x021b001c, 0x04008032
+DATA 4, 0x021b001c, 0x00008033
+DATA 4, 0x021b001c, 0x00048031
+DATA 4, 0x021b001c, 0x05208030
+DATA 4, 0x021b001c, 0x04008040
+DATA 4, 0x021b0020, 0x00005800
+DATA 4, 0x021b0818, 0x00011117
+DATA 4, 0x021b4818, 0x00011117
+DATA 4, 0x021b0004, 0x0002556D
+DATA 4, 0x021b0404, 0x00011006
+DATA 4, 0x021b001c, 0x00000000
+
+/* set the default clock gate to save power */
+DATA 4, 0x020c4068, 0x00C03F3F
+DATA 4, 0x020c406c, 0x0030FC03
+DATA 4, 0x020c4070, 0x0FFFC000
+DATA 4, 0x020c4074, 0x3FF00000
+DATA 4, 0x020c4078, 0x00FFF300
+DATA 4, 0x020c407c, 0x0F0000C3
+DATA 4, 0x020c4080, 0x000003FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4, 0x020e0010, 0xF00000CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4, 0x020e0018, 0x007F007F
+DATA 4, 0x020e001c, 0x007F007F
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 82e4084..2800b57 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -83,7 +83,7 @@ struct i2c_pads_info i2c_pad_info1 = {
int dram_init(void)
{
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+ gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
return 0;
}
diff --git a/boards.cfg b/boards.cfg
index c9c1168..9f68284 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -318,9 +318,9 @@ Active arm armv7 mx6 boundary nitrogen6x
Active arm armv7 mx6 boundary nitrogen6x nitrogen6s1g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024 Eric Nelson <eric.nelson@boundarydevices.com>
Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <lsartre@adeneo-embedded.com>
Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu <r64343@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6slevk mx6slevk_spinor mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SYS_BOOT_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 9693ed9..b141f4e 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreAuto board.
*
@@ -12,9 +12,7 @@
#define CONFIG_MACH_TYPE 3529
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_CONSOLE_DEV "ttymxc3"
-#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
-#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
/* USB Configs */
#define CONFIG_CMD_USB
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index e4abd1b..a94b756 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
@@ -16,12 +16,6 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
-#if defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
-#elif defined(CONFIG_MX6DL)
-#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
-#endif
-#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */