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-rw-r--r--arch/arm/cpu/armv7/omap3/lowlevel_init.S9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index ebf69fa..eacfef8 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -214,7 +214,7 @@ pll_div_val5:
ENTRY(lowlevel_init)
ldr sp, SRAM_STACK
- str ip, [sp] /* stash old link register */
+ str ip, [sp] /* stash ip register */
mov ip, lr /* save link reg across call */
#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
/*
@@ -224,12 +224,11 @@ ENTRY(lowlevel_init)
ldr r1, =SRAM_CLK_CODE
bl cpy_clk_code
#endif /* NAND Boot */
- bl s_init /* go setup pll, mux, memory */
- ldr ip, [sp] /* restore save ip */
mov lr, ip /* restore link reg */
+ ldr ip, [sp] /* restore save ip */
+ /* tail-call s_init to setup pll, mux, memory */
+ b s_init
- /* back to arch calling code */
- mov pc, lr
ENDPROC(lowlevel_init)
/* the literal pools origin */