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-rw-r--r--board/freescale/mx6qsabreauto/mx6qsabreauto.c105
-rw-r--r--boards.cfg12
-rw-r--r--include/configs/mx6qsabreauto.h26
3 files changed, 117 insertions, 26 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index f06599f..d916b84 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -39,6 +39,10 @@
#endif
#endif /*CONFIG_FASTBOOT*/
+#ifdef CONFIG_MAX7310_IOEXP
+#include <gpio_exp.h>
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
#define I2C_EXP_RST IMX_GPIO_NR(1, 15)
@@ -524,6 +528,37 @@ static void setup_gpmi_nand(void)
}
#endif
+#ifdef CONFIG_MAX7310_IOEXP
+void reset_max7310(void)
+{
+ gpio_direction_output(I2C_EXP_RST, 1);
+ imx_iomux_v3_setup_multiple_pads(port_exp,
+ ARRAY_SIZE(port_exp));
+}
+
+int setup_max7310(void)
+{
+#ifdef CONFIG_SYS_I2C_MXC
+ /* set steering config to i2c,
+ * note: this causes pin conflicts with eimnor and spinor
+ */
+ gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
+ imx_iomux_v3_setup_multiple_pads(i2c3_pads,
+ ARRAY_SIZE(i2c3_pads));
+
+ /*setup i2c info 2*/
+ setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
+
+ gpio_exp_setup_port(1, 2, 0x30);
+ gpio_exp_setup_port(2, 2, 0x32);
+ gpio_exp_setup_port(3, 2, 0x34);
+
+ return 0;
+#else
+ return -EPERM;
+#endif
+}
+#endif
int mx6_rgmii_rework(struct phy_device *phydev)
{
unsigned short val;
@@ -798,6 +833,11 @@ int board_early_init_f(void)
{
setup_iomux_uart();
+#ifdef CONFIG_MAX7310_IOEXP
+ /*Reset gpio expander at early stage*/
+ reset_max7310();
+#endif
+
#if defined(CONFIG_VIDEO_IPUV3)
setup_display();
#endif
@@ -825,17 +865,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
- /* I2C 3 setup - I2C 3 hw mux with EIM */
- /* I2C 3 Steer */
- gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
- imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-
- gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
- imx_iomux_v3_setup_multiple_pads(port_exp, ARRAY_SIZE(port_exp));
-#endif
-
return 0;
}
@@ -861,6 +890,10 @@ int board_late_init(void)
return -1;
#endif
+#ifdef CONFIG_MAX7310_IOEXP
+ setup_max7310();
+#endif
+
#ifdef CONFIG_ENV_IS_IN_MMC
board_late_mmc_env_init();
#endif
@@ -1022,3 +1055,53 @@ void udc_pins_setting(void)
}
#endif /*CONFIG_IMX_UDC*/
+
+#ifdef CONFIG_USB_EHCI_MX6
+#define USB_HOST1_PWR IOEXP_GPIO_NR(2, 7)
+#define USB_OTG_PWR IOEXP_GPIO_NR(3, 1)
+
+iomux_v3_cfg_t const usb_otg_pads[] = {
+ MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+int board_ehci_hcd_init(int port)
+{
+ switch (port) {
+ case 0:
+ imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
+ ARRAY_SIZE(usb_otg_pads));
+
+ /*set daisy chain for otg_pin_id on 6q. for 6dl, this bit is reserved*/
+ mxc_iomux_set_gpr_register(1, 13, 1, 0);
+ break;
+ case 1:
+ break;
+ default:
+ printf("MXC USB port %d not yet supported\n", port);
+ return 1;
+ }
+ return 0;
+}
+
+int board_ehci_power(int port, int on)
+{
+ switch (port) {
+ case 0:
+ if (on)
+ gpio_exp_direction_output(USB_OTG_PWR, 1);
+ else
+ gpio_exp_direction_output(USB_OTG_PWR, 0);
+ break;
+ case 1:
+ if (on)
+ gpio_exp_direction_output(USB_HOST1_PWR, 1);
+ else
+ gpio_exp_direction_output(USB_HOST1_PWR, 0);
+ break;
+ default:
+ printf("MXC USB port %d not yet supported\n", port);
+ return 1;
+ }
+ return 0;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index fd577ad..4a60e6b 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -319,12 +319,12 @@ Active arm armv7 mx6 boundary nitrogen6x
Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <lsartre@adeneo-embedded.com>
Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q Jason Liu <r64343@freescale.com>
Active arm armv7 mx6 freescale mx6qarm2 mx6dlarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL Jason Liu <r64343@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_NOSMP="nosmp" Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR,ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR,ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
-Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_NOSMP="nosmp",ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_NOSMP="nosmp" Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
+Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreautoandroid mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_NOSMP="nosmp",ANDROID_SUPPORT Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto_spinor mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto_spinor mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SPINOR Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 freescale mx6qsabreauto mx6solosabreauto_spinor mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_BOOT_SPINOR,SYS_NOSMP="nosmp" Fabio Estevam <fabio.estevam@freescale.com>
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 5492366..133e218 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -14,22 +14,30 @@
#define CONFIG_CONSOLE_DEV "ttymxc3"
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
+#define CONFIG_SYS_USE_NAND
+
+#include "mx6sabre_common.h"
+#include <asm/imx-common/gpio.h>
+
+/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */
+#if !defined(CONFIG_SYS_USE_SPINOR) && !defined(CONFIG_SYS_USE_EIMNOR)
/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-
-#define CONFIG_SYS_USE_NAND
-
-#include "mx6sabre_common.h"
-#include <asm/imx-common/gpio.h>
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
+
+/* MAX7310 configs*/
+#define CONFIG_MAX7310_IOEXP
+#define CONFIG_IOEXP_DEVICES_NUM 3
+#define CONFIG_IOEXP_DEV_PINS_NUM 8
+#endif
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_MMC_ENV_DEV 1
generated by cgit v1.1 at 2024-11-26 15:57:55 +0000