diff options
| -rw-r--r-- | board/LaCie/wireless_space/Makefile | 46 | ||||
| -rw-r--r-- | board/LaCie/wireless_space/kwbimage.cfg | 82 | ||||
| -rw-r--r-- | board/LaCie/wireless_space/wireless_space.c | 176 | ||||
| -rw-r--r-- | boards.cfg | 1 | ||||
| -rw-r--r-- | include/configs/wireless_space.h | 194 |
5 files changed, 499 insertions, 0 deletions
diff --git a/board/LaCie/wireless_space/Makefile b/board/LaCie/wireless_space/Makefile new file mode 100644 index 0000000..b43c3d3 --- /dev/null +++ b/board/LaCie/wireless_space/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o ../common/common.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/LaCie/wireless_space/kwbimage.cfg b/board/LaCie/wireless_space/kwbimage.cfg new file mode 100644 index 0000000..0daf5b5 --- /dev/null +++ b/board/LaCie/wireless_space/kwbimage.cfg @@ -0,0 +1,82 @@ +# +# Copyright (C) 2012 Albert ARIBAUD <albert.u.boot@aribaud.net> +# +# Based on netspace_v2 kwbimage.cfg: +# Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand # Boot from NAND flash +NAND_PAGE_SIZE 800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Values taken from image original LaCie U-Boot header dump! + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1B1B1B9B + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register + +DATA 0xFFD01404 0x37743000 # DDR Controller Control Low + +DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) + +DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) + +DATA 0xFFD01410 0x0000CCCC # DDR Address Control + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control + +DATA 0xFFD01418 0x00000000 # DDR Operation + +DATA 0xFFD0141C 0x00000662 # DDR Mode + +DATA 0xFFD01420 0x00000004 # DDR Extended Mode + +DATA 0xFFD01424 0x0000F07F # DDR Controller Control High + +DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values) + +DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +DATA 0xFFD01508 0x00000000 # CS[1]n Base address to 0x0 +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled +DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +DATA 0xFFD0149C 0x0000E40F # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +DATA 0xFFD20134 0x66666666 +DATA 0xFFD20138 0x66666666 +DATA 0xFFD10000 0x01112222 +DATA 0xFFD1000C 0x00000000 +DATA 0xFFD10104 0x00000000 +DATA 0xFFD10100 0x40000000 +# End of Header extension +DATA 0x0 0x0 diff --git a/board/LaCie/wireless_space/wireless_space.c b/board/LaCie/wireless_space/wireless_space.c new file mode 100644 index 0000000..2080658 --- /dev/null +++ b/board/LaCie/wireless_space/wireless_space.c @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <command.h> +#include <asm/arch/cpu.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/arch/gpio.h> + +#include "../common/common.h" +#include "netdev.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* GPIO configuration: start FAN at low speed, USB and HDD */ + +#define WIRELESS_SPACE_OE_LOW 0xFF006808 +#define WIRELESS_SPACE_OE_HIGH 0x0000F989 +#define WIRELESS_SPACE_OE_VAL_LOW 0x00010080 +#define WIRELESS_SPACE_OE_VAL_HIGH 0x00000240 + +#define WIRELESS_SPACE_REAR_BUTTON 13 +#define WIRELESS_SPACE_FRONT_BUTTON 43 + +const u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, /* Fan speed (bit 1) */ + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP13_GPIO, /* Red led */ + MPP14_GPIO, /* USB fuse */ + MPP15_SATA0_ACTn, + MPP16_GPIO, /* SATA 0 power */ + MPP17_GPIO, /* SATA 1 power */ + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet 1 */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* Fan speed (bit 2) */ + MPP37_GPIO, /* Fan speed (bit 0) */ + MPP38_GPIO, /* Fan power */ + MPP39_GPIO, /* Fan rotation fail */ + MPP40_GPIO, /* Ethernet switch link */ + MPP41_GPIO, /* USB enable host vbus */ + MPP42_GPIO, /* LED clock control */ + MPP43_GPIO, /* WPS button (0=Pushed, 1=Released) */ + MPP44_GPIO, /* Red LED on/off */ + MPP45_GPIO, /* Red LED timer blink (on=off=100ms) */ + MPP46_GPIO, /* Green LED on/off */ + MPP47_GPIO, /* LED (blue, green) SATA activity blink */ + MPP48_GPIO, /* Blue LED on/off */ + 0 +}; + +struct mv88e61xx_config swcfg = { + .name = "egiga0", + .vlancfg = MV88E61XX_VLANCFG_ROUTER, + .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, + .led_init = MV88E61XX_LED_INIT_EN, + .mdip = MV88E61XX_MDIP_NOCHANGE, + .portstate = MV88E61XX_PORTSTT_FORWARDING, + .cpuport = 0x20, + .ports_enabled = 0x3F, +}; + +int board_early_init_f(void) +{ + /* Gpio configuration */ + kw_config_gpio(WIRELESS_SPACE_OE_VAL_LOW, WIRELESS_SPACE_OE_VAL_HIGH, + WIRELESS_SPACE_OE_LOW, WIRELESS_SPACE_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + kirkwood_mpp_conf(kwmpp_config, NULL); + + return 0; +} + +int board_init(void) +{ + /* Machine number */ + gd->bd->bi_arch_number = CONFIG_MACH_TYPE; + + /* Boot parameters address */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#if defined(CONFIG_MISC_INIT_R) +int misc_init_r(void) +{ +#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) + if (!getenv("ethaddr")) { + uchar mac[6]; + if (lacie_read_mac_address(mac) == 0) + eth_setenv_enetaddr("ethaddr", mac); + } +#endif + return 0; +} +#endif + +#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) +/* Configure and initialize PHY */ +void reset_phy(void) +{ + /* configure switch on egiga0 */ + mv88e61xx_switch_initialize(&swcfg); +} +#endif + +#if defined(CONFIG_KIRKWOOD_GPIO) && defined(CONFIG_WIRELESS_SPACE_CMD) +/* Return GPIO button status */ +static int +do_ws(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (strcmp(argv[1], "button") == 0) { + if (strcmp(argv[2], "rear") == 0) + /* invert GPIO result for intuitive while/until use */ + return !kw_gpio_get_value(WIRELESS_SPACE_REAR_BUTTON); + else if (strcmp(argv[2], "front") == 0) + return kw_gpio_get_value(WIRELESS_SPACE_FRONT_BUTTON); + else + return -1; + } else { + return -1; + } +} + +U_BOOT_CMD(ws, 3, 0, do_ws, + "Return GPIO button status 0=off 1=on", + "- ws button rear|front: test buttons' states\n" +); +#endif @@ -171,6 +171,7 @@ netspace_lite_v2 arm arm926ejs netspace_v2 LaCie netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_MAX_V2 netspace_mini_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_MINI_V2 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_V2 +wireless_space arm arm926ejs wireless_space LaCie kirkwood dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood diff --git a/include/configs/wireless_space.h b/include/configs/wireless_space.h new file mode 100644 index 0000000..eb20492 --- /dev/null +++ b/include/configs/wireless_space.h @@ -0,0 +1,194 @@ +/* + * Copyright (C) 2011 Albert ARIBAUD <albert.u.boot@aribaud.net> + * + * Based on the netspace_v2 code which is + * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CONFIG_WIRELESS_SPACE_H +#define _CONFIG_WIRELESS_SPACE_H + +/* + * Machine number definition + */ +#define MACH_TYPE_WIRELESS_SPACE 2500 /* is missing in mach-types.h */ +#define CONFIG_MACH_TYPE MACH_TYPE_WIRELESS_SPACE +#define CONFIG_IDENT_STRING " Wireless Space" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SoC Family Name */ +/* SoC name */ +#define CONFIG_KW88F6281 +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* no NOR or SPI flash */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_NAND +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_USB + +/* + * Core clock definition + */ +#define CONFIG_SYS_TCLK 166000000 /* 166MHz */ + +/* + * SDRAM configuration + */ +#define CONFIG_NR_DRAM_BANKS 1 + +/* + * Different SDRAM configuration and size for some of the boards derived + * from the Network Space v2 + */ + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* Remove or override few declarations from mv-common.h */ +#undef CONFIG_RBTREE +#undef CONFIG_SYS_IDE_MAXBUS +#undef CONFIG_SYS_IDE_MAXDEVICE +#define CONFIG_SYS_IDE_MAXBUS 1 +#define CONFIG_SYS_IDE_MAXDEVICE 1 +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "ws> " + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MISC_INIT_R /* misc_init_r() initializes MAC address */ +#define CONFIG_MVGBE_PORTS {1, 0} /* enable only egiga0... */ +#define PORT_SERIAL_CONTROL_VALUE 0x00A4260E /* ... tied to the switch... */ +#define CONFIG_PHY_BASE_ADR 0xa /* ... through a 'fake' PHY */ +#define CONFIG_MII +#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_NETCONSOLE +#define CONFIG_MV88E61XX_SWITCH +#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE +#define CONFIG_MV88E61XX_CMD +#define CONFIG_CMD_TFTPPUT +#endif /* CONFIG_CMD_NET */ + +/* + * SATA Driver configuration + */ +#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /* CONFIG_MVSATA_IDE */ + +/* + * Enable GPI0 support + */ +#define CONFIG_KIRKWOOD_GPIO + +/* + * Enable I2C support + */ +#ifdef CONFIG_CMD_I2C +/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */ +#define CONFIG_CMD_EEPROM +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */ +#endif /* CONFIG_CMD_I2C */ + +/* + * Partition support + */ +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +/* + * File systems support + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + +/* + * Use the HUSH parser + */ +#define CONFIG_SYS_HUSH_PARSER + +/* + * Console configuration + */ +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* + * Enable device tree support + */ +#define CONFIG_OF_LIBFDT + +/* + * Environment variables configurations + */ + +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128KB */ +#define CONFIG_ENV_SIZE 0x20000 /* 128KB */ +#define CONFIG_ENV_OFFSET 0x80000 /* env starts here */ + +/* + * Board-specific command to make using buttons etc easier + */ + +#define CONFIG_WIRELESS_SPACE_CMD + +/* + * Default environment variables + */ +#define CONFIG_PREBOOT + +#define CONFIG_BOOTARGS "console=ttyS0,115200" + +#define CONFIG_BOOTCOMMAND \ + "if run usbload || run diskload; then bootm; fi" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" \ + "bootfile=uImage\0" \ + "loadaddr=0x800000\0" \ + "autoload=no\0" \ + "netconsole=" \ + "set stdin $stdin,nc; " \ + "set stdout $stdout,nc; " \ + "set stderr $stderr,nc;\0" \ + "diskload=ide reset && " \ + "ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \ + "usbload=usb start && " \ + "fatload usb 0:1 $loadaddr /boot/$bootfile\0" \ + "preboot=" \ + "dhcp && run netconsole\0" + +#endif /* _CONFIG_WIRELESS_SPACE_H */ |