diff options
112 files changed, 4354 insertions, 1366 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 1f6008f..9379c7e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -866,11 +866,38 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org> BF527-EZKIT BF527 BF533-EZKIT BF533 BF533-STAMP BF533 + BF537-PNAV BF537 BF537-STAMP BF537 BF538F-EZKIT BF538 BF548-EZKIT BF548 BF561-EZKIT BF561 +Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> +Blackfin Team <u-boot-devel@blackfin.uclinux.org> + + CM-BF527 BF527 + CM-BF533 BF533 + CM-BF537E BF537 + CM-BF548 BF548 + CM-BF561 BF561 + TCM-BF537 BF537 + +Martin Strubel <strubel@section5.ch> +Blackfin Team <u-boot-devel@blackfin.uclinux.org> + + BF537-minotaur BF537 + BF537-srv1 BF537 + +Wojtek Skulski <skulski@pas.rochester.edu> +Benjamin Matthews <mben12@gmail.com> + + BLACKSTAMP BF532 + +I-SYST Micromodule <support@i-syst.com> +Blackfin Team <u-boot-devel@blackfin.uclinux.org> + + IBF-DSP561 BF561 + ######################################################################### # End of MAINTAINERS list # ######################################################################### @@ -802,10 +802,21 @@ LIST_blackfin=" \ bf527-ezkit \ bf533-ezkit \ bf533-stamp \ + bf537-minotaur \ + bf537-pnav \ + bf537-srv1 \ bf537-stamp \ bf538f-ezkit \ bf548-ezkit \ bf561-ezkit \ + blackstamp \ + cm-bf527 \ + cm-bf533 \ + cm-bf537e \ + cm-bf548 \ + cm-bf561 \ + ibf-dsp561 \ + tcm-bf537 \ " ######################################################################### @@ -323,6 +323,7 @@ $(obj)u-boot.bin: $(obj)u-boot $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ $(obj)u-boot.ldr: $(obj)u-boot + $(obj)tools/envcrc --binary > $(obj)env-ldr.o $(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS) $(obj)u-boot.ldr.hex: $(obj)u-boot.ldr @@ -3387,7 +3388,16 @@ suzaku_config: unconfig # Analog Devices boards BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \ - bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit + bf537-pnav bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit + +# Bluetechnix tinyboards +BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537 + +# Misc third party boards +BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp + +# I-SYST Micromodule +BFIN_BOARDS += ibf-dsp561 $(BFIN_BOARDS:%=%_config) : unconfig @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=) @@ -3561,8 +3571,7 @@ clean: $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \ $(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \ $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ - $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \ - $(obj)board/bf5{33,37}-stamp/u-boot.lds \ + $(obj)lib_blackfin/u-boot.lds \ $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] @rm -f $(obj)include/bmp_logo.h @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map} diff --git a/blackfin_config.mk b/blackfin_config.mk index 05077c8..989e976 100644 --- a/blackfin_config.mk +++ b/blackfin_config.mk @@ -23,6 +23,8 @@ CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU))) CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE))) +CONFIG_ENV_OFFSET := $(strip $(subst ",,$(CONFIG_ENV_OFFSET))) +CONFIG_ENV_SIZE := $(strip $(subst ",,$(CONFIG_ENV_SIZE))) PLATFORM_RELFLAGS += -ffixed-P5 -fomit-frame-pointer -mno-fdpic PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN @@ -43,9 +45,18 @@ LDR_FLAGS += --bmode $(subst BFIN_BOOT_,,$(CONFIG_BFIN_BOOT_MODE)) LDR_FLAGS += --use-vmas ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) LDR_FLAGS += --initcode $(obj)cpu/$(CPU)/initcode.o +ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_UART) +ifneq ($(ENV_IS_EMBEDDED_CUSTOM),ENV_IS_EMBEDDED_CUSTOM) +LDR_FLAGS += --punchit $$(($(CONFIG_ENV_OFFSET))):$$(($(CONFIG_ENV_SIZE))):$(obj)env-ldr.o +endif +endif endif ifneq (,$(findstring s,$(MAKEFLAGS))) LDR_FLAGS += --quiet endif LDR_FLAGS += $(LDR_FLAGS-y) + +ifeq ($(wildcard $(TOPDIR)/board/$(BOARD)/u-boot.lds*),) +LDSCRIPT = $(obj)lib_$(ARCH)/u-boot.lds +endif diff --git a/board/bf518f-ezbrd/.gitignore b/board/bf518f-ezbrd/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf518f-ezbrd/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf518f-ezbrd/Makefile b/board/bf518f-ezbrd/Makefile index 1b21728..f2bd2c2 100644 --- a/board/bf518f-ezbrd/Makefile +++ b/board/bf518f-ezbrd/Makefile @@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk index f4a5a80..eaa09ff 100644 --- a/board/bf518f-ezbrd/config.mk +++ b/board/bf518f-ezbrd/config.mk @@ -26,7 +26,5 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf518f-ezbrd/u-boot.lds.S b/board/bf518f-ezbrd/u-boot.lds.S deleted file mode 100644 index 3e8be35..0000000 --- a/board/bf518f-ezbrd/u-boot.lds.S +++ /dev/null @@ -1,124 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf526-ezbrd/.gitignore b/board/bf526-ezbrd/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf526-ezbrd/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf526-ezbrd/Makefile b/board/bf526-ezbrd/Makefile index 88846ba..a9ff760 100644 --- a/board/bf526-ezbrd/Makefile +++ b/board/bf526-ezbrd/Makefile @@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk index f4a5a80..eaa09ff 100644 --- a/board/bf526-ezbrd/config.mk +++ b/board/bf526-ezbrd/config.mk @@ -26,7 +26,5 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf526-ezbrd/u-boot.lds.S b/board/bf526-ezbrd/u-boot.lds.S deleted file mode 100644 index 3e8be35..0000000 --- a/board/bf526-ezbrd/u-boot.lds.S +++ /dev/null @@ -1,124 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf527-ezkit/.gitignore b/board/bf527-ezkit/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf527-ezkit/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf527-ezkit/Makefile b/board/bf527-ezkit/Makefile index c2b98ec..1a2f4b1 100644 --- a/board/bf527-ezkit/Makefile +++ b/board/bf527-ezkit/Makefile @@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk index f4a5a80..eaa09ff 100644 --- a/board/bf527-ezkit/config.mk +++ b/board/bf527-ezkit/config.mk @@ -26,7 +26,5 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf533-ezkit/.gitignore b/board/bf533-ezkit/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf533-ezkit/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf533-ezkit/Makefile b/board/bf533-ezkit/Makefile index 1260277..487b737 100644 --- a/board/bf533-ezkit/Makefile +++ b/board/bf533-ezkit/Makefile @@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk index c8b9fb8..9847924 100644 --- a/board/bf533-ezkit/config.mk +++ b/board/bf533-ezkit/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf533-ezkit/u-boot.lds.S b/board/bf533-ezkit/u-boot.lds.S deleted file mode 100644 index f80f894..0000000 --- a/board/bf533-ezkit/u-boot.lds.S +++ /dev/null @@ -1,145 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - -#ifdef ENV_IS_EMBEDDED - /* WARNING - the following is hand-optimized to fit within - * the sector before the environment sector. If it throws - * an error during compilation remove an object here to get - * it linked after the configuration sector. - */ - - cpu/blackfin/traps.o (.text .text.*) - cpu/blackfin/interrupt.o (.text .text.*) - cpu/blackfin/serial.o (.text .text.*) - common/dlmalloc.o (.text .text.*) - lib_generic/crc32.o (.text .text.*) - lib_generic/zlib.o (.text .text.*) - board/bf533-ezkit/bf533-ezkit.o (.text .text.*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text .text.*) -#endif - - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf533-stamp/.gitignore b/board/bf533-stamp/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf533-stamp/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf533-stamp/Makefile b/board/bf533-stamp/Makefile index 0f52837..dbba12b 100644 --- a/board/bf533-stamp/Makefile +++ b/board/bf533-stamp/Makefile @@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk index c8b9fb8..9847924 100644 --- a/board/bf533-stamp/config.mk +++ b/board/bf533-stamp/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf533-stamp/u-boot.lds.S b/board/bf533-stamp/u-boot.lds.S deleted file mode 100644 index 8ddfa81..0000000 --- a/board/bf533-stamp/u-boot.lds.S +++ /dev/null @@ -1,143 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - -#ifdef ENV_IS_EMBEDDED - /* WARNING - the following is hand-optimized to fit within - * the sector before the environment sector. If it throws - * an error during compilation remove an object here to get - * it linked after the configuration sector. - */ - - cpu/blackfin/traps.o (.text .text.*) - cpu/blackfin/interrupt.o (.text .text.*) - cpu/blackfin/serial.o (.text .text.*) - common/dlmalloc.o (.text .text.*) - lib_generic/crc32.o (.text .text.*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text .text.*) -#endif - - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf537-minotaur/Makefile b/board/bf537-minotaur/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/bf537-minotaur/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf537-minotaur/bf537-minotaur.c b/board/bf537-minotaur/bf537-minotaur.c new file mode 100644 index 0000000..71b452a --- /dev/null +++ b/board/bf537-minotaur/bf537-minotaur.c @@ -0,0 +1,56 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <netdev.h> +#include <net.h> +#include <asm/blackfin.h> +#include <asm/net.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: CSP BF537 Minotaur board\n"); + printf(" Support: http://www.camsig.co.uk/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf537-minotaur/config.mk b/board/bf537-minotaur/config.mk new file mode 100644 index 0000000..d830843 --- /dev/null +++ b/board/bf537-minotaur/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf537-pnav/Makefile b/board/bf537-pnav/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/bf537-pnav/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf537-pnav/bf537-pnav.c b/board/bf537-pnav/bf537-pnav.c new file mode 100644 index 0000000..12cfefa --- /dev/null +++ b/board/bf537-pnav/bf537-pnav.c @@ -0,0 +1,56 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <netdev.h> +#include <net.h> +#include <asm/blackfin.h> +#include <asm/net.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF537 PNAV board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf537-pnav/config.mk b/board/bf537-pnav/config.mk new file mode 100644 index 0000000..eaa09ff --- /dev/null +++ b/board/bf537-pnav/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf537-srv1/Makefile b/board/bf537-srv1/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/bf537-srv1/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf537-srv1/bf537-srv1.c b/board/bf537-srv1/bf537-srv1.c new file mode 100644 index 0000000..5ad39cc --- /dev/null +++ b/board/bf537-srv1/bf537-srv1.c @@ -0,0 +1,56 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <netdev.h> +#include <net.h> +#include <asm/blackfin.h> +#include <asm/net.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Surveyor SRV1 board\n"); + printf(" Support: http://www.surveyor.com/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf537-srv1/config.mk b/board/bf537-srv1/config.mk new file mode 100644 index 0000000..d830843 --- /dev/null +++ b/board/bf537-srv1/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf537-stamp/.gitignore b/board/bf537-stamp/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf537-stamp/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile index 1dbf406..4c9e015 100644 --- a/board/bf537-stamp/Makefile +++ b/board/bf537-stamp/Makefile @@ -39,12 +39,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk index 719b97e..d9e884e 100644 --- a/board/bf537-stamp/config.mk +++ b/board/bf537-stamp/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 diff --git a/board/bf537-stamp/u-boot.lds.S b/board/bf537-stamp/u-boot.lds.S deleted file mode 100644 index 8ddfa81..0000000 --- a/board/bf537-stamp/u-boot.lds.S +++ /dev/null @@ -1,143 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - -#ifdef ENV_IS_EMBEDDED - /* WARNING - the following is hand-optimized to fit within - * the sector before the environment sector. If it throws - * an error during compilation remove an object here to get - * it linked after the configuration sector. - */ - - cpu/blackfin/traps.o (.text .text.*) - cpu/blackfin/interrupt.o (.text .text.*) - cpu/blackfin/serial.o (.text .text.*) - common/dlmalloc.o (.text .text.*) - lib_generic/crc32.o (.text .text.*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text .text.*) -#endif - - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf538f-ezkit/.gitignore b/board/bf538f-ezkit/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf538f-ezkit/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf538f-ezkit/Makefile b/board/bf538f-ezkit/Makefile index 1b21728..f2bd2c2 100644 --- a/board/bf538f-ezkit/Makefile +++ b/board/bf538f-ezkit/Makefile @@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk index c8b9fb8..9847924 100644 --- a/board/bf538f-ezkit/config.mk +++ b/board/bf538f-ezkit/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf538f-ezkit/u-boot.lds.S b/board/bf538f-ezkit/u-boot.lds.S deleted file mode 100644 index 8ddfa81..0000000 --- a/board/bf538f-ezkit/u-boot.lds.S +++ /dev/null @@ -1,143 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - -#ifdef ENV_IS_EMBEDDED - /* WARNING - the following is hand-optimized to fit within - * the sector before the environment sector. If it throws - * an error during compilation remove an object here to get - * it linked after the configuration sector. - */ - - cpu/blackfin/traps.o (.text .text.*) - cpu/blackfin/interrupt.o (.text .text.*) - cpu/blackfin/serial.o (.text .text.*) - common/dlmalloc.o (.text .text.*) - lib_generic/crc32.o (.text .text.*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text .text.*) -#endif - - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf548-ezkit/.gitignore b/board/bf548-ezkit/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf548-ezkit/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf548-ezkit/Makefile b/board/bf548-ezkit/Makefile index c2b98ec..1a2f4b1 100644 --- a/board/bf548-ezkit/Makefile +++ b/board/bf548-ezkit/Makefile @@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk index 8b471f6..95ab6b3 100644 --- a/board/bf548-ezkit/config.mk +++ b/board/bf548-ezkit/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1 diff --git a/board/bf548-ezkit/u-boot.lds.S b/board/bf548-ezkit/u-boot.lds.S deleted file mode 100644 index 3e8be35..0000000 --- a/board/bf548-ezkit/u-boot.lds.S +++ /dev/null @@ -1,124 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/bf561-ezkit/.gitignore b/board/bf561-ezkit/.gitignore deleted file mode 100644 index 945f324..0000000 --- a/board/bf561-ezkit/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/u-boot.lds diff --git a/board/bf561-ezkit/Makefile b/board/bf561-ezkit/Makefile index daebb74..bfeaf79 100644 --- a/board/bf561-ezkit/Makefile +++ b/board/bf561-ezkit/Makefile @@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS-y)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -$(obj)u-boot.lds: u-boot.lds.S - $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ - clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk index 710809a..77c888b 100644 --- a/board/bf561-ezkit/config.mk +++ b/board/bf561-ezkit/config.mk @@ -26,8 +26,6 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds - # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf561-ezkit/u-boot.lds.S b/board/bf561-ezkit/u-boot.lds.S deleted file mode 100644 index e6d3ddc..0000000 --- a/board/bf561-ezkit/u-boot.lds.S +++ /dev/null @@ -1,152 +0,0 @@ -/* - * U-boot - u-boot.lds.S - * - * Copyright (c) 2005-2008 Analog Device Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <asm/blackfin.h> -#undef ALIGN -#undef ENTRY -#undef bfin - -/* If we don't actually load anything into L1 data, this will avoid - * a syntax error. If we do actually load something into L1 data, - * we'll get a linker memory load error (which is what we'd want). - * This is here in the first place so we can quickly test building - * for different CPU's which may lack non-cache L1 data. - */ -#ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 -#endif - -/* The 0xC offset is so we don't clobber the tiny LDR jump block. */ -#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 -# define L1_CODE_ORIGIN L1_INST_SRAM -#else -# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC -#endif - -OUTPUT_ARCH(bfin) - -MEMORY -{ - ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN - l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE - l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE -} - -ENTRY(_start) -SECTIONS -{ - .text : - { - cpu/blackfin/start.o (.text .text.*) - -#ifdef ENV_IS_EMBEDDED - /* WARNING - the following is hand-optimized to fit within - * the sector before the environment sector. If it throws - * an error during compilation remove an object here to get - * it linked after the configuration sector. - */ - - cpu/blackfin/traps.o (.text .text.*) - cpu/blackfin/interrupt.o (.text .text.*) - cpu/blackfin/serial.o (.text .text.*) - common/dlmalloc.o (.text .text.*) - lib_generic/crc32.o (.text .text.*) - lib_generic/zlib.o (.text .text.*) - board/bf561-ezkit/bf561-ezkit.o (.text .text.*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text .text.*) -#endif - - __initcode_start = .; - cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; - - *(.text .text.*) - } >ram - - .rodata : - { - . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) - *(.eh_frame) - . = ALIGN(4); - } >ram - - .data : - { - . = ALIGN(256); - *(.data .data.*) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } >ram - - .u_boot_cmd : - { - ___u_boot_cmd_start = .; - *(.u_boot_cmd) - ___u_boot_cmd_end = .; - } >ram - - .text_l1 : - { - . = ALIGN(4); - __stext_l1 = .; - *(.l1.text) - . = ALIGN(4); - __etext_l1 = .; - } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); - - .data_l1 : - { - . = ALIGN(4); - __sdata_l1 = .; - *(.l1.data) - *(.l1.bss) - . = ALIGN(4); - __edata_l1 = .; - } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss .bss.*) - *(COMMON) - __bss_end = .; - } >ram -} diff --git a/board/blackstamp/Makefile b/board/blackstamp/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/blackstamp/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c new file mode 100644 index 0000000..b671899 --- /dev/null +++ b/board/blackstamp/blackstamp.c @@ -0,0 +1,46 @@ +/* + * U-boot - blackstamp.c BlackStamp board specific routines + * Most code stolen from boards/bf533-stamp/bf533-stamp.c + * Edited to the BlackStamp by Ben Matthews for UR LLE + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: BlackStamp\n"); + printf("Support: http://blackfin.uclinux.org/gf/project/blackstamp/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef SHARED_RESOURCES +void swap_to(int device_id) +{ + bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0); + SSYNC(); + if (device_id == ETHERNET) + bfin_write_FIO_FLAG_S(PF0); + else if (device_id == FLASH) + bfin_write_FIO_FLAG_C(PF0); + else + printf("Unknown device to switch\n"); + SSYNC(); +} +#endif diff --git a/board/blackstamp/config.mk b/board/blackstamp/config.mk new file mode 100644 index 0000000..eaa09ff --- /dev/null +++ b/board/blackstamp/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf527/Makefile b/board/cm-bf527/Makefile new file mode 100644 index 0000000..c2cd244 --- /dev/null +++ b/board/cm-bf527/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o gpio.o gpio_cfi_flash.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c new file mode 100644 index 0000000..db1cf90 --- /dev/null +++ b/board/cm-bf527/cm-bf527.c @@ -0,0 +1,79 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include <asm/mach-common/bits/otp.h> +#include "gpio_cfi_flash.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF527 board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + bool valid_mac = false; + + /* the MAC is stored in OTP memory page 0xDF */ + uint32_t ret; + uint64_t otp_mac; + + ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); + if (!(ret & OTP_MASTER_ERROR)) { + uchar *otp_mac_p = (uchar *)&otp_mac; + + for (ret = 0; ret < 6; ++ret) + mac_addr[ret] = otp_mac_p[5 - ret]; + + if (is_valid_ether_addr(mac_addr)) + valid_mac = true; + } + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + gpio_cfi_flash_init(); + + return 0; +} diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk new file mode 100644 index 0000000..eaa09ff --- /dev/null +++ b/board/cm-bf527/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf527/gpio.c b/board/cm-bf527/gpio.c new file mode 100644 index 0000000..dcf641b --- /dev/null +++ b/board/cm-bf527/gpio.c @@ -0,0 +1,74 @@ +/* + * Control GPIO pins on the fly + * + * Copyright (c) 2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> + +#include <asm/blackfin.h> + +int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + if (argc != 3) { + show_usage: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + /* parse the behavior */ + ulong port_cmd = 0; + switch (argv[1][0]) { + case 'i': break; + case 's': port_cmd = (PORTFIO_SET - PORTFIO); break; + case 'c': port_cmd = (PORTFIO_CLEAR - PORTFIO); break; + case 't': port_cmd = (PORTFIO_TOGGLE - PORTFIO); break; + default: goto show_usage; + } + + /* parse the pin with format: [p]<fgh><#> */ + const char *str_pin = argv[2]; + + /* grab the [p]<fgh> portion */ + ulong port_base; + if (*str_pin == 'p') ++str_pin; + switch (*str_pin) { + case 'f': port_base = PORTFIO; break; + case 'g': port_base = PORTGIO; break; + case 'h': port_base = PORTHIO; break; + default: goto show_usage; + } + + /* grab the <#> portion */ + ulong pin = simple_strtoul(str_pin+1, NULL, 10); + ulong pin_mask = (1 << pin); + if (pin > 15) + goto show_usage; + + /* finally, let's do it: set direction and exec command */ + switch (*str_pin) { + case 'f': bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~pin_mask); break; + case 'g': bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~pin_mask); break; + case 'h': bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~pin_mask); break; + } + + ulong port_dir = port_base + (PORTFIO_DIR - PORTFIO); + if (argv[1][0] == 'i') + bfin_write16(port_dir, bfin_read16(port_dir) & ~pin_mask); + else { + bfin_write16(port_dir, bfin_read16(port_dir) | pin_mask); + bfin_write16(port_base + port_cmd, pin_mask); + } + + printf("gpio: pin %li on port %c has been %c\n", pin, *str_pin, argv[1][0]); + + return 0; +} + +U_BOOT_CMD(gpio, 3, 0, do_gpio, + "gpio - set/clear/toggle gpio output pins\n", + "<s|c|t> <port><pin>\n" + " - set/clear/toggle the specified pin\n"); diff --git a/board/cm-bf527/gpio_cfi_flash.c b/board/cm-bf527/gpio_cfi_flash.c new file mode 100644 index 0000000..565d900 --- /dev/null +++ b/board/cm-bf527/gpio_cfi_flash.c @@ -0,0 +1,63 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/blackfin.h> +#include <asm/io.h> +#include "gpio_cfi_flash.h" + +#define GPIO_PIN_1 PH9 +#define GPIO_MASK_1 (1 << 21) +#define GPIO_PIN_2 PG11 +#define GPIO_MASK_2 (1 << 22) +#define GPIO_MASK (GPIO_MASK_1 | GPIO_MASK_2) + +void *gpio_cfi_flash_swizzle(void *vaddr) +{ + unsigned long addr = (unsigned long)vaddr; + + if (addr & GPIO_MASK_1) + bfin_write_PORTHIO_SET(GPIO_PIN_1); + else + bfin_write_PORTHIO_CLEAR(GPIO_PIN_1); + +#ifdef GPIO_MASK_2 + if (addr & GPIO_MASK_2) + bfin_write_PORTGIO_SET(GPIO_PIN_2); + else + bfin_write_PORTGIO_CLEAR(GPIO_PIN_2); +#endif + + SSYNC(); + + return (void *)(addr & ~GPIO_MASK); +} + +#define __raw_writeq(value, addr) *(volatile u64 *)addr = value +#define __raw_readq(addr) *(volatile u64 *)addr + +#define MAKE_FLASH(size, sfx) \ +void flash_write##size(u##size value, void *addr) \ +{ \ + __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \ +} \ +u##size flash_read##size(void *addr) \ +{ \ + return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ +} +MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ +MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ + +void gpio_cfi_flash_init(void) +{ + bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() | GPIO_PIN_1); + bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | GPIO_PIN_2); + gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE); +} diff --git a/board/cm-bf527/gpio_cfi_flash.h b/board/cm-bf527/gpio_cfi_flash.h new file mode 100644 index 0000000..5211e97 --- /dev/null +++ b/board/cm-bf527/gpio_cfi_flash.h @@ -0,0 +1,10 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +void *gpio_cfi_flash_swizzle(void *vaddr); +void gpio_cfi_flash_init(void); diff --git a/board/cm-bf533/Makefile b/board/cm-bf533/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/cm-bf533/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c new file mode 100644 index 0000000..7eb761d --- /dev/null +++ b/board/cm-bf533/cm-bf533.c @@ -0,0 +1,25 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF533 board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk new file mode 100644 index 0000000..9847924 --- /dev/null +++ b/board/cm-bf533/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf537e/Makefile b/board/cm-bf537e/Makefile new file mode 100644 index 0000000..3812ba1 --- /dev/null +++ b/board/cm-bf537e/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o flash.o gpio_cfi_flash.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c new file mode 100644 index 0000000..d1ca0a4 --- /dev/null +++ b/board/cm-bf537e/cm-bf537e.c @@ -0,0 +1,59 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include "gpio_cfi_flash.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF537E board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + gpio_cfi_flash_init(); + + return 0; +} diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk new file mode 100644 index 0000000..9847924 --- /dev/null +++ b/board/cm-bf537e/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf537e/flash.c b/board/cm-bf537e/flash.c new file mode 100644 index 0000000..25aeed2 --- /dev/null +++ b/board/cm-bf537e/flash.c @@ -0,0 +1,34 @@ +/* + * flash.c - helper commands for working with GPIO-assisted flash + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> +#include <asm/blackfin.h> +#include "gpio_cfi_flash.h" + +int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong faddr = CONFIG_SYS_FLASH_BASE; + ushort data; + ulong dflg; + + if (argc > 1) { + dflg = simple_strtoul(argv[1], NULL, 16); + faddr |= (dflg << 21); + gpio_cfi_flash_swizzle((void *)faddr); + } else { + data = bfin_read_PORTFIO(); + printf("Port F data %04x (PF4:%i)\n", data, !!(data & PF4)); + } + + return 0; +} + +U_BOOT_CMD(pf, 3, 0, do_pf, + "set/clear PF4 GPIO flash bank switch\n", + "<pf4> - set PF4 GPIO pin state\n"); diff --git a/board/cm-bf537e/gpio_cfi_flash.c b/board/cm-bf537e/gpio_cfi_flash.c new file mode 100644 index 0000000..bb35169 --- /dev/null +++ b/board/cm-bf537e/gpio_cfi_flash.c @@ -0,0 +1,60 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/blackfin.h> +#include <asm/io.h> +#include "gpio_cfi_flash.h" + +#define GPIO_PIN_1 PF4 +#define GPIO_MASK_1 (1 << 21) +#define GPIO_MASK (GPIO_MASK_1) + +void *gpio_cfi_flash_swizzle(void *vaddr) +{ + unsigned long addr = (unsigned long)vaddr; + + if (addr & GPIO_MASK_1) + bfin_write_PORTFIO_SET(GPIO_PIN_1); + else + bfin_write_PORTFIO_CLEAR(GPIO_PIN_1); + +#ifdef GPIO_MASK_2 + if (addr & GPIO_MASK_2) + bfin_write_PORTGIO_SET(GPIO_PIN_2); + else + bfin_write_PORTGIO_CLEAR(GPIO_PIN_2); +#endif + + SSYNC(); + + return (void *)(addr & ~GPIO_MASK); +} + +#define __raw_writeq(value, addr) *(volatile u64 *)addr = value +#define __raw_readq(addr) *(volatile u64 *)addr + +#define MAKE_FLASH(size, sfx) \ +void flash_write##size(u##size value, void *addr) \ +{ \ + __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \ +} \ +u##size flash_read##size(void *addr) \ +{ \ + return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ +} +MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ +MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ + +void gpio_cfi_flash_init(void) +{ + bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | GPIO_PIN_1); + gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE); +} diff --git a/board/cm-bf537e/gpio_cfi_flash.h b/board/cm-bf537e/gpio_cfi_flash.h new file mode 100644 index 0000000..5211e97 --- /dev/null +++ b/board/cm-bf537e/gpio_cfi_flash.h @@ -0,0 +1,10 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +void *gpio_cfi_flash_swizzle(void *vaddr); +void gpio_cfi_flash_init(void); diff --git a/board/cm-bf548/Makefile b/board/cm-bf548/Makefile new file mode 100644 index 0000000..1a2f4b1 --- /dev/null +++ b/board/cm-bf548/Makefile @@ -0,0 +1,55 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_VIDEO) += video.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c new file mode 100644 index 0000000..1c26600 --- /dev/null +++ b/board/cm-bf548/cm-bf548.c @@ -0,0 +1,79 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF548 board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +int board_early_init_f(void) +{ + /* Port H: PH8 - PH13 == A4 - A9 + * address lines of the parallel asynchronous memory interface + */ + + /************************************************ + * configure GPIO * + * set port H function enable register * + * configure PH8-PH13 as peripheral (not GPIO) * + *************************************************/ + bfin_write_PORTH_FER(0x3F03); + + /************************************************ + * set port H MUX to configure PH8-PH13 * + * 1st Function (MUX = 00) (bits 16-27 == 0) * + * Set to address signals A4-A9 * + *************************************************/ + bfin_write_PORTH_MUX(0); + + /************************************************ + * set port H direction register * + * enable PH8-PH13 as outputs * + *************************************************/ + bfin_write_PORTH_DIR_SET(0x3F00); + + /* Port I: PI0 - PH14 == A10 - A24 + * address lines of the parallel asynchronous memory interface + */ + + /************************************************ + * set port I function enable register * + * configure PI0-PI14 as peripheral (not GPIO) * + *************************************************/ + bfin_write_PORTI_FER(0x7fff); + + /************************************************** + * set PORT I MUX to configure PI14-PI0 as * + * 1st Function (MUX=00) - address signals A10-A24 * + ***************************************************/ + bfin_write_PORTI_MUX(0); + + /**************************************** + * set PORT I direction register * + * enable PI0 - PI14 as outputs * + *****************************************/ + bfin_write_PORTI_DIR_SET(0x7fff); + + return 0; +} diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk new file mode 100644 index 0000000..396f20a --- /dev/null +++ b/board/cm-bf548/config.mk @@ -0,0 +1,34 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 +LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1 +LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1 +LDR_FLAGS-BFIN_BOOT_UART := --dma 1 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf548/video.c b/board/cm-bf548/video.c new file mode 100644 index 0000000..49dbe77 --- /dev/null +++ b/board/cm-bf548/video.c @@ -0,0 +1,339 @@ +/* + * video.c - run splash screen on lcd + * + * Copyright (c) 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <stdarg.h> +#include <common.h> +#include <config.h> +#include <malloc.h> +#include <asm/blackfin.h> +#include <asm/mach-common/bits/dma.h> +#include <i2c.h> +#include <linux/types.h> +#include <devices.h> + +int gunzip(void *, int, unsigned char *, unsigned long *); + +#ifdef CONFIG_VIDEO + +#define DMA_SIZE16 2 + +#include <asm/mach-common/bits/eppi.h> + +#include <asm/bfin_logo_230x230.h> + +#define LCD_X_RES 480 /*Horizontal Resolution */ +#define LCD_Y_RES 272 /* Vertical Resolution */ + +#define LCD_BPP 24 /* Bit Per Pixel */ +#define LCD_PIXEL_SIZE (LCD_BPP / 8) +#define DMA_BUS_SIZE 32 +#define ACTIVE_VIDEO_MEM_OFFSET 0 + +/* -- Horizontal synchronizing -- + * + * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet + * (LCY-W-06602A Page 9 of 22) + * + * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz + * + * Period TH - 525 - Clock + * Pulse width THp - 41 - Clock + * Horizontal period THd - 480 - Clock + * Back porch THb - 2 - Clock + * Front porch THf - 2 - Clock + * + * -- Vertical synchronizing -- + * Period TV - 286 - Line + * Pulse width TVp - 10 - Line + * Vertical period TVd - 272 - Line + * Back porch TVb - 2 - Line + * Front porch TVf - 2 - Line + */ + +#define LCD_CLK (8*1000*1000) /* 8MHz */ + +/* # active data to transfer after Horizontal Delay clock */ +#define EPPI_HCOUNT LCD_X_RES + +/* # active lines to transfer after Vertical Delay clock */ +#define EPPI_VCOUNT LCD_Y_RES + +/* Samples per Line = 480 (active data) + 45 (padding) */ +#define EPPI_LINE 525 + +/* Lines per Frame = 272 (active data) + 14 (padding) */ +#define EPPI_FRAME 286 + +/* FS1 (Hsync) Width (Typical)*/ +#define EPPI_FS1W_HBL 41 + +/* FS1 (Hsync) Period (Typical) */ +#define EPPI_FS1P_AVPL EPPI_LINE + +/* Horizontal Delay clock after assertion of Hsync (Typical) */ +#define EPPI_HDELAY 43 + +/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */ +#define EPPI_FS2W_LVB (EPPI_LINE * 10) + + /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */ +#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME) + +/* Vertical Delay after assertion of Vsync (2 Lines) */ +#define EPPI_VDELAY 12 + +#define EPPI_CLIP 0xFF00FF00 + +/* EPPI Control register configuration value for RGB out + * - EPPI as Output + * GP 2 frame sync mode, + * Internal Clock generation disabled, Internal FS generation enabled, + * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge, + * FS1 & FS2 are active high, + * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) + * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled + * Swapping Enabled, + * One (DMA) Channel Mode, + * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output + * Regular watermark - when FIFO is 100% full, + * Urgent watermark - when FIFO is 75% full + */ + +#define EPPI_CONTROL (0x20136E2E) + +static inline u16 get_eppi_clkdiv(u32 target_ppi_clk) +{ + u32 sclk = get_sclk(); + + /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */ + + return (((sclk / target_ppi_clk) / 2) - 1); +} + +void Init_PPI(void) +{ + u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK); + + bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL); + bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL); + bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB); + bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF); + bfin_write_EPPI0_CLIP(EPPI_CLIP); + + bfin_write_EPPI0_FRAME(EPPI_FRAME); + bfin_write_EPPI0_LINE(EPPI_LINE); + + bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT); + bfin_write_EPPI0_HDELAY(EPPI_HDELAY); + bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT); + bfin_write_EPPI0_VDELAY(EPPI_VDELAY); + + bfin_write_EPPI0_CLKDIV(eppi_clkdiv); + +/* + * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) + * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output + */ +#if defined(CONFIG_VIDEO_RGB666) + bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 | + RGB_FMT_EN); +#else + bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) & + ~RGB_FMT_EN); +#endif + +} + +#define DEB2_URGENT 0x2000 /* DEB2 Urgent */ + +void Init_DMA(void *dst) +{ + +#if defined(CONFIG_DEB_DMA_URGENT) + *pEBIU_DDRQUE |= DEB2_URGENT; +#endif + + *pDMA12_START_ADDR = dst; + + /* X count */ + *pDMA12_X_COUNT = (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE; + *pDMA12_X_MODIFY = DMA_BUS_SIZE / 8; + + /* Y count */ + *pDMA12_Y_COUNT = LCD_Y_RES; + *pDMA12_Y_MODIFY = DMA_BUS_SIZE / 8; + + /* DMA Config */ + *pDMA12_CONFIG = WDSIZE_32 | /* 32 bit DMA */ + DMA2D | /* 2D DMA */ + FLOW_AUTO; /* autobuffer mode */ +} + +void Init_Ports(void) +{ + *pPORTF_MUX = 0x00000000; + *pPORTF_FER |= 0xFFFF; /* PPI0..15 */ + + *pPORTG_MUX &= + ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | + PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK); + *pPORTG_FER |= PG0 | PG1 | PG2 | PG3 | PG4; /* CLK, FS1, FS2, PPI16..17 */ + +#if !defined(CONFIG_VIDEO_RGB666) + *pPORTD_MUX &= + ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | + PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK); + *pPORTD_MUX |= + (PORT_x_MUX_0_FUNC_4 | PORT_x_MUX_1_FUNC_4 | PORT_x_MUX_2_FUNC_4 | + PORT_x_MUX_3_FUNC_4 | PORT_x_MUX_4_FUNC_4 | PORT_x_MUX_5_FUNC_4); + *pPORTD_FER |= PD0 | PD1 | PD2 | PD3 | PD4 | PD5; /* PPI18..23 */ +#endif + + *pPORTE_FER &= ~PE3; /* DISP */ + *pPORTE_DIR_SET = PE3; + *pPORTE_SET = PE3; + +} + +void EnableDMA(void) +{ + *pDMA12_CONFIG |= DMAEN; +} + +void DisableDMA(void) +{ + *pDMA12_CONFIG &= ~DMAEN; +} + +/* enable and disable PPI functions */ +void EnablePPI(void) +{ + bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); +} + +void DisablePPI(void) +{ + bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); +} + +int video_init(void *dst) +{ + Init_Ports(); + Init_DMA(dst); + EnableDMA(); + Init_PPI(); + EnablePPI(); + + return 0; +} + +static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) +{ + if (dcache_status()) + blackfin_dcache_flush_range(logo->data, + logo->data + logo->size); + + bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); + + /* Setup destination start address */ + bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) + + (y * LCD_X_RES * LCD_PIXEL_SIZE)); + /* Setup destination xcount */ + bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup destination xmodify */ + bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); + + /* Setup destination ycount */ + bfin_write_MDMA_D0_Y_COUNT(logo->height); + /* Setup destination ymodify */ + bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + + DMA_SIZE16); + + /* Setup Source start address */ + bfin_write_MDMA_S0_START_ADDR(logo->data); + /* Setup Source xcount */ + bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup Source xmodify */ + bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); + + /* Setup Source ycount */ + bfin_write_MDMA_S0_Y_COUNT(logo->height); + /* Setup Source ymodify */ + bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); + + /* Enable source DMA */ + bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); + SSYNC(); + bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); + + while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN) ; + + bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE + | DMA_ERR); + bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE + | DMA_ERR); + +} + +void video_putc(const char c) +{ +} + +void video_puts(const char *s) +{ +} + +int drv_video_init(void) +{ + int error, devices = 1; + device_t videodev; + + u8 *dst; + u32 fbmem_size = + LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; + + dst = malloc(fbmem_size); + + if (dst == NULL) { + printf("Failed to alloc FB memory\n"); + return -1; + } +#ifdef EASYLOGO_ENABLE_GZIP + unsigned char *data = EASYLOGO_DECOMP_BUFFER; + unsigned long src_len = EASYLOGO_ENABLE_GZIP; + if (gunzip(data, bfin_logo.size, bfin_logo.data, &src_len)) { + puts("Failed to decompress logo\n"); + free(dst); + return -1; + } + bfin_logo.data = data; +#endif + + memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], + fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); + + dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, + (LCD_X_RES - bfin_logo.width) / 2, + (LCD_Y_RES - bfin_logo.height) / 2); + + video_init(dst); /* Video initialization */ + + memset(&videodev, 0, sizeof(videodev)); + + strcpy(videodev.name, "video"); + videodev.ext = DEV_EXT_VIDEO; /* Video extensions */ + videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */ + videodev.putc = video_putc; /* 'putc' function */ + videodev.puts = video_puts; /* 'puts' function */ + + error = device_register(&videodev); + + return (error == 0) ? devices : error; +} + +#endif diff --git a/board/cm-bf561/Makefile b/board/cm-bf561/Makefile new file mode 100644 index 0000000..f2bd2c2 --- /dev/null +++ b/board/cm-bf561/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c new file mode 100644 index 0000000..5bce9eb --- /dev/null +++ b/board/cm-bf561/cm-bf561.c @@ -0,0 +1,25 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF561 core module\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk new file mode 100644 index 0000000..77c888b --- /dev/null +++ b/board/cm-bf561/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/ibf-dsp561/Makefile b/board/ibf-dsp561/Makefile new file mode 100644 index 0000000..bfeaf79 --- /dev/null +++ b/board/ibf-dsp561/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2007 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ibf-dsp561/config.mk b/board/ibf-dsp561/config.mk new file mode 100644 index 0000000..77c888b --- /dev/null +++ b/board/ibf-dsp561/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/ibf-dsp561/ibf-dsp561.c b/board/ibf-dsp561/ibf-dsp561.c new file mode 100644 index 0000000..551fc29 --- /dev/null +++ b/board/ibf-dsp561/ibf-dsp561.c @@ -0,0 +1,25 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008-2009 I-SYST. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: I-SYST IBF-DSP561 Micromodule\n"); + printf(" Support: http://www.i-syst.com/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} diff --git a/board/tcm-bf537/Makefile b/board/tcm-bf537/Makefile new file mode 100644 index 0000000..3812ba1 --- /dev/null +++ b/board/tcm-bf537/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o flash.o gpio_cfi_flash.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk new file mode 100644 index 0000000..9847924 --- /dev/null +++ b/board/tcm-bf537/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/tcm-bf537/flash.c b/board/tcm-bf537/flash.c new file mode 100644 index 0000000..52c5bd8 --- /dev/null +++ b/board/tcm-bf537/flash.c @@ -0,0 +1,37 @@ +/* + * flash.c - helper commands for working with GPIO-assisted flash + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> +#include <asm/blackfin.h> +#include "gpio_cfi_flash.h" + +int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong faddr = CONFIG_SYS_FLASH_BASE; + ushort data; + ulong dflg; + + if (argc == 3) { + dflg = simple_strtoul(argv[1], NULL, 16); + faddr |= (dflg << 21); + dflg = simple_strtoul(argv[2], NULL, 16); + faddr |= (dflg << 22); + gpio_cfi_flash_swizzle((void *)faddr); + } else { + data = bfin_read_PORTFIO(); + printf("Port F data %04x (PF4:%i PF5:%i)\n", data, + !!(data & PF4), !!(data & PF5)); + } + + return 0; +} + +U_BOOT_CMD(pf, 3, 0, do_pf, + "set/clear PF4/PF5 GPIO flash bank switch\n", + "<pf4> <pf5> - set PF4/PF5 GPIO pin state\n"); diff --git a/board/tcm-bf537/gpio_cfi_flash.c b/board/tcm-bf537/gpio_cfi_flash.c new file mode 100644 index 0000000..7137d12 --- /dev/null +++ b/board/tcm-bf537/gpio_cfi_flash.c @@ -0,0 +1,62 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/blackfin.h> +#include <asm/io.h> +#include "gpio_cfi_flash.h" + +#define GPIO_PIN_1 PF4 +#define GPIO_MASK_1 (1 << 21) +#define GPIO_PIN_2 PF5 +#define GPIO_MASK_2 (1 << 22) +#define GPIO_MASK (GPIO_MASK_1 | GPIO_MASK_2) + +void *gpio_cfi_flash_swizzle(void *vaddr) +{ + unsigned long addr = (unsigned long)vaddr; + + if (addr & GPIO_MASK_1) + bfin_write_PORTFIO_SET(GPIO_PIN_1); + else + bfin_write_PORTFIO_CLEAR(GPIO_PIN_1); + +#ifdef GPIO_MASK_2 + if (addr & GPIO_MASK_2) + bfin_write_PORTFIO_SET(GPIO_PIN_2); + else + bfin_write_PORTFIO_CLEAR(GPIO_PIN_2); +#endif + + SSYNC(); + + return (void *)(addr & ~GPIO_MASK); +} + +#define __raw_writeq(value, addr) *(volatile u64 *)addr = value +#define __raw_readq(addr) *(volatile u64 *)addr + +#define MAKE_FLASH(size, sfx) \ +void flash_write##size(u##size value, void *addr) \ +{ \ + __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \ +} \ +u##size flash_read##size(void *addr) \ +{ \ + return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ +} +MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ +MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ + +void gpio_cfi_flash_init(void) +{ + bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | GPIO_PIN_1 | GPIO_PIN_2); + gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE); +} diff --git a/board/tcm-bf537/gpio_cfi_flash.h b/board/tcm-bf537/gpio_cfi_flash.h new file mode 100644 index 0000000..5211e97 --- /dev/null +++ b/board/tcm-bf537/gpio_cfi_flash.h @@ -0,0 +1,10 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +void *gpio_cfi_flash_swizzle(void *vaddr); +void gpio_cfi_flash_init(void); diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c new file mode 100644 index 0000000..573387d --- /dev/null +++ b/board/tcm-bf537/tcm-bf537.c @@ -0,0 +1,59 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include "gpio_cfi_flash.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix TCM-BF537 board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + gpio_cfi_flash_init(); + + return 0; +} diff --git a/common/Makefile b/common/Makefile index ee0cb33..c8e5d26 100644 --- a/common/Makefile +++ b/common/Makefile @@ -133,6 +133,7 @@ COBJS-$(CONFIG_CMD_SF) += cmd_sf.o COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o +COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o COBJS-$(CONFIG_CMD_UBI) += cmd_ubi.o diff --git a/common/cmd_spibootldr.c b/common/cmd_spibootldr.c new file mode 100644 index 0000000..d29ed2b --- /dev/null +++ b/common/cmd_spibootldr.c @@ -0,0 +1,36 @@ +/* + * U-boot - spibootldr.c + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> + +#include <asm/blackfin.h> +#include <asm/mach-common/bits/bootrom.h> + +int do_spibootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + s32 addr; + + /* Get the address */ + if (argc < 2) + addr = 0; + else + addr = simple_strtoul(argv[1], NULL, 16); + + printf("## Booting ldr image at SPI offset 0x%x ...\n", addr); + + return bfrom_SpiBoot(addr, BFLAG_PERIPHERAL | 4, 0, NULL); +} + +U_BOOT_CMD(spibootldr, 2, 0, do_spibootldr, + "boot ldr image from spi", + "[offset]\n" + " - boot ldr image stored at offset into spi\n"); diff --git a/include/asm-blackfin/blackfin-config-post.h b/include/asm-blackfin/blackfin-config-post.h deleted file mode 100644 index 623fdc7..0000000 --- a/include/asm-blackfin/blackfin-config-post.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * blackfin-config-post.h - setup common defines for Blackfin boards based on config.h - * - * Copyright (c) 2007-2008 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef __ASM_BLACKFIN_CONFIG_POST_H__ -#define __ASM_BLACKFIN_CONFIG_POST_H__ - -/* Sanity check CONFIG_BFIN_CPU */ -#ifndef CONFIG_BFIN_CPU -# error CONFIG_BFIN_CPU: your board config needs to define this -#endif - -/* Make sure the structure is properly aligned */ -#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR) -# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned -#endif - -/* Set default CONFIG_VCO_HZ if need be */ -#if !defined(CONFIG_VCO_HZ) -# if (CONFIG_CLKIN_HALF == 0) -# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) -# else -# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2) -# endif -#endif - -/* Set default CONFIG_CCLK_HZ if need be */ -#if !defined(CONFIG_CCLK_HZ) -# if (CONFIG_PLL_BYPASS == 0) -# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV) -# else -# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ -# endif -#endif - -/* Set default CONFIG_SCLK_HZ if need be */ -#if !defined(CONFIG_SCLK_HZ) -# if (CONFIG_PLL_BYPASS == 0) -# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV) -# else -# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ -# endif -#endif - -/* Since we use these to program PLL registers directly, - * make sure the values are sane and won't screw us up. - */ -#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT -# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63) -#endif -#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF -# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1 -#endif -#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS -# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1 -#endif - -/* Using L1 scratch pad makes sense for everyone by default. */ -#ifndef CONFIG_LINUX_CMDLINE_ADDR -# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH -#endif -#ifndef CONFIG_LINUX_CMDLINE_SIZE -# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE -#endif - -/* Set default SPI flash CS to the one we boot from */ -#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS) -# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL -#endif - -/* Default/common Blackfin memory layout */ -#ifndef CONFIG_SYS_SDRAM_BASE -# define CONFIG_SYS_SDRAM_BASE 0 -#endif -#ifndef CONFIG_SYS_MAX_RAM_SIZE -# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024) -#endif -#ifndef CONFIG_SYS_MONITOR_BASE -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN) -#endif -#ifndef CONFIG_SYS_MALLOC_BASE -# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) -#endif -#ifndef CONFIG_SYS_GBL_DATA_SIZE -# define CONFIG_SYS_GBL_DATA_SIZE (128) -#endif -#ifndef CONFIG_SYS_GBL_DATA_ADDR -# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) -#endif -#ifndef CONFIG_STACKBASE -# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4) -#endif -#ifndef CONFIG_SYS_MEMTEST_START -# define CONFIG_SYS_MEMTEST_START 0 -#endif -#ifndef CONFIG_SYS_MEMTEST_END -# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4) -#endif - -/* Check to make sure everything fits in external RAM */ -#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE) -# error Memory Map does not fit into configuration -#endif - -/* Default/common Blackfin environment settings */ -#ifndef CONFIG_LOADADDR -# define CONFIG_LOADADDR 0x1000000 -#endif -#ifndef CONFIG_SYS_LOAD_ADDR -# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#endif -#ifndef CONFIG_SYS_BOOTM_LEN -# define CONFIG_SYS_BOOTM_LEN 0x4000000 -#endif -#ifndef CONFIG_SYS_PROMPT -# define CONFIG_SYS_PROMPT "bfin> " -#endif -#ifndef CONFIG_SYS_CBSIZE -# ifdef CONFIG_CMD_KGDB -# define CONFIG_SYS_CBSIZE 1024 -# else -# define CONFIG_SYS_CBSIZE 256 -# endif -#endif -#ifndef CONFIG_SYS_BARGSIZE -# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#endif -#ifndef CONFIG_SYS_PBSIZE -# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#endif -#ifndef CONFIG_SYS_MAXARGS -# define CONFIG_SYS_MAXARGS 16 -#endif -#if defined(CONFIG_SYS_HZ) -# if (CONFIG_SYS_HZ != 1000) -# warning "CONFIG_SYS_HZ must always be 1000" -# endif -# undef CONFIG_SYS_HZ -#endif -#define CONFIG_SYS_HZ 1000 -#ifndef CONFIG_SYS_BAUDRATE_TABLE -# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#endif - -#endif diff --git a/include/asm-blackfin/blackfin-config-pre.h b/include/asm-blackfin/config-pre.h index 44f9c2f..b1d3a94 100644 --- a/include/asm-blackfin/blackfin-config-pre.h +++ b/include/asm-blackfin/config-pre.h @@ -1,7 +1,7 @@ /* - * blackfin-config-pre.h - common defines for Blackfin boards in config.h + * config-pre.h - common defines for Blackfin boards in config.h * - * Copyright (c) 2007 Analog Devices Inc. + * Copyright (c) 2007-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ diff --git a/include/asm-blackfin/config.h b/include/asm-blackfin/config.h index 049c44e..6623fb7 100644 --- a/include/asm-blackfin/config.h +++ b/include/asm-blackfin/config.h @@ -1,24 +1,149 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * config.h - setup common defines for Blackfin boards based on config.h * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * Copyright (c) 2007-2009 Analog Devices Inc. * + * Licensed under the GPL-2 or later. */ -#ifndef _ASM_CONFIG_H_ -#define _ASM_CONFIG_H_ +#ifndef __ASM_BLACKFIN_CONFIG_POST_H__ +#define __ASM_BLACKFIN_CONFIG_POST_H__ + +/* Sanity check CONFIG_BFIN_CPU */ +#ifndef CONFIG_BFIN_CPU +# error CONFIG_BFIN_CPU: your board config needs to define this +#endif + +/* Make sure the structure is properly aligned */ +#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR) +# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned +#endif + +/* Set default CONFIG_VCO_HZ if need be */ +#if !defined(CONFIG_VCO_HZ) +# if (CONFIG_CLKIN_HALF == 0) +# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) +# else +# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2) +# endif +#endif + +/* Set default CONFIG_CCLK_HZ if need be */ +#if !defined(CONFIG_CCLK_HZ) +# if (CONFIG_PLL_BYPASS == 0) +# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV) +# else +# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ +# endif +#endif + +/* Set default CONFIG_SCLK_HZ if need be */ +#if !defined(CONFIG_SCLK_HZ) +# if (CONFIG_PLL_BYPASS == 0) +# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV) +# else +# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ +# endif +#endif + +/* Since we use these to program PLL registers directly, + * make sure the values are sane and won't screw us up. + */ +#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT +# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63) +#endif +#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF +# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1 +#endif +#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS +# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1 +#endif + +/* Using L1 scratch pad makes sense for everyone by default. */ +#ifndef CONFIG_LINUX_CMDLINE_ADDR +# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH +#endif +#ifndef CONFIG_LINUX_CMDLINE_SIZE +# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE +#endif + +/* Set default SPI flash CS to the one we boot from */ +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS) +# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL +#endif + +/* Default/common Blackfin memory layout */ +#ifndef CONFIG_SYS_SDRAM_BASE +# define CONFIG_SYS_SDRAM_BASE 0 +#endif +#ifndef CONFIG_SYS_MAX_RAM_SIZE +# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024) +#endif +#ifndef CONFIG_SYS_MONITOR_BASE +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN) +#endif +#ifndef CONFIG_SYS_MALLOC_BASE +# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) +#endif +#ifndef CONFIG_SYS_GBL_DATA_SIZE +# define CONFIG_SYS_GBL_DATA_SIZE (128) +#endif +#ifndef CONFIG_SYS_GBL_DATA_ADDR +# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) +#endif +#ifndef CONFIG_STACKBASE +# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4) +#endif +#ifndef CONFIG_SYS_MEMTEST_START +# define CONFIG_SYS_MEMTEST_START 0 +#endif +#ifndef CONFIG_SYS_MEMTEST_END +# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4) +#endif + +/* Check to make sure everything fits in external RAM */ +#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE) +# error Memory Map does not fit into configuration +#endif + +/* Default/common Blackfin environment settings */ +#ifndef CONFIG_LOADADDR +# define CONFIG_LOADADDR 0x1000000 +#endif +#ifndef CONFIG_SYS_LOAD_ADDR +# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#endif +#ifndef CONFIG_SYS_BOOTM_LEN +# define CONFIG_SYS_BOOTM_LEN 0x4000000 +#endif +#ifndef CONFIG_SYS_PROMPT +# define CONFIG_SYS_PROMPT "bfin> " +#endif +#ifndef CONFIG_SYS_CBSIZE +# ifdef CONFIG_CMD_KGDB +# define CONFIG_SYS_CBSIZE 1024 +# else +# define CONFIG_SYS_CBSIZE 256 +# endif +#endif +#ifndef CONFIG_SYS_BARGSIZE +# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#endif +#ifndef CONFIG_SYS_PBSIZE +# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#endif +#ifndef CONFIG_SYS_MAXARGS +# define CONFIG_SYS_MAXARGS 16 +#endif +#if defined(CONFIG_SYS_HZ) +# if (CONFIG_SYS_HZ != 1000) +# warning "CONFIG_SYS_HZ must always be 1000" +# endif +# undef CONFIG_SYS_HZ +#endif +#define CONFIG_SYS_HZ 1000 +#ifndef CONFIG_SYS_BAUDRATE_TABLE +# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#endif #endif diff --git a/include/asm-blackfin/mach-common/bits/bootrom.h b/include/asm-blackfin/mach-common/bits/bootrom.h index fb97ff8..f537e93 100644 --- a/include/asm-blackfin/mach-common/bits/bootrom.h +++ b/include/asm-blackfin/mach-common/bits/bootrom.h @@ -200,6 +200,33 @@ typedef struct ADI_BOOT_DATA { int32_t dLogByteCount; } ADI_BOOT_DATA; +typedef void ADI_BOOT_HOOK_FUNC (ADI_BOOT_DATA *); + +#ifndef _BOOTROM_MEMBOOT +#define _BOOTROM_MEMBOOT 0 +#endif +static uint32_t (* const bfrom_MemBoot)(void *pBootStream, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_MEMBOOT; + +#ifndef _BOOTROM_TWIBOOT +#define _BOOTROM_TWIBOOT 0 +#endif +static uint32_t (* const bfrom_TwiBoot)(int32_t dTwiAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_TWIBOOT; + +#ifndef _BOOTROM_SPIBOOT +#define _BOOTROM_SPIBOOT 0 +#endif +static uint32_t (* const bfrom_SpiBoot)(int32_t dSpiAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_SPIBOOT; + +#ifndef _BOOTROM_OTPBOOT +#define _BOOTROM_OTPBOOT 0 +#endif +static uint32_t (* const bfrom_OtpBoot)(int32_t dOtpAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_OTPBOOT; + +#ifndef _BOOTROM_NANDBOOT +#define _BOOTROM_NANDBOOT 0 +#endif +static uint32_t (* const bfrom_NandBoot)(int32_t dNandAddress, int32_t dFlags, int32_t dBlockCount, ADI_BOOT_HOOK_FUNC *pCallHook) = (void *)_BOOTROM_NANDBOOT; + #endif /* __ASSEMBLY__ */ /* Bit defines for ADI_BOOT_DATA->dFlags */ diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 06f2765..bc7ac5d 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF518F_EZBRD_H__ #define __CONFIG_BF518F_EZBRD_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -90,6 +90,7 @@ #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_HZ 30000000 #define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_STMICRO @@ -143,6 +144,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index afd9bb2..db68a7b 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF526_EZBRD_H__ #define __CONFIG_BF526_EZBRD_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -185,6 +185,4 @@ void __led_toggle(led_id_t mask); */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 0fe5fa5..f481c79 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF527_EZKIT_H__ #define __CONFIG_BF527_EZKIT_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -167,6 +167,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index eb08890..f896cb0 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF533_EZKIT_H__ #define __CONFIG_BF533_EZKIT_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -152,6 +152,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index d8e1ffc..579540e 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF533_STAMP_H__ #define __CONFIG_BF533_STAMP_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -117,6 +117,21 @@ #else #define ENV_IS_EMBEDDED_CUSTOM #endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif /* @@ -241,6 +256,4 @@ void __led_toggle(led_id_t mask); */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h new file mode 100644 index 0000000..b01197b --- /dev/null +++ b/include/configs/bf537-minotaur.h @@ -0,0 +1,201 @@ +/* + * U-boot - Configuration file for CSP Minotaur board + * + * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch> + * Minotaur config, brushed up for official uClinux dist. + * Parallel flash support disabled, SPI flash boot command + * added ('run flashboot'). + * + * Flash image map: + * + * 0x00000000 u-boot bootstrap + * 0x00010000 environment + * 0x00020000 u-boot code + * 0x00030000 uImage.initramfs + * + */ + +#ifndef __CONFIG_BF537_MINOTAUR_H__ +#define __CONFIG_BF537_MINOTAUR_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 20 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_SIZE 32 +#define CONFIG_MEM_ADD_WDTH 9 + +#define CONFIG_EBIU_SDRRC_VAL 0x306 +#define CONFIG_EBIU_SDGCTL_VAL 0x91114d + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_SYS_MALLOC_LEN (128 << 10) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#ifdef CONFIG_BFIN_MAC +#define CONFIG_IPADDR 192.168.0.15 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.2 +#define CONFIG_HOSTNAME bf537-minotaur +#endif + +#define CONFIG_SYS_AUTOLOAD "no" +#define CONFIG_ROOTPATH /romfs +/* Use a fixed MAC address for booting up. Firstboot linux + * must fetch a valid MAC from the production server. */ +#define CONFIG_ETHADDR 02:80:ad:20:31:42 + + +/* + * Flash Settings + */ +/* We don't have a parallel flash chip there */ +#define CONFIG_SYS_NO_FLASH + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_MISC_INIT_R + +#define CONFIG_BAUDRATE 57600 +#define CONFIG_UART_CONSOLE 0 + +#define CONFIG_PANIC_HANG 1 +#define CONFIG_RTC_BFIN 1 +#define CONFIG_BOOT_RETRY_TIME -1 +#define CONFIG_LOADS_ECHO 1 + +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) +# define CONFIG_BOOTDELAY -1 +#else +# define CONFIG_BOOTDELAY 5 +#endif + +#include <config_cmd_default.h> + +#ifdef CONFIG_BFIN_MAC +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_PING +#else +# undef CONFIG_CMD_NET +#endif + +#define CONFIG_CMD_BOOTLDR +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_ELF +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_SF + +#define CONFIG_BOOTCOMMAND "run ramboot" +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw" +#define CONFIG_SYS_PROMPT "minotaur> " + +#define BOOT_ENV_SETTINGS \ + "update=tftpboot $(loadaddr) u-boot.ldr;" \ + "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \ + "sf erase 0 0x30000;" \ + "sf write $(loadaddr) 0 $(filesize)" \ + "flashboot=sf read 0x1000000 0x30000 0x320000;" \ + "bootm 0x1000000\0" +#ifdef CONFIG_BFIN_MAC +# define NETWORK_ENV_SETTINGS \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath)\0" \ + "addip=setenv bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):eth0:off\0" \ + "ramboot=tftpboot $(loadaddr) linux;" \ + "run ramargs;run addip;bootelf\0" \ + "nfsboot=tftpboot $(loadaddr) linux;" \ + "run nfsargs;run addip;bootelf\0" +#else +# define NETWORK_ENV_SETTINGS +#endif +#define CONFIG_EXTRA_ENV_SETTINGS \ + NETWORK_ENV_SETTINGS \ + "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \ + BOOT_ENV_SETTINGS + +#endif diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h new file mode 100644 index 0000000..284c7fc --- /dev/null +++ b/include/configs/bf537-pnav.h @@ -0,0 +1,185 @@ +/* + * U-boot - Configuration file for BF537 PNAV board + */ + +#ifndef __CONFIG_BF537_PNAV_H__ +#define __CONFIG_BF537_PNAV_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 24576000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 20 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x3b7 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB033B0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_RMII +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME bf537-pnav +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:24:21:18 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#else +#define ENV_IS_EMBEDDED +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x20004000 +#define CONFIG_ENV_OFFSET 0x4000 +#endif +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif + + +/* + * NAND Settings + */ +#define CONFIG_NAND_PLAT + +#define CONFIG_SYS_NAND_BASE 0x20100000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) +#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) +#define BFIN_NAND_READY PF12 +#define BFIN_NAND_WRITE(addr, cmd) \ + do { \ + bfin_write8(addr, cmd); \ + SSYNC(); \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) +#define NAND_PLAT_DEV_READY(chip) (bfin_read_PORTHIO() & BFIN_NAND_READY) +#define NAND_PLAT_INIT() \ + do { \ + bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~BFIN_NAND_READY); \ + bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() & ~BFIN_NAND_READY); \ + bfin_write_PORTHIO_INEN(bfin_read_PORTHIO_INEN() | BFIN_NAND_READY); \ + } while (0) + + +/* + * I2C settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + +/* JFFS Partition offset set */ +#define CONFIG_SYS_JFFS2_FIRST_BANK 0 +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 +/* 512k reserved for u-boot */ +#define CONFIG_SYS_JFFS2_FIRST_SECTOR 15 + +#define CONFIG_BOOTCOMMAND "run nandboot" +#define CONFIG_BOOTARGS_ROOT "/dev/mtdblock1 rw rootfstype=yaffs" + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h new file mode 100644 index 0000000..c1bff3e --- /dev/null +++ b/include/configs/bf537-srv1.h @@ -0,0 +1,201 @@ +/* + * U-boot - Configuration file for CSP Minotaur board + * + * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch> + * Minotaur config, brushed up for official uClinux dist. + * Parallel flash support disabled, SPI flash boot command + * added ('run flashboot'). + * + * Flash image map: + * + * 0x00000000 u-boot bootstrap + * 0x00010000 environment + * 0x00020000 u-boot code + * 0x00030000 uImage.initramfs + * + */ + +#ifndef __CONFIG_BF537_SRV1_H__ +#define __CONFIG_BF537_SRV1_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 22118400 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 20 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_SIZE 32 +#define CONFIG_MEM_ADD_WDTH 9 + +#define CONFIG_EBIU_SDRRC_VAL 0x2ac +#define CONFIG_EBIU_SDGCTL_VAL 0x91110d + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_SYS_MALLOC_LEN (384 << 10) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#ifdef CONFIG_BFIN_MAC +#define CONFIG_IPADDR 192.168.0.15 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.2 +#define CONFIG_HOSTNAME bf537-srv1 +#endif + +#define CONFIG_SYS_AUTOLOAD "no" +#define CONFIG_ROOTPATH /romfs +/* Use a fixed MAC address for booting up. Firstboot linux + * must fetch a valid MAC from the production server. */ +#define CONFIG_ETHADDR 02:80:ad:20:31:42 + + +/* + * Flash Settings + */ +/* We don't have a parallel flash chip there */ +#define CONFIG_SYS_NO_FLASH + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_MISC_INIT_R + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_UART_CONSOLE 0 + +#define CONFIG_PANIC_HANG 1 +#define CONFIG_RTC_BFIN 1 +#define CONFIG_BOOT_RETRY_TIME -1 +#define CONFIG_LOADS_ECHO 1 + +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) +# define CONFIG_BOOTDELAY -1 +#else +# define CONFIG_BOOTDELAY 5 +#endif + +#include <config_cmd_default.h> + +#ifdef CONFIG_BFIN_MAC +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_PING +#else +# undef CONFIG_CMD_NET +#endif + +#define CONFIG_CMD_BOOTLDR +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_ELF +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_SF + +#define CONFIG_BOOTCOMMAND "run flashboot" +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw" +#define CONFIG_SYS_PROMPT "srv1> " + +#define BOOT_ENV_SETTINGS \ + "update=tftpboot $(loadaddr) u-boot.ldr;" \ + "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \ + "sf erase 0 0x30000;" \ + "sf write $(loadaddr) 0 $(filesize)" \ + "flashboot=sf read 0x1000000 0x30000 0x320000;" \ + "bootm 0x1000000\0" +#ifdef CONFIG_BFIN_MAC +# define NETWORK_ENV_SETTINGS \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath)\0" \ + "addip=setenv bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):eth0:off\0" \ + "ramboot=tftpboot $(loadaddr) linux;" \ + "run ramargs;run addip;bootelf\0" \ + "nfsboot=tftpboot $(loadaddr) linux;" \ + "run nfsargs;run addip;bootelf\0" +#else +# define NETWORK_ENV_SETTINGS +#endif +#define CONFIG_EXTRA_ENV_SETTINGS \ + NETWORK_ENV_SETTINGS \ + "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \ + BOOT_ENV_SETTINGS + +#endif diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 3e5862d..e883f2e 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF537_STAMP_H__ #define __CONFIG_BF537_STAMP_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -115,6 +115,21 @@ #else #define ENV_IS_EMBEDDED_CUSTOM #endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif /* @@ -257,6 +272,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index a7fb92e..91622e3 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF538F_EZKIT_H__ #define __CONFIG_BF538F_EZKIT_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -111,6 +111,21 @@ #else #define ENV_IS_EMBEDDED_CUSTOM #endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif /* @@ -134,6 +149,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index ae9fb36..4e2ee62 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF548_EZKIT_H__ #define __CONFIG_BF548_EZKIT_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -206,6 +206,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - #endif diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index ef2019f..4779a97 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_BF561_EZKIT_H__ #define __CONFIG_BF561_EZKIT_H__ -#include <asm/blackfin-config-pre.h> +#include <asm/config-pre.h> /* @@ -88,6 +88,23 @@ #else #define ENV_IS_EMBEDDED_CUSTOM #endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + lib_generic/zlib.o (.text .text.*); \ + board/bf561-ezkit/bf561-ezkit.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif /* @@ -149,6 +166,4 @@ */ #include <configs/bfin_adi_common.h> -#include <asm/blackfin-config-post.h> - -#endif /* __CONFIG_EZKIT561_H__ */ +#endif diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index e0be07b..4149a29 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -71,6 +71,7 @@ # define CONFIG_CMD_STRINGS # if defined(__ADSPBF51x__) || defined(__ADSPBF52x__) || defined(__ADSPBF54x__) # define CONFIG_CMD_OTP +# define CONFIG_CMD_SPIBOOTLDR # endif #endif @@ -102,14 +103,19 @@ #else # define CONFIG_BOOTDELAY 5 #endif -#define CONFIG_BOOTCOMMAND "run ramboot" +#ifndef CONFIG_BOOTCOMMAND +# define CONFIG_BOOTCOMMAND "run ramboot" +#endif #ifdef CONFIG_VIDEO # define CONFIG_BOOTARGS_VIDEO "console=tty0 " #else # define CONFIG_BOOTARGS_VIDEO "" #endif +#ifndef CONFIG_BOOTARGS_ROOT +# define CONFIG_BOOTARGS_ROOT "/dev/mtdblock0 rw" +#endif #define CONFIG_BOOTARGS \ - "root=/dev/mtdblock0 rw " \ + "root=" CONFIG_BOOTARGS_ROOT " " \ "clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \ "earlyprintk=" \ "serial," \ @@ -117,7 +123,17 @@ MK_STR(CONFIG_BAUDRATE) " " \ CONFIG_BOOTARGS_VIDEO \ "console=ttyBF0," MK_STR(CONFIG_BAUDRATE) - +#if defined(CONFIG_CMD_NAND) +# define NAND_ENV_SETTINGS \ + "nandargs=set bootargs " CONFIG_BOOTARGS "\0" \ + "nandboot=" \ + "nand read $(loadaddr) 0x20000 0x100000;" \ + "run nandargs;" \ + "bootm" \ + "\0" +#else +# define NAND_ENV_SETTINGS +#endif #if defined(CONFIG_CMD_NET) # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) # define UBOOT_ENV_FILE "u-boot.bin" @@ -155,19 +171,23 @@ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \ "$(hostname):eth0:off" \ "\0" \ + \ + "ramfile=uImage\0" \ "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \ "ramboot=" \ - "tftp $(loadaddr) uImage;" \ + "tftp $(loadaddr) $(ramfile);" \ "run ramargs;" \ "run addip;" \ "bootm" \ "\0" \ + \ + "nfsfile=vmImage\0" \ "nfsargs=set bootargs " \ "root=/dev/nfs rw " \ "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \ "\0" \ "nfsboot=" \ - "tftp $(loadaddr) vmImage;" \ + "tftp $(loadaddr) $(nfsfile);" \ "run nfsargs;" \ "run addip;" \ "bootm" \ @@ -176,6 +196,7 @@ # define NETWORK_ENV_SETTINGS #endif #define CONFIG_EXTRA_ENV_SETTINGS \ + NAND_ENV_SETTINGS \ NETWORK_ENV_SETTINGS \ "flashboot=bootm 0x20100000\0" @@ -196,4 +217,9 @@ # define CONFIG_NET_RETRY_COUNT 20 #endif +/* + * Misc Settings + */ +#define CONFIG_LZMA + #endif diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h new file mode 100644 index 0000000..9cbc17a --- /dev/null +++ b/include/configs/blackstamp.h @@ -0,0 +1,273 @@ +/* + * U-boot - Configuration file for BlackStamp board + * Configuration by Ben Matthews for UR LLE using bf533-stamp.h + * as a template + * See http://blackfin.uclinux.org/gf/project/blackstamp/ + */ + +#ifndef __CONFIG_BLACKSTAMP_H__ +#define __CONFIG_BLACKSTAMP_H__ + +#include <asm/config-pre.h> + +/* + * Debugging: Set these options if you're having problems + */ +/* + * #define CONFIG_DEBUG_EARLY_SERIAL + * #define DEBUG + * #define CONFIG_DEBUG_DUMP + * #define CONFIG_DEBUG_DUMP_SYMS +*/ +#define CONFIG_PANIC_HANG 0 + +/* CPU Options + * Be sure to set the Silicon Revision Correctly + */ +#define CONFIG_BFIN_CPU bf532-0.5 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + +/* + * Board settings + */ +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x20300300 + +/* FLASH/ETHERNET uses the same address range + * Depending on what you have the CPLD doing + * this probably isn't needed + */ +#define SHARED_RESOURCES 1 + +/* Is I2C bit-banged? */ +#undef CONFIG_SOFT_I2 + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 16 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 3 + +/* + * Network settings + */ + +#ifdef CONFIG_DRIVER_SMC91111 +#define CONFIG_IPADDR 192.168.0.15 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.2 +#define CONFIG_HOSTNAME blackstamp +#define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs +#define CONFIG_SYS_AUTOLOAD "no" + +/* To remove hardcoding and enable MAC storage in EEPROM */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */ +#endif + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x40000 +#define ENV_IS_EMBEDDED_CUSTOM + +/* + * SDRAM settings & memory map + */ + +#define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */ +#define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_SYS_MALLOC_LEN (384 << 10) + +/* + * Command settings + */ + +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_AUTO_COMPLETE 1 +#define CONFIG_ENV_OVERWRITE 1 + +#include <config_cmd_default.h> + +#ifdef CONFIG_DRIVER_SMC91111 +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_PING +#else +# undef CONFIG_CMD_NET +#endif + +#ifdef CONFIG_SOFT_I2C +# define CONFIG_CMD_I2C +#endif + +#define CONFIG_CMD_BOOTLDR +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CPLBINFO +#define CONFIG_CMD_DATE +#define CONFIG_CMD_SF +#define CONFIG_CMD_ELF + +#define CONFIG_BOOTDELAY 5 +#define CONFIG_BOOTCOMMAND "run ramboot" +#define CONFIG_BOOTARGS \ + "root=/dev/mtdblock0 rw " \ + "clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \ + "earlyprintk=" \ + "serial," \ + "uart" MK_STR(CONFIG_UART_CONSOLE) "," \ + MK_STR(CONFIG_BAUDRATE) " " \ + "console=ttyBF0," MK_STR(CONFIG_BAUDRATE) + +#if defined(CONFIG_CMD_NET) +# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +# define UBOOT_ENV_FILE "u-boot.bin" +# else +# define UBOOT_ENV_FILE "u-boot.ldr" +# endif +# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +# ifdef CONFIG_SPI +# define UBOOT_ENV_UPDATE \ + "eeprom write $(loadaddr) 0x0 $(filesize)" +# else +# define UBOOT_ENV_UPDATE \ + "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \ + "sf erase 0 0x40000;" \ + "sf write $(loadaddr) 0 $(filesize)" +# endif +# else +# define UBOOT_ENV_UPDATE \ + "protect off 0x20000000 0x2003FFFF;" \ + "erase 0x20000000 0x2003FFFF;" \ + "cp.b $(loadaddr) 0x20000000 $(filesize)" +# endif +# define NETWORK_ENV_SETTINGS \ + "ubootfile=" UBOOT_ENV_FILE "\0" \ + "update=" \ + "tftp $(loadaddr) $(ubootfile);" \ + UBOOT_ENV_UPDATE \ + "\0" \ + "addip=set bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \ + "$(hostname):eth0:off" \ + "\0" \ + "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \ + "ramboot=" \ + "tftp $(loadaddr) uImage;" \ + "run ramargs;" \ + "run addip;" \ + "bootm" \ + "\0" \ + "nfsargs=set bootargs " \ + "root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \ + "\0" \ + "nfsboot=" \ + "tftp $(loadaddr) vmImage;" \ + "run nfsargs;" \ + "run addip;" \ + "bootm" \ + "\0" +#else +# define NETWORK_ENV_SETTINGS +#endif + +/* + * Console settings + */ +#define CONFIG_BAUDRATE 57600 +#define CONFIG_LOADS_ECHO 1 +#define CONFIG_UART_CONSOLE 0 + +/* + * I2C settings + * By default PF2 is used as SDA and PF3 as SCL on the Stamp board + * Located on the expansion connector on pins 86/85 + * Note these pins are arbitrarily chosen because we aren't using + * them yet. You can (and probably should) change these values! + */ +#ifdef CONFIG_SOFT_I2C + +#define PF_SCL PF9 +#define PF_SDA PF8 + +#define I2C_INIT do { *pFIO_DIR |= PF_SCL; SSYNC(); } while (0) +#define I2C_ACTIVE do { *pFIO_DIR |= PF_SDA; *pFIO_INEN &= ~PF_SDA; SSYNC(); } while (0) +#define I2C_TRISTATE do { *pFIO_DIR &= ~PF_SDA; *pFIO_INEN |= PF_SDA; SSYNC(); } while (0) +#define I2C_READ ((*pFIO_FLAG_D & PF_SDA) != 0) +#define I2C_SDA(bit) \ + do { \ + if (bit) \ + *pFIO_FLAG_S = PF_SDA; \ + else \ + *pFIO_FLAG_C = PF_SDA; \ + SSYNC(); \ + } while (0) +#define I2C_SCL(bit) \ + do { \ + if (bit) \ + *pFIO_FLAG_S = PF_SCL; \ + else \ + *pFIO_FLAG_C = PF_SCL; \ + SSYNC(); \ + } while (0) +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0xFE +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_RTC_BFIN 1 + +/* + * Serial Flash Infomation + */ +#define CONFIG_BFIN_SPI +/* For the M25P64 SCK Should be Kept < 20Mhz */ +#define CONFIG_ENV_SPI_MAX_HZ 20000000 +#define CONFIG_SF_DEFAULT_HZ 20000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + +/* + * FLASH organization and environment definitions + */ + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3 +#define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983 +#define CONFIG_EBIU_SDRRC_VAL 0x268 +#define CONFIG_EBIU_SDGCTL_VAL 0x911109 + +/* Even though Rev C boards have Parallel Flash + * We aren't supporting it. Newer versions of the + * hardware don't support Parallel Flash at all. + */ +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_JFFS2 +#undef CONFIG_CMD_FLASH + +#endif diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h new file mode 100644 index 0000000..79d06fb --- /dev/null +++ b/include/configs/cm-bf527.h @@ -0,0 +1,135 @@ +/* + * U-boot - Configuration file for CM-BF527 board + */ + +#ifndef __CONFIG_CM_BF527_H__ +#define __CONFIG_CM_BF527_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf527-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +#define CONFIG_EBIU_SDRRC_VAL 0x3f8 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * NAND Settings + * (can't be used sametime as ethernet) + */ +/* #define CONFIG_BFIN_NFC */ +#ifdef CONFIG_BFIN_NFC +#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 +#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND +#endif + + +/* + * Network Settings + */ +#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ + !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_RMII +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME cm-bf527 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 64 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x20008000 +#define CONFIG_ENV_OFFSET 0x8000 +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h new file mode 100644 index 0000000..ea548e9 --- /dev/null +++ b/include/configs/cm-bf533.h @@ -0,0 +1,102 @@ +/* + * U-boot - Configuration file for CM-BF533 board + */ + +#ifndef __CONFIG_CM_BF533_H__ +#define __CONFIG_CM_BF533_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf533-0.3 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 22 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 8192) - (7 + 2)) +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x20200300 +#define CONFIG_HOSTNAME cm-bf533 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 16 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SIZE 0x10000 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h new file mode 100644 index 0000000..021b631 --- /dev/null +++ b/include/configs/cm-bf537e.h @@ -0,0 +1,137 @@ +/* + * U-boot - Configuration file for CM-BF537E board + */ + +#ifndef __CONFIG_CM_BF537E_H__ +#define __CONFIG_CM_BF537E_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +#define CONFIG_EBIU_SDRRC_VAL 0x3f8 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME cm-bf537e +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 32 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +#define ENV_IS_EMBEDDED +#else +#define ENV_IS_EMBEDDED_CUSTOM +#endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h new file mode 100644 index 0000000..93c2239 --- /dev/null +++ b/include/configs/cm-bf548.h @@ -0,0 +1,139 @@ +/* + * U-boot - Configuration file for cm-bf548 board + */ + +#ifndef __CONFIG_CM_BF548_H__ +#define __CONFIG_CM_BF548_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf548-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_DDRCTL0_VAL 0x218A83FE +#define CONFIG_EBIU_DDRCTL1_VAL 0x20022222 +#define CONFIG_EBIU_DDRCTL2_VAL 0x00000021 + +/* Default bank mapping: + * Async Bank 0 - 32MB Burst Flash + * Async Bank 1 - Ethernet + * Async Bank 2 - Nothing + * Async Bank 3 - Nothing + */ +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 +#define CONFIG_EBIU_FCTL_VAL (BCLK_4) +#define CONFIG_EBIU_MODE_VAL (B0MODE_FLASH) + +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) +#define CONFIG_SYS_MALLOC_LEN (640 * 1024) + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_DRIVER_SMC911X 1 +#define CONFIG_DRIVER_SMC911X_BASE 0x24000000 +#define CONFIG_DRIVER_SMC911X_16_BIT +#define CONFIG_HOSTNAME cm-bf548 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:24:31:91 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 259 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x20008000 +#define CONFIG_ENV_OFFSET 0x8000 +#define CONFIG_ENV_SIZE 0x8000 +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 1 + +#ifndef __ADSPBF542__ +/* Don't waste time transferring a logo over the UART */ +# if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART) +# define CONFIG_VIDEO +# endif +# define CONFIG_DEB_DMA_URGENT +#endif + +/* Define if want to do post memory test */ +#undef CONFIG_POST +#ifdef CONFIG_POST +#define FLASH_START_POST_BLOCK 11 /* Should > = 11 */ +#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */ +#endif + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h new file mode 100644 index 0000000..53a2580 --- /dev/null +++ b/include/configs/cm-bf561.h @@ -0,0 +1,102 @@ +/* + * U-boot - Configuration file for CM-BF561 board + */ + +#ifndef __CONFIG_CM_BF561_H__ +#define __CONFIG_CM_BF561_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf561-0.3 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 22 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 4096) - (7 + 2)) +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) + +#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | B3_PEN | B2_PEN | B1_PEN | B0_PEN | AMBEN_ALL | AMCKEN) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x28000300 +#define CONFIG_HOSTNAME cm-bf561 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 67 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SIZE 0x10000 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h new file mode 100644 index 0000000..066859f --- /dev/null +++ b/include/configs/ibf-dsp561.h @@ -0,0 +1,145 @@ +/* + * U-boot - Configuration file for IBF-DSP561 board + */ + +#ifndef __CONFIG_IBF_DSP561__H__ +#define __CONFIG_IBF_DSP561__H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf561-0.5 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 24 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x377 +#define CONFIG_EBIU_SDGCTL_VAL 0x91998d +#define CONFIG_EBIU_SDBCTL_VAL 0x15 + +#define CONFIG_EBIU_AMGCTL_VAL 0x3F +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Flash Settings + */ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 135 /* max number of sectors on one chip */ +/* The BF561-EZKIT uses a top boot flash */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x20004000 +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +#define ENV_IS_EMBEDDED +#else +#define ENV_IS_EMBEDDED_CUSTOM +#endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + lib_generic/zlib.o (.text .text.*); \ + board/ibf-dsp561/ibf-dsp561.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif + + +/* + * I2C Settings + */ +#define CONFIG_SOFT_I2C 1 +#define PF_SCL 0x1/*PF0*/ +#define PF_SDA 0x2/*PF1*/ + +#ifdef CONFIG_SOFT_I2C +#define I2C_INIT do { *pFIO0_DIR |= PF_SCL; SSYNC(); } while (0) +#define I2C_ACTIVE do { *pFIO0_DIR |= PF_SDA; *pFIO0_INEN &= ~PF_SDA; SSYNC(); } while (0) +#define I2C_TRISTATE do { *pFIO0_DIR &= ~PF_SDA; *pFIO0_INEN |= PF_SDA; SSYNC(); } while (0) +#define I2C_READ ((*pFIO0_FLAG_D & PF_SDA) != 0) +#define I2C_SDA(bit) \ + do { \ + if (bit) \ + *pFIO0_FLAG_S = PF_SDA; \ + else \ + *pFIO0_FLAG_C = PF_SDA; \ + SSYNC(); \ + } while (0) +#define I2C_SCL(bit) \ + do { \ + if (bit) \ + *pFIO0_FLAG_S = PF_SCL; \ + else \ + *pFIO0_FLAG_C = PF_SCL; \ + SSYNC(); \ + } while (0) +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 +#endif + + +/* + * Misc Settings + */ +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h new file mode 100644 index 0000000..9794e1b --- /dev/null +++ b/include/configs/tcm-bf537.h @@ -0,0 +1,139 @@ +/* + * U-boot - Configuration file for TCM-BF537 board + */ + +#ifndef __CONFIG_TCM_BF537_H__ +#define __CONFIG_TCM_BF537_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +#define CONFIG_EBIU_SDRRC_VAL 0x3f8 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +/* TCM-BF537E has no PHY on it, but EXT-BF5xx-USB/Ethernet board has */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME tcm-bf537 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 67 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +#define ENV_IS_EMBEDDED +#else +#define ENV_IS_EMBEDDED_CUSTOM +#endif +#ifdef ENV_IS_EMBEDDED +/* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ +# define LDS_BOARD_TEXT \ + cpu/blackfin/traps.o (.text .text.*); \ + cpu/blackfin/interrupt.o (.text .text.*); \ + cpu/blackfin/serial.o (.text .text.*); \ + common/dlmalloc.o (.text .text.*); \ + lib_generic/crc32.o (.text .text.*); \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text .text.*); +#endif + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + + +#endif diff --git a/lib_blackfin/.gitignore b/lib_blackfin/.gitignore new file mode 100644 index 0000000..09f1be0 --- /dev/null +++ b/lib_blackfin/.gitignore @@ -0,0 +1 @@ +u-boot.lds diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile index 46ef7f3..e32ecc9 100644 --- a/lib_blackfin/Makefile +++ b/lib_blackfin/Makefile @@ -47,9 +47,12 @@ COBJS-y += string.o SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -$(LIB): $(obj).depend $(OBJS) +$(LIB): $(obj).depend $(OBJS) $(obj)u-boot.lds $(AR) $(ARFLAGS) $@ $(OBJS) +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + ######################################################################### # defines $(obj).depend target diff --git a/board/bf527-ezkit/u-boot.lds.S b/lib_blackfin/u-boot.lds.S index 3e8be35..4755153 100644 --- a/board/bf527-ezkit/u-boot.lds.S +++ b/lib_blackfin/u-boot.lds.S @@ -31,6 +31,10 @@ #undef ENTRY #undef bfin +#ifndef LDS_BOARD_TEXT +# define LDS_BOARD_TEXT +#endif + /* If we don't actually load anything into L1 data, this will avoid * a syntax error. If we do actually load something into L1 data, * we'll get a linker memory load error (which is what we'd want). @@ -57,9 +61,13 @@ SECTIONS .text : { cpu/blackfin/start.o (.text .text.*) + + LDS_BOARD_TEXT + __initcode_start = .; cpu/blackfin/initcode.o (.text .text.*) __initcode_end = .; + *(.text .text.*) } >ram |